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1/*
2 * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
3 *
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@petalogix.com>.
6 *
7 * 2007-2009 (c) Xilinx, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/module.h>
16#include <linux/uaccess.h>
17#include <linux/init.h>
18#include <linux/netdevice.h>
19#include <linux/etherdevice.h>
20#include <linux/skbuff.h>
21#include <linux/io.h>
22#include <linux/slab.h>
23#include <linux/of_address.h>
24#include <linux/of_device.h>
25#include <linux/of_platform.h>
26#include <linux/of_mdio.h>
27#include <linux/of_net.h>
28#include <linux/phy.h>
29#include <linux/interrupt.h>
30
31#define DRIVER_NAME "xilinx_emaclite"
32
33/* Register offsets for the EmacLite Core */
34#define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */
35#define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
36#define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */
37#define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */
38#define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */
39#define XEL_GIER_OFFSET 0x07F8 /* GIE Register */
40#define XEL_TSR_OFFSET 0x07FC /* Tx status */
41#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
42
43#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
44#define XEL_RPLR_OFFSET 0x100C /* Rx packet length */
45#define XEL_RSR_OFFSET 0x17FC /* Rx status */
46
47#define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */
48
49/* MDIO Address Register Bit Masks */
50#define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
51#define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
52#define XEL_MDIOADDR_PHYADR_SHIFT 5
53#define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */
54
55/* MDIO Write Data Register Bit Masks */
56#define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */
57
58/* MDIO Read Data Register Bit Masks */
59#define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */
60
61/* MDIO Control Register Bit Masks */
62#define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */
63#define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */
64
65/* Global Interrupt Enable Register (GIER) Bit Masks */
66#define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */
67
68/* Transmit Status Register (TSR) Bit Masks */
69#define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */
70#define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
71#define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */
72#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit
73 * only. This is not documented
74 * in the HW spec */
75
76/* Define for programming the MAC address into the EmacLite */
77#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
78
79/* Receive Status Register (RSR) */
80#define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */
81#define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */
82
83/* Transmit Packet Length Register (TPLR) */
84#define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */
85
86/* Receive Packet Length Register (RPLR) */
87#define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */
88
89#define XEL_HEADER_OFFSET 12 /* Offset to length field */
90#define XEL_HEADER_SHIFT 16 /* Shift value for length */
91
92/* General Ethernet Definitions */
93#define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */
94#define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */
95
96
97
98#define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */
99#define ALIGNMENT 4
100
101/* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
102#define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
103
104/**
105 * struct net_local - Our private per device data
106 * @ndev: instance of the network device
107 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW
108 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW
109 * @next_tx_buf_to_use: next Tx buffer to write to
110 * @next_rx_buf_to_use: next Rx buffer to read from
111 * @base_addr: base address of the Emaclite device
112 * @reset_lock: lock used for synchronization
113 * @deferred_skb: holds an skb (for transmission at a later time) when the
114 * Tx buffer is not free
115 * @phy_dev: pointer to the PHY device
116 * @phy_node: pointer to the PHY device node
117 * @mii_bus: pointer to the MII bus
118 * @mdio_irqs: IRQs table for MDIO bus
119 * @last_link: last link status
120 * @has_mdio: indicates whether MDIO is included in the HW
121 */
122struct net_local {
123
124 struct net_device *ndev;
125
126 bool tx_ping_pong;
127 bool rx_ping_pong;
128 u32 next_tx_buf_to_use;
129 u32 next_rx_buf_to_use;
130 void __iomem *base_addr;
131
132 spinlock_t reset_lock;
133 struct sk_buff *deferred_skb;
134
135 struct phy_device *phy_dev;
136 struct device_node *phy_node;
137
138 struct mii_bus *mii_bus;
139 int mdio_irqs[PHY_MAX_ADDR];
140
141 int last_link;
142 bool has_mdio;
143};
144
145
146/*************************/
147/* EmacLite driver calls */
148/*************************/
149
150/**
151 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
152 * @drvdata: Pointer to the Emaclite device private data
153 *
154 * This function enables the Tx and Rx interrupts for the Emaclite device along
155 * with the Global Interrupt Enable.
156 */
157static void xemaclite_enable_interrupts(struct net_local *drvdata)
158{
159 u32 reg_data;
160
161 /* Enable the Tx interrupts for the first Buffer */
162 reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
163 out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
164 reg_data | XEL_TSR_XMIT_IE_MASK);
165
166 /* Enable the Tx interrupts for the second Buffer if
167 * configured in HW */
168 if (drvdata->tx_ping_pong != 0) {
169 reg_data = in_be32(drvdata->base_addr +
170 XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
171 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
172 XEL_TSR_OFFSET,
173 reg_data | XEL_TSR_XMIT_IE_MASK);
174 }
175
176 /* Enable the Rx interrupts for the first buffer */
177 out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
178 XEL_RSR_RECV_IE_MASK);
179
180 /* Enable the Rx interrupts for the second Buffer if
181 * configured in HW */
182 if (drvdata->rx_ping_pong != 0) {
183 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
184 XEL_RSR_OFFSET,
185 XEL_RSR_RECV_IE_MASK);
186 }
187
188 /* Enable the Global Interrupt Enable */
189 out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
190}
191
192/**
193 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
194 * @drvdata: Pointer to the Emaclite device private data
195 *
196 * This function disables the Tx and Rx interrupts for the Emaclite device,
197 * along with the Global Interrupt Enable.
198 */
199static void xemaclite_disable_interrupts(struct net_local *drvdata)
200{
201 u32 reg_data;
202
203 /* Disable the Global Interrupt Enable */
204 out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK);
205
206 /* Disable the Tx interrupts for the first buffer */
207 reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET);
208 out_be32(drvdata->base_addr + XEL_TSR_OFFSET,
209 reg_data & (~XEL_TSR_XMIT_IE_MASK));
210
211 /* Disable the Tx interrupts for the second Buffer
212 * if configured in HW */
213 if (drvdata->tx_ping_pong != 0) {
214 reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
215 XEL_TSR_OFFSET);
216 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
217 XEL_TSR_OFFSET,
218 reg_data & (~XEL_TSR_XMIT_IE_MASK));
219 }
220
221 /* Disable the Rx interrupts for the first buffer */
222 reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET);
223 out_be32(drvdata->base_addr + XEL_RSR_OFFSET,
224 reg_data & (~XEL_RSR_RECV_IE_MASK));
225
226 /* Disable the Rx interrupts for the second buffer
227 * if configured in HW */
228 if (drvdata->rx_ping_pong != 0) {
229
230 reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
231 XEL_RSR_OFFSET);
232 out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET +
233 XEL_RSR_OFFSET,
234 reg_data & (~XEL_RSR_RECV_IE_MASK));
235 }
236}
237
238/**
239 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
240 * @src_ptr: Void pointer to the 16-bit aligned source address
241 * @dest_ptr: Pointer to the 32-bit aligned destination address
242 * @length: Number bytes to write from source to destination
243 *
244 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
245 * address in the EmacLite device.
246 */
247static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
248 unsigned length)
249{
250 u32 align_buffer;
251 u32 *to_u32_ptr;
252 u16 *from_u16_ptr, *to_u16_ptr;
253
254 to_u32_ptr = dest_ptr;
255 from_u16_ptr = src_ptr;
256 align_buffer = 0;
257
258 for (; length > 3; length -= 4) {
259 to_u16_ptr = (u16 *)&align_buffer;
260 *to_u16_ptr++ = *from_u16_ptr++;
261 *to_u16_ptr++ = *from_u16_ptr++;
262
263 /* Output a word */
264 *to_u32_ptr++ = align_buffer;
265 }
266 if (length) {
267 u8 *from_u8_ptr, *to_u8_ptr;
268
269 /* Set up to output the remaining data */
270 align_buffer = 0;
271 to_u8_ptr = (u8 *) &align_buffer;
272 from_u8_ptr = (u8 *) from_u16_ptr;
273
274 /* Output the remaining data */
275 for (; length > 0; length--)
276 *to_u8_ptr++ = *from_u8_ptr++;
277
278 *to_u32_ptr = align_buffer;
279 }
280}
281
282/**
283 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
284 * @src_ptr: Pointer to the 32-bit aligned source address
285 * @dest_ptr: Pointer to the 16-bit aligned destination address
286 * @length: Number bytes to read from source to destination
287 *
288 * This function reads data from a 32-bit aligned address in the EmacLite device
289 * to a 16-bit aligned buffer.
290 */
291static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
292 unsigned length)
293{
294 u16 *to_u16_ptr, *from_u16_ptr;
295 u32 *from_u32_ptr;
296 u32 align_buffer;
297
298 from_u32_ptr = src_ptr;
299 to_u16_ptr = (u16 *) dest_ptr;
300
301 for (; length > 3; length -= 4) {
302 /* Copy each word into the temporary buffer */
303 align_buffer = *from_u32_ptr++;
304 from_u16_ptr = (u16 *)&align_buffer;
305
306 /* Read data from source */
307 *to_u16_ptr++ = *from_u16_ptr++;
308 *to_u16_ptr++ = *from_u16_ptr++;
309 }
310
311 if (length) {
312 u8 *to_u8_ptr, *from_u8_ptr;
313
314 /* Set up to read the remaining data */
315 to_u8_ptr = (u8 *) to_u16_ptr;
316 align_buffer = *from_u32_ptr++;
317 from_u8_ptr = (u8 *) &align_buffer;
318
319 /* Read the remaining data */
320 for (; length > 0; length--)
321 *to_u8_ptr = *from_u8_ptr;
322 }
323}
324
325/**
326 * xemaclite_send_data - Send an Ethernet frame
327 * @drvdata: Pointer to the Emaclite device private data
328 * @data: Pointer to the data to be sent
329 * @byte_count: Total frame size, including header
330 *
331 * This function checks if the Tx buffer of the Emaclite device is free to send
332 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
333 * returns an error.
334 *
335 * Return: 0 upon success or -1 if the buffer(s) are full.
336 *
337 * Note: The maximum Tx packet size can not be more than Ethernet header
338 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
339 */
340static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
341 unsigned int byte_count)
342{
343 u32 reg_data;
344 void __iomem *addr;
345
346 /* Determine the expected Tx buffer address */
347 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
348
349 /* If the length is too large, truncate it */
350 if (byte_count > ETH_FRAME_LEN)
351 byte_count = ETH_FRAME_LEN;
352
353 /* Check if the expected buffer is available */
354 reg_data = in_be32(addr + XEL_TSR_OFFSET);
355 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
356 XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
357
358 /* Switch to next buffer if configured */
359 if (drvdata->tx_ping_pong != 0)
360 drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
361 } else if (drvdata->tx_ping_pong != 0) {
362 /* If the expected buffer is full, try the other buffer,
363 * if it is configured in HW */
364
365 addr = (void __iomem __force *)((u32 __force)addr ^
366 XEL_BUFFER_OFFSET);
367 reg_data = in_be32(addr + XEL_TSR_OFFSET);
368
369 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
370 XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
371 return -1; /* Buffers were full, return failure */
372 } else
373 return -1; /* Buffer was full, return failure */
374
375 /* Write the frame to the buffer */
376 xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
377
378 out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK));
379
380 /* Update the Tx Status Register to indicate that there is a
381 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
382 * is used by the interrupt handler to check whether a frame
383 * has been transmitted */
384 reg_data = in_be32(addr + XEL_TSR_OFFSET);
385 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
386 out_be32(addr + XEL_TSR_OFFSET, reg_data);
387
388 return 0;
389}
390
391/**
392 * xemaclite_recv_data - Receive a frame
393 * @drvdata: Pointer to the Emaclite device private data
394 * @data: Address where the data is to be received
395 *
396 * This function is intended to be called from the interrupt context or
397 * with a wrapper which waits for the receive frame to be available.
398 *
399 * Return: Total number of bytes received
400 */
401static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
402{
403 void __iomem *addr;
404 u16 length, proto_type;
405 u32 reg_data;
406
407 /* Determine the expected buffer address */
408 addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
409
410 /* Verify which buffer has valid data */
411 reg_data = in_be32(addr + XEL_RSR_OFFSET);
412
413 if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
414 if (drvdata->rx_ping_pong != 0)
415 drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
416 } else {
417 /* The instance is out of sync, try other buffer if other
418 * buffer is configured, return 0 otherwise. If the instance is
419 * out of sync, do not update the 'next_rx_buf_to_use' since it
420 * will correct on subsequent calls */
421 if (drvdata->rx_ping_pong != 0)
422 addr = (void __iomem __force *)((u32 __force)addr ^
423 XEL_BUFFER_OFFSET);
424 else
425 return 0; /* No data was available */
426
427 /* Verify that buffer has valid data */
428 reg_data = in_be32(addr + XEL_RSR_OFFSET);
429 if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
430 XEL_RSR_RECV_DONE_MASK)
431 return 0; /* No data was available */
432 }
433
434 /* Get the protocol type of the ethernet frame that arrived */
435 proto_type = ((ntohl(in_be32(addr + XEL_HEADER_OFFSET +
436 XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
437 XEL_RPLR_LENGTH_MASK);
438
439 /* Check if received ethernet frame is a raw ethernet frame
440 * or an IP packet or an ARP packet */
441 if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
442
443 if (proto_type == ETH_P_IP) {
444 length = ((ntohl(in_be32(addr +
445 XEL_HEADER_IP_LENGTH_OFFSET +
446 XEL_RXBUFF_OFFSET)) >>
447 XEL_HEADER_SHIFT) &
448 XEL_RPLR_LENGTH_MASK);
449 length += ETH_HLEN + ETH_FCS_LEN;
450
451 } else if (proto_type == ETH_P_ARP)
452 length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
453 else
454 /* Field contains type other than IP or ARP, use max
455 * frame size and let user parse it */
456 length = ETH_FRAME_LEN + ETH_FCS_LEN;
457 } else
458 /* Use the length in the frame, plus the header and trailer */
459 length = proto_type + ETH_HLEN + ETH_FCS_LEN;
460
461 /* Read from the EmacLite device */
462 xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET),
463 data, length);
464
465 /* Acknowledge the frame */
466 reg_data = in_be32(addr + XEL_RSR_OFFSET);
467 reg_data &= ~XEL_RSR_RECV_DONE_MASK;
468 out_be32(addr + XEL_RSR_OFFSET, reg_data);
469
470 return length;
471}
472
473/**
474 * xemaclite_update_address - Update the MAC address in the device
475 * @drvdata: Pointer to the Emaclite device private data
476 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
477 *
478 * Tx must be idle and Rx should be idle for deterministic results.
479 * It is recommended that this function should be called after the
480 * initialization and before transmission of any packets from the device.
481 * The MAC address can be programmed using any of the two transmit
482 * buffers (if configured).
483 */
484static void xemaclite_update_address(struct net_local *drvdata,
485 u8 *address_ptr)
486{
487 void __iomem *addr;
488 u32 reg_data;
489
490 /* Determine the expected Tx buffer address */
491 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
492
493 xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
494
495 out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN);
496
497 /* Update the MAC address in the EmacLite */
498 reg_data = in_be32(addr + XEL_TSR_OFFSET);
499 out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR);
500
501 /* Wait for EmacLite to finish with the MAC address update */
502 while ((in_be32(addr + XEL_TSR_OFFSET) &
503 XEL_TSR_PROG_MAC_ADDR) != 0)
504 ;
505}
506
507/**
508 * xemaclite_set_mac_address - Set the MAC address for this device
509 * @dev: Pointer to the network device instance
510 * @addr: Void pointer to the sockaddr structure
511 *
512 * This function copies the HW address from the sockaddr strucutre to the
513 * net_device structure and updates the address in HW.
514 *
515 * Return: Error if the net device is busy or 0 if the addr is set
516 * successfully
517 */
518static int xemaclite_set_mac_address(struct net_device *dev, void *address)
519{
520 struct net_local *lp = netdev_priv(dev);
521 struct sockaddr *addr = address;
522
523 if (netif_running(dev))
524 return -EBUSY;
525
526 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
527 xemaclite_update_address(lp, dev->dev_addr);
528 return 0;
529}
530
531/**
532 * xemaclite_tx_timeout - Callback for Tx Timeout
533 * @dev: Pointer to the network device
534 *
535 * This function is called when Tx time out occurs for Emaclite device.
536 */
537static void xemaclite_tx_timeout(struct net_device *dev)
538{
539 struct net_local *lp = netdev_priv(dev);
540 unsigned long flags;
541
542 dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
543 TX_TIMEOUT * 1000UL / HZ);
544
545 dev->stats.tx_errors++;
546
547 /* Reset the device */
548 spin_lock_irqsave(&lp->reset_lock, flags);
549
550 /* Shouldn't really be necessary, but shouldn't hurt */
551 netif_stop_queue(dev);
552
553 xemaclite_disable_interrupts(lp);
554 xemaclite_enable_interrupts(lp);
555
556 if (lp->deferred_skb) {
557 dev_kfree_skb(lp->deferred_skb);
558 lp->deferred_skb = NULL;
559 dev->stats.tx_errors++;
560 }
561
562 /* To exclude tx timeout */
563 dev->trans_start = jiffies; /* prevent tx timeout */
564
565 /* We're all ready to go. Start the queue */
566 netif_wake_queue(dev);
567 spin_unlock_irqrestore(&lp->reset_lock, flags);
568}
569
570/**********************/
571/* Interrupt Handlers */
572/**********************/
573
574/**
575 * xemaclite_tx_handler - Interrupt handler for frames sent
576 * @dev: Pointer to the network device
577 *
578 * This function updates the number of packets transmitted and handles the
579 * deferred skb, if there is one.
580 */
581static void xemaclite_tx_handler(struct net_device *dev)
582{
583 struct net_local *lp = netdev_priv(dev);
584
585 dev->stats.tx_packets++;
586 if (lp->deferred_skb) {
587 if (xemaclite_send_data(lp,
588 (u8 *) lp->deferred_skb->data,
589 lp->deferred_skb->len) != 0)
590 return;
591 else {
592 dev->stats.tx_bytes += lp->deferred_skb->len;
593 dev_kfree_skb_irq(lp->deferred_skb);
594 lp->deferred_skb = NULL;
595 dev->trans_start = jiffies; /* prevent tx timeout */
596 netif_wake_queue(dev);
597 }
598 }
599}
600
601/**
602 * xemaclite_rx_handler- Interrupt handler for frames received
603 * @dev: Pointer to the network device
604 *
605 * This function allocates memory for a socket buffer, fills it with data
606 * received and hands it over to the TCP/IP stack.
607 */
608static void xemaclite_rx_handler(struct net_device *dev)
609{
610 struct net_local *lp = netdev_priv(dev);
611 struct sk_buff *skb;
612 unsigned int align;
613 u32 len;
614
615 len = ETH_FRAME_LEN + ETH_FCS_LEN;
616 skb = netdev_alloc_skb(dev, len + ALIGNMENT);
617 if (!skb) {
618 /* Couldn't get memory. */
619 dev->stats.rx_dropped++;
620 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
621 return;
622 }
623
624 /*
625 * A new skb should have the data halfword aligned, but this code is
626 * here just in case that isn't true. Calculate how many
627 * bytes we should reserve to get the data to start on a word
628 * boundary */
629 align = BUFFER_ALIGN(skb->data);
630 if (align)
631 skb_reserve(skb, align);
632
633 skb_reserve(skb, 2);
634
635 len = xemaclite_recv_data(lp, (u8 *) skb->data);
636
637 if (!len) {
638 dev->stats.rx_errors++;
639 dev_kfree_skb_irq(skb);
640 return;
641 }
642
643 skb_put(skb, len); /* Tell the skb how much data we got */
644
645 skb->protocol = eth_type_trans(skb, dev);
646 skb_checksum_none_assert(skb);
647
648 dev->stats.rx_packets++;
649 dev->stats.rx_bytes += len;
650
651 if (!skb_defer_rx_timestamp(skb))
652 netif_rx(skb); /* Send the packet upstream */
653}
654
655/**
656 * xemaclite_interrupt - Interrupt handler for this driver
657 * @irq: Irq of the Emaclite device
658 * @dev_id: Void pointer to the network device instance used as callback
659 * reference
660 *
661 * This function handles the Tx and Rx interrupts of the EmacLite device.
662 */
663static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
664{
665 bool tx_complete = false;
666 struct net_device *dev = dev_id;
667 struct net_local *lp = netdev_priv(dev);
668 void __iomem *base_addr = lp->base_addr;
669 u32 tx_status;
670
671 /* Check if there is Rx Data available */
672 if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) ||
673 (in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
674 & XEL_RSR_RECV_DONE_MASK))
675
676 xemaclite_rx_handler(dev);
677
678 /* Check if the Transmission for the first buffer is completed */
679 tx_status = in_be32(base_addr + XEL_TSR_OFFSET);
680 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
681 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
682
683 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
684 out_be32(base_addr + XEL_TSR_OFFSET, tx_status);
685
686 tx_complete = true;
687 }
688
689 /* Check if the Transmission for the second buffer is completed */
690 tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
691 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
692 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
693
694 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
695 out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET,
696 tx_status);
697
698 tx_complete = true;
699 }
700
701 /* If there was a Tx interrupt, call the Tx Handler */
702 if (tx_complete != 0)
703 xemaclite_tx_handler(dev);
704
705 return IRQ_HANDLED;
706}
707
708/**********************/
709/* MDIO Bus functions */
710/**********************/
711
712/**
713 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
714 * @lp: Pointer to the Emaclite device private data
715 *
716 * This function waits till the device is ready to accept a new MDIO
717 * request.
718 *
719 * Return: 0 for success or ETIMEDOUT for a timeout
720 */
721
722static int xemaclite_mdio_wait(struct net_local *lp)
723{
724 long end = jiffies + 2;
725
726 /* wait for the MDIO interface to not be busy or timeout
727 after some time.
728 */
729 while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
730 XEL_MDIOCTRL_MDIOSTS_MASK) {
731 if (end - jiffies <= 0) {
732 WARN_ON(1);
733 return -ETIMEDOUT;
734 }
735 msleep(1);
736 }
737 return 0;
738}
739
740/**
741 * xemaclite_mdio_read - Read from a given MII management register
742 * @bus: the mii_bus struct
743 * @phy_id: the phy address
744 * @reg: register number to read from
745 *
746 * This function waits till the device is ready to accept a new MDIO
747 * request and then writes the phy address to the MDIO Address register
748 * and reads data from MDIO Read Data register, when its available.
749 *
750 * Return: Value read from the MII management register
751 */
752static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
753{
754 struct net_local *lp = bus->priv;
755 u32 ctrl_reg;
756 u32 rc;
757
758 if (xemaclite_mdio_wait(lp))
759 return -ETIMEDOUT;
760
761 /* Write the PHY address, register number and set the OP bit in the
762 * MDIO Address register. Set the Status bit in the MDIO Control
763 * register to start a MDIO read transaction.
764 */
765 ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
766 out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
767 XEL_MDIOADDR_OP_MASK |
768 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
769 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
770 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
771
772 if (xemaclite_mdio_wait(lp))
773 return -ETIMEDOUT;
774
775 rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET);
776
777 dev_dbg(&lp->ndev->dev,
778 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
779 phy_id, reg, rc);
780
781 return rc;
782}
783
784/**
785 * xemaclite_mdio_write - Write to a given MII management register
786 * @bus: the mii_bus struct
787 * @phy_id: the phy address
788 * @reg: register number to write to
789 * @val: value to write to the register number specified by reg
790 *
791 * This function waits till the device is ready to accept a new MDIO
792 * request and then writes the val to the MDIO Write Data register.
793 */
794static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
795 u16 val)
796{
797 struct net_local *lp = bus->priv;
798 u32 ctrl_reg;
799
800 dev_dbg(&lp->ndev->dev,
801 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
802 phy_id, reg, val);
803
804 if (xemaclite_mdio_wait(lp))
805 return -ETIMEDOUT;
806
807 /* Write the PHY address, register number and clear the OP bit in the
808 * MDIO Address register and then write the value into the MDIO Write
809 * Data register. Finally, set the Status bit in the MDIO Control
810 * register to start a MDIO write transaction.
811 */
812 ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET);
813 out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET,
814 ~XEL_MDIOADDR_OP_MASK &
815 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg));
816 out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val);
817 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
818 ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK);
819
820 return 0;
821}
822
823/**
824 * xemaclite_mdio_reset - Reset the mdio bus.
825 * @bus: Pointer to the MII bus
826 *
827 * This function is required(?) as per Documentation/networking/phy.txt.
828 * There is no reset in this device; this function always returns 0.
829 */
830static int xemaclite_mdio_reset(struct mii_bus *bus)
831{
832 return 0;
833}
834
835/**
836 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
837 * @lp: Pointer to the Emaclite device private data
838 * @ofdev: Pointer to OF device structure
839 *
840 * This function enables MDIO bus in the Emaclite device and registers a
841 * mii_bus.
842 *
843 * Return: 0 upon success or a negative error upon failure
844 */
845static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
846{
847 struct mii_bus *bus;
848 int rc;
849 struct resource res;
850 struct device_node *np = of_get_parent(lp->phy_node);
851
852 /* Don't register the MDIO bus if the phy_node or its parent node
853 * can't be found.
854 */
855 if (!np)
856 return -ENODEV;
857
858 /* Enable the MDIO bus by asserting the enable bit in MDIO Control
859 * register.
860 */
861 out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET,
862 XEL_MDIOCTRL_MDIOEN_MASK);
863
864 bus = mdiobus_alloc();
865 if (!bus)
866 return -ENOMEM;
867
868 of_address_to_resource(np, 0, &res);
869 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
870 (unsigned long long)res.start);
871 bus->priv = lp;
872 bus->name = "Xilinx Emaclite MDIO";
873 bus->read = xemaclite_mdio_read;
874 bus->write = xemaclite_mdio_write;
875 bus->reset = xemaclite_mdio_reset;
876 bus->parent = dev;
877 bus->irq = lp->mdio_irqs; /* preallocated IRQ table */
878
879 lp->mii_bus = bus;
880
881 rc = of_mdiobus_register(bus, np);
882 if (rc)
883 goto err_register;
884
885 return 0;
886
887err_register:
888 mdiobus_free(bus);
889 return rc;
890}
891
892/**
893 * xemaclite_adjust_link - Link state callback for the Emaclite device
894 * @ndev: pointer to net_device struct
895 *
896 * There's nothing in the Emaclite device to be configured when the link
897 * state changes. We just print the status.
898 */
899void xemaclite_adjust_link(struct net_device *ndev)
900{
901 struct net_local *lp = netdev_priv(ndev);
902 struct phy_device *phy = lp->phy_dev;
903 int link_state;
904
905 /* hash together the state values to decide if something has changed */
906 link_state = phy->speed | (phy->duplex << 1) | phy->link;
907
908 if (lp->last_link != link_state) {
909 lp->last_link = link_state;
910 phy_print_status(phy);
911 }
912}
913
914/**
915 * xemaclite_open - Open the network device
916 * @dev: Pointer to the network device
917 *
918 * This function sets the MAC address, requests an IRQ and enables interrupts
919 * for the Emaclite device and starts the Tx queue.
920 * It also connects to the phy device, if MDIO is included in Emaclite device.
921 */
922static int xemaclite_open(struct net_device *dev)
923{
924 struct net_local *lp = netdev_priv(dev);
925 int retval;
926
927 /* Just to be safe, stop the device first */
928 xemaclite_disable_interrupts(lp);
929
930 if (lp->phy_node) {
931 u32 bmcr;
932
933 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
934 xemaclite_adjust_link, 0,
935 PHY_INTERFACE_MODE_MII);
936 if (!lp->phy_dev) {
937 dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
938 return -ENODEV;
939 }
940
941 /* EmacLite doesn't support giga-bit speeds */
942 lp->phy_dev->supported &= (PHY_BASIC_FEATURES);
943 lp->phy_dev->advertising = lp->phy_dev->supported;
944
945 /* Don't advertise 1000BASE-T Full/Half duplex speeds */
946 phy_write(lp->phy_dev, MII_CTRL1000, 0);
947
948 /* Advertise only 10 and 100mbps full/half duplex speeds */
949 phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL);
950
951 /* Restart auto negotiation */
952 bmcr = phy_read(lp->phy_dev, MII_BMCR);
953 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
954 phy_write(lp->phy_dev, MII_BMCR, bmcr);
955
956 phy_start(lp->phy_dev);
957 }
958
959 /* Set the MAC address each time opened */
960 xemaclite_update_address(lp, dev->dev_addr);
961
962 /* Grab the IRQ */
963 retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
964 if (retval) {
965 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
966 dev->irq);
967 if (lp->phy_dev)
968 phy_disconnect(lp->phy_dev);
969 lp->phy_dev = NULL;
970
971 return retval;
972 }
973
974 /* Enable Interrupts */
975 xemaclite_enable_interrupts(lp);
976
977 /* We're ready to go */
978 netif_start_queue(dev);
979
980 return 0;
981}
982
983/**
984 * xemaclite_close - Close the network device
985 * @dev: Pointer to the network device
986 *
987 * This function stops the Tx queue, disables interrupts and frees the IRQ for
988 * the Emaclite device.
989 * It also disconnects the phy device associated with the Emaclite device.
990 */
991static int xemaclite_close(struct net_device *dev)
992{
993 struct net_local *lp = netdev_priv(dev);
994
995 netif_stop_queue(dev);
996 xemaclite_disable_interrupts(lp);
997 free_irq(dev->irq, dev);
998
999 if (lp->phy_dev)
1000 phy_disconnect(lp->phy_dev);
1001 lp->phy_dev = NULL;
1002
1003 return 0;
1004}
1005
1006/**
1007 * xemaclite_send - Transmit a frame
1008 * @orig_skb: Pointer to the socket buffer to be transmitted
1009 * @dev: Pointer to the network device
1010 *
1011 * This function checks if the Tx buffer of the Emaclite device is free to send
1012 * data. If so, it fills the Tx buffer with data from socket buffer data,
1013 * updates the stats and frees the socket buffer. The Tx completion is signaled
1014 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
1015 * deferred and the Tx queue is stopped so that the deferred socket buffer can
1016 * be transmitted when the Emaclite device is free to transmit data.
1017 *
1018 * Return: 0, always.
1019 */
1020static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
1021{
1022 struct net_local *lp = netdev_priv(dev);
1023 struct sk_buff *new_skb;
1024 unsigned int len;
1025 unsigned long flags;
1026
1027 len = orig_skb->len;
1028
1029 new_skb = orig_skb;
1030
1031 spin_lock_irqsave(&lp->reset_lock, flags);
1032 if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) {
1033 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1034 * defer the skb for transmission during the ISR, after the
1035 * current transmission is complete */
1036 netif_stop_queue(dev);
1037 lp->deferred_skb = new_skb;
1038 /* Take the time stamp now, since we can't do this in an ISR. */
1039 skb_tx_timestamp(new_skb);
1040 spin_unlock_irqrestore(&lp->reset_lock, flags);
1041 return 0;
1042 }
1043 spin_unlock_irqrestore(&lp->reset_lock, flags);
1044
1045 skb_tx_timestamp(new_skb);
1046
1047 dev->stats.tx_bytes += len;
1048 dev_kfree_skb(new_skb);
1049
1050 return 0;
1051}
1052
1053/**
1054 * xemaclite_remove_ndev - Free the network device
1055 * @ndev: Pointer to the network device to be freed
1056 *
1057 * This function un maps the IO region of the Emaclite device and frees the net
1058 * device.
1059 */
1060static void xemaclite_remove_ndev(struct net_device *ndev)
1061{
1062 if (ndev) {
1063 struct net_local *lp = netdev_priv(ndev);
1064
1065 if (lp->base_addr)
1066 iounmap((void __iomem __force *) (lp->base_addr));
1067 free_netdev(ndev);
1068 }
1069}
1070
1071/**
1072 * get_bool - Get a parameter from the OF device
1073 * @ofdev: Pointer to OF device structure
1074 * @s: Property to be retrieved
1075 *
1076 * This function looks for a property in the device node and returns the value
1077 * of the property if its found or 0 if the property is not found.
1078 *
1079 * Return: Value of the parameter if the parameter is found, or 0 otherwise
1080 */
1081static bool get_bool(struct platform_device *ofdev, const char *s)
1082{
1083 u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1084
1085 if (p) {
1086 return (bool)*p;
1087 } else {
1088 dev_warn(&ofdev->dev, "Parameter %s not found,"
1089 "defaulting to false\n", s);
1090 return 0;
1091 }
1092}
1093
1094static struct net_device_ops xemaclite_netdev_ops;
1095
1096/**
1097 * xemaclite_of_probe - Probe method for the Emaclite device.
1098 * @ofdev: Pointer to OF device structure
1099 * @match: Pointer to the structure used for matching a device
1100 *
1101 * This function probes for the Emaclite device in the device tree.
1102 * It initializes the driver data structure and the hardware, sets the MAC
1103 * address and registers the network device.
1104 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1105 * in the device.
1106 *
1107 * Return: 0, if the driver is bound to the Emaclite device, or
1108 * a negative error if there is failure.
1109 */
1110static int __devinit xemaclite_of_probe(struct platform_device *ofdev)
1111{
1112 struct resource r_irq; /* Interrupt resources */
1113 struct resource r_mem; /* IO mem resources */
1114 struct net_device *ndev = NULL;
1115 struct net_local *lp = NULL;
1116 struct device *dev = &ofdev->dev;
1117 const void *mac_address;
1118
1119 int rc = 0;
1120
1121 dev_info(dev, "Device Tree Probing\n");
1122
1123 /* Get iospace for the device */
1124 rc = of_address_to_resource(ofdev->dev.of_node, 0, &r_mem);
1125 if (rc) {
1126 dev_err(dev, "invalid address\n");
1127 return rc;
1128 }
1129
1130 /* Get IRQ for the device */
1131 rc = of_irq_to_resource(ofdev->dev.of_node, 0, &r_irq);
1132 if (!rc) {
1133 dev_err(dev, "no IRQ found\n");
1134 return rc;
1135 }
1136
1137 /* Create an ethernet device instance */
1138 ndev = alloc_etherdev(sizeof(struct net_local));
1139 if (!ndev)
1140 return -ENOMEM;
1141
1142 dev_set_drvdata(dev, ndev);
1143 SET_NETDEV_DEV(ndev, &ofdev->dev);
1144
1145 ndev->irq = r_irq.start;
1146 ndev->mem_start = r_mem.start;
1147 ndev->mem_end = r_mem.end;
1148
1149 lp = netdev_priv(ndev);
1150 lp->ndev = ndev;
1151
1152 if (!request_mem_region(ndev->mem_start,
1153 ndev->mem_end - ndev->mem_start + 1,
1154 DRIVER_NAME)) {
1155 dev_err(dev, "Couldn't lock memory region at %p\n",
1156 (void *)ndev->mem_start);
1157 rc = -EBUSY;
1158 goto error2;
1159 }
1160
1161 /* Get the virtual base address for the device */
1162 lp->base_addr = ioremap(r_mem.start, resource_size(&r_mem));
1163 if (NULL == lp->base_addr) {
1164 dev_err(dev, "EmacLite: Could not allocate iomem\n");
1165 rc = -EIO;
1166 goto error1;
1167 }
1168
1169 spin_lock_init(&lp->reset_lock);
1170 lp->next_tx_buf_to_use = 0x0;
1171 lp->next_rx_buf_to_use = 0x0;
1172 lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1173 lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1174 mac_address = of_get_mac_address(ofdev->dev.of_node);
1175
1176 if (mac_address)
1177 /* Set the MAC address. */
1178 memcpy(ndev->dev_addr, mac_address, 6);
1179 else
1180 dev_warn(dev, "No MAC address found\n");
1181
1182 /* Clear the Tx CSR's in case this is a restart */
1183 out_be32(lp->base_addr + XEL_TSR_OFFSET, 0);
1184 out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0);
1185
1186 /* Set the MAC address in the EmacLite device */
1187 xemaclite_update_address(lp, ndev->dev_addr);
1188
1189 lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1190 rc = xemaclite_mdio_setup(lp, &ofdev->dev);
1191 if (rc)
1192 dev_warn(&ofdev->dev, "error registering MDIO bus\n");
1193
1194 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1195
1196 ndev->netdev_ops = &xemaclite_netdev_ops;
1197 ndev->flags &= ~IFF_MULTICAST;
1198 ndev->watchdog_timeo = TX_TIMEOUT;
1199
1200 /* Finally, register the device */
1201 rc = register_netdev(ndev);
1202 if (rc) {
1203 dev_err(dev,
1204 "Cannot register network device, aborting\n");
1205 goto error1;
1206 }
1207
1208 dev_info(dev,
1209 "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n",
1210 (unsigned int __force)ndev->mem_start,
1211 (unsigned int __force)lp->base_addr, ndev->irq);
1212 return 0;
1213
1214error1:
1215 release_mem_region(ndev->mem_start, resource_size(&r_mem));
1216
1217error2:
1218 xemaclite_remove_ndev(ndev);
1219 return rc;
1220}
1221
1222/**
1223 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1224 * @of_dev: Pointer to OF device structure
1225 *
1226 * This function is called if a device is physically removed from the system or
1227 * if the driver module is being unloaded. It frees any resources allocated to
1228 * the device.
1229 *
1230 * Return: 0, always.
1231 */
1232static int __devexit xemaclite_of_remove(struct platform_device *of_dev)
1233{
1234 struct device *dev = &of_dev->dev;
1235 struct net_device *ndev = dev_get_drvdata(dev);
1236
1237 struct net_local *lp = netdev_priv(ndev);
1238
1239 /* Un-register the mii_bus, if configured */
1240 if (lp->has_mdio) {
1241 mdiobus_unregister(lp->mii_bus);
1242 kfree(lp->mii_bus->irq);
1243 mdiobus_free(lp->mii_bus);
1244 lp->mii_bus = NULL;
1245 }
1246
1247 unregister_netdev(ndev);
1248
1249 if (lp->phy_node)
1250 of_node_put(lp->phy_node);
1251 lp->phy_node = NULL;
1252
1253 release_mem_region(ndev->mem_start, ndev->mem_end-ndev->mem_start + 1);
1254
1255 xemaclite_remove_ndev(ndev);
1256 dev_set_drvdata(dev, NULL);
1257
1258 return 0;
1259}
1260
1261#ifdef CONFIG_NET_POLL_CONTROLLER
1262static void
1263xemaclite_poll_controller(struct net_device *ndev)
1264{
1265 disable_irq(ndev->irq);
1266 xemaclite_interrupt(ndev->irq, ndev);
1267 enable_irq(ndev->irq);
1268}
1269#endif
1270
1271static struct net_device_ops xemaclite_netdev_ops = {
1272 .ndo_open = xemaclite_open,
1273 .ndo_stop = xemaclite_close,
1274 .ndo_start_xmit = xemaclite_send,
1275 .ndo_set_mac_address = xemaclite_set_mac_address,
1276 .ndo_tx_timeout = xemaclite_tx_timeout,
1277#ifdef CONFIG_NET_POLL_CONTROLLER
1278 .ndo_poll_controller = xemaclite_poll_controller,
1279#endif
1280};
1281
1282/* Match table for OF platform binding */
1283static struct of_device_id xemaclite_of_match[] __devinitdata = {
1284 { .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1285 { .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1286 { .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1287 { .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1288 { .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1289 { .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1290 { /* end of list */ },
1291};
1292MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1293
1294static struct platform_driver xemaclite_of_driver = {
1295 .driver = {
1296 .name = DRIVER_NAME,
1297 .owner = THIS_MODULE,
1298 .of_match_table = xemaclite_of_match,
1299 },
1300 .probe = xemaclite_of_probe,
1301 .remove = __devexit_p(xemaclite_of_remove),
1302};
1303
1304module_platform_driver(xemaclite_of_driver);
1305
1306MODULE_AUTHOR("Xilinx, Inc.");
1307MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1308MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/* Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
3 *
4 * This is a new flat driver which is based on the original emac_lite
5 * driver from John Williams <john.williams@xilinx.com>.
6 *
7 * Copyright (c) 2007 - 2013 Xilinx, Inc.
8 */
9
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/uaccess.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/ethtool.h>
17#include <linux/io.h>
18#include <linux/slab.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/of_mdio.h>
22#include <linux/of_net.h>
23#include <linux/phy.h>
24#include <linux/interrupt.h>
25#include <linux/iopoll.h>
26
27#define DRIVER_NAME "xilinx_emaclite"
28
29/* Register offsets for the EmacLite Core */
30#define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */
31#define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */
32#define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */
33#define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */
34#define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */
35#define XEL_GIER_OFFSET 0x07F8 /* GIE Register */
36#define XEL_TSR_OFFSET 0x07FC /* Tx status */
37#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */
38
39#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */
40#define XEL_RPLR_OFFSET 0x100C /* Rx packet length */
41#define XEL_RSR_OFFSET 0x17FC /* Rx status */
42
43#define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */
44
45/* MDIO Address Register Bit Masks */
46#define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */
47#define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */
48#define XEL_MDIOADDR_PHYADR_SHIFT 5
49#define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */
50
51/* MDIO Write Data Register Bit Masks */
52#define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */
53
54/* MDIO Read Data Register Bit Masks */
55#define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */
56
57/* MDIO Control Register Bit Masks */
58#define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */
59#define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */
60
61/* Global Interrupt Enable Register (GIER) Bit Masks */
62#define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */
63
64/* Transmit Status Register (TSR) Bit Masks */
65#define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */
66#define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */
67#define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */
68#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit
69 * only. This is not documented
70 * in the HW spec
71 */
72
73/* Define for programming the MAC address into the EmacLite */
74#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
75
76/* Receive Status Register (RSR) */
77#define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */
78#define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */
79
80/* Transmit Packet Length Register (TPLR) */
81#define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */
82
83/* Receive Packet Length Register (RPLR) */
84#define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */
85
86#define XEL_HEADER_OFFSET 12 /* Offset to length field */
87#define XEL_HEADER_SHIFT 16 /* Shift value for length */
88
89/* General Ethernet Definitions */
90#define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */
91#define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */
92
93#define TX_TIMEOUT (60 * HZ) /* Tx timeout is 60 seconds. */
94
95#ifdef __BIG_ENDIAN
96#define xemaclite_readl ioread32be
97#define xemaclite_writel iowrite32be
98#else
99#define xemaclite_readl ioread32
100#define xemaclite_writel iowrite32
101#endif
102
103/**
104 * struct net_local - Our private per device data
105 * @ndev: instance of the network device
106 * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW
107 * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW
108 * @next_tx_buf_to_use: next Tx buffer to write to
109 * @next_rx_buf_to_use: next Rx buffer to read from
110 * @base_addr: base address of the Emaclite device
111 * @reset_lock: lock to serialize xmit and tx_timeout execution
112 * @deferred_skb: holds an skb (for transmission at a later time) when the
113 * Tx buffer is not free
114 * @phy_dev: pointer to the PHY device
115 * @phy_node: pointer to the PHY device node
116 * @mii_bus: pointer to the MII bus
117 * @last_link: last link status
118 */
119struct net_local {
120 struct net_device *ndev;
121
122 bool tx_ping_pong;
123 bool rx_ping_pong;
124 u32 next_tx_buf_to_use;
125 u32 next_rx_buf_to_use;
126 void __iomem *base_addr;
127
128 spinlock_t reset_lock; /* serialize xmit and tx_timeout execution */
129 struct sk_buff *deferred_skb;
130
131 struct phy_device *phy_dev;
132 struct device_node *phy_node;
133
134 struct mii_bus *mii_bus;
135
136 int last_link;
137};
138
139/*************************/
140/* EmacLite driver calls */
141/*************************/
142
143/**
144 * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
145 * @drvdata: Pointer to the Emaclite device private data
146 *
147 * This function enables the Tx and Rx interrupts for the Emaclite device along
148 * with the Global Interrupt Enable.
149 */
150static void xemaclite_enable_interrupts(struct net_local *drvdata)
151{
152 u32 reg_data;
153
154 /* Enable the Tx interrupts for the first Buffer */
155 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);
156 xemaclite_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
157 drvdata->base_addr + XEL_TSR_OFFSET);
158
159 /* Enable the Rx interrupts for the first buffer */
160 xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
161
162 /* Enable the Global Interrupt Enable */
163 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
164}
165
166/**
167 * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
168 * @drvdata: Pointer to the Emaclite device private data
169 *
170 * This function disables the Tx and Rx interrupts for the Emaclite device,
171 * along with the Global Interrupt Enable.
172 */
173static void xemaclite_disable_interrupts(struct net_local *drvdata)
174{
175 u32 reg_data;
176
177 /* Disable the Global Interrupt Enable */
178 xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
179
180 /* Disable the Tx interrupts for the first buffer */
181 reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET);
182 xemaclite_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
183 drvdata->base_addr + XEL_TSR_OFFSET);
184
185 /* Disable the Rx interrupts for the first buffer */
186 reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET);
187 xemaclite_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
188 drvdata->base_addr + XEL_RSR_OFFSET);
189}
190
191/**
192 * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
193 * @src_ptr: Void pointer to the 16-bit aligned source address
194 * @dest_ptr: Pointer to the 32-bit aligned destination address
195 * @length: Number bytes to write from source to destination
196 *
197 * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
198 * address in the EmacLite device.
199 */
200static void xemaclite_aligned_write(const void *src_ptr, u32 *dest_ptr,
201 unsigned int length)
202{
203 const u16 *from_u16_ptr;
204 u32 align_buffer;
205 u32 *to_u32_ptr;
206 u16 *to_u16_ptr;
207
208 to_u32_ptr = dest_ptr;
209 from_u16_ptr = src_ptr;
210 align_buffer = 0;
211
212 for (; length > 3; length -= 4) {
213 to_u16_ptr = (u16 *)&align_buffer;
214 *to_u16_ptr++ = *from_u16_ptr++;
215 *to_u16_ptr++ = *from_u16_ptr++;
216
217 /* This barrier resolves occasional issues seen around
218 * cases where the data is not properly flushed out
219 * from the processor store buffers to the destination
220 * memory locations.
221 */
222 wmb();
223
224 /* Output a word */
225 *to_u32_ptr++ = align_buffer;
226 }
227 if (length) {
228 u8 *from_u8_ptr, *to_u8_ptr;
229
230 /* Set up to output the remaining data */
231 align_buffer = 0;
232 to_u8_ptr = (u8 *)&align_buffer;
233 from_u8_ptr = (u8 *)from_u16_ptr;
234
235 /* Output the remaining data */
236 for (; length > 0; length--)
237 *to_u8_ptr++ = *from_u8_ptr++;
238
239 /* This barrier resolves occasional issues seen around
240 * cases where the data is not properly flushed out
241 * from the processor store buffers to the destination
242 * memory locations.
243 */
244 wmb();
245 *to_u32_ptr = align_buffer;
246 }
247}
248
249/**
250 * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
251 * @src_ptr: Pointer to the 32-bit aligned source address
252 * @dest_ptr: Pointer to the 16-bit aligned destination address
253 * @length: Number bytes to read from source to destination
254 *
255 * This function reads data from a 32-bit aligned address in the EmacLite device
256 * to a 16-bit aligned buffer.
257 */
258static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
259 unsigned int length)
260{
261 u16 *to_u16_ptr, *from_u16_ptr;
262 u32 *from_u32_ptr;
263 u32 align_buffer;
264
265 from_u32_ptr = src_ptr;
266 to_u16_ptr = (u16 *)dest_ptr;
267
268 for (; length > 3; length -= 4) {
269 /* Copy each word into the temporary buffer */
270 align_buffer = *from_u32_ptr++;
271 from_u16_ptr = (u16 *)&align_buffer;
272
273 /* Read data from source */
274 *to_u16_ptr++ = *from_u16_ptr++;
275 *to_u16_ptr++ = *from_u16_ptr++;
276 }
277
278 if (length) {
279 u8 *to_u8_ptr, *from_u8_ptr;
280
281 /* Set up to read the remaining data */
282 to_u8_ptr = (u8 *)to_u16_ptr;
283 align_buffer = *from_u32_ptr++;
284 from_u8_ptr = (u8 *)&align_buffer;
285
286 /* Read the remaining data */
287 for (; length > 0; length--)
288 *to_u8_ptr = *from_u8_ptr;
289 }
290}
291
292/**
293 * xemaclite_send_data - Send an Ethernet frame
294 * @drvdata: Pointer to the Emaclite device private data
295 * @data: Pointer to the data to be sent
296 * @byte_count: Total frame size, including header
297 *
298 * This function checks if the Tx buffer of the Emaclite device is free to send
299 * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
300 * returns an error.
301 *
302 * Return: 0 upon success or -1 if the buffer(s) are full.
303 *
304 * Note: The maximum Tx packet size can not be more than Ethernet header
305 * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
306 */
307static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
308 unsigned int byte_count)
309{
310 u32 reg_data;
311 void __iomem *addr;
312
313 /* Determine the expected Tx buffer address */
314 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
315
316 /* If the length is too large, truncate it */
317 if (byte_count > ETH_FRAME_LEN)
318 byte_count = ETH_FRAME_LEN;
319
320 /* Check if the expected buffer is available */
321 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
322 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
323 XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
324 /* Switch to next buffer if configured */
325 if (drvdata->tx_ping_pong != 0)
326 drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
327 } else if (drvdata->tx_ping_pong != 0) {
328 /* If the expected buffer is full, try the other buffer,
329 * if it is configured in HW
330 */
331
332 addr = (void __iomem __force *)((uintptr_t __force)addr ^
333 XEL_BUFFER_OFFSET);
334 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
335
336 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
337 XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
338 return -1; /* Buffers were full, return failure */
339 } else {
340 return -1; /* Buffer was full, return failure */
341 }
342
343 /* Write the frame to the buffer */
344 xemaclite_aligned_write(data, (u32 __force *)addr, byte_count);
345
346 xemaclite_writel((byte_count & XEL_TPLR_LENGTH_MASK),
347 addr + XEL_TPLR_OFFSET);
348
349 /* Update the Tx Status Register to indicate that there is a
350 * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
351 * is used by the interrupt handler to check whether a frame
352 * has been transmitted
353 */
354 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
355 reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
356 xemaclite_writel(reg_data, addr + XEL_TSR_OFFSET);
357
358 return 0;
359}
360
361/**
362 * xemaclite_recv_data - Receive a frame
363 * @drvdata: Pointer to the Emaclite device private data
364 * @data: Address where the data is to be received
365 * @maxlen: Maximum supported ethernet packet length
366 *
367 * This function is intended to be called from the interrupt context or
368 * with a wrapper which waits for the receive frame to be available.
369 *
370 * Return: Total number of bytes received
371 */
372static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data, int maxlen)
373{
374 void __iomem *addr;
375 u16 length, proto_type;
376 u32 reg_data;
377
378 /* Determine the expected buffer address */
379 addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
380
381 /* Verify which buffer has valid data */
382 reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
383
384 if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
385 if (drvdata->rx_ping_pong != 0)
386 drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
387 } else {
388 /* The instance is out of sync, try other buffer if other
389 * buffer is configured, return 0 otherwise. If the instance is
390 * out of sync, do not update the 'next_rx_buf_to_use' since it
391 * will correct on subsequent calls
392 */
393 if (drvdata->rx_ping_pong != 0)
394 addr = (void __iomem __force *)
395 ((uintptr_t __force)addr ^
396 XEL_BUFFER_OFFSET);
397 else
398 return 0; /* No data was available */
399
400 /* Verify that buffer has valid data */
401 reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
402 if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
403 XEL_RSR_RECV_DONE_MASK)
404 return 0; /* No data was available */
405 }
406
407 /* Get the protocol type of the ethernet frame that arrived
408 */
409 proto_type = ((ntohl(xemaclite_readl(addr + XEL_HEADER_OFFSET +
410 XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
411 XEL_RPLR_LENGTH_MASK);
412
413 /* Check if received ethernet frame is a raw ethernet frame
414 * or an IP packet or an ARP packet
415 */
416 if (proto_type > ETH_DATA_LEN) {
417 if (proto_type == ETH_P_IP) {
418 length = ((ntohl(xemaclite_readl(addr +
419 XEL_HEADER_IP_LENGTH_OFFSET +
420 XEL_RXBUFF_OFFSET)) >>
421 XEL_HEADER_SHIFT) &
422 XEL_RPLR_LENGTH_MASK);
423 length = min_t(u16, length, ETH_DATA_LEN);
424 length += ETH_HLEN + ETH_FCS_LEN;
425
426 } else if (proto_type == ETH_P_ARP) {
427 length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
428 } else {
429 /* Field contains type other than IP or ARP, use max
430 * frame size and let user parse it
431 */
432 length = ETH_FRAME_LEN + ETH_FCS_LEN;
433 }
434 } else {
435 /* Use the length in the frame, plus the header and trailer */
436 length = proto_type + ETH_HLEN + ETH_FCS_LEN;
437 }
438
439 if (WARN_ON(length > maxlen))
440 length = maxlen;
441
442 /* Read from the EmacLite device */
443 xemaclite_aligned_read((u32 __force *)(addr + XEL_RXBUFF_OFFSET),
444 data, length);
445
446 /* Acknowledge the frame */
447 reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET);
448 reg_data &= ~XEL_RSR_RECV_DONE_MASK;
449 xemaclite_writel(reg_data, addr + XEL_RSR_OFFSET);
450
451 return length;
452}
453
454/**
455 * xemaclite_update_address - Update the MAC address in the device
456 * @drvdata: Pointer to the Emaclite device private data
457 * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
458 *
459 * Tx must be idle and Rx should be idle for deterministic results.
460 * It is recommended that this function should be called after the
461 * initialization and before transmission of any packets from the device.
462 * The MAC address can be programmed using any of the two transmit
463 * buffers (if configured).
464 */
465static void xemaclite_update_address(struct net_local *drvdata,
466 const u8 *address_ptr)
467{
468 void __iomem *addr;
469 u32 reg_data;
470
471 /* Determine the expected Tx buffer address */
472 addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
473
474 xemaclite_aligned_write(address_ptr, (u32 __force *)addr, ETH_ALEN);
475
476 xemaclite_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET);
477
478 /* Update the MAC address in the EmacLite */
479 reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET);
480 xemaclite_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);
481
482 /* Wait for EmacLite to finish with the MAC address update */
483 while ((xemaclite_readl(addr + XEL_TSR_OFFSET) &
484 XEL_TSR_PROG_MAC_ADDR) != 0)
485 ;
486}
487
488/**
489 * xemaclite_set_mac_address - Set the MAC address for this device
490 * @dev: Pointer to the network device instance
491 * @address: Void pointer to the sockaddr structure
492 *
493 * This function copies the HW address from the sockaddr structure to the
494 * net_device structure and updates the address in HW.
495 *
496 * Return: Error if the net device is busy or 0 if the addr is set
497 * successfully
498 */
499static int xemaclite_set_mac_address(struct net_device *dev, void *address)
500{
501 struct net_local *lp = netdev_priv(dev);
502 struct sockaddr *addr = address;
503
504 if (netif_running(dev))
505 return -EBUSY;
506
507 eth_hw_addr_set(dev, addr->sa_data);
508 xemaclite_update_address(lp, dev->dev_addr);
509 return 0;
510}
511
512/**
513 * xemaclite_tx_timeout - Callback for Tx Timeout
514 * @dev: Pointer to the network device
515 * @txqueue: Unused
516 *
517 * This function is called when Tx time out occurs for Emaclite device.
518 */
519static void xemaclite_tx_timeout(struct net_device *dev, unsigned int txqueue)
520{
521 struct net_local *lp = netdev_priv(dev);
522 unsigned long flags;
523
524 dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
525 TX_TIMEOUT * 1000UL / HZ);
526
527 dev->stats.tx_errors++;
528
529 /* Reset the device */
530 spin_lock_irqsave(&lp->reset_lock, flags);
531
532 /* Shouldn't really be necessary, but shouldn't hurt */
533 netif_stop_queue(dev);
534
535 xemaclite_disable_interrupts(lp);
536 xemaclite_enable_interrupts(lp);
537
538 if (lp->deferred_skb) {
539 dev_kfree_skb_irq(lp->deferred_skb);
540 lp->deferred_skb = NULL;
541 dev->stats.tx_errors++;
542 }
543
544 /* To exclude tx timeout */
545 netif_trans_update(dev); /* prevent tx timeout */
546
547 /* We're all ready to go. Start the queue */
548 netif_wake_queue(dev);
549 spin_unlock_irqrestore(&lp->reset_lock, flags);
550}
551
552/**********************/
553/* Interrupt Handlers */
554/**********************/
555
556/**
557 * xemaclite_tx_handler - Interrupt handler for frames sent
558 * @dev: Pointer to the network device
559 *
560 * This function updates the number of packets transmitted and handles the
561 * deferred skb, if there is one.
562 */
563static void xemaclite_tx_handler(struct net_device *dev)
564{
565 struct net_local *lp = netdev_priv(dev);
566
567 dev->stats.tx_packets++;
568
569 if (!lp->deferred_skb)
570 return;
571
572 if (xemaclite_send_data(lp, (u8 *)lp->deferred_skb->data,
573 lp->deferred_skb->len))
574 return;
575
576 dev->stats.tx_bytes += lp->deferred_skb->len;
577 dev_consume_skb_irq(lp->deferred_skb);
578 lp->deferred_skb = NULL;
579 netif_trans_update(dev); /* prevent tx timeout */
580 netif_wake_queue(dev);
581}
582
583/**
584 * xemaclite_rx_handler- Interrupt handler for frames received
585 * @dev: Pointer to the network device
586 *
587 * This function allocates memory for a socket buffer, fills it with data
588 * received and hands it over to the TCP/IP stack.
589 */
590static void xemaclite_rx_handler(struct net_device *dev)
591{
592 struct net_local *lp = netdev_priv(dev);
593 struct sk_buff *skb;
594 u32 len;
595
596 len = ETH_FRAME_LEN + ETH_FCS_LEN;
597 skb = netdev_alloc_skb(dev, len + NET_IP_ALIGN);
598 if (!skb) {
599 /* Couldn't get memory. */
600 dev->stats.rx_dropped++;
601 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
602 return;
603 }
604
605 skb_reserve(skb, NET_IP_ALIGN);
606
607 len = xemaclite_recv_data(lp, (u8 *)skb->data, len);
608
609 if (!len) {
610 dev->stats.rx_errors++;
611 dev_kfree_skb_irq(skb);
612 return;
613 }
614
615 skb_put(skb, len); /* Tell the skb how much data we got */
616
617 skb->protocol = eth_type_trans(skb, dev);
618 skb_checksum_none_assert(skb);
619
620 dev->stats.rx_packets++;
621 dev->stats.rx_bytes += len;
622
623 if (!skb_defer_rx_timestamp(skb))
624 netif_rx(skb); /* Send the packet upstream */
625}
626
627/**
628 * xemaclite_interrupt - Interrupt handler for this driver
629 * @irq: Irq of the Emaclite device
630 * @dev_id: Void pointer to the network device instance used as callback
631 * reference
632 *
633 * Return: IRQ_HANDLED
634 *
635 * This function handles the Tx and Rx interrupts of the EmacLite device.
636 */
637static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
638{
639 bool tx_complete = false;
640 struct net_device *dev = dev_id;
641 struct net_local *lp = netdev_priv(dev);
642 void __iomem *base_addr = lp->base_addr;
643 u32 tx_status;
644
645 /* Check if there is Rx Data available */
646 if ((xemaclite_readl(base_addr + XEL_RSR_OFFSET) &
647 XEL_RSR_RECV_DONE_MASK) ||
648 (xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
649 & XEL_RSR_RECV_DONE_MASK))
650
651 xemaclite_rx_handler(dev);
652
653 /* Check if the Transmission for the first buffer is completed */
654 tx_status = xemaclite_readl(base_addr + XEL_TSR_OFFSET);
655 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
656 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
657 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
658 xemaclite_writel(tx_status, base_addr + XEL_TSR_OFFSET);
659
660 tx_complete = true;
661 }
662
663 /* Check if the Transmission for the second buffer is completed */
664 tx_status = xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
665 if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
666 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
667 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
668 xemaclite_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +
669 XEL_TSR_OFFSET);
670
671 tx_complete = true;
672 }
673
674 /* If there was a Tx interrupt, call the Tx Handler */
675 if (tx_complete != 0)
676 xemaclite_tx_handler(dev);
677
678 return IRQ_HANDLED;
679}
680
681/**********************/
682/* MDIO Bus functions */
683/**********************/
684
685/**
686 * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
687 * @lp: Pointer to the Emaclite device private data
688 *
689 * This function waits till the device is ready to accept a new MDIO
690 * request.
691 *
692 * Return: 0 for success or ETIMEDOUT for a timeout
693 */
694
695static int xemaclite_mdio_wait(struct net_local *lp)
696{
697 u32 val;
698
699 /* wait for the MDIO interface to not be busy or timeout
700 * after some time.
701 */
702 return readx_poll_timeout(xemaclite_readl,
703 lp->base_addr + XEL_MDIOCTRL_OFFSET,
704 val, !(val & XEL_MDIOCTRL_MDIOSTS_MASK),
705 1000, 20000);
706}
707
708/**
709 * xemaclite_mdio_read - Read from a given MII management register
710 * @bus: the mii_bus struct
711 * @phy_id: the phy address
712 * @reg: register number to read from
713 *
714 * This function waits till the device is ready to accept a new MDIO
715 * request and then writes the phy address to the MDIO Address register
716 * and reads data from MDIO Read Data register, when its available.
717 *
718 * Return: Value read from the MII management register
719 */
720static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
721{
722 struct net_local *lp = bus->priv;
723 u32 ctrl_reg;
724 u32 rc;
725
726 if (xemaclite_mdio_wait(lp))
727 return -ETIMEDOUT;
728
729 /* Write the PHY address, register number and set the OP bit in the
730 * MDIO Address register. Set the Status bit in the MDIO Control
731 * register to start a MDIO read transaction.
732 */
733 ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
734 xemaclite_writel(XEL_MDIOADDR_OP_MASK |
735 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
736 lp->base_addr + XEL_MDIOADDR_OFFSET);
737 xemaclite_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
738 lp->base_addr + XEL_MDIOCTRL_OFFSET);
739
740 if (xemaclite_mdio_wait(lp))
741 return -ETIMEDOUT;
742
743 rc = xemaclite_readl(lp->base_addr + XEL_MDIORD_OFFSET);
744
745 dev_dbg(&lp->ndev->dev,
746 "%s(phy_id=%i, reg=%x) == %x\n", __func__,
747 phy_id, reg, rc);
748
749 return rc;
750}
751
752/**
753 * xemaclite_mdio_write - Write to a given MII management register
754 * @bus: the mii_bus struct
755 * @phy_id: the phy address
756 * @reg: register number to write to
757 * @val: value to write to the register number specified by reg
758 *
759 * This function waits till the device is ready to accept a new MDIO
760 * request and then writes the val to the MDIO Write Data register.
761 *
762 * Return: 0 upon success or a negative error upon failure
763 */
764static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
765 u16 val)
766{
767 struct net_local *lp = bus->priv;
768 u32 ctrl_reg;
769
770 dev_dbg(&lp->ndev->dev,
771 "%s(phy_id=%i, reg=%x, val=%x)\n", __func__,
772 phy_id, reg, val);
773
774 if (xemaclite_mdio_wait(lp))
775 return -ETIMEDOUT;
776
777 /* Write the PHY address, register number and clear the OP bit in the
778 * MDIO Address register and then write the value into the MDIO Write
779 * Data register. Finally, set the Status bit in the MDIO Control
780 * register to start a MDIO write transaction.
781 */
782 ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
783 xemaclite_writel(~XEL_MDIOADDR_OP_MASK &
784 ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
785 lp->base_addr + XEL_MDIOADDR_OFFSET);
786 xemaclite_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);
787 xemaclite_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
788 lp->base_addr + XEL_MDIOCTRL_OFFSET);
789
790 return 0;
791}
792
793/**
794 * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
795 * @lp: Pointer to the Emaclite device private data
796 * @dev: Pointer to OF device structure
797 *
798 * This function enables MDIO bus in the Emaclite device and registers a
799 * mii_bus.
800 *
801 * Return: 0 upon success or a negative error upon failure
802 */
803static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
804{
805 struct mii_bus *bus;
806 struct resource res;
807 struct device_node *np = of_get_parent(lp->phy_node);
808 struct device_node *npp;
809 int rc, ret;
810
811 /* Don't register the MDIO bus if the phy_node or its parent node
812 * can't be found.
813 */
814 if (!np) {
815 dev_err(dev, "Failed to register mdio bus.\n");
816 return -ENODEV;
817 }
818 npp = of_get_parent(np);
819 ret = of_address_to_resource(npp, 0, &res);
820 of_node_put(npp);
821 if (ret) {
822 dev_err(dev, "%s resource error!\n",
823 dev->of_node->full_name);
824 of_node_put(np);
825 return ret;
826 }
827 if (lp->ndev->mem_start != res.start) {
828 struct phy_device *phydev;
829
830 phydev = of_phy_find_device(lp->phy_node);
831 if (!phydev)
832 dev_info(dev,
833 "MDIO of the phy is not registered yet\n");
834 else
835 put_device(&phydev->mdio.dev);
836 of_node_put(np);
837 return 0;
838 }
839
840 /* Enable the MDIO bus by asserting the enable bit in MDIO Control
841 * register.
842 */
843 xemaclite_writel(XEL_MDIOCTRL_MDIOEN_MASK,
844 lp->base_addr + XEL_MDIOCTRL_OFFSET);
845
846 bus = mdiobus_alloc();
847 if (!bus) {
848 dev_err(dev, "Failed to allocate mdiobus\n");
849 of_node_put(np);
850 return -ENOMEM;
851 }
852
853 snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
854 (unsigned long long)res.start);
855 bus->priv = lp;
856 bus->name = "Xilinx Emaclite MDIO";
857 bus->read = xemaclite_mdio_read;
858 bus->write = xemaclite_mdio_write;
859 bus->parent = dev;
860
861 rc = of_mdiobus_register(bus, np);
862 of_node_put(np);
863 if (rc) {
864 dev_err(dev, "Failed to register mdio bus.\n");
865 goto err_register;
866 }
867
868 lp->mii_bus = bus;
869
870 return 0;
871
872err_register:
873 mdiobus_free(bus);
874 return rc;
875}
876
877/**
878 * xemaclite_adjust_link - Link state callback for the Emaclite device
879 * @ndev: pointer to net_device struct
880 *
881 * There's nothing in the Emaclite device to be configured when the link
882 * state changes. We just print the status.
883 */
884static void xemaclite_adjust_link(struct net_device *ndev)
885{
886 struct net_local *lp = netdev_priv(ndev);
887 struct phy_device *phy = lp->phy_dev;
888 int link_state;
889
890 /* hash together the state values to decide if something has changed */
891 link_state = phy->speed | (phy->duplex << 1) | phy->link;
892
893 if (lp->last_link != link_state) {
894 lp->last_link = link_state;
895 phy_print_status(phy);
896 }
897}
898
899/**
900 * xemaclite_open - Open the network device
901 * @dev: Pointer to the network device
902 *
903 * This function sets the MAC address, requests an IRQ and enables interrupts
904 * for the Emaclite device and starts the Tx queue.
905 * It also connects to the phy device, if MDIO is included in Emaclite device.
906 *
907 * Return: 0 on success. -ENODEV, if PHY cannot be connected.
908 * Non-zero error value on failure.
909 */
910static int xemaclite_open(struct net_device *dev)
911{
912 struct net_local *lp = netdev_priv(dev);
913 int retval;
914
915 /* Just to be safe, stop the device first */
916 xemaclite_disable_interrupts(lp);
917
918 if (lp->phy_node) {
919 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
920 xemaclite_adjust_link, 0,
921 PHY_INTERFACE_MODE_MII);
922 if (!lp->phy_dev) {
923 dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
924 return -ENODEV;
925 }
926
927 /* EmacLite doesn't support giga-bit speeds */
928 phy_set_max_speed(lp->phy_dev, SPEED_100);
929 phy_start(lp->phy_dev);
930 }
931
932 /* Set the MAC address each time opened */
933 xemaclite_update_address(lp, dev->dev_addr);
934
935 /* Grab the IRQ */
936 retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
937 if (retval) {
938 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
939 dev->irq);
940 if (lp->phy_dev)
941 phy_disconnect(lp->phy_dev);
942 lp->phy_dev = NULL;
943
944 return retval;
945 }
946
947 /* Enable Interrupts */
948 xemaclite_enable_interrupts(lp);
949
950 /* We're ready to go */
951 netif_start_queue(dev);
952
953 return 0;
954}
955
956/**
957 * xemaclite_close - Close the network device
958 * @dev: Pointer to the network device
959 *
960 * This function stops the Tx queue, disables interrupts and frees the IRQ for
961 * the Emaclite device.
962 * It also disconnects the phy device associated with the Emaclite device.
963 *
964 * Return: 0, always.
965 */
966static int xemaclite_close(struct net_device *dev)
967{
968 struct net_local *lp = netdev_priv(dev);
969
970 netif_stop_queue(dev);
971 xemaclite_disable_interrupts(lp);
972 free_irq(dev->irq, dev);
973
974 if (lp->phy_dev)
975 phy_disconnect(lp->phy_dev);
976 lp->phy_dev = NULL;
977
978 return 0;
979}
980
981/**
982 * xemaclite_send - Transmit a frame
983 * @orig_skb: Pointer to the socket buffer to be transmitted
984 * @dev: Pointer to the network device
985 *
986 * This function checks if the Tx buffer of the Emaclite device is free to send
987 * data. If so, it fills the Tx buffer with data from socket buffer data,
988 * updates the stats and frees the socket buffer. The Tx completion is signaled
989 * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
990 * deferred and the Tx queue is stopped so that the deferred socket buffer can
991 * be transmitted when the Emaclite device is free to transmit data.
992 *
993 * Return: NETDEV_TX_OK, always.
994 */
995static netdev_tx_t
996xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
997{
998 struct net_local *lp = netdev_priv(dev);
999 struct sk_buff *new_skb;
1000 unsigned int len;
1001 unsigned long flags;
1002
1003 len = orig_skb->len;
1004
1005 new_skb = orig_skb;
1006
1007 spin_lock_irqsave(&lp->reset_lock, flags);
1008 if (xemaclite_send_data(lp, (u8 *)new_skb->data, len) != 0) {
1009 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1010 * defer the skb for transmission during the ISR, after the
1011 * current transmission is complete
1012 */
1013 netif_stop_queue(dev);
1014 lp->deferred_skb = new_skb;
1015 /* Take the time stamp now, since we can't do this in an ISR. */
1016 skb_tx_timestamp(new_skb);
1017 spin_unlock_irqrestore(&lp->reset_lock, flags);
1018 return NETDEV_TX_OK;
1019 }
1020 spin_unlock_irqrestore(&lp->reset_lock, flags);
1021
1022 skb_tx_timestamp(new_skb);
1023
1024 dev->stats.tx_bytes += len;
1025 dev_consume_skb_any(new_skb);
1026
1027 return NETDEV_TX_OK;
1028}
1029
1030/**
1031 * get_bool - Get a parameter from the OF device
1032 * @ofdev: Pointer to OF device structure
1033 * @s: Property to be retrieved
1034 *
1035 * This function looks for a property in the device node and returns the value
1036 * of the property if its found or 0 if the property is not found.
1037 *
1038 * Return: Value of the parameter if the parameter is found, or 0 otherwise
1039 */
1040static bool get_bool(struct platform_device *ofdev, const char *s)
1041{
1042 u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1043
1044 if (!p) {
1045 dev_warn(&ofdev->dev, "Parameter %s not found, defaulting to false\n", s);
1046 return false;
1047 }
1048
1049 return (bool)*p;
1050}
1051
1052/**
1053 * xemaclite_ethtools_get_drvinfo - Get various Axi Emac Lite driver info
1054 * @ndev: Pointer to net_device structure
1055 * @ed: Pointer to ethtool_drvinfo structure
1056 *
1057 * This implements ethtool command for getting the driver information.
1058 * Issue "ethtool -i ethX" under linux prompt to execute this function.
1059 */
1060static void xemaclite_ethtools_get_drvinfo(struct net_device *ndev,
1061 struct ethtool_drvinfo *ed)
1062{
1063 strscpy(ed->driver, DRIVER_NAME, sizeof(ed->driver));
1064}
1065
1066static const struct ethtool_ops xemaclite_ethtool_ops = {
1067 .get_drvinfo = xemaclite_ethtools_get_drvinfo,
1068 .get_link = ethtool_op_get_link,
1069 .get_link_ksettings = phy_ethtool_get_link_ksettings,
1070 .set_link_ksettings = phy_ethtool_set_link_ksettings,
1071};
1072
1073static const struct net_device_ops xemaclite_netdev_ops;
1074
1075/**
1076 * xemaclite_of_probe - Probe method for the Emaclite device.
1077 * @ofdev: Pointer to OF device structure
1078 *
1079 * This function probes for the Emaclite device in the device tree.
1080 * It initializes the driver data structure and the hardware, sets the MAC
1081 * address and registers the network device.
1082 * It also registers a mii_bus for the Emaclite device, if MDIO is included
1083 * in the device.
1084 *
1085 * Return: 0, if the driver is bound to the Emaclite device, or
1086 * a negative error if there is failure.
1087 */
1088static int xemaclite_of_probe(struct platform_device *ofdev)
1089{
1090 struct resource *res;
1091 struct net_device *ndev = NULL;
1092 struct net_local *lp = NULL;
1093 struct device *dev = &ofdev->dev;
1094
1095 int rc = 0;
1096
1097 dev_info(dev, "Device Tree Probing\n");
1098
1099 /* Create an ethernet device instance */
1100 ndev = alloc_etherdev(sizeof(struct net_local));
1101 if (!ndev)
1102 return -ENOMEM;
1103
1104 dev_set_drvdata(dev, ndev);
1105 SET_NETDEV_DEV(ndev, &ofdev->dev);
1106
1107 lp = netdev_priv(ndev);
1108 lp->ndev = ndev;
1109
1110 /* Get IRQ for the device */
1111 rc = platform_get_irq(ofdev, 0);
1112 if (rc < 0)
1113 goto error;
1114
1115 ndev->irq = rc;
1116
1117 lp->base_addr = devm_platform_get_and_ioremap_resource(ofdev, 0, &res);
1118 if (IS_ERR(lp->base_addr)) {
1119 rc = PTR_ERR(lp->base_addr);
1120 goto error;
1121 }
1122
1123 ndev->mem_start = res->start;
1124 ndev->mem_end = res->end;
1125
1126 spin_lock_init(&lp->reset_lock);
1127 lp->next_tx_buf_to_use = 0x0;
1128 lp->next_rx_buf_to_use = 0x0;
1129 lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1130 lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1131
1132 rc = of_get_ethdev_address(ofdev->dev.of_node, ndev);
1133 if (rc) {
1134 dev_warn(dev, "No MAC address found, using random\n");
1135 eth_hw_addr_random(ndev);
1136 }
1137
1138 /* Clear the Tx CSR's in case this is a restart */
1139 xemaclite_writel(0, lp->base_addr + XEL_TSR_OFFSET);
1140 xemaclite_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
1141
1142 /* Set the MAC address in the EmacLite device */
1143 xemaclite_update_address(lp, ndev->dev_addr);
1144
1145 lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1146 xemaclite_mdio_setup(lp, &ofdev->dev);
1147
1148 dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1149
1150 ndev->netdev_ops = &xemaclite_netdev_ops;
1151 ndev->ethtool_ops = &xemaclite_ethtool_ops;
1152 ndev->flags &= ~IFF_MULTICAST;
1153 ndev->watchdog_timeo = TX_TIMEOUT;
1154
1155 /* Finally, register the device */
1156 rc = register_netdev(ndev);
1157 if (rc) {
1158 dev_err(dev,
1159 "Cannot register network device, aborting\n");
1160 goto put_node;
1161 }
1162
1163 dev_info(dev,
1164 "Xilinx EmacLite at 0x%08lX mapped to 0x%p, irq=%d\n",
1165 (unsigned long __force)ndev->mem_start, lp->base_addr, ndev->irq);
1166 return 0;
1167
1168put_node:
1169 of_node_put(lp->phy_node);
1170error:
1171 free_netdev(ndev);
1172 return rc;
1173}
1174
1175/**
1176 * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1177 * @of_dev: Pointer to OF device structure
1178 *
1179 * This function is called if a device is physically removed from the system or
1180 * if the driver module is being unloaded. It frees any resources allocated to
1181 * the device.
1182 */
1183static void xemaclite_of_remove(struct platform_device *of_dev)
1184{
1185 struct net_device *ndev = platform_get_drvdata(of_dev);
1186
1187 struct net_local *lp = netdev_priv(ndev);
1188
1189 /* Un-register the mii_bus, if configured */
1190 if (lp->mii_bus) {
1191 mdiobus_unregister(lp->mii_bus);
1192 mdiobus_free(lp->mii_bus);
1193 lp->mii_bus = NULL;
1194 }
1195
1196 unregister_netdev(ndev);
1197
1198 of_node_put(lp->phy_node);
1199 lp->phy_node = NULL;
1200
1201 free_netdev(ndev);
1202}
1203
1204#ifdef CONFIG_NET_POLL_CONTROLLER
1205static void
1206xemaclite_poll_controller(struct net_device *ndev)
1207{
1208 disable_irq(ndev->irq);
1209 xemaclite_interrupt(ndev->irq, ndev);
1210 enable_irq(ndev->irq);
1211}
1212#endif
1213
1214/* Ioctl MII Interface */
1215static int xemaclite_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1216{
1217 if (!dev->phydev || !netif_running(dev))
1218 return -EINVAL;
1219
1220 switch (cmd) {
1221 case SIOCGMIIPHY:
1222 case SIOCGMIIREG:
1223 case SIOCSMIIREG:
1224 return phy_mii_ioctl(dev->phydev, rq, cmd);
1225 default:
1226 return -EOPNOTSUPP;
1227 }
1228}
1229
1230static const struct net_device_ops xemaclite_netdev_ops = {
1231 .ndo_open = xemaclite_open,
1232 .ndo_stop = xemaclite_close,
1233 .ndo_start_xmit = xemaclite_send,
1234 .ndo_set_mac_address = xemaclite_set_mac_address,
1235 .ndo_tx_timeout = xemaclite_tx_timeout,
1236 .ndo_eth_ioctl = xemaclite_ioctl,
1237#ifdef CONFIG_NET_POLL_CONTROLLER
1238 .ndo_poll_controller = xemaclite_poll_controller,
1239#endif
1240};
1241
1242/* Match table for OF platform binding */
1243static const struct of_device_id xemaclite_of_match[] = {
1244 { .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1245 { .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1246 { .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1247 { .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1248 { .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1249 { .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1250 { /* end of list */ },
1251};
1252MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1253
1254static struct platform_driver xemaclite_of_driver = {
1255 .driver = {
1256 .name = DRIVER_NAME,
1257 .of_match_table = xemaclite_of_match,
1258 },
1259 .probe = xemaclite_of_probe,
1260 .remove_new = xemaclite_of_remove,
1261};
1262
1263module_platform_driver(xemaclite_of_driver);
1264
1265MODULE_AUTHOR("Xilinx, Inc.");
1266MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1267MODULE_LICENSE("GPL");