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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * FPU signal frame handling routines.
4 */
5
6#include <linux/compat.h>
7#include <linux/cpu.h>
8#include <linux/pagemap.h>
9
10#include <asm/fpu/signal.h>
11#include <asm/fpu/regset.h>
12#include <asm/fpu/xstate.h>
13
14#include <asm/sigframe.h>
15#include <asm/trapnr.h>
16#include <asm/trace/fpu.h>
17
18#include "context.h"
19#include "internal.h"
20#include "legacy.h"
21#include "xstate.h"
22
23/*
24 * Check for the presence of extended state information in the
25 * user fpstate pointer in the sigcontext.
26 */
27static inline bool check_xstate_in_sigframe(struct fxregs_state __user *fxbuf,
28 struct _fpx_sw_bytes *fx_sw)
29{
30 int min_xstate_size = sizeof(struct fxregs_state) +
31 sizeof(struct xstate_header);
32 void __user *fpstate = fxbuf;
33 unsigned int magic2;
34
35 if (__copy_from_user(fx_sw, &fxbuf->sw_reserved[0], sizeof(*fx_sw)))
36 return false;
37
38 /* Check for the first magic field and other error scenarios. */
39 if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
40 fx_sw->xstate_size < min_xstate_size ||
41 fx_sw->xstate_size > current->thread.fpu.fpstate->user_size ||
42 fx_sw->xstate_size > fx_sw->extended_size)
43 goto setfx;
44
45 /*
46 * Check for the presence of second magic word at the end of memory
47 * layout. This detects the case where the user just copied the legacy
48 * fpstate layout with out copying the extended state information
49 * in the memory layout.
50 */
51 if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size)))
52 return false;
53
54 if (likely(magic2 == FP_XSTATE_MAGIC2))
55 return true;
56setfx:
57 trace_x86_fpu_xstate_check_failed(¤t->thread.fpu);
58
59 /* Set the parameters for fx only state */
60 fx_sw->magic1 = 0;
61 fx_sw->xstate_size = sizeof(struct fxregs_state);
62 fx_sw->xfeatures = XFEATURE_MASK_FPSSE;
63 return true;
64}
65
66/*
67 * Signal frame handlers.
68 */
69static inline bool save_fsave_header(struct task_struct *tsk, void __user *buf)
70{
71 if (use_fxsr()) {
72 struct xregs_state *xsave = &tsk->thread.fpu.fpstate->regs.xsave;
73 struct user_i387_ia32_struct env;
74 struct _fpstate_32 __user *fp = buf;
75
76 fpregs_lock();
77 if (!test_thread_flag(TIF_NEED_FPU_LOAD))
78 fxsave(&tsk->thread.fpu.fpstate->regs.fxsave);
79 fpregs_unlock();
80
81 convert_from_fxsr(&env, tsk);
82
83 if (__copy_to_user(buf, &env, sizeof(env)) ||
84 __put_user(xsave->i387.swd, &fp->status) ||
85 __put_user(X86_FXSR_MAGIC, &fp->magic))
86 return false;
87 } else {
88 struct fregs_state __user *fp = buf;
89 u32 swd;
90
91 if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status))
92 return false;
93 }
94
95 return true;
96}
97
98/*
99 * Prepare the SW reserved portion of the fxsave memory layout, indicating
100 * the presence of the extended state information in the memory layout
101 * pointed to by the fpstate pointer in the sigcontext.
102 * This is saved when ever the FP and extended state context is
103 * saved on the user stack during the signal handler delivery to the user.
104 */
105static inline void save_sw_bytes(struct _fpx_sw_bytes *sw_bytes, bool ia32_frame,
106 struct fpstate *fpstate)
107{
108 sw_bytes->magic1 = FP_XSTATE_MAGIC1;
109 sw_bytes->extended_size = fpstate->user_size + FP_XSTATE_MAGIC2_SIZE;
110 sw_bytes->xfeatures = fpstate->user_xfeatures;
111 sw_bytes->xstate_size = fpstate->user_size;
112
113 if (ia32_frame)
114 sw_bytes->extended_size += sizeof(struct fregs_state);
115}
116
117static inline bool save_xstate_epilog(void __user *buf, int ia32_frame,
118 struct fpstate *fpstate)
119{
120 struct xregs_state __user *x = buf;
121 struct _fpx_sw_bytes sw_bytes = {};
122 u32 xfeatures;
123 int err;
124
125 /* Setup the bytes not touched by the [f]xsave and reserved for SW. */
126 save_sw_bytes(&sw_bytes, ia32_frame, fpstate);
127 err = __copy_to_user(&x->i387.sw_reserved, &sw_bytes, sizeof(sw_bytes));
128
129 if (!use_xsave())
130 return !err;
131
132 err |= __put_user(FP_XSTATE_MAGIC2,
133 (__u32 __user *)(buf + fpstate->user_size));
134
135 /*
136 * Read the xfeatures which we copied (directly from the cpu or
137 * from the state in task struct) to the user buffers.
138 */
139 err |= __get_user(xfeatures, (__u32 __user *)&x->header.xfeatures);
140
141 /*
142 * For legacy compatible, we always set FP/SSE bits in the bit
143 * vector while saving the state to the user context. This will
144 * enable us capturing any changes(during sigreturn) to
145 * the FP/SSE bits by the legacy applications which don't touch
146 * xfeatures in the xsave header.
147 *
148 * xsave aware apps can change the xfeatures in the xsave
149 * header as well as change any contents in the memory layout.
150 * xrestore as part of sigreturn will capture all the changes.
151 */
152 xfeatures |= XFEATURE_MASK_FPSSE;
153
154 err |= __put_user(xfeatures, (__u32 __user *)&x->header.xfeatures);
155
156 return !err;
157}
158
159static inline int copy_fpregs_to_sigframe(struct xregs_state __user *buf)
160{
161 if (use_xsave())
162 return xsave_to_user_sigframe(buf);
163 if (use_fxsr())
164 return fxsave_to_user_sigframe((struct fxregs_state __user *) buf);
165 else
166 return fnsave_to_user_sigframe((struct fregs_state __user *) buf);
167}
168
169/*
170 * Save the fpu, extended register state to the user signal frame.
171 *
172 * 'buf_fx' is the 64-byte aligned pointer at which the [f|fx|x]save
173 * state is copied.
174 * 'buf' points to the 'buf_fx' or to the fsave header followed by 'buf_fx'.
175 *
176 * buf == buf_fx for 64-bit frames and 32-bit fsave frame.
177 * buf != buf_fx for 32-bit frames with fxstate.
178 *
179 * Save it directly to the user frame with disabled page fault handler. If
180 * that faults, try to clear the frame which handles the page fault.
181 *
182 * If this is a 32-bit frame with fxstate, put a fsave header before
183 * the aligned state at 'buf_fx'.
184 *
185 * For [f]xsave state, update the SW reserved fields in the [f]xsave frame
186 * indicating the absence/presence of the extended state to the user.
187 */
188bool copy_fpstate_to_sigframe(void __user *buf, void __user *buf_fx, int size)
189{
190 struct task_struct *tsk = current;
191 struct fpstate *fpstate = tsk->thread.fpu.fpstate;
192 bool ia32_fxstate = (buf != buf_fx);
193 int ret;
194
195 ia32_fxstate &= (IS_ENABLED(CONFIG_X86_32) ||
196 IS_ENABLED(CONFIG_IA32_EMULATION));
197
198 if (!static_cpu_has(X86_FEATURE_FPU)) {
199 struct user_i387_ia32_struct fp;
200
201 fpregs_soft_get(current, NULL, (struct membuf){.p = &fp,
202 .left = sizeof(fp)});
203 return !copy_to_user(buf, &fp, sizeof(fp));
204 }
205
206 if (!access_ok(buf, size))
207 return false;
208
209 if (use_xsave()) {
210 struct xregs_state __user *xbuf = buf_fx;
211
212 /*
213 * Clear the xsave header first, so that reserved fields are
214 * initialized to zero.
215 */
216 if (__clear_user(&xbuf->header, sizeof(xbuf->header)))
217 return false;
218 }
219retry:
220 /*
221 * Load the FPU registers if they are not valid for the current task.
222 * With a valid FPU state we can attempt to save the state directly to
223 * userland's stack frame which will likely succeed. If it does not,
224 * resolve the fault in the user memory and try again.
225 */
226 fpregs_lock();
227 if (test_thread_flag(TIF_NEED_FPU_LOAD))
228 fpregs_restore_userregs();
229
230 pagefault_disable();
231 ret = copy_fpregs_to_sigframe(buf_fx);
232 pagefault_enable();
233 fpregs_unlock();
234
235 if (ret) {
236 if (!__clear_user(buf_fx, fpstate->user_size))
237 goto retry;
238 return false;
239 }
240
241 /* Save the fsave header for the 32-bit frames. */
242 if ((ia32_fxstate || !use_fxsr()) && !save_fsave_header(tsk, buf))
243 return false;
244
245 if (use_fxsr() && !save_xstate_epilog(buf_fx, ia32_fxstate, fpstate))
246 return false;
247
248 return true;
249}
250
251static int __restore_fpregs_from_user(void __user *buf, u64 ufeatures,
252 u64 xrestore, bool fx_only)
253{
254 if (use_xsave()) {
255 u64 init_bv = ufeatures & ~xrestore;
256 int ret;
257
258 if (likely(!fx_only))
259 ret = xrstor_from_user_sigframe(buf, xrestore);
260 else
261 ret = fxrstor_from_user_sigframe(buf);
262
263 if (!ret && unlikely(init_bv))
264 os_xrstor(&init_fpstate, init_bv);
265 return ret;
266 } else if (use_fxsr()) {
267 return fxrstor_from_user_sigframe(buf);
268 } else {
269 return frstor_from_user_sigframe(buf);
270 }
271}
272
273/*
274 * Attempt to restore the FPU registers directly from user memory.
275 * Pagefaults are handled and any errors returned are fatal.
276 */
277static bool restore_fpregs_from_user(void __user *buf, u64 xrestore, bool fx_only)
278{
279 struct fpu *fpu = ¤t->thread.fpu;
280 int ret;
281
282 /* Restore enabled features only. */
283 xrestore &= fpu->fpstate->user_xfeatures;
284retry:
285 fpregs_lock();
286 /* Ensure that XFD is up to date */
287 xfd_update_state(fpu->fpstate);
288 pagefault_disable();
289 ret = __restore_fpregs_from_user(buf, fpu->fpstate->user_xfeatures,
290 xrestore, fx_only);
291 pagefault_enable();
292
293 if (unlikely(ret)) {
294 /*
295 * The above did an FPU restore operation, restricted to
296 * the user portion of the registers, and failed, but the
297 * microcode might have modified the FPU registers
298 * nevertheless.
299 *
300 * If the FPU registers do not belong to current, then
301 * invalidate the FPU register state otherwise the task
302 * might preempt current and return to user space with
303 * corrupted FPU registers.
304 */
305 if (test_thread_flag(TIF_NEED_FPU_LOAD))
306 __cpu_invalidate_fpregs_state();
307 fpregs_unlock();
308
309 /* Try to handle #PF, but anything else is fatal. */
310 if (ret != X86_TRAP_PF)
311 return false;
312
313 if (!fault_in_readable(buf, fpu->fpstate->user_size))
314 goto retry;
315 return false;
316 }
317
318 /*
319 * Restore supervisor states: previous context switch etc has done
320 * XSAVES and saved the supervisor states in the kernel buffer from
321 * which they can be restored now.
322 *
323 * It would be optimal to handle this with a single XRSTORS, but
324 * this does not work because the rest of the FPU registers have
325 * been restored from a user buffer directly.
326 */
327 if (test_thread_flag(TIF_NEED_FPU_LOAD) && xfeatures_mask_supervisor())
328 os_xrstor_supervisor(fpu->fpstate);
329
330 fpregs_mark_activate();
331 fpregs_unlock();
332 return true;
333}
334
335static bool __fpu_restore_sig(void __user *buf, void __user *buf_fx,
336 bool ia32_fxstate)
337{
338 struct task_struct *tsk = current;
339 struct fpu *fpu = &tsk->thread.fpu;
340 struct user_i387_ia32_struct env;
341 bool success, fx_only = false;
342 union fpregs_state *fpregs;
343 u64 user_xfeatures = 0;
344
345 if (use_xsave()) {
346 struct _fpx_sw_bytes fx_sw_user;
347
348 if (!check_xstate_in_sigframe(buf_fx, &fx_sw_user))
349 return false;
350
351 fx_only = !fx_sw_user.magic1;
352 user_xfeatures = fx_sw_user.xfeatures;
353 } else {
354 user_xfeatures = XFEATURE_MASK_FPSSE;
355 }
356
357 if (likely(!ia32_fxstate)) {
358 /* Restore the FPU registers directly from user memory. */
359 return restore_fpregs_from_user(buf_fx, user_xfeatures, fx_only);
360 }
361
362 /*
363 * Copy the legacy state because the FP portion of the FX frame has
364 * to be ignored for histerical raisins. The legacy state is folded
365 * in once the larger state has been copied.
366 */
367 if (__copy_from_user(&env, buf, sizeof(env)))
368 return false;
369
370 /*
371 * By setting TIF_NEED_FPU_LOAD it is ensured that our xstate is
372 * not modified on context switch and that the xstate is considered
373 * to be loaded again on return to userland (overriding last_cpu avoids
374 * the optimisation).
375 */
376 fpregs_lock();
377 if (!test_thread_flag(TIF_NEED_FPU_LOAD)) {
378 /*
379 * If supervisor states are available then save the
380 * hardware state in current's fpstate so that the
381 * supervisor state is preserved. Save the full state for
382 * simplicity. There is no point in optimizing this by only
383 * saving the supervisor states and then shuffle them to
384 * the right place in memory. It's ia32 mode. Shrug.
385 */
386 if (xfeatures_mask_supervisor())
387 os_xsave(fpu->fpstate);
388 set_thread_flag(TIF_NEED_FPU_LOAD);
389 }
390 __fpu_invalidate_fpregs_state(fpu);
391 __cpu_invalidate_fpregs_state();
392 fpregs_unlock();
393
394 fpregs = &fpu->fpstate->regs;
395 if (use_xsave() && !fx_only) {
396 if (copy_sigframe_from_user_to_xstate(tsk, buf_fx))
397 return false;
398 } else {
399 if (__copy_from_user(&fpregs->fxsave, buf_fx,
400 sizeof(fpregs->fxsave)))
401 return false;
402
403 if (IS_ENABLED(CONFIG_X86_64)) {
404 /* Reject invalid MXCSR values. */
405 if (fpregs->fxsave.mxcsr & ~mxcsr_feature_mask)
406 return false;
407 } else {
408 /* Mask invalid bits out for historical reasons (broken hardware). */
409 fpregs->fxsave.mxcsr &= mxcsr_feature_mask;
410 }
411
412 /* Enforce XFEATURE_MASK_FPSSE when XSAVE is enabled */
413 if (use_xsave())
414 fpregs->xsave.header.xfeatures |= XFEATURE_MASK_FPSSE;
415 }
416
417 /* Fold the legacy FP storage */
418 convert_to_fxsr(&fpregs->fxsave, &env);
419
420 fpregs_lock();
421 if (use_xsave()) {
422 /*
423 * Remove all UABI feature bits not set in user_xfeatures
424 * from the memory xstate header which makes the full
425 * restore below bring them into init state. This works for
426 * fx_only mode as well because that has only FP and SSE
427 * set in user_xfeatures.
428 *
429 * Preserve supervisor states!
430 */
431 u64 mask = user_xfeatures | xfeatures_mask_supervisor();
432
433 fpregs->xsave.header.xfeatures &= mask;
434 success = !os_xrstor_safe(fpu->fpstate,
435 fpu_kernel_cfg.max_features);
436 } else {
437 success = !fxrstor_safe(&fpregs->fxsave);
438 }
439
440 if (likely(success))
441 fpregs_mark_activate();
442
443 fpregs_unlock();
444 return success;
445}
446
447static inline unsigned int xstate_sigframe_size(struct fpstate *fpstate)
448{
449 unsigned int size = fpstate->user_size;
450
451 return use_xsave() ? size + FP_XSTATE_MAGIC2_SIZE : size;
452}
453
454/*
455 * Restore FPU state from a sigframe:
456 */
457bool fpu__restore_sig(void __user *buf, int ia32_frame)
458{
459 struct fpu *fpu = ¤t->thread.fpu;
460 void __user *buf_fx = buf;
461 bool ia32_fxstate = false;
462 bool success = false;
463 unsigned int size;
464
465 if (unlikely(!buf)) {
466 fpu__clear_user_states(fpu);
467 return true;
468 }
469
470 size = xstate_sigframe_size(fpu->fpstate);
471
472 ia32_frame &= (IS_ENABLED(CONFIG_X86_32) ||
473 IS_ENABLED(CONFIG_IA32_EMULATION));
474
475 /*
476 * Only FXSR enabled systems need the FX state quirk.
477 * FRSTOR does not need it and can use the fast path.
478 */
479 if (ia32_frame && use_fxsr()) {
480 buf_fx = buf + sizeof(struct fregs_state);
481 size += sizeof(struct fregs_state);
482 ia32_fxstate = true;
483 }
484
485 if (!access_ok(buf, size))
486 goto out;
487
488 if (!IS_ENABLED(CONFIG_X86_64) && !cpu_feature_enabled(X86_FEATURE_FPU)) {
489 success = !fpregs_soft_set(current, NULL, 0,
490 sizeof(struct user_i387_ia32_struct),
491 NULL, buf);
492 } else {
493 success = __fpu_restore_sig(buf, buf_fx, ia32_fxstate);
494 }
495
496out:
497 if (unlikely(!success))
498 fpu__clear_user_states(fpu);
499 return success;
500}
501
502unsigned long
503fpu__alloc_mathframe(unsigned long sp, int ia32_frame,
504 unsigned long *buf_fx, unsigned long *size)
505{
506 unsigned long frame_size = xstate_sigframe_size(current->thread.fpu.fpstate);
507
508 *buf_fx = sp = round_down(sp - frame_size, 64);
509 if (ia32_frame && use_fxsr()) {
510 frame_size += sizeof(struct fregs_state);
511 sp -= sizeof(struct fregs_state);
512 }
513
514 *size = frame_size;
515
516 return sp;
517}
518
519unsigned long __init fpu__get_fpstate_size(void)
520{
521 unsigned long ret = fpu_user_cfg.max_size;
522
523 if (use_xsave())
524 ret += FP_XSTATE_MAGIC2_SIZE;
525
526 /*
527 * This space is needed on (most) 32-bit kernels, or when a 32-bit
528 * app is running on a 64-bit kernel. To keep things simple, just
529 * assume the worst case and always include space for 'freg_state',
530 * even for 64-bit apps on 64-bit kernels. This wastes a bit of
531 * space, but keeps the code simple.
532 */
533 if ((IS_ENABLED(CONFIG_IA32_EMULATION) ||
534 IS_ENABLED(CONFIG_X86_32)) && use_fxsr())
535 ret += sizeof(struct fregs_state);
536
537 return ret;
538}
539