1/*
 2 * setup.c - boot time setup code
 3 */
 4
 5#include <linux/init.h>
 6#include <linux/export.h>
 7
 8#include <asm/bootinfo.h>
 9#include <asm/reboot.h>
10#include <asm/time.h>
11#include <linux/ioport.h>
12
13#include <asm/mach-rc32434/rb.h>
14#include <asm/mach-rc32434/pci.h>
15
16struct pci_reg __iomem *pci_reg;
17EXPORT_SYMBOL(pci_reg);
18
19static struct resource pci0_res[] = {
20	{
21		.name = "pci_reg0",
22		.start = PCI0_BASE_ADDR,
23		.end = PCI0_BASE_ADDR + sizeof(struct pci_reg),
24		.flags = IORESOURCE_MEM,
25	}
26};
27
28static void rb_machine_restart(char *command)
29{
30	/* just jump to the reset vector */
31	writel(0x80000001, IDT434_REG_BASE + RST);
32	((void (*)(void)) KSEG1ADDR(0x1FC00000u))();
33}
34
35static void rb_machine_halt(void)
36{
37	for (;;)
38		continue;
39}
40
41void __init plat_mem_setup(void)
42{
43	u32 val;
44
45	_machine_restart = rb_machine_restart;
46	_machine_halt = rb_machine_halt;
47	pm_power_off = rb_machine_halt;
48
49	set_io_port_base(KSEG1);
50
51	pci_reg = ioremap_nocache(pci0_res[0].start,
52				pci0_res[0].end - pci0_res[0].start);
53	if (!pci_reg) {
54		printk(KERN_ERR "Could not remap PCI registers\n");
55		return;
56	}
57
58	val = __raw_readl(&pci_reg->pcic);
59	val &= 0xFFFFFF7;
60	__raw_writel(val, (void *)&pci_reg->pcic);
61
62#ifdef CONFIG_PCI
63	/* Enable PCI interrupts in EPLD Mask register */
64	*epld_mask = 0x0;
65	*(epld_mask + 1) = 0x0;
66#endif
67	write_c0_wired(0);
68}
69
70const char *get_system_type(void)
71{
72	switch (mips_machtype) {
73	case MACH_MIKROTIK_RB532A:
74		return "Mikrotik RB532A";
75		break;
76	default:
77		return "Mikrotik RB532";
78		break;
79	}
80}

 1// SPDX-License-Identifier: GPL-2.0
 2/*
 3 * setup.c - boot time setup code
 4 */
 5
 6#include <linux/init.h>
 7#include <linux/export.h>
 8
 9#include <asm/bootinfo.h>
10#include <asm/reboot.h>
11#include <asm/time.h>
12#include <linux/ioport.h>
13
14#include <asm/mach-rc32434/rb.h>
15#include <asm/mach-rc32434/pci.h>
16
17struct pci_reg __iomem *pci_reg;
18EXPORT_SYMBOL(pci_reg);
19
20static struct resource pci0_res[] = {
21	{
22		.name = "pci_reg0",
23		.start = PCI0_BASE_ADDR,
24		.end = PCI0_BASE_ADDR + sizeof(struct pci_reg),
25		.flags = IORESOURCE_MEM,
26	}
27};
28
29static void rb_machine_restart(char *command)
30{
31	/* just jump to the reset vector */
32	writel(0x80000001, IDT434_REG_BASE + RST);
33	((void (*)(void)) KSEG1ADDR(0x1FC00000u))();
34}
35
36static void rb_machine_halt(void)
37{
38	for (;;)
39		continue;
40}
41
42void __init plat_mem_setup(void)
43{
44	u32 val;
45
46	_machine_restart = rb_machine_restart;
47	_machine_halt = rb_machine_halt;
48	pm_power_off = rb_machine_halt;
49
50	set_io_port_base(KSEG1);
51
52	pci_reg = ioremap(pci0_res[0].start,
53				pci0_res[0].end - pci0_res[0].start);
54	if (!pci_reg) {
55		printk(KERN_ERR "Could not remap PCI registers\n");
56		return;
57	}
58
59	val = __raw_readl(&pci_reg->pcic);
60	val &= 0xFFFFFF7;
61	__raw_writel(val, (void *)&pci_reg->pcic);
62
63#ifdef CONFIG_PCI
64	/* Enable PCI interrupts in EPLD Mask register */
65	*epld_mask = 0x0;
66	*(epld_mask + 1) = 0x0;
67#endif
68	write_c0_wired(0);
69}
70
71const char *get_system_type(void)
72{
73	switch (mips_machtype) {
74	case MACH_MIKROTIK_RB532A:
75		return "Mikrotik RB532A";
76		break;
77	default:
78		return "Mikrotik RB532";
79		break;
80	}
81}