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1config MIPS
2 bool
3 default y
4 select HAVE_GENERIC_DMA_COHERENT
5 select HAVE_IDE
6 select HAVE_OPROFILE
7 select HAVE_IRQ_WORK
8 select HAVE_PERF_EVENTS
9 select PERF_USE_VMALLOC
10 select HAVE_ARCH_KGDB
11 select ARCH_HAVE_CUSTOM_GPIO_H
12 select HAVE_FUNCTION_TRACER
13 select HAVE_FUNCTION_TRACE_MCOUNT_TEST
14 select HAVE_DYNAMIC_FTRACE
15 select HAVE_FTRACE_MCOUNT_RECORD
16 select HAVE_C_RECORDMCOUNT
17 select HAVE_FUNCTION_GRAPH_TRACER
18 select HAVE_KPROBES
19 select HAVE_KRETPROBES
20 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
21 select RTC_LIB if !MACH_LOONGSON
22 select GENERIC_ATOMIC64 if !64BIT
23 select HAVE_DMA_ATTRS
24 select HAVE_DMA_API_DEBUG
25 select HAVE_GENERIC_HARDIRQS
26 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW
28 select HAVE_ARCH_JUMP_LABEL
29 select IRQ_FORCED_THREADING
30 select HAVE_MEMBLOCK
31 select HAVE_MEMBLOCK_NODE_MAP
32 select ARCH_DISCARD_MEMBLOCK
33 select GENERIC_SMP_IDLE_THREAD
34 select BUILDTIME_EXTABLE_SORT
35 select GENERIC_CLOCKEVENTS
36 select GENERIC_CMOS_UPDATE
37
38menu "Machine selection"
39
40config ZONE_DMA
41 bool
42
43choice
44 prompt "System type"
45 default SGI_IP22
46
47config MIPS_ALCHEMY
48 bool "Alchemy processor based machines"
49 select 64BIT_PHYS_ADDR
50 select CEVT_R4K_LIB
51 select CSRC_R4K_LIB
52 select IRQ_CPU
53 select SYS_HAS_CPU_MIPS32_R1
54 select SYS_SUPPORTS_32BIT_KERNEL
55 select SYS_SUPPORTS_APM_EMULATION
56 select GENERIC_GPIO
57 select ARCH_WANT_OPTIONAL_GPIOLIB
58 select SYS_SUPPORTS_ZBOOT
59 select USB_ARCH_HAS_OHCI
60 select USB_ARCH_HAS_EHCI
61
62config AR7
63 bool "Texas Instruments AR7"
64 select BOOT_ELF32
65 select DMA_NONCOHERENT
66 select CEVT_R4K
67 select CSRC_R4K
68 select IRQ_CPU
69 select NO_EXCEPT_FILL
70 select SWAP_IO_SPACE
71 select SYS_HAS_CPU_MIPS32_R1
72 select SYS_HAS_EARLY_PRINTK
73 select SYS_SUPPORTS_32BIT_KERNEL
74 select SYS_SUPPORTS_LITTLE_ENDIAN
75 select SYS_SUPPORTS_ZBOOT_UART16550
76 select ARCH_REQUIRE_GPIOLIB
77 select VLYNQ
78 help
79 Support for the Texas Instruments AR7 System-on-a-Chip
80 family: TNETD7100, 7200 and 7300.
81
82config ATH79
83 bool "Atheros AR71XX/AR724X/AR913X based boards"
84 select ARCH_REQUIRE_GPIOLIB
85 select BOOT_RAW
86 select CEVT_R4K
87 select CSRC_R4K
88 select DMA_NONCOHERENT
89 select IRQ_CPU
90 select MIPS_MACHINE
91 select SYS_HAS_CPU_MIPS32_R2
92 select SYS_HAS_EARLY_PRINTK
93 select SYS_SUPPORTS_32BIT_KERNEL
94 select SYS_SUPPORTS_BIG_ENDIAN
95 help
96 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
97
98config BCM47XX
99 bool "Broadcom BCM47XX based boards"
100 select CEVT_R4K
101 select CSRC_R4K
102 select DMA_NONCOHERENT
103 select HW_HAS_PCI
104 select IRQ_CPU
105 select SYS_SUPPORTS_32BIT_KERNEL
106 select SYS_SUPPORTS_LITTLE_ENDIAN
107 select GENERIC_GPIO
108 select SYS_HAS_EARLY_PRINTK
109 select CFE
110 help
111 Support for BCM47XX based boards
112
113config BCM63XX
114 bool "Broadcom BCM63XX based boards"
115 select CEVT_R4K
116 select CSRC_R4K
117 select DMA_NONCOHERENT
118 select IRQ_CPU
119 select SYS_HAS_CPU_MIPS32_R1
120 select SYS_SUPPORTS_32BIT_KERNEL
121 select SYS_SUPPORTS_BIG_ENDIAN
122 select SYS_HAS_EARLY_PRINTK
123 select SWAP_IO_SPACE
124 select ARCH_REQUIRE_GPIOLIB
125 help
126 Support for BCM63XX based boards
127
128config MIPS_COBALT
129 bool "Cobalt Server"
130 select CEVT_R4K
131 select CSRC_R4K
132 select CEVT_GT641XX
133 select DMA_NONCOHERENT
134 select HW_HAS_PCI
135 select I8253
136 select I8259
137 select IRQ_CPU
138 select IRQ_GT641XX
139 select PCI_GT64XXX_PCI0
140 select PCI
141 select SYS_HAS_CPU_NEVADA
142 select SYS_HAS_EARLY_PRINTK
143 select SYS_SUPPORTS_32BIT_KERNEL
144 select SYS_SUPPORTS_64BIT_KERNEL
145 select SYS_SUPPORTS_LITTLE_ENDIAN
146
147config MACH_DECSTATION
148 bool "DECstations"
149 select BOOT_ELF32
150 select CEVT_DS1287
151 select CEVT_R4K
152 select CSRC_IOASIC
153 select CSRC_R4K
154 select CPU_DADDI_WORKAROUNDS if 64BIT
155 select CPU_R4000_WORKAROUNDS if 64BIT
156 select CPU_R4400_WORKAROUNDS if 64BIT
157 select DMA_NONCOHERENT
158 select NO_IOPORT
159 select IRQ_CPU
160 select SYS_HAS_CPU_R3000
161 select SYS_HAS_CPU_R4X00
162 select SYS_SUPPORTS_32BIT_KERNEL
163 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
164 select SYS_SUPPORTS_LITTLE_ENDIAN
165 select SYS_SUPPORTS_128HZ
166 select SYS_SUPPORTS_256HZ
167 select SYS_SUPPORTS_1024HZ
168 help
169 This enables support for DEC's MIPS based workstations. For details
170 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
171 DECstation porting pages on <http://decstation.unix-ag.org/>.
172
173 If you have one of the following DECstation Models you definitely
174 want to choose R4xx0 for the CPU Type:
175
176 DECstation 5000/50
177 DECstation 5000/150
178 DECstation 5000/260
179 DECsystem 5900/260
180
181 otherwise choose R3000.
182
183config MACH_JAZZ
184 bool "Jazz family of machines"
185 select ARC
186 select ARC32
187 select ARCH_MAY_HAVE_PC_FDC
188 select CEVT_R4K
189 select CSRC_R4K
190 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
191 select GENERIC_ISA_DMA
192 select HAVE_PCSPKR_PLATFORM
193 select IRQ_CPU
194 select I8253
195 select I8259
196 select ISA
197 select SYS_HAS_CPU_R4X00
198 select SYS_SUPPORTS_32BIT_KERNEL
199 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
200 select SYS_SUPPORTS_100HZ
201 help
202 This a family of machines based on the MIPS R4030 chipset which was
203 used by several vendors to build RISC/os and Windows NT workstations.
204 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
205 Olivetti M700-10 workstations.
206
207config MACH_JZ4740
208 bool "Ingenic JZ4740 based machines"
209 select SYS_HAS_CPU_MIPS32_R1
210 select SYS_SUPPORTS_32BIT_KERNEL
211 select SYS_SUPPORTS_LITTLE_ENDIAN
212 select DMA_NONCOHERENT
213 select IRQ_CPU
214 select GENERIC_GPIO
215 select ARCH_REQUIRE_GPIOLIB
216 select SYS_HAS_EARLY_PRINTK
217 select HAVE_PWM
218 select HAVE_CLK
219 select GENERIC_IRQ_CHIP
220
221config LANTIQ
222 bool "Lantiq based platforms"
223 select DMA_NONCOHERENT
224 select IRQ_CPU
225 select CEVT_R4K
226 select CSRC_R4K
227 select SYS_HAS_CPU_MIPS32_R1
228 select SYS_HAS_CPU_MIPS32_R2
229 select SYS_SUPPORTS_BIG_ENDIAN
230 select SYS_SUPPORTS_32BIT_KERNEL
231 select SYS_SUPPORTS_MULTITHREADING
232 select SYS_HAS_EARLY_PRINTK
233 select ARCH_REQUIRE_GPIOLIB
234 select SWAP_IO_SPACE
235 select BOOT_RAW
236 select HAVE_MACH_CLKDEV
237 select CLKDEV_LOOKUP
238 select USE_OF
239
240config LASAT
241 bool "LASAT Networks platforms"
242 select CEVT_R4K
243 select CSRC_R4K
244 select DMA_NONCOHERENT
245 select SYS_HAS_EARLY_PRINTK
246 select HW_HAS_PCI
247 select IRQ_CPU
248 select PCI_GT64XXX_PCI0
249 select MIPS_NILE4
250 select R5000_CPU_SCACHE
251 select SYS_HAS_CPU_R5000
252 select SYS_SUPPORTS_32BIT_KERNEL
253 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
254 select SYS_SUPPORTS_LITTLE_ENDIAN
255
256config MACH_LOONGSON
257 bool "Loongson family of machines"
258 select SYS_SUPPORTS_ZBOOT
259 help
260 This enables the support of Loongson family of machines.
261
262 Loongson is a family of general-purpose MIPS-compatible CPUs.
263 developed at Institute of Computing Technology (ICT),
264 Chinese Academy of Sciences (CAS) in the People's Republic
265 of China. The chief architect is Professor Weiwu Hu.
266
267config MIPS_MALTA
268 bool "MIPS Malta board"
269 select ARCH_MAY_HAVE_PC_FDC
270 select BOOT_ELF32
271 select BOOT_RAW
272 select CEVT_R4K
273 select CSRC_R4K
274 select DMA_NONCOHERENT
275 select GENERIC_ISA_DMA
276 select HAVE_PCSPKR_PLATFORM
277 select IRQ_CPU
278 select IRQ_GIC
279 select HW_HAS_PCI
280 select I8253
281 select I8259
282 select MIPS_BOARDS_GEN
283 select MIPS_BONITO64
284 select MIPS_CPU_SCACHE
285 select PCI_GT64XXX_PCI0
286 select MIPS_MSC
287 select SWAP_IO_SPACE
288 select SYS_HAS_CPU_MIPS32_R1
289 select SYS_HAS_CPU_MIPS32_R2
290 select SYS_HAS_CPU_MIPS64_R1
291 select SYS_HAS_CPU_MIPS64_R2
292 select SYS_HAS_CPU_NEVADA
293 select SYS_HAS_CPU_RM7000
294 select SYS_HAS_EARLY_PRINTK
295 select SYS_SUPPORTS_32BIT_KERNEL
296 select SYS_SUPPORTS_64BIT_KERNEL
297 select SYS_SUPPORTS_BIG_ENDIAN
298 select SYS_SUPPORTS_LITTLE_ENDIAN
299 select SYS_SUPPORTS_MIPS_CMP
300 select SYS_SUPPORTS_MULTITHREADING
301 select SYS_SUPPORTS_SMARTMIPS
302 select SYS_SUPPORTS_ZBOOT
303 help
304 This enables support for the MIPS Technologies Malta evaluation
305 board.
306
307config MIPS_SIM
308 bool 'MIPS simulator (MIPSsim)'
309 select CEVT_R4K
310 select CSRC_R4K
311 select DMA_NONCOHERENT
312 select SYS_HAS_EARLY_PRINTK
313 select IRQ_CPU
314 select BOOT_RAW
315 select SYS_HAS_CPU_MIPS32_R1
316 select SYS_HAS_CPU_MIPS32_R2
317 select SYS_HAS_EARLY_PRINTK
318 select SYS_SUPPORTS_32BIT_KERNEL
319 select SYS_SUPPORTS_BIG_ENDIAN
320 select SYS_SUPPORTS_MULTITHREADING
321 select SYS_SUPPORTS_LITTLE_ENDIAN
322 help
323 This option enables support for MIPS Technologies MIPSsim software
324 emulator.
325
326config NEC_MARKEINS
327 bool "NEC EMMA2RH Mark-eins board"
328 select SOC_EMMA2RH
329 select HW_HAS_PCI
330 help
331 This enables support for the NEC Electronics Mark-eins boards.
332
333config MACH_VR41XX
334 bool "NEC VR4100 series based machines"
335 select CEVT_R4K
336 select CSRC_R4K
337 select SYS_HAS_CPU_VR41XX
338 select ARCH_REQUIRE_GPIOLIB
339
340config NXP_STB220
341 bool "NXP STB220 board"
342 select SOC_PNX833X
343 help
344 Support for NXP Semiconductors STB220 Development Board.
345
346config NXP_STB225
347 bool "NXP 225 board"
348 select SOC_PNX833X
349 select SOC_PNX8335
350 help
351 Support for NXP Semiconductors STB225 Development Board.
352
353config PNX8550_JBS
354 bool "NXP PNX8550 based JBS board"
355 select PNX8550
356 select SYS_SUPPORTS_LITTLE_ENDIAN
357
358config PNX8550_STB810
359 bool "NXP PNX8550 based STB810 board"
360 select PNX8550
361 select SYS_SUPPORTS_LITTLE_ENDIAN
362
363config PMC_MSP
364 bool "PMC-Sierra MSP chipsets"
365 depends on EXPERIMENTAL
366 select CEVT_R4K
367 select CSRC_R4K
368 select DMA_NONCOHERENT
369 select SWAP_IO_SPACE
370 select NO_EXCEPT_FILL
371 select BOOT_RAW
372 select SYS_HAS_CPU_MIPS32_R1
373 select SYS_HAS_CPU_MIPS32_R2
374 select SYS_SUPPORTS_32BIT_KERNEL
375 select SYS_SUPPORTS_BIG_ENDIAN
376 select IRQ_CPU
377 select SERIAL_8250
378 select SERIAL_8250_CONSOLE
379 help
380 This adds support for the PMC-Sierra family of Multi-Service
381 Processor System-On-A-Chips. These parts include a number
382 of integrated peripherals, interfaces and DSPs in addition to
383 a variety of MIPS cores.
384
385config PMC_YOSEMITE
386 bool "PMC-Sierra Yosemite eval board"
387 select CEVT_R4K
388 select CSRC_R4K
389 select DMA_COHERENT
390 select HW_HAS_PCI
391 select IRQ_CPU
392 select IRQ_CPU_RM7K
393 select IRQ_CPU_RM9K
394 select SWAP_IO_SPACE
395 select SYS_HAS_CPU_RM9000
396 select SYS_HAS_EARLY_PRINTK
397 select SYS_SUPPORTS_32BIT_KERNEL
398 select SYS_SUPPORTS_64BIT_KERNEL
399 select SYS_SUPPORTS_BIG_ENDIAN
400 select SYS_SUPPORTS_HIGHMEM
401 select SYS_SUPPORTS_SMP
402 help
403 Yosemite is an evaluation board for the RM9000x2 processor
404 manufactured by PMC-Sierra.
405
406config POWERTV
407 bool "Cisco PowerTV"
408 select BOOT_ELF32
409 select CEVT_R4K
410 select CPU_MIPSR2_IRQ_VI
411 select CPU_MIPSR2_IRQ_EI
412 select CSRC_POWERTV
413 select DMA_NONCOHERENT
414 select HW_HAS_PCI
415 select SYS_HAS_EARLY_PRINTK
416 select SYS_HAS_CPU_MIPS32_R2
417 select SYS_SUPPORTS_32BIT_KERNEL
418 select SYS_SUPPORTS_BIG_ENDIAN
419 select SYS_SUPPORTS_HIGHMEM
420 select USB_OHCI_LITTLE_ENDIAN
421 help
422 This enables support for the Cisco PowerTV Platform.
423
424config SGI_IP22
425 bool "SGI IP22 (Indy/Indigo2)"
426 select ARC
427 select ARC32
428 select BOOT_ELF32
429 select CEVT_R4K
430 select CSRC_R4K
431 select DEFAULT_SGI_PARTITION
432 select DMA_NONCOHERENT
433 select HW_HAS_EISA
434 select I8253
435 select I8259
436 select IP22_CPU_SCACHE
437 select IRQ_CPU
438 select GENERIC_ISA_DMA_SUPPORT_BROKEN
439 select SGI_HAS_I8042
440 select SGI_HAS_INDYDOG
441 select SGI_HAS_HAL2
442 select SGI_HAS_SEEQ
443 select SGI_HAS_WD93
444 select SGI_HAS_ZILOG
445 select SWAP_IO_SPACE
446 select SYS_HAS_CPU_R4X00
447 select SYS_HAS_CPU_R5000
448 #
449 # Disable EARLY_PRINTK for now since it leads to overwritten prom
450 # memory during early boot on some machines.
451 #
452 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
453 # for a more details discussion
454 #
455 # select SYS_HAS_EARLY_PRINTK
456 select SYS_SUPPORTS_32BIT_KERNEL
457 select SYS_SUPPORTS_64BIT_KERNEL
458 select SYS_SUPPORTS_BIG_ENDIAN
459 help
460 This are the SGI Indy, Challenge S and Indigo2, as well as certain
461 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
462 that runs on these, say Y here.
463
464config SGI_IP27
465 bool "SGI IP27 (Origin200/2000)"
466 select ARC
467 select ARC64
468 select BOOT_ELF64
469 select DEFAULT_SGI_PARTITION
470 select DMA_COHERENT
471 select SYS_HAS_EARLY_PRINTK
472 select HW_HAS_PCI
473 select NR_CPUS_DEFAULT_64
474 select SYS_HAS_CPU_R10000
475 select SYS_SUPPORTS_64BIT_KERNEL
476 select SYS_SUPPORTS_BIG_ENDIAN
477 select SYS_SUPPORTS_NUMA
478 select SYS_SUPPORTS_SMP
479 help
480 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
481 workstations. To compile a Linux kernel that runs on these, say Y
482 here.
483
484config SGI_IP28
485 bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)"
486 depends on EXPERIMENTAL
487 select ARC
488 select ARC64
489 select BOOT_ELF64
490 select CEVT_R4K
491 select CSRC_R4K
492 select DEFAULT_SGI_PARTITION
493 select DMA_NONCOHERENT
494 select GENERIC_ISA_DMA_SUPPORT_BROKEN
495 select IRQ_CPU
496 select HW_HAS_EISA
497 select I8253
498 select I8259
499 select SGI_HAS_I8042
500 select SGI_HAS_INDYDOG
501 select SGI_HAS_HAL2
502 select SGI_HAS_SEEQ
503 select SGI_HAS_WD93
504 select SGI_HAS_ZILOG
505 select SWAP_IO_SPACE
506 select SYS_HAS_CPU_R10000
507 #
508 # Disable EARLY_PRINTK for now since it leads to overwritten prom
509 # memory during early boot on some machines.
510 #
511 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
512 # for a more details discussion
513 #
514 # select SYS_HAS_EARLY_PRINTK
515 select SYS_SUPPORTS_64BIT_KERNEL
516 select SYS_SUPPORTS_BIG_ENDIAN
517 help
518 This is the SGI Indigo2 with R10000 processor. To compile a Linux
519 kernel that runs on these, say Y here.
520
521config SGI_IP32
522 bool "SGI IP32 (O2)"
523 select ARC
524 select ARC32
525 select BOOT_ELF32
526 select CEVT_R4K
527 select CSRC_R4K
528 select DMA_NONCOHERENT
529 select HW_HAS_PCI
530 select IRQ_CPU
531 select R5000_CPU_SCACHE
532 select RM7000_CPU_SCACHE
533 select SYS_HAS_CPU_R5000
534 select SYS_HAS_CPU_R10000 if BROKEN
535 select SYS_HAS_CPU_RM7000
536 select SYS_HAS_CPU_NEVADA
537 select SYS_SUPPORTS_64BIT_KERNEL
538 select SYS_SUPPORTS_BIG_ENDIAN
539 help
540 If you want this kernel to run on SGI O2 workstation, say Y here.
541
542config SIBYTE_CRHINE
543 bool "Sibyte BCM91120C-CRhine"
544 depends on EXPERIMENTAL
545 select BOOT_ELF32
546 select DMA_COHERENT
547 select SIBYTE_BCM1120
548 select SWAP_IO_SPACE
549 select SYS_HAS_CPU_SB1
550 select SYS_SUPPORTS_BIG_ENDIAN
551 select SYS_SUPPORTS_LITTLE_ENDIAN
552
553config SIBYTE_CARMEL
554 bool "Sibyte BCM91120x-Carmel"
555 depends on EXPERIMENTAL
556 select BOOT_ELF32
557 select DMA_COHERENT
558 select SIBYTE_BCM1120
559 select SWAP_IO_SPACE
560 select SYS_HAS_CPU_SB1
561 select SYS_SUPPORTS_BIG_ENDIAN
562 select SYS_SUPPORTS_LITTLE_ENDIAN
563
564config SIBYTE_CRHONE
565 bool "Sibyte BCM91125C-CRhone"
566 depends on EXPERIMENTAL
567 select BOOT_ELF32
568 select DMA_COHERENT
569 select SIBYTE_BCM1125
570 select SWAP_IO_SPACE
571 select SYS_HAS_CPU_SB1
572 select SYS_SUPPORTS_BIG_ENDIAN
573 select SYS_SUPPORTS_HIGHMEM
574 select SYS_SUPPORTS_LITTLE_ENDIAN
575
576config SIBYTE_RHONE
577 bool "Sibyte BCM91125E-Rhone"
578 depends on EXPERIMENTAL
579 select BOOT_ELF32
580 select DMA_COHERENT
581 select SIBYTE_BCM1125H
582 select SWAP_IO_SPACE
583 select SYS_HAS_CPU_SB1
584 select SYS_SUPPORTS_BIG_ENDIAN
585 select SYS_SUPPORTS_LITTLE_ENDIAN
586
587config SIBYTE_SWARM
588 bool "Sibyte BCM91250A-SWARM"
589 select BOOT_ELF32
590 select DMA_COHERENT
591 select HAVE_PATA_PLATFORM
592 select NR_CPUS_DEFAULT_2
593 select SIBYTE_SB1250
594 select SWAP_IO_SPACE
595 select SYS_HAS_CPU_SB1
596 select SYS_SUPPORTS_BIG_ENDIAN
597 select SYS_SUPPORTS_HIGHMEM
598 select SYS_SUPPORTS_LITTLE_ENDIAN
599 select ZONE_DMA32 if 64BIT
600
601config SIBYTE_LITTLESUR
602 bool "Sibyte BCM91250C2-LittleSur"
603 depends on EXPERIMENTAL
604 select BOOT_ELF32
605 select DMA_COHERENT
606 select HAVE_PATA_PLATFORM
607 select NR_CPUS_DEFAULT_2
608 select SIBYTE_SB1250
609 select SWAP_IO_SPACE
610 select SYS_HAS_CPU_SB1
611 select SYS_SUPPORTS_BIG_ENDIAN
612 select SYS_SUPPORTS_HIGHMEM
613 select SYS_SUPPORTS_LITTLE_ENDIAN
614
615config SIBYTE_SENTOSA
616 bool "Sibyte BCM91250E-Sentosa"
617 depends on EXPERIMENTAL
618 select BOOT_ELF32
619 select DMA_COHERENT
620 select NR_CPUS_DEFAULT_2
621 select SIBYTE_SB1250
622 select SWAP_IO_SPACE
623 select SYS_HAS_CPU_SB1
624 select SYS_SUPPORTS_BIG_ENDIAN
625 select SYS_SUPPORTS_LITTLE_ENDIAN
626
627config SIBYTE_BIGSUR
628 bool "Sibyte BCM91480B-BigSur"
629 select BOOT_ELF32
630 select DMA_COHERENT
631 select NR_CPUS_DEFAULT_4
632 select SIBYTE_BCM1x80
633 select SWAP_IO_SPACE
634 select SYS_HAS_CPU_SB1
635 select SYS_SUPPORTS_BIG_ENDIAN
636 select SYS_SUPPORTS_HIGHMEM
637 select SYS_SUPPORTS_LITTLE_ENDIAN
638 select ZONE_DMA32 if 64BIT
639
640config SNI_RM
641 bool "SNI RM200/300/400"
642 select ARC if CPU_LITTLE_ENDIAN
643 select ARC32 if CPU_LITTLE_ENDIAN
644 select SNIPROM if CPU_BIG_ENDIAN
645 select ARCH_MAY_HAVE_PC_FDC
646 select BOOT_ELF32
647 select CEVT_R4K
648 select CSRC_R4K
649 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
650 select DMA_NONCOHERENT
651 select GENERIC_ISA_DMA
652 select HAVE_PCSPKR_PLATFORM
653 select HW_HAS_EISA
654 select HW_HAS_PCI
655 select IRQ_CPU
656 select I8253
657 select I8259
658 select ISA
659 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
660 select SYS_HAS_CPU_R4X00
661 select SYS_HAS_CPU_R5000
662 select SYS_HAS_CPU_R10000
663 select R5000_CPU_SCACHE
664 select SYS_HAS_EARLY_PRINTK
665 select SYS_SUPPORTS_32BIT_KERNEL
666 select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
667 select SYS_SUPPORTS_BIG_ENDIAN
668 select SYS_SUPPORTS_HIGHMEM
669 select SYS_SUPPORTS_LITTLE_ENDIAN
670 help
671 The SNI RM200/300/400 are MIPS-based machines manufactured by
672 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
673 Technology and now in turn merged with Fujitsu. Say Y here to
674 support this machine type.
675
676config MACH_TX39XX
677 bool "Toshiba TX39 series based machines"
678
679config MACH_TX49XX
680 bool "Toshiba TX49 series based machines"
681
682config MIKROTIK_RB532
683 bool "Mikrotik RB532 boards"
684 select CEVT_R4K
685 select CSRC_R4K
686 select DMA_NONCOHERENT
687 select HW_HAS_PCI
688 select IRQ_CPU
689 select SYS_HAS_CPU_MIPS32_R1
690 select SYS_SUPPORTS_32BIT_KERNEL
691 select SYS_SUPPORTS_LITTLE_ENDIAN
692 select SWAP_IO_SPACE
693 select BOOT_RAW
694 select ARCH_REQUIRE_GPIOLIB
695 help
696 Support the Mikrotik(tm) RouterBoard 532 series,
697 based on the IDT RC32434 SoC.
698
699config WR_PPMC
700 bool "Wind River PPMC board"
701 select CEVT_R4K
702 select CSRC_R4K
703 select IRQ_CPU
704 select BOOT_ELF32
705 select DMA_NONCOHERENT
706 select HW_HAS_PCI
707 select PCI_GT64XXX_PCI0
708 select SWAP_IO_SPACE
709 select SYS_HAS_CPU_MIPS32_R1
710 select SYS_HAS_CPU_MIPS32_R2
711 select SYS_HAS_CPU_MIPS64_R1
712 select SYS_HAS_CPU_NEVADA
713 select SYS_HAS_CPU_RM7000
714 select SYS_SUPPORTS_32BIT_KERNEL
715 select SYS_SUPPORTS_64BIT_KERNEL
716 select SYS_SUPPORTS_BIG_ENDIAN
717 select SYS_SUPPORTS_LITTLE_ENDIAN
718 help
719 This enables support for the Wind River MIPS32 4KC PPMC evaluation
720 board, which is based on GT64120 bridge chip.
721
722config CAVIUM_OCTEON_SIMULATOR
723 bool "Cavium Networks Octeon Simulator"
724 select CEVT_R4K
725 select 64BIT_PHYS_ADDR
726 select DMA_COHERENT
727 select SYS_SUPPORTS_64BIT_KERNEL
728 select SYS_SUPPORTS_BIG_ENDIAN
729 select SYS_SUPPORTS_HOTPLUG_CPU
730 select SYS_HAS_CPU_CAVIUM_OCTEON
731 select HOLES_IN_ZONE
732 help
733 The Octeon simulator is software performance model of the Cavium
734 Octeon Processor. It supports simulating Octeon processors on x86
735 hardware.
736
737config CAVIUM_OCTEON_REFERENCE_BOARD
738 bool "Cavium Networks Octeon reference board"
739 select CEVT_R4K
740 select 64BIT_PHYS_ADDR
741 select DMA_COHERENT
742 select SYS_SUPPORTS_64BIT_KERNEL
743 select SYS_SUPPORTS_BIG_ENDIAN
744 select SYS_SUPPORTS_HOTPLUG_CPU
745 select SYS_HAS_EARLY_PRINTK
746 select SYS_HAS_CPU_CAVIUM_OCTEON
747 select SWAP_IO_SPACE
748 select HW_HAS_PCI
749 select ARCH_SUPPORTS_MSI
750 select ZONE_DMA32
751 select USB_ARCH_HAS_OHCI
752 select USB_ARCH_HAS_EHCI
753 select HOLES_IN_ZONE
754 help
755 This option supports all of the Octeon reference boards from Cavium
756 Networks. It builds a kernel that dynamically determines the Octeon
757 CPU type and supports all known board reference implementations.
758 Some of the supported boards are:
759 EBT3000
760 EBH3000
761 EBH3100
762 Thunder
763 Kodama
764 Hikari
765 Say Y here for most Octeon reference boards.
766
767config NLM_XLR_BOARD
768 bool "Netlogic XLR/XLS based systems"
769 depends on EXPERIMENTAL
770 select BOOT_ELF32
771 select NLM_COMMON
772 select SYS_HAS_CPU_XLR
773 select SYS_SUPPORTS_SMP
774 select HW_HAS_PCI
775 select SWAP_IO_SPACE
776 select SYS_SUPPORTS_32BIT_KERNEL
777 select SYS_SUPPORTS_64BIT_KERNEL
778 select 64BIT_PHYS_ADDR
779 select SYS_SUPPORTS_BIG_ENDIAN
780 select SYS_SUPPORTS_HIGHMEM
781 select DMA_COHERENT
782 select NR_CPUS_DEFAULT_32
783 select CEVT_R4K
784 select CSRC_R4K
785 select IRQ_CPU
786 select ARCH_SUPPORTS_MSI
787 select ZONE_DMA if 64BIT
788 select SYNC_R4K
789 select SYS_HAS_EARLY_PRINTK
790 help
791 Support for systems based on Netlogic XLR and XLS processors.
792 Say Y here if you have a XLR or XLS based board.
793
794config NLM_XLP_BOARD
795 bool "Netlogic XLP based systems"
796 depends on EXPERIMENTAL
797 select BOOT_ELF32
798 select NLM_COMMON
799 select SYS_HAS_CPU_XLP
800 select SYS_SUPPORTS_SMP
801 select HW_HAS_PCI
802 select SWAP_IO_SPACE
803 select SYS_SUPPORTS_32BIT_KERNEL
804 select SYS_SUPPORTS_64BIT_KERNEL
805 select 64BIT_PHYS_ADDR
806 select SYS_SUPPORTS_BIG_ENDIAN
807 select SYS_SUPPORTS_LITTLE_ENDIAN
808 select SYS_SUPPORTS_HIGHMEM
809 select DMA_COHERENT
810 select NR_CPUS_DEFAULT_32
811 select CEVT_R4K
812 select CSRC_R4K
813 select IRQ_CPU
814 select ZONE_DMA if 64BIT
815 select SYNC_R4K
816 select SYS_HAS_EARLY_PRINTK
817 help
818 This board is based on Netlogic XLP Processor.
819 Say Y here if you have a XLP based board.
820
821endchoice
822
823source "arch/mips/alchemy/Kconfig"
824source "arch/mips/ath79/Kconfig"
825source "arch/mips/bcm47xx/Kconfig"
826source "arch/mips/bcm63xx/Kconfig"
827source "arch/mips/jazz/Kconfig"
828source "arch/mips/jz4740/Kconfig"
829source "arch/mips/lantiq/Kconfig"
830source "arch/mips/lasat/Kconfig"
831source "arch/mips/pmc-sierra/Kconfig"
832source "arch/mips/powertv/Kconfig"
833source "arch/mips/sgi-ip27/Kconfig"
834source "arch/mips/sibyte/Kconfig"
835source "arch/mips/txx9/Kconfig"
836source "arch/mips/vr41xx/Kconfig"
837source "arch/mips/cavium-octeon/Kconfig"
838source "arch/mips/loongson/Kconfig"
839source "arch/mips/netlogic/Kconfig"
840
841endmenu
842
843config RWSEM_GENERIC_SPINLOCK
844 bool
845 default y
846
847config RWSEM_XCHGADD_ALGORITHM
848 bool
849
850config ARCH_HAS_ILOG2_U32
851 bool
852 default n
853
854config ARCH_HAS_ILOG2_U64
855 bool
856 default n
857
858config GENERIC_HWEIGHT
859 bool
860 default y
861
862config GENERIC_CALIBRATE_DELAY
863 bool
864 default y
865
866config SCHED_OMIT_FRAME_POINTER
867 bool
868 default y
869
870#
871# Select some configuration options automatically based on user selections.
872#
873config ARC
874 bool
875
876config ARCH_MAY_HAVE_PC_FDC
877 bool
878
879config BOOT_RAW
880 bool
881
882config CEVT_BCM1480
883 bool
884
885config CEVT_DS1287
886 bool
887
888config CEVT_GT641XX
889 bool
890
891config CEVT_R4K_LIB
892 bool
893
894config CEVT_R4K
895 select CEVT_R4K_LIB
896 bool
897
898config CEVT_SB1250
899 bool
900
901config CEVT_TXX9
902 bool
903
904config CSRC_BCM1480
905 bool
906
907config CSRC_IOASIC
908 bool
909
910config CSRC_POWERTV
911 bool
912
913config CSRC_R4K_LIB
914 bool
915
916config CSRC_R4K
917 select CSRC_R4K_LIB
918 bool
919
920config CSRC_SB1250
921 bool
922
923config GPIO_TXX9
924 select GENERIC_GPIO
925 select ARCH_REQUIRE_GPIOLIB
926 bool
927
928config CFE
929 bool
930
931config ARCH_DMA_ADDR_T_64BIT
932 def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
933
934config DMA_COHERENT
935 bool
936
937config DMA_NONCOHERENT
938 bool
939 select NEED_DMA_MAP_STATE
940
941config NEED_DMA_MAP_STATE
942 bool
943
944config SYS_HAS_EARLY_PRINTK
945 bool
946
947config HOTPLUG_CPU
948 bool "Support for hot-pluggable CPUs"
949 depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
950 help
951 Say Y here to allow turning CPUs off and on. CPUs can be
952 controlled through /sys/devices/system/cpu.
953 (Note: power management support will enable this option
954 automatically on SMP systems. )
955 Say N if you want to disable CPU hotplug.
956
957config SYS_SUPPORTS_HOTPLUG_CPU
958 bool
959
960config I8259
961 bool
962
963config MIPS_BONITO64
964 bool
965
966config MIPS_MSC
967 bool
968
969config MIPS_NILE4
970 bool
971
972config MIPS_DISABLE_OBSOLETE_IDE
973 bool
974
975config SYNC_R4K
976 bool
977
978config MIPS_MACHINE
979 def_bool n
980
981config NO_IOPORT
982 def_bool n
983
984config GENERIC_ISA_DMA
985 bool
986 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
987 select ISA_DMA_API
988
989config GENERIC_ISA_DMA_SUPPORT_BROKEN
990 bool
991 select GENERIC_ISA_DMA
992
993config ISA_DMA_API
994 bool
995
996config GENERIC_GPIO
997 bool
998
999config HOLES_IN_ZONE
1000 bool
1001
1002#
1003# Endianness selection. Sufficiently obscure so many users don't know what to
1004# answer,so we try hard to limit the available choices. Also the use of a
1005# choice statement should be more obvious to the user.
1006#
1007choice
1008 prompt "Endianness selection"
1009 help
1010 Some MIPS machines can be configured for either little or big endian
1011 byte order. These modes require different kernels and a different
1012 Linux distribution. In general there is one preferred byteorder for a
1013 particular system but some systems are just as commonly used in the
1014 one or the other endianness.
1015
1016config CPU_BIG_ENDIAN
1017 bool "Big endian"
1018 depends on SYS_SUPPORTS_BIG_ENDIAN
1019
1020config CPU_LITTLE_ENDIAN
1021 bool "Little endian"
1022 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1023 help
1024
1025endchoice
1026
1027config EXPORT_UASM
1028 bool
1029
1030config SYS_SUPPORTS_APM_EMULATION
1031 bool
1032
1033config SYS_SUPPORTS_BIG_ENDIAN
1034 bool
1035
1036config SYS_SUPPORTS_LITTLE_ENDIAN
1037 bool
1038
1039config SYS_SUPPORTS_HUGETLBFS
1040 bool
1041 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
1042 default y
1043
1044config IRQ_CPU
1045 bool
1046
1047config IRQ_CPU_RM7K
1048 bool
1049
1050config IRQ_CPU_RM9K
1051 bool
1052
1053config IRQ_MSP_SLP
1054 bool
1055
1056config IRQ_MSP_CIC
1057 bool
1058
1059config IRQ_TXX9
1060 bool
1061
1062config IRQ_GT641XX
1063 bool
1064
1065config IRQ_GIC
1066 bool
1067
1068config MIPS_BOARDS_GEN
1069 bool
1070
1071config PCI_GT64XXX_PCI0
1072 bool
1073
1074config NO_EXCEPT_FILL
1075 bool
1076
1077config MIPS_RM9122
1078 bool
1079 select SERIAL_RM9000
1080
1081config SOC_EMMA2RH
1082 bool
1083 select CEVT_R4K
1084 select CSRC_R4K
1085 select DMA_NONCOHERENT
1086 select IRQ_CPU
1087 select SWAP_IO_SPACE
1088 select SYS_HAS_CPU_R5500
1089 select SYS_SUPPORTS_32BIT_KERNEL
1090 select SYS_SUPPORTS_64BIT_KERNEL
1091 select SYS_SUPPORTS_BIG_ENDIAN
1092
1093config SOC_PNX833X
1094 bool
1095 select CEVT_R4K
1096 select CSRC_R4K
1097 select IRQ_CPU
1098 select DMA_NONCOHERENT
1099 select SYS_HAS_CPU_MIPS32_R2
1100 select SYS_SUPPORTS_32BIT_KERNEL
1101 select SYS_SUPPORTS_LITTLE_ENDIAN
1102 select SYS_SUPPORTS_BIG_ENDIAN
1103 select GENERIC_GPIO
1104 select CPU_MIPSR2_IRQ_VI
1105
1106config SOC_PNX8335
1107 bool
1108 select SOC_PNX833X
1109
1110config PNX8550
1111 bool
1112 select SOC_PNX8550
1113
1114config SOC_PNX8550
1115 bool
1116 select DMA_NONCOHERENT
1117 select HW_HAS_PCI
1118 select SYS_HAS_CPU_MIPS32_R1
1119 select SYS_HAS_EARLY_PRINTK
1120 select SYS_SUPPORTS_32BIT_KERNEL
1121 select GENERIC_GPIO
1122
1123config SWAP_IO_SPACE
1124 bool
1125
1126config SERIAL_RM9000
1127 bool
1128
1129config SGI_HAS_INDYDOG
1130 bool
1131
1132config SGI_HAS_HAL2
1133 bool
1134
1135config SGI_HAS_SEEQ
1136 bool
1137
1138config SGI_HAS_WD93
1139 bool
1140
1141config SGI_HAS_ZILOG
1142 bool
1143
1144config SGI_HAS_I8042
1145 bool
1146
1147config DEFAULT_SGI_PARTITION
1148 bool
1149
1150config ARC32
1151 bool
1152
1153config SNIPROM
1154 bool
1155
1156config BOOT_ELF32
1157 bool
1158
1159config MIPS_L1_CACHE_SHIFT
1160 int
1161 default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
1162 default "6" if MIPS_CPU_SCACHE
1163 default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
1164 default "5"
1165
1166config HAVE_STD_PC_SERIAL_PORT
1167 bool
1168
1169config ARC_CONSOLE
1170 bool "ARC console support"
1171 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1172
1173config ARC_MEMORY
1174 bool
1175 depends on MACH_JAZZ || SNI_RM || SGI_IP32
1176 default y
1177
1178config ARC_PROMLIB
1179 bool
1180 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1181 default y
1182
1183config ARC64
1184 bool
1185
1186config BOOT_ELF64
1187 bool
1188
1189menu "CPU selection"
1190
1191choice
1192 prompt "CPU type"
1193 default CPU_R4X00
1194
1195config CPU_LOONGSON2E
1196 bool "Loongson 2E"
1197 depends on SYS_HAS_CPU_LOONGSON2E
1198 select CPU_LOONGSON2
1199 help
1200 The Loongson 2E processor implements the MIPS III instruction set
1201 with many extensions.
1202
1203 It has an internal FPGA northbridge, which is compatible to
1204 bonito64.
1205
1206config CPU_LOONGSON2F
1207 bool "Loongson 2F"
1208 depends on SYS_HAS_CPU_LOONGSON2F
1209 select CPU_LOONGSON2
1210 select GENERIC_GPIO
1211 select ARCH_REQUIRE_GPIOLIB
1212 help
1213 The Loongson 2F processor implements the MIPS III instruction set
1214 with many extensions.
1215
1216 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1217 have a similar programming interface with FPGA northbridge used in
1218 Loongson2E.
1219
1220config CPU_MIPS32_R1
1221 bool "MIPS32 Release 1"
1222 depends on SYS_HAS_CPU_MIPS32_R1
1223 select CPU_HAS_PREFETCH
1224 select CPU_SUPPORTS_32BIT_KERNEL
1225 select CPU_SUPPORTS_HIGHMEM
1226 help
1227 Choose this option to build a kernel for release 1 or later of the
1228 MIPS32 architecture. Most modern embedded systems with a 32-bit
1229 MIPS processor are based on a MIPS32 processor. If you know the
1230 specific type of processor in your system, choose those that one
1231 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1232 Release 2 of the MIPS32 architecture is available since several
1233 years so chances are you even have a MIPS32 Release 2 processor
1234 in which case you should choose CPU_MIPS32_R2 instead for better
1235 performance.
1236
1237config CPU_MIPS32_R2
1238 bool "MIPS32 Release 2"
1239 depends on SYS_HAS_CPU_MIPS32_R2
1240 select CPU_HAS_PREFETCH
1241 select CPU_SUPPORTS_32BIT_KERNEL
1242 select CPU_SUPPORTS_HIGHMEM
1243 help
1244 Choose this option to build a kernel for release 2 or later of the
1245 MIPS32 architecture. Most modern embedded systems with a 32-bit
1246 MIPS processor are based on a MIPS32 processor. If you know the
1247 specific type of processor in your system, choose those that one
1248 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1249
1250config CPU_MIPS64_R1
1251 bool "MIPS64 Release 1"
1252 depends on SYS_HAS_CPU_MIPS64_R1
1253 select CPU_HAS_PREFETCH
1254 select CPU_SUPPORTS_32BIT_KERNEL
1255 select CPU_SUPPORTS_64BIT_KERNEL
1256 select CPU_SUPPORTS_HIGHMEM
1257 select CPU_SUPPORTS_HUGEPAGES
1258 help
1259 Choose this option to build a kernel for release 1 or later of the
1260 MIPS64 architecture. Many modern embedded systems with a 64-bit
1261 MIPS processor are based on a MIPS64 processor. If you know the
1262 specific type of processor in your system, choose those that one
1263 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1264 Release 2 of the MIPS64 architecture is available since several
1265 years so chances are you even have a MIPS64 Release 2 processor
1266 in which case you should choose CPU_MIPS64_R2 instead for better
1267 performance.
1268
1269config CPU_MIPS64_R2
1270 bool "MIPS64 Release 2"
1271 depends on SYS_HAS_CPU_MIPS64_R2
1272 select CPU_HAS_PREFETCH
1273 select CPU_SUPPORTS_32BIT_KERNEL
1274 select CPU_SUPPORTS_64BIT_KERNEL
1275 select CPU_SUPPORTS_HIGHMEM
1276 select CPU_SUPPORTS_HUGEPAGES
1277 help
1278 Choose this option to build a kernel for release 2 or later of the
1279 MIPS64 architecture. Many modern embedded systems with a 64-bit
1280 MIPS processor are based on a MIPS64 processor. If you know the
1281 specific type of processor in your system, choose those that one
1282 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1283
1284config CPU_R3000
1285 bool "R3000"
1286 depends on SYS_HAS_CPU_R3000
1287 select CPU_HAS_WB
1288 select CPU_SUPPORTS_32BIT_KERNEL
1289 select CPU_SUPPORTS_HIGHMEM
1290 help
1291 Please make sure to pick the right CPU type. Linux/MIPS is not
1292 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1293 *not* work on R4000 machines and vice versa. However, since most
1294 of the supported machines have an R4000 (or similar) CPU, R4x00
1295 might be a safe bet. If the resulting kernel does not work,
1296 try to recompile with R3000.
1297
1298config CPU_TX39XX
1299 bool "R39XX"
1300 depends on SYS_HAS_CPU_TX39XX
1301 select CPU_SUPPORTS_32BIT_KERNEL
1302
1303config CPU_VR41XX
1304 bool "R41xx"
1305 depends on SYS_HAS_CPU_VR41XX
1306 select CPU_SUPPORTS_32BIT_KERNEL
1307 select CPU_SUPPORTS_64BIT_KERNEL
1308 help
1309 The options selects support for the NEC VR4100 series of processors.
1310 Only choose this option if you have one of these processors as a
1311 kernel built with this option will not run on any other type of
1312 processor or vice versa.
1313
1314config CPU_R4300
1315 bool "R4300"
1316 depends on SYS_HAS_CPU_R4300
1317 select CPU_SUPPORTS_32BIT_KERNEL
1318 select CPU_SUPPORTS_64BIT_KERNEL
1319 help
1320 MIPS Technologies R4300-series processors.
1321
1322config CPU_R4X00
1323 bool "R4x00"
1324 depends on SYS_HAS_CPU_R4X00
1325 select CPU_SUPPORTS_32BIT_KERNEL
1326 select CPU_SUPPORTS_64BIT_KERNEL
1327 help
1328 MIPS Technologies R4000-series processors other than 4300, including
1329 the R4000, R4400, R4600, and 4700.
1330
1331config CPU_TX49XX
1332 bool "R49XX"
1333 depends on SYS_HAS_CPU_TX49XX
1334 select CPU_HAS_PREFETCH
1335 select CPU_SUPPORTS_32BIT_KERNEL
1336 select CPU_SUPPORTS_64BIT_KERNEL
1337
1338config CPU_R5000
1339 bool "R5000"
1340 depends on SYS_HAS_CPU_R5000
1341 select CPU_SUPPORTS_32BIT_KERNEL
1342 select CPU_SUPPORTS_64BIT_KERNEL
1343 help
1344 MIPS Technologies R5000-series processors other than the Nevada.
1345
1346config CPU_R5432
1347 bool "R5432"
1348 depends on SYS_HAS_CPU_R5432
1349 select CPU_SUPPORTS_32BIT_KERNEL
1350 select CPU_SUPPORTS_64BIT_KERNEL
1351
1352config CPU_R5500
1353 bool "R5500"
1354 depends on SYS_HAS_CPU_R5500
1355 select CPU_SUPPORTS_32BIT_KERNEL
1356 select CPU_SUPPORTS_64BIT_KERNEL
1357 select CPU_SUPPORTS_HUGEPAGES
1358 help
1359 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1360 instruction set.
1361
1362config CPU_R6000
1363 bool "R6000"
1364 depends on EXPERIMENTAL
1365 depends on SYS_HAS_CPU_R6000
1366 select CPU_SUPPORTS_32BIT_KERNEL
1367 help
1368 MIPS Technologies R6000 and R6000A series processors. Note these
1369 processors are extremely rare and the support for them is incomplete.
1370
1371config CPU_NEVADA
1372 bool "RM52xx"
1373 depends on SYS_HAS_CPU_NEVADA
1374 select CPU_SUPPORTS_32BIT_KERNEL
1375 select CPU_SUPPORTS_64BIT_KERNEL
1376 help
1377 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1378
1379config CPU_R8000
1380 bool "R8000"
1381 depends on EXPERIMENTAL
1382 depends on SYS_HAS_CPU_R8000
1383 select CPU_HAS_PREFETCH
1384 select CPU_SUPPORTS_64BIT_KERNEL
1385 help
1386 MIPS Technologies R8000 processors. Note these processors are
1387 uncommon and the support for them is incomplete.
1388
1389config CPU_R10000
1390 bool "R10000"
1391 depends on SYS_HAS_CPU_R10000
1392 select CPU_HAS_PREFETCH
1393 select CPU_SUPPORTS_32BIT_KERNEL
1394 select CPU_SUPPORTS_64BIT_KERNEL
1395 select CPU_SUPPORTS_HIGHMEM
1396 help
1397 MIPS Technologies R10000-series processors.
1398
1399config CPU_RM7000
1400 bool "RM7000"
1401 depends on SYS_HAS_CPU_RM7000
1402 select CPU_HAS_PREFETCH
1403 select CPU_SUPPORTS_32BIT_KERNEL
1404 select CPU_SUPPORTS_64BIT_KERNEL
1405 select CPU_SUPPORTS_HIGHMEM
1406
1407config CPU_RM9000
1408 bool "RM9000"
1409 depends on SYS_HAS_CPU_RM9000
1410 select CPU_HAS_PREFETCH
1411 select CPU_SUPPORTS_32BIT_KERNEL
1412 select CPU_SUPPORTS_64BIT_KERNEL
1413 select CPU_SUPPORTS_HIGHMEM
1414 select WEAK_ORDERING
1415
1416config CPU_SB1
1417 bool "SB1"
1418 depends on SYS_HAS_CPU_SB1
1419 select CPU_SUPPORTS_32BIT_KERNEL
1420 select CPU_SUPPORTS_64BIT_KERNEL
1421 select CPU_SUPPORTS_HIGHMEM
1422 select WEAK_ORDERING
1423
1424config CPU_CAVIUM_OCTEON
1425 bool "Cavium Octeon processor"
1426 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1427 select ARCH_SPARSEMEM_ENABLE
1428 select CPU_HAS_PREFETCH
1429 select CPU_SUPPORTS_64BIT_KERNEL
1430 select SYS_SUPPORTS_SMP
1431 select NR_CPUS_DEFAULT_16
1432 select WEAK_ORDERING
1433 select CPU_SUPPORTS_HIGHMEM
1434 select CPU_SUPPORTS_HUGEPAGES
1435 help
1436 The Cavium Octeon processor is a highly integrated chip containing
1437 many ethernet hardware widgets for networking tasks. The processor
1438 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1439 Full details can be found at http://www.caviumnetworks.com.
1440
1441config CPU_BMIPS3300
1442 bool "BMIPS3300"
1443 depends on SYS_HAS_CPU_BMIPS3300
1444 select CPU_BMIPS
1445 help
1446 Broadcom BMIPS3300 processors.
1447
1448config CPU_BMIPS4350
1449 bool "BMIPS4350"
1450 depends on SYS_HAS_CPU_BMIPS4350
1451 select CPU_BMIPS
1452 select SYS_SUPPORTS_SMP
1453 select SYS_SUPPORTS_HOTPLUG_CPU
1454 help
1455 Broadcom BMIPS4350 ("VIPER") processors.
1456
1457config CPU_BMIPS4380
1458 bool "BMIPS4380"
1459 depends on SYS_HAS_CPU_BMIPS4380
1460 select CPU_BMIPS
1461 select SYS_SUPPORTS_SMP
1462 select SYS_SUPPORTS_HOTPLUG_CPU
1463 help
1464 Broadcom BMIPS4380 processors.
1465
1466config CPU_BMIPS5000
1467 bool "BMIPS5000"
1468 depends on SYS_HAS_CPU_BMIPS5000
1469 select CPU_BMIPS
1470 select CPU_SUPPORTS_HIGHMEM
1471 select MIPS_CPU_SCACHE
1472 select SYS_SUPPORTS_SMP
1473 select SYS_SUPPORTS_HOTPLUG_CPU
1474 help
1475 Broadcom BMIPS5000 processors.
1476
1477config CPU_XLR
1478 bool "Netlogic XLR SoC"
1479 depends on SYS_HAS_CPU_XLR
1480 select CPU_SUPPORTS_32BIT_KERNEL
1481 select CPU_SUPPORTS_64BIT_KERNEL
1482 select CPU_SUPPORTS_HIGHMEM
1483 select WEAK_ORDERING
1484 select WEAK_REORDERING_BEYOND_LLSC
1485 select CPU_SUPPORTS_HUGEPAGES
1486 help
1487 Netlogic Microsystems XLR/XLS processors.
1488
1489config CPU_XLP
1490 bool "Netlogic XLP SoC"
1491 depends on SYS_HAS_CPU_XLP
1492 select CPU_SUPPORTS_32BIT_KERNEL
1493 select CPU_SUPPORTS_64BIT_KERNEL
1494 select CPU_SUPPORTS_HIGHMEM
1495 select CPU_HAS_LLSC
1496 select WEAK_ORDERING
1497 select WEAK_REORDERING_BEYOND_LLSC
1498 select CPU_HAS_PREFETCH
1499 help
1500 Netlogic Microsystems XLP processors.
1501endchoice
1502
1503if CPU_LOONGSON2F
1504config CPU_NOP_WORKAROUNDS
1505 bool
1506
1507config CPU_JUMP_WORKAROUNDS
1508 bool
1509
1510config CPU_LOONGSON2F_WORKAROUNDS
1511 bool "Loongson 2F Workarounds"
1512 default y
1513 select CPU_NOP_WORKAROUNDS
1514 select CPU_JUMP_WORKAROUNDS
1515 help
1516 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1517 require workarounds. Without workarounds the system may hang
1518 unexpectedly. For more information please refer to the gas
1519 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1520
1521 Loongson 2F03 and later have fixed these issues and no workarounds
1522 are needed. The workarounds have no significant side effect on them
1523 but may decrease the performance of the system so this option should
1524 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1525 systems.
1526
1527 If unsure, please say Y.
1528endif # CPU_LOONGSON2F
1529
1530config SYS_SUPPORTS_ZBOOT
1531 bool
1532 select HAVE_KERNEL_GZIP
1533 select HAVE_KERNEL_BZIP2
1534 select HAVE_KERNEL_LZMA
1535 select HAVE_KERNEL_LZO
1536
1537config SYS_SUPPORTS_ZBOOT_UART16550
1538 bool
1539 select SYS_SUPPORTS_ZBOOT
1540
1541config CPU_LOONGSON2
1542 bool
1543 select CPU_SUPPORTS_32BIT_KERNEL
1544 select CPU_SUPPORTS_64BIT_KERNEL
1545 select CPU_SUPPORTS_HIGHMEM
1546
1547config CPU_BMIPS
1548 bool
1549 select CPU_MIPS32
1550 select CPU_SUPPORTS_32BIT_KERNEL
1551 select DMA_NONCOHERENT
1552 select IRQ_CPU
1553 select SWAP_IO_SPACE
1554 select WEAK_ORDERING
1555
1556config SYS_HAS_CPU_LOONGSON2E
1557 bool
1558
1559config SYS_HAS_CPU_LOONGSON2F
1560 bool
1561 select CPU_SUPPORTS_CPUFREQ
1562 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1563 select CPU_SUPPORTS_UNCACHED_ACCELERATED
1564
1565config SYS_HAS_CPU_MIPS32_R1
1566 bool
1567
1568config SYS_HAS_CPU_MIPS32_R2
1569 bool
1570
1571config SYS_HAS_CPU_MIPS64_R1
1572 bool
1573
1574config SYS_HAS_CPU_MIPS64_R2
1575 bool
1576
1577config SYS_HAS_CPU_R3000
1578 bool
1579
1580config SYS_HAS_CPU_TX39XX
1581 bool
1582
1583config SYS_HAS_CPU_VR41XX
1584 bool
1585
1586config SYS_HAS_CPU_R4300
1587 bool
1588
1589config SYS_HAS_CPU_R4X00
1590 bool
1591
1592config SYS_HAS_CPU_TX49XX
1593 bool
1594
1595config SYS_HAS_CPU_R5000
1596 bool
1597
1598config SYS_HAS_CPU_R5432
1599 bool
1600
1601config SYS_HAS_CPU_R5500
1602 bool
1603
1604config SYS_HAS_CPU_R6000
1605 bool
1606
1607config SYS_HAS_CPU_NEVADA
1608 bool
1609
1610config SYS_HAS_CPU_R8000
1611 bool
1612
1613config SYS_HAS_CPU_R10000
1614 bool
1615
1616config SYS_HAS_CPU_RM7000
1617 bool
1618
1619config SYS_HAS_CPU_RM9000
1620 bool
1621
1622config SYS_HAS_CPU_SB1
1623 bool
1624
1625config SYS_HAS_CPU_CAVIUM_OCTEON
1626 bool
1627
1628config SYS_HAS_CPU_BMIPS3300
1629 bool
1630
1631config SYS_HAS_CPU_BMIPS4350
1632 bool
1633
1634config SYS_HAS_CPU_BMIPS4380
1635 bool
1636
1637config SYS_HAS_CPU_BMIPS5000
1638 bool
1639
1640config SYS_HAS_CPU_XLR
1641 bool
1642
1643config SYS_HAS_CPU_XLP
1644 bool
1645
1646#
1647# CPU may reorder R->R, R->W, W->R, W->W
1648# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1649#
1650config WEAK_ORDERING
1651 bool
1652
1653#
1654# CPU may reorder reads and writes beyond LL/SC
1655# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1656#
1657config WEAK_REORDERING_BEYOND_LLSC
1658 bool
1659endmenu
1660
1661#
1662# These two indicate any level of the MIPS32 and MIPS64 architecture
1663#
1664config CPU_MIPS32
1665 bool
1666 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
1667
1668config CPU_MIPS64
1669 bool
1670 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
1671
1672#
1673# These two indicate the revision of the architecture, either Release 1 or Release 2
1674#
1675config CPU_MIPSR1
1676 bool
1677 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1678
1679config CPU_MIPSR2
1680 bool
1681 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1682
1683config SYS_SUPPORTS_32BIT_KERNEL
1684 bool
1685config SYS_SUPPORTS_64BIT_KERNEL
1686 bool
1687config CPU_SUPPORTS_32BIT_KERNEL
1688 bool
1689config CPU_SUPPORTS_64BIT_KERNEL
1690 bool
1691config CPU_SUPPORTS_CPUFREQ
1692 bool
1693config CPU_SUPPORTS_ADDRWINCFG
1694 bool
1695config CPU_SUPPORTS_HUGEPAGES
1696 bool
1697config CPU_SUPPORTS_UNCACHED_ACCELERATED
1698 bool
1699config MIPS_PGD_C0_CONTEXT
1700 bool
1701 default y if 64BIT && CPU_MIPSR2
1702
1703#
1704# Set to y for ptrace access to watch registers.
1705#
1706config HARDWARE_WATCHPOINTS
1707 bool
1708 default y if CPU_MIPSR1 || CPU_MIPSR2
1709
1710menu "Kernel type"
1711
1712choice
1713
1714 prompt "Kernel code model"
1715 help
1716 You should only select this option if you have a workload that
1717 actually benefits from 64-bit processing or if your machine has
1718 large memory. You will only be presented a single option in this
1719 menu if your system does not support both 32-bit and 64-bit kernels.
1720
1721config 32BIT
1722 bool "32-bit kernel"
1723 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1724 select TRAD_SIGNALS
1725 help
1726 Select this option if you want to build a 32-bit kernel.
1727config 64BIT
1728 bool "64-bit kernel"
1729 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1730 select HAVE_SYSCALL_WRAPPERS
1731 help
1732 Select this option if you want to build a 64-bit kernel.
1733
1734endchoice
1735
1736choice
1737 prompt "Kernel page size"
1738 default PAGE_SIZE_4KB
1739
1740config PAGE_SIZE_4KB
1741 bool "4kB"
1742 depends on !CPU_LOONGSON2
1743 help
1744 This option select the standard 4kB Linux page size. On some
1745 R3000-family processors this is the only available page size. Using
1746 4kB page size will minimize memory consumption and is therefore
1747 recommended for low memory systems.
1748
1749config PAGE_SIZE_8KB
1750 bool "8kB"
1751 depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON
1752 help
1753 Using 8kB page size will result in higher performance kernel at
1754 the price of higher memory consumption. This option is available
1755 only on R8000 and cnMIPS processors. Note that you will need a
1756 suitable Linux distribution to support this.
1757
1758config PAGE_SIZE_16KB
1759 bool "16kB"
1760 depends on !CPU_R3000 && !CPU_TX39XX
1761 help
1762 Using 16kB page size will result in higher performance kernel at
1763 the price of higher memory consumption. This option is available on
1764 all non-R3000 family processors. Note that you will need a suitable
1765 Linux distribution to support this.
1766
1767config PAGE_SIZE_32KB
1768 bool "32kB"
1769 depends on CPU_CAVIUM_OCTEON
1770 help
1771 Using 32kB page size will result in higher performance kernel at
1772 the price of higher memory consumption. This option is available
1773 only on cnMIPS cores. Note that you will need a suitable Linux
1774 distribution to support this.
1775
1776config PAGE_SIZE_64KB
1777 bool "64kB"
1778 depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
1779 help
1780 Using 64kB page size will result in higher performance kernel at
1781 the price of higher memory consumption. This option is available on
1782 all non-R3000 family processor. Not that at the time of this
1783 writing this option is still high experimental.
1784
1785endchoice
1786
1787config FORCE_MAX_ZONEORDER
1788 int "Maximum zone order"
1789 range 14 64 if HUGETLB_PAGE && PAGE_SIZE_64KB
1790 default "14" if HUGETLB_PAGE && PAGE_SIZE_64KB
1791 range 13 64 if HUGETLB_PAGE && PAGE_SIZE_32KB
1792 default "13" if HUGETLB_PAGE && PAGE_SIZE_32KB
1793 range 12 64 if HUGETLB_PAGE && PAGE_SIZE_16KB
1794 default "12" if HUGETLB_PAGE && PAGE_SIZE_16KB
1795 range 11 64
1796 default "11"
1797 help
1798 The kernel memory allocator divides physically contiguous memory
1799 blocks into "zones", where each zone is a power of two number of
1800 pages. This option selects the largest power of two that the kernel
1801 keeps in the memory allocator. If you need to allocate very large
1802 blocks of physically contiguous memory, then you may need to
1803 increase this value.
1804
1805 This config option is actually maximum order plus one. For example,
1806 a value of 11 means that the largest free memory block is 2^10 pages.
1807
1808 The page size is not necessarily 4KB. Keep this in mind
1809 when choosing a value for this option.
1810
1811config BOARD_SCACHE
1812 bool
1813
1814config IP22_CPU_SCACHE
1815 bool
1816 select BOARD_SCACHE
1817
1818#
1819# Support for a MIPS32 / MIPS64 style S-caches
1820#
1821config MIPS_CPU_SCACHE
1822 bool
1823 select BOARD_SCACHE
1824
1825config R5000_CPU_SCACHE
1826 bool
1827 select BOARD_SCACHE
1828
1829config RM7000_CPU_SCACHE
1830 bool
1831 select BOARD_SCACHE
1832
1833config SIBYTE_DMA_PAGEOPS
1834 bool "Use DMA to clear/copy pages"
1835 depends on CPU_SB1
1836 help
1837 Instead of using the CPU to zero and copy pages, use a Data Mover
1838 channel. These DMA channels are otherwise unused by the standard
1839 SiByte Linux port. Seems to give a small performance benefit.
1840
1841config CPU_HAS_PREFETCH
1842 bool
1843
1844choice
1845 prompt "MIPS MT options"
1846
1847config MIPS_MT_DISABLED
1848 bool "Disable multithreading support."
1849 help
1850 Use this option if your workload can't take advantage of
1851 MIPS hardware multithreading support. On systems that don't have
1852 the option of an MT-enabled processor this option will be the only
1853 option in this menu.
1854
1855config MIPS_MT_SMP
1856 bool "Use 1 TC on each available VPE for SMP"
1857 depends on SYS_SUPPORTS_MULTITHREADING
1858 select CPU_MIPSR2_IRQ_VI
1859 select CPU_MIPSR2_IRQ_EI
1860 select MIPS_MT
1861 select NR_CPUS_DEFAULT_2
1862 select SMP
1863 select SYS_SUPPORTS_SCHED_SMT if SMP
1864 select SYS_SUPPORTS_SMP
1865 select SMP_UP
1866 help
1867 This is a kernel model which is known a VSMP but lately has been
1868 marketesed into SMVP.
1869 Virtual SMP uses the processor's VPEs to implement virtual
1870 processors. In currently available configuration of the 34K processor
1871 this allows for a dual processor. Both processors will share the same
1872 primary caches; each will obtain the half of the TLB for it's own
1873 exclusive use. For a layman this model can be described as similar to
1874 what Intel calls Hyperthreading.
1875
1876 For further information see http://www.linux-mips.org/wiki/34K#VSMP
1877
1878config MIPS_MT_SMTC
1879 bool "SMTC: Use all TCs on all VPEs for SMP"
1880 depends on CPU_MIPS32_R2
1881 #depends on CPU_MIPS64_R2 # once there is hardware ...
1882 depends on SYS_SUPPORTS_MULTITHREADING
1883 select CPU_MIPSR2_IRQ_VI
1884 select CPU_MIPSR2_IRQ_EI
1885 select MIPS_MT
1886 select NR_CPUS_DEFAULT_8
1887 select SMP
1888 select SYS_SUPPORTS_SMP
1889 select SMP_UP
1890 help
1891 This is a kernel model which is known a SMTC or lately has been
1892 marketesed into SMVP.
1893 is presenting the available TC's of the core as processors to Linux.
1894 On currently available 34K processors this means a Linux system will
1895 see up to 5 processors. The implementation of the SMTC kernel differs
1896 significantly from VSMP and cannot efficiently coexist in the same
1897 kernel binary so the choice between VSMP and SMTC is a compile time
1898 decision.
1899
1900 For further information see http://www.linux-mips.org/wiki/34K#SMTC
1901
1902endchoice
1903
1904config MIPS_MT
1905 bool
1906
1907config SCHED_SMT
1908 bool "SMT (multithreading) scheduler support"
1909 depends on SYS_SUPPORTS_SCHED_SMT
1910 default n
1911 help
1912 SMT scheduler support improves the CPU scheduler's decision making
1913 when dealing with MIPS MT enabled cores at a cost of slightly
1914 increased overhead in some places. If unsure say N here.
1915
1916config SYS_SUPPORTS_SCHED_SMT
1917 bool
1918
1919
1920config SYS_SUPPORTS_MULTITHREADING
1921 bool
1922
1923config MIPS_MT_FPAFF
1924 bool "Dynamic FPU affinity for FP-intensive threads"
1925 default y
1926 depends on MIPS_MT_SMP || MIPS_MT_SMTC
1927
1928config MIPS_VPE_LOADER
1929 bool "VPE loader support."
1930 depends on SYS_SUPPORTS_MULTITHREADING
1931 select CPU_MIPSR2_IRQ_VI
1932 select CPU_MIPSR2_IRQ_EI
1933 select MIPS_MT
1934 help
1935 Includes a loader for loading an elf relocatable object
1936 onto another VPE and running it.
1937
1938config MIPS_MT_SMTC_IM_BACKSTOP
1939 bool "Use per-TC register bits as backstop for inhibited IM bits"
1940 depends on MIPS_MT_SMTC
1941 default n
1942 help
1943 To support multiple TC microthreads acting as "CPUs" within
1944 a VPE, VPE-wide interrupt mask bits must be specially manipulated
1945 during interrupt handling. To support legacy drivers and interrupt
1946 controller management code, SMTC has a "backstop" to track and
1947 if necessary restore the interrupt mask. This has some performance
1948 impact on interrupt service overhead.
1949
1950config MIPS_MT_SMTC_IRQAFF
1951 bool "Support IRQ affinity API"
1952 depends on MIPS_MT_SMTC
1953 default n
1954 help
1955 Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
1956 for SMTC Linux kernel. Requires platform support, of which
1957 an example can be found in the MIPS kernel i8259 and Malta
1958 platform code. Adds some overhead to interrupt dispatch, and
1959 should be used only if you know what you are doing.
1960
1961config MIPS_VPE_LOADER_TOM
1962 bool "Load VPE program into memory hidden from linux"
1963 depends on MIPS_VPE_LOADER
1964 default y
1965 help
1966 The loader can use memory that is present but has been hidden from
1967 Linux using the kernel command line option "mem=xxMB". It's up to
1968 you to ensure the amount you put in the option and the space your
1969 program requires is less or equal to the amount physically present.
1970
1971# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
1972config MIPS_VPE_APSP_API
1973 bool "Enable support for AP/SP API (RTLX)"
1974 depends on MIPS_VPE_LOADER
1975 help
1976
1977config MIPS_APSP_KSPD
1978 bool "Enable KSPD"
1979 depends on MIPS_VPE_APSP_API
1980 default y
1981 help
1982 KSPD is a kernel daemon that accepts syscall requests from the SP
1983 side, actions them and returns the results. It also handles the
1984 "exit" syscall notifying other kernel modules the SP program is
1985 exiting. You probably want to say yes here.
1986
1987config MIPS_CMP
1988 bool "MIPS CMP framework support"
1989 depends on SYS_SUPPORTS_MIPS_CMP
1990 select SYNC_R4K
1991 select SYS_SUPPORTS_SMP
1992 select SYS_SUPPORTS_SCHED_SMT if SMP
1993 select WEAK_ORDERING
1994 default n
1995 help
1996 This is a placeholder option for the GCMP work. It will need to
1997 be handled differently...
1998
1999config SB1_PASS_1_WORKAROUNDS
2000 bool
2001 depends on CPU_SB1_PASS_1
2002 default y
2003
2004config SB1_PASS_2_WORKAROUNDS
2005 bool
2006 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2007 default y
2008
2009config SB1_PASS_2_1_WORKAROUNDS
2010 bool
2011 depends on CPU_SB1 && CPU_SB1_PASS_2
2012 default y
2013
2014config 64BIT_PHYS_ADDR
2015 bool
2016
2017config ARCH_PHYS_ADDR_T_64BIT
2018 def_bool 64BIT_PHYS_ADDR
2019
2020config CPU_HAS_SMARTMIPS
2021 depends on SYS_SUPPORTS_SMARTMIPS
2022 bool "Support for the SmartMIPS ASE"
2023 help
2024 SmartMIPS is a extension of the MIPS32 architecture aimed at
2025 increased security at both hardware and software level for
2026 smartcards. Enabling this option will allow proper use of the
2027 SmartMIPS instructions by Linux applications. However a kernel with
2028 this option will not work on a MIPS core without SmartMIPS core. If
2029 you don't know you probably don't have SmartMIPS and should say N
2030 here.
2031
2032config CPU_HAS_WB
2033 bool
2034
2035config XKS01
2036 bool
2037
2038#
2039# Vectored interrupt mode is an R2 feature
2040#
2041config CPU_MIPSR2_IRQ_VI
2042 bool
2043
2044#
2045# Extended interrupt mode is an R2 feature
2046#
2047config CPU_MIPSR2_IRQ_EI
2048 bool
2049
2050config CPU_HAS_SYNC
2051 bool
2052 depends on !CPU_R3000
2053 default y
2054
2055#
2056# CPU non-features
2057#
2058config CPU_DADDI_WORKAROUNDS
2059 bool
2060
2061config CPU_R4000_WORKAROUNDS
2062 bool
2063 select CPU_R4400_WORKAROUNDS
2064
2065config CPU_R4400_WORKAROUNDS
2066 bool
2067
2068#
2069# - Highmem only makes sense for the 32-bit kernel.
2070# - The current highmem code will only work properly on physically indexed
2071# caches such as R3000, SB1, R7000 or those that look like they're virtually
2072# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2073# moment we protect the user and offer the highmem option only on machines
2074# where it's known to be safe. This will not offer highmem on a few systems
2075# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2076# indexed CPUs but we're playing safe.
2077# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2078# know they might have memory configurations that could make use of highmem
2079# support.
2080#
2081config HIGHMEM
2082 bool "High Memory Support"
2083 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
2084
2085config CPU_SUPPORTS_HIGHMEM
2086 bool
2087
2088config SYS_SUPPORTS_HIGHMEM
2089 bool
2090
2091config SYS_SUPPORTS_SMARTMIPS
2092 bool
2093
2094config ARCH_FLATMEM_ENABLE
2095 def_bool y
2096 depends on !NUMA && !CPU_LOONGSON2
2097
2098config ARCH_DISCONTIGMEM_ENABLE
2099 bool
2100 default y if SGI_IP27
2101 help
2102 Say Y to support efficient handling of discontiguous physical memory,
2103 for architectures which are either NUMA (Non-Uniform Memory Access)
2104 or have huge holes in the physical address space for other reasons.
2105 See <file:Documentation/vm/numa> for more.
2106
2107config ARCH_SPARSEMEM_ENABLE
2108 bool
2109 select SPARSEMEM_STATIC
2110
2111config NUMA
2112 bool "NUMA Support"
2113 depends on SYS_SUPPORTS_NUMA
2114 help
2115 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2116 Access). This option improves performance on systems with more
2117 than two nodes; on two node systems it is generally better to
2118 leave it disabled; on single node systems disable this option
2119 disabled.
2120
2121config SYS_SUPPORTS_NUMA
2122 bool
2123
2124config NODES_SHIFT
2125 int
2126 default "6"
2127 depends on NEED_MULTIPLE_NODES
2128
2129config HW_PERF_EVENTS
2130 bool "Enable hardware performance counter support for perf events"
2131 depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON)
2132 default y
2133 help
2134 Enable hardware performance counter support for perf events. If
2135 disabled, perf events will use software events only.
2136
2137source "mm/Kconfig"
2138
2139config SMP
2140 bool "Multi-Processing support"
2141 depends on SYS_SUPPORTS_SMP
2142 select IRQ_PER_CPU
2143 select USE_GENERIC_SMP_HELPERS
2144 help
2145 This enables support for systems with more than one CPU. If you have
2146 a system with only one CPU, like most personal computers, say N. If
2147 you have a system with more than one CPU, say Y.
2148
2149 If you say N here, the kernel will run on single and multiprocessor
2150 machines, but will use only one CPU of a multiprocessor machine. If
2151 you say Y here, the kernel will run on many, but not all,
2152 singleprocessor machines. On a singleprocessor machine, the kernel
2153 will run faster if you say N here.
2154
2155 People using multiprocessor machines who say Y here should also say
2156 Y to "Enhanced Real Time Clock Support", below.
2157
2158 See also the SMP-HOWTO available at
2159 <http://www.tldp.org/docs.html#howto>.
2160
2161 If you don't know what to do here, say N.
2162
2163config SMP_UP
2164 bool
2165
2166config SYS_SUPPORTS_MIPS_CMP
2167 bool
2168
2169config SYS_SUPPORTS_SMP
2170 bool
2171
2172config NR_CPUS_DEFAULT_1
2173 bool
2174
2175config NR_CPUS_DEFAULT_2
2176 bool
2177
2178config NR_CPUS_DEFAULT_4
2179 bool
2180
2181config NR_CPUS_DEFAULT_8
2182 bool
2183
2184config NR_CPUS_DEFAULT_16
2185 bool
2186
2187config NR_CPUS_DEFAULT_32
2188 bool
2189
2190config NR_CPUS_DEFAULT_64
2191 bool
2192
2193config NR_CPUS
2194 int "Maximum number of CPUs (2-64)"
2195 range 1 64 if NR_CPUS_DEFAULT_1
2196 depends on SMP
2197 default "1" if NR_CPUS_DEFAULT_1
2198 default "2" if NR_CPUS_DEFAULT_2
2199 default "4" if NR_CPUS_DEFAULT_4
2200 default "8" if NR_CPUS_DEFAULT_8
2201 default "16" if NR_CPUS_DEFAULT_16
2202 default "32" if NR_CPUS_DEFAULT_32
2203 default "64" if NR_CPUS_DEFAULT_64
2204 help
2205 This allows you to specify the maximum number of CPUs which this
2206 kernel will support. The maximum supported value is 32 for 32-bit
2207 kernel and 64 for 64-bit kernels; the minimum value which makes
2208 sense is 1 for Qemu (useful only for kernel debugging purposes)
2209 and 2 for all others.
2210
2211 This is purely to save memory - each supported CPU adds
2212 approximately eight kilobytes to the kernel image. For best
2213 performance should round up your number of processors to the next
2214 power of two.
2215
2216#
2217# Timer Interrupt Frequency Configuration
2218#
2219
2220choice
2221 prompt "Timer frequency"
2222 default HZ_250
2223 help
2224 Allows the configuration of the timer frequency.
2225
2226 config HZ_48
2227 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2228
2229 config HZ_100
2230 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2231
2232 config HZ_128
2233 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2234
2235 config HZ_250
2236 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2237
2238 config HZ_256
2239 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2240
2241 config HZ_1000
2242 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2243
2244 config HZ_1024
2245 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2246
2247endchoice
2248
2249config SYS_SUPPORTS_48HZ
2250 bool
2251
2252config SYS_SUPPORTS_100HZ
2253 bool
2254
2255config SYS_SUPPORTS_128HZ
2256 bool
2257
2258config SYS_SUPPORTS_250HZ
2259 bool
2260
2261config SYS_SUPPORTS_256HZ
2262 bool
2263
2264config SYS_SUPPORTS_1000HZ
2265 bool
2266
2267config SYS_SUPPORTS_1024HZ
2268 bool
2269
2270config SYS_SUPPORTS_ARBIT_HZ
2271 bool
2272 default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
2273 !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
2274 !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
2275 !SYS_SUPPORTS_1024HZ
2276
2277config HZ
2278 int
2279 default 48 if HZ_48
2280 default 100 if HZ_100
2281 default 128 if HZ_128
2282 default 250 if HZ_250
2283 default 256 if HZ_256
2284 default 1000 if HZ_1000
2285 default 1024 if HZ_1024
2286
2287source "kernel/Kconfig.preempt"
2288
2289config KEXEC
2290 bool "Kexec system call (EXPERIMENTAL)"
2291 depends on EXPERIMENTAL
2292 help
2293 kexec is a system call that implements the ability to shutdown your
2294 current kernel, and to start another kernel. It is like a reboot
2295 but it is independent of the system firmware. And like a reboot
2296 you can start any kernel with it, not just Linux.
2297
2298 The name comes from the similarity to the exec system call.
2299
2300 It is an ongoing process to be certain the hardware in a machine
2301 is properly shutdown, so do not be surprised if this code does not
2302 initially work for you. It may help to enable device hotplugging
2303 support. As of this writing the exact hardware interface is
2304 strongly in flux, so no good recommendation can be made.
2305
2306config SECCOMP
2307 bool "Enable seccomp to safely compute untrusted bytecode"
2308 depends on PROC_FS
2309 default y
2310 help
2311 This kernel feature is useful for number crunching applications
2312 that may need to compute untrusted bytecode during their
2313 execution. By using pipes or other transports made available to
2314 the process as file descriptors supporting the read/write
2315 syscalls, it's possible to isolate those applications in
2316 their own address space using seccomp. Once seccomp is
2317 enabled via /proc/<pid>/seccomp, it cannot be disabled
2318 and the task is only allowed to execute a few safe syscalls
2319 defined by each seccomp mode.
2320
2321 If unsure, say Y. Only embedded should say N here.
2322
2323config USE_OF
2324 bool "Flattened Device Tree support"
2325 select OF
2326 select OF_EARLY_FLATTREE
2327 select IRQ_DOMAIN
2328 help
2329 Include support for flattened device tree machine descriptions.
2330
2331endmenu
2332
2333config LOCKDEP_SUPPORT
2334 bool
2335 default y
2336
2337config STACKTRACE_SUPPORT
2338 bool
2339 default y
2340
2341source "init/Kconfig"
2342
2343source "kernel/Kconfig.freezer"
2344
2345menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2346
2347config HW_HAS_EISA
2348 bool
2349config HW_HAS_PCI
2350 bool
2351
2352config PCI
2353 bool "Support for PCI controller"
2354 depends on HW_HAS_PCI
2355 select PCI_DOMAINS
2356 select GENERIC_PCI_IOMAP
2357 select NO_GENERIC_PCI_IOPORT_MAP
2358 help
2359 Find out whether you have a PCI motherboard. PCI is the name of a
2360 bus system, i.e. the way the CPU talks to the other stuff inside
2361 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
2362 say Y, otherwise N.
2363
2364config PCI_DOMAINS
2365 bool
2366
2367source "drivers/pci/Kconfig"
2368
2369#
2370# ISA support is now enabled via select. Too many systems still have the one
2371# or other ISA chip on the board that users don't know about so don't expect
2372# users to choose the right thing ...
2373#
2374config ISA
2375 bool
2376
2377config EISA
2378 bool "EISA support"
2379 depends on HW_HAS_EISA
2380 select ISA
2381 select GENERIC_ISA_DMA
2382 ---help---
2383 The Extended Industry Standard Architecture (EISA) bus was
2384 developed as an open alternative to the IBM MicroChannel bus.
2385
2386 The EISA bus provided some of the features of the IBM MicroChannel
2387 bus while maintaining backward compatibility with cards made for
2388 the older ISA bus. The EISA bus saw limited use between 1988 and
2389 1995 when it was made obsolete by the PCI bus.
2390
2391 Say Y here if you are building a kernel for an EISA-based machine.
2392
2393 Otherwise, say N.
2394
2395source "drivers/eisa/Kconfig"
2396
2397config TC
2398 bool "TURBOchannel support"
2399 depends on MACH_DECSTATION
2400 help
2401 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
2402 processors. TURBOchannel programming specifications are available
2403 at:
2404 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
2405 and:
2406 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
2407 Linux driver support status is documented at:
2408 <http://www.linux-mips.org/wiki/DECstation>
2409
2410config MMU
2411 bool
2412 default y
2413
2414config I8253
2415 bool
2416 select CLKSRC_I8253
2417 select CLKEVT_I8253
2418 select MIPS_EXTERNAL_TIMER
2419
2420config ZONE_DMA32
2421 bool
2422
2423source "drivers/pcmcia/Kconfig"
2424
2425source "drivers/pci/hotplug/Kconfig"
2426
2427config RAPIDIO
2428 bool "RapidIO support"
2429 depends on PCI
2430 default n
2431 help
2432 If you say Y here, the kernel will include drivers and
2433 infrastructure code to support RapidIO interconnect devices.
2434
2435source "drivers/rapidio/Kconfig"
2436
2437endmenu
2438
2439menu "Executable file formats"
2440
2441source "fs/Kconfig.binfmt"
2442
2443config TRAD_SIGNALS
2444 bool
2445
2446config MIPS32_COMPAT
2447 bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
2448 depends on 64BIT
2449 help
2450 Select this option if you want Linux/MIPS 32-bit binary
2451 compatibility. Since all software available for Linux/MIPS is
2452 currently 32-bit you should say Y here.
2453
2454config COMPAT
2455 bool
2456 depends on MIPS32_COMPAT
2457 select ARCH_WANT_OLD_COMPAT_IPC
2458 default y
2459
2460config SYSVIPC_COMPAT
2461 bool
2462 depends on COMPAT && SYSVIPC
2463 default y
2464
2465config MIPS32_O32
2466 bool "Kernel support for o32 binaries"
2467 depends on MIPS32_COMPAT
2468 help
2469 Select this option if you want to run o32 binaries. These are pure
2470 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
2471 existing binaries are in this format.
2472
2473 If unsure, say Y.
2474
2475config MIPS32_N32
2476 bool "Kernel support for n32 binaries"
2477 depends on MIPS32_COMPAT
2478 help
2479 Select this option if you want to run n32 binaries. These are
2480 64-bit binaries using 32-bit quantities for addressing and certain
2481 data that would normally be 64-bit. They are used in special
2482 cases.
2483
2484 If unsure, say N.
2485
2486config BINFMT_ELF32
2487 bool
2488 default y if MIPS32_O32 || MIPS32_N32
2489
2490endmenu
2491
2492menu "Power management options"
2493
2494config ARCH_HIBERNATION_POSSIBLE
2495 def_bool y
2496 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2497
2498config ARCH_SUSPEND_POSSIBLE
2499 def_bool y
2500 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2501
2502source "kernel/power/Kconfig"
2503
2504endmenu
2505
2506source "arch/mips/kernel/cpufreq/Kconfig"
2507
2508source "net/Kconfig"
2509
2510source "drivers/Kconfig"
2511
2512source "fs/Kconfig"
2513
2514source "arch/mips/Kconfig.debug"
2515
2516source "security/Kconfig"
2517
2518source "crypto/Kconfig"
2519
2520source "lib/Kconfig"
1# SPDX-License-Identifier: GPL-2.0
2config MIPS
3 bool
4 default y
5 select ARCH_32BIT_OFF_T if !64BIT
6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 select ARCH_HAS_CPU_CACHE_ALIASING
8 select ARCH_HAS_CPU_FINALIZE_INIT
9 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
10 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
11 select ARCH_HAS_FORTIFY_SOURCE
12 select ARCH_HAS_KCOV
13 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
14 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
15 select ARCH_HAS_STRNCPY_FROM_USER
16 select ARCH_HAS_STRNLEN_USER
17 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
18 select ARCH_HAS_UBSAN
19 select ARCH_HAS_GCOV_PROFILE_ALL
20 select ARCH_KEEP_MEMBLOCK
21 select ARCH_USE_BUILTIN_BSWAP
22 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
23 select ARCH_USE_MEMTEST
24 select ARCH_USE_QUEUED_RWLOCKS
25 select ARCH_USE_QUEUED_SPINLOCKS
26 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
27 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
28 select ARCH_WANT_IPC_PARSE_VERSION
29 select ARCH_WANT_LD_ORPHAN_WARN
30 select BUILDTIME_TABLE_SORT
31 select CLONE_BACKWARDS
32 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
33 select CPU_PM if CPU_IDLE
34 select GENERIC_ATOMIC64 if !64BIT
35 select GENERIC_CMOS_UPDATE
36 select GENERIC_CPU_AUTOPROBE
37 select GENERIC_GETTIMEOFDAY
38 select GENERIC_IOMAP
39 select GENERIC_IRQ_PROBE
40 select GENERIC_IRQ_SHOW
41 select GENERIC_ISA_DMA if EISA
42 select GENERIC_LIB_ASHLDI3
43 select GENERIC_LIB_ASHRDI3
44 select GENERIC_LIB_CMPDI2
45 select GENERIC_LIB_LSHRDI3
46 select GENERIC_LIB_UCMPDI2
47 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
48 select GENERIC_SMP_IDLE_THREAD
49 select GENERIC_IDLE_POLL_SETUP
50 select GENERIC_TIME_VSYSCALL
51 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
52 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
53 select HAVE_ARCH_COMPILER_H
54 select HAVE_ARCH_JUMP_LABEL
55 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
56 select HAVE_ARCH_MMAP_RND_BITS if MMU
57 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
58 select HAVE_ARCH_SECCOMP_FILTER
59 select HAVE_ARCH_TRACEHOOK
60 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
61 select HAVE_ASM_MODVERSIONS
62 select HAVE_CONTEXT_TRACKING_USER
63 select HAVE_TIF_NOHZ
64 select HAVE_C_RECORDMCOUNT
65 select HAVE_DEBUG_KMEMLEAK
66 select HAVE_DEBUG_STACKOVERFLOW
67 select HAVE_DMA_CONTIGUOUS
68 select HAVE_DYNAMIC_FTRACE
69 select HAVE_EBPF_JIT if !CPU_MICROMIPS
70 select HAVE_EXIT_THREAD
71 select HAVE_FAST_GUP
72 select HAVE_FTRACE_MCOUNT_RECORD
73 select HAVE_FUNCTION_GRAPH_TRACER
74 select HAVE_FUNCTION_TRACER
75 select HAVE_GCC_PLUGINS
76 select HAVE_GENERIC_VDSO
77 select HAVE_IOREMAP_PROT
78 select HAVE_IRQ_EXIT_ON_IRQ_STACK
79 select HAVE_IRQ_TIME_ACCOUNTING
80 select HAVE_KPROBES
81 select HAVE_KRETPROBES
82 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
83 select HAVE_MOD_ARCH_SPECIFIC
84 select HAVE_NMI
85 select HAVE_PAGE_SIZE_4KB if !CPU_LOONGSON2EF && !CPU_LOONGSON64
86 select HAVE_PAGE_SIZE_16KB if !CPU_R3000
87 select HAVE_PAGE_SIZE_64KB if !CPU_R3000
88 select HAVE_PERF_EVENTS
89 select HAVE_PERF_REGS
90 select HAVE_PERF_USER_STACK_DUMP
91 select HAVE_REGS_AND_STACK_ACCESS_API
92 select HAVE_RSEQ
93 select HAVE_SPARSE_SYSCALL_NR
94 select HAVE_STACKPROTECTOR
95 select HAVE_SYSCALL_TRACEPOINTS
96 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
97 select IRQ_FORCED_THREADING
98 select ISA if EISA
99 select LOCK_MM_AND_FIND_VMA
100 select MODULES_USE_ELF_REL if MODULES
101 select MODULES_USE_ELF_RELA if MODULES && 64BIT
102 select PERF_USE_VMALLOC
103 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
104 select RTC_LIB
105 select SYSCTL_EXCEPTION_TRACE
106 select TRACE_IRQFLAGS_SUPPORT
107 select ARCH_HAS_ELFCORE_COMPAT
108 select HAVE_ARCH_KCSAN if 64BIT
109
110config MIPS_FIXUP_BIGPHYS_ADDR
111 bool
112
113config MIPS_GENERIC
114 bool
115
116config MACH_GENERIC_CORE
117 bool
118
119config MACH_INGENIC
120 bool
121 select SYS_SUPPORTS_32BIT_KERNEL
122 select SYS_SUPPORTS_LITTLE_ENDIAN
123 select SYS_SUPPORTS_ZBOOT
124 select DMA_NONCOHERENT
125 select IRQ_MIPS_CPU
126 select PINCTRL
127 select GPIOLIB
128 select COMMON_CLK
129 select GENERIC_IRQ_CHIP
130 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
131 select USE_OF
132 select CPU_SUPPORTS_CPUFREQ
133 select MIPS_EXTERNAL_TIMER
134
135menu "Machine selection"
136
137choice
138 prompt "System type"
139 default MIPS_GENERIC_KERNEL
140
141config MIPS_GENERIC_KERNEL
142 bool "Generic board-agnostic MIPS kernel"
143 select MIPS_GENERIC
144 select BOOT_RAW
145 select BUILTIN_DTB
146 select CEVT_R4K
147 select CLKSRC_MIPS_GIC
148 select COMMON_CLK
149 select CPU_MIPSR2_IRQ_EI
150 select CPU_MIPSR2_IRQ_VI
151 select CSRC_R4K
152 select DMA_NONCOHERENT
153 select HAVE_PCI
154 select IRQ_MIPS_CPU
155 select MACH_GENERIC_CORE
156 select MIPS_AUTO_PFN_OFFSET
157 select MIPS_CPU_SCACHE
158 select MIPS_GIC
159 select MIPS_L1_CACHE_SHIFT_7
160 select NO_EXCEPT_FILL
161 select PCI_DRIVERS_GENERIC
162 select SMP_UP if SMP
163 select SWAP_IO_SPACE
164 select SYS_HAS_CPU_MIPS32_R1
165 select SYS_HAS_CPU_MIPS32_R2
166 select SYS_HAS_CPU_MIPS32_R5
167 select SYS_HAS_CPU_MIPS32_R6
168 select SYS_HAS_CPU_MIPS64_R1
169 select SYS_HAS_CPU_MIPS64_R2
170 select SYS_HAS_CPU_MIPS64_R5
171 select SYS_HAS_CPU_MIPS64_R6
172 select SYS_SUPPORTS_32BIT_KERNEL
173 select SYS_SUPPORTS_64BIT_KERNEL
174 select SYS_SUPPORTS_BIG_ENDIAN
175 select SYS_SUPPORTS_HIGHMEM
176 select SYS_SUPPORTS_LITTLE_ENDIAN
177 select SYS_SUPPORTS_MICROMIPS
178 select SYS_SUPPORTS_MIPS16
179 select SYS_SUPPORTS_MIPS_CPS
180 select SYS_SUPPORTS_MULTITHREADING
181 select SYS_SUPPORTS_RELOCATABLE
182 select SYS_SUPPORTS_SMARTMIPS
183 select SYS_SUPPORTS_ZBOOT
184 select UHI_BOOT
185 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
186 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
187 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
188 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
189 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
190 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
191 select USE_OF
192 help
193 Select this to build a kernel which aims to support multiple boards,
194 generally using a flattened device tree passed from the bootloader
195 using the boot protocol defined in the UHI (Unified Hosting
196 Interface) specification.
197
198config MIPS_ALCHEMY
199 bool "Alchemy processor based machines"
200 select PHYS_ADDR_T_64BIT
201 select CEVT_R4K
202 select CSRC_R4K
203 select IRQ_MIPS_CPU
204 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
205 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
206 select SYS_HAS_CPU_MIPS32_R1
207 select SYS_SUPPORTS_32BIT_KERNEL
208 select SYS_SUPPORTS_APM_EMULATION
209 select GPIOLIB
210 select SYS_SUPPORTS_ZBOOT
211 select COMMON_CLK
212
213config ATH25
214 bool "Atheros AR231x/AR531x SoC support"
215 select CEVT_R4K
216 select CSRC_R4K
217 select DMA_NONCOHERENT
218 select IRQ_MIPS_CPU
219 select IRQ_DOMAIN
220 select SYS_HAS_CPU_MIPS32_R1
221 select SYS_SUPPORTS_BIG_ENDIAN
222 select SYS_SUPPORTS_32BIT_KERNEL
223 select SYS_HAS_EARLY_PRINTK
224 help
225 Support for Atheros AR231x and Atheros AR531x based boards
226
227config ATH79
228 bool "Atheros AR71XX/AR724X/AR913X based boards"
229 select ARCH_HAS_RESET_CONTROLLER
230 select BOOT_RAW
231 select CEVT_R4K
232 select CSRC_R4K
233 select DMA_NONCOHERENT
234 select GPIOLIB
235 select PINCTRL
236 select COMMON_CLK
237 select IRQ_MIPS_CPU
238 select SYS_HAS_CPU_MIPS32_R2
239 select SYS_HAS_EARLY_PRINTK
240 select SYS_SUPPORTS_32BIT_KERNEL
241 select SYS_SUPPORTS_BIG_ENDIAN
242 select SYS_SUPPORTS_MIPS16
243 select SYS_SUPPORTS_ZBOOT_UART_PROM
244 select USE_OF
245 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
246 help
247 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
248
249config BMIPS_GENERIC
250 bool "Broadcom Generic BMIPS kernel"
251 select ARCH_HAS_RESET_CONTROLLER
252 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
253 select BOOT_RAW
254 select NO_EXCEPT_FILL
255 select USE_OF
256 select CEVT_R4K
257 select CSRC_R4K
258 select SYNC_R4K
259 select COMMON_CLK
260 select BCM6345_L1_IRQ
261 select BCM7038_L1_IRQ
262 select BCM7120_L2_IRQ
263 select BRCMSTB_L2_IRQ
264 select IRQ_MIPS_CPU
265 select DMA_NONCOHERENT
266 select SYS_SUPPORTS_32BIT_KERNEL
267 select SYS_SUPPORTS_LITTLE_ENDIAN
268 select SYS_SUPPORTS_BIG_ENDIAN
269 select SYS_SUPPORTS_HIGHMEM
270 select SYS_HAS_CPU_BMIPS32_3300
271 select SYS_HAS_CPU_BMIPS4350
272 select SYS_HAS_CPU_BMIPS4380
273 select SYS_HAS_CPU_BMIPS5000
274 select SWAP_IO_SPACE
275 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
276 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
277 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
278 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
279 select HARDIRQS_SW_RESEND
280 select HAVE_PCI
281 select PCI_DRIVERS_GENERIC
282 select FW_CFE
283 help
284 Build a generic DT-based kernel image that boots on select
285 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
286 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
287 must be set appropriately for your board.
288
289config BCM47XX
290 bool "Broadcom BCM47XX based boards"
291 select BOOT_RAW
292 select CEVT_R4K
293 select CSRC_R4K
294 select DMA_NONCOHERENT
295 select HAVE_PCI
296 select IRQ_MIPS_CPU
297 select SYS_HAS_CPU_MIPS32_R1
298 select NO_EXCEPT_FILL
299 select SYS_SUPPORTS_32BIT_KERNEL
300 select SYS_SUPPORTS_LITTLE_ENDIAN
301 select SYS_SUPPORTS_MIPS16
302 select SYS_SUPPORTS_ZBOOT
303 select SYS_HAS_EARLY_PRINTK
304 select USE_GENERIC_EARLY_PRINTK_8250
305 select GPIOLIB
306 select LEDS_GPIO_REGISTER
307 select BCM47XX_NVRAM
308 select BCM47XX_SPROM
309 select BCM47XX_SSB if !BCM47XX_BCMA
310 help
311 Support for BCM47XX based boards
312
313config BCM63XX
314 bool "Broadcom BCM63XX based boards"
315 select BOOT_RAW
316 select CEVT_R4K
317 select CSRC_R4K
318 select SYNC_R4K
319 select DMA_NONCOHERENT
320 select IRQ_MIPS_CPU
321 select SYS_SUPPORTS_32BIT_KERNEL
322 select SYS_SUPPORTS_BIG_ENDIAN
323 select SYS_HAS_EARLY_PRINTK
324 select SYS_HAS_CPU_BMIPS32_3300
325 select SYS_HAS_CPU_BMIPS4350
326 select SYS_HAS_CPU_BMIPS4380
327 select SWAP_IO_SPACE
328 select GPIOLIB
329 select MIPS_L1_CACHE_SHIFT_4
330 select HAVE_LEGACY_CLK
331 help
332 Support for BCM63XX based boards
333
334config MIPS_COBALT
335 bool "Cobalt Server"
336 select CEVT_R4K
337 select CSRC_R4K
338 select CEVT_GT641XX
339 select DMA_NONCOHERENT
340 select FORCE_PCI
341 select I8253
342 select I8259
343 select IRQ_MIPS_CPU
344 select IRQ_GT641XX
345 select PCI_GT64XXX_PCI0
346 select SYS_HAS_CPU_NEVADA
347 select SYS_HAS_EARLY_PRINTK
348 select SYS_SUPPORTS_32BIT_KERNEL
349 select SYS_SUPPORTS_64BIT_KERNEL
350 select SYS_SUPPORTS_LITTLE_ENDIAN
351 select USE_GENERIC_EARLY_PRINTK_8250
352
353config MACH_DECSTATION
354 bool "DECstations"
355 select BOOT_ELF32
356 select CEVT_DS1287
357 select CEVT_R4K if CPU_R4X00
358 select CSRC_IOASIC
359 select CSRC_R4K if CPU_R4X00
360 select CPU_DADDI_WORKAROUNDS if 64BIT
361 select CPU_R4000_WORKAROUNDS if 64BIT
362 select CPU_R4400_WORKAROUNDS if 64BIT
363 select DMA_NONCOHERENT
364 select NO_IOPORT_MAP
365 select IRQ_MIPS_CPU
366 select SYS_HAS_CPU_R3000
367 select SYS_HAS_CPU_R4X00
368 select SYS_SUPPORTS_32BIT_KERNEL
369 select SYS_SUPPORTS_64BIT_KERNEL
370 select SYS_SUPPORTS_LITTLE_ENDIAN
371 select SYS_SUPPORTS_128HZ
372 select SYS_SUPPORTS_256HZ
373 select SYS_SUPPORTS_1024HZ
374 select MIPS_L1_CACHE_SHIFT_4
375 help
376 This enables support for DEC's MIPS based workstations. For details
377 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
378 DECstation porting pages on <http://decstation.unix-ag.org/>.
379
380 If you have one of the following DECstation Models you definitely
381 want to choose R4xx0 for the CPU Type:
382
383 DECstation 5000/50
384 DECstation 5000/150
385 DECstation 5000/260
386 DECsystem 5900/260
387
388 otherwise choose R3000.
389
390config MACH_JAZZ
391 bool "Jazz family of machines"
392 select ARC_MEMORY
393 select ARC_PROMLIB
394 select ARCH_MIGHT_HAVE_PC_PARPORT
395 select ARCH_MIGHT_HAVE_PC_SERIO
396 select DMA_OPS
397 select FW_ARC
398 select FW_ARC32
399 select ARCH_MAY_HAVE_PC_FDC
400 select CEVT_R4K
401 select CSRC_R4K
402 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
403 select GENERIC_ISA_DMA
404 select HAVE_PCSPKR_PLATFORM
405 select IRQ_MIPS_CPU
406 select I8253
407 select I8259
408 select ISA
409 select SYS_HAS_CPU_R4X00
410 select SYS_SUPPORTS_32BIT_KERNEL
411 select SYS_SUPPORTS_64BIT_KERNEL
412 select SYS_SUPPORTS_100HZ
413 select SYS_SUPPORTS_LITTLE_ENDIAN
414 help
415 This a family of machines based on the MIPS R4030 chipset which was
416 used by several vendors to build RISC/os and Windows NT workstations.
417 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
418 Olivetti M700-10 workstations.
419
420config MACH_INGENIC_SOC
421 bool "Ingenic SoC based machines"
422 select MIPS_GENERIC
423 select MACH_INGENIC
424 select MACH_GENERIC_CORE
425 select SYS_SUPPORTS_ZBOOT_UART16550
426 select CPU_SUPPORTS_CPUFREQ
427 select MIPS_EXTERNAL_TIMER
428
429config LANTIQ
430 bool "Lantiq based platforms"
431 select DMA_NONCOHERENT
432 select IRQ_MIPS_CPU
433 select CEVT_R4K
434 select CSRC_R4K
435 select NO_EXCEPT_FILL
436 select SYS_HAS_CPU_MIPS32_R1
437 select SYS_HAS_CPU_MIPS32_R2
438 select SYS_SUPPORTS_BIG_ENDIAN
439 select SYS_SUPPORTS_32BIT_KERNEL
440 select SYS_SUPPORTS_MIPS16
441 select SYS_SUPPORTS_MULTITHREADING
442 select SYS_SUPPORTS_VPE_LOADER
443 select SYS_HAS_EARLY_PRINTK
444 select GPIOLIB
445 select SWAP_IO_SPACE
446 select BOOT_RAW
447 select HAVE_LEGACY_CLK
448 select USE_OF
449 select PINCTRL
450 select PINCTRL_LANTIQ
451 select ARCH_HAS_RESET_CONTROLLER
452 select RESET_CONTROLLER
453
454config MACH_LOONGSON32
455 bool "Loongson 32-bit family of machines"
456 select SYS_SUPPORTS_ZBOOT
457 help
458 This enables support for the Loongson-1 family of machines.
459
460 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
461 the Institute of Computing Technology (ICT), Chinese Academy of
462 Sciences (CAS).
463
464config MACH_LOONGSON2EF
465 bool "Loongson-2E/F family of machines"
466 select SYS_SUPPORTS_ZBOOT
467 help
468 This enables the support of early Loongson-2E/F family of machines.
469
470config MACH_LOONGSON64
471 bool "Loongson 64-bit family of machines"
472 select ARCH_DMA_DEFAULT_COHERENT
473 select ARCH_SPARSEMEM_ENABLE
474 select ARCH_MIGHT_HAVE_PC_PARPORT
475 select ARCH_MIGHT_HAVE_PC_SERIO
476 select GENERIC_ISA_DMA_SUPPORT_BROKEN
477 select BOOT_ELF32
478 select BOARD_SCACHE
479 select CSRC_R4K
480 select CEVT_R4K
481 select FORCE_PCI
482 select ISA
483 select I8259
484 select IRQ_MIPS_CPU
485 select NO_EXCEPT_FILL
486 select NR_CPUS_DEFAULT_64
487 select USE_GENERIC_EARLY_PRINTK_8250
488 select PCI_DRIVERS_GENERIC
489 select SYS_HAS_CPU_LOONGSON64
490 select SYS_HAS_EARLY_PRINTK
491 select SYS_SUPPORTS_SMP
492 select SYS_SUPPORTS_HOTPLUG_CPU
493 select SYS_SUPPORTS_NUMA
494 select SYS_SUPPORTS_64BIT_KERNEL
495 select SYS_SUPPORTS_HIGHMEM
496 select SYS_SUPPORTS_LITTLE_ENDIAN
497 select SYS_SUPPORTS_ZBOOT
498 select SYS_SUPPORTS_RELOCATABLE
499 select ZONE_DMA32
500 select COMMON_CLK
501 select USE_OF
502 select BUILTIN_DTB
503 select PCI_HOST_GENERIC
504 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
505 help
506 This enables the support of Loongson-2/3 family of machines.
507
508 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
509 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
510 and Loongson-2F which will be removed), developed by the Institute
511 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
512
513config MIPS_MALTA
514 bool "MIPS Malta board"
515 select ARCH_MAY_HAVE_PC_FDC
516 select ARCH_MIGHT_HAVE_PC_PARPORT
517 select ARCH_MIGHT_HAVE_PC_SERIO
518 select BOOT_ELF32
519 select BOOT_RAW
520 select BUILTIN_DTB
521 select CEVT_R4K
522 select CLKSRC_MIPS_GIC
523 select COMMON_CLK
524 select CSRC_R4K
525 select DMA_NONCOHERENT
526 select GENERIC_ISA_DMA
527 select HAVE_PCSPKR_PLATFORM
528 select HAVE_PCI
529 select I8253
530 select I8259
531 select IRQ_MIPS_CPU
532 select MIPS_BONITO64
533 select MIPS_CPU_SCACHE
534 select MIPS_GIC
535 select MIPS_L1_CACHE_SHIFT_6
536 select MIPS_MSC
537 select PCI_GT64XXX_PCI0
538 select SMP_UP if SMP
539 select SWAP_IO_SPACE
540 select SYS_HAS_CPU_MIPS32_R1
541 select SYS_HAS_CPU_MIPS32_R2
542 select SYS_HAS_CPU_MIPS32_R3_5
543 select SYS_HAS_CPU_MIPS32_R5
544 select SYS_HAS_CPU_MIPS32_R6
545 select SYS_HAS_CPU_MIPS64_R1
546 select SYS_HAS_CPU_MIPS64_R2
547 select SYS_HAS_CPU_MIPS64_R6
548 select SYS_HAS_CPU_NEVADA
549 select SYS_HAS_CPU_RM7000
550 select SYS_SUPPORTS_32BIT_KERNEL
551 select SYS_SUPPORTS_64BIT_KERNEL
552 select SYS_SUPPORTS_BIG_ENDIAN
553 select SYS_SUPPORTS_HIGHMEM
554 select SYS_SUPPORTS_LITTLE_ENDIAN
555 select SYS_SUPPORTS_MICROMIPS
556 select SYS_SUPPORTS_MIPS16
557 select SYS_SUPPORTS_MIPS_CPS
558 select SYS_SUPPORTS_MULTITHREADING
559 select SYS_SUPPORTS_RELOCATABLE
560 select SYS_SUPPORTS_SMARTMIPS
561 select SYS_SUPPORTS_VPE_LOADER
562 select SYS_SUPPORTS_ZBOOT
563 select USE_OF
564 select WAR_ICACHE_REFILLS
565 select ZONE_DMA32 if 64BIT
566 help
567 This enables support for the MIPS Technologies Malta evaluation
568 board.
569
570config MACH_PIC32
571 bool "Microchip PIC32 Family"
572 help
573 This enables support for the Microchip PIC32 family of platforms.
574
575 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
576 microcontrollers.
577
578config MACH_EYEQ5
579 bool "Mobileye EyeQ5 SoC"
580 select MACH_GENERIC_CORE
581 select ARM_AMBA
582 select PHYSICAL_START_BOOL
583 select ARCH_SPARSEMEM_DEFAULT if 64BIT
584 select BOOT_RAW
585 select BUILTIN_DTB
586 select CEVT_R4K
587 select CLKSRC_MIPS_GIC
588 select COMMON_CLK
589 select CPU_MIPSR2_IRQ_EI
590 select CPU_MIPSR2_IRQ_VI
591 select CSRC_R4K
592 select DMA_NONCOHERENT
593 select HAVE_PCI
594 select IRQ_MIPS_CPU
595 select MIPS_AUTO_PFN_OFFSET
596 select MIPS_CPU_SCACHE
597 select MIPS_GIC
598 select MIPS_L1_CACHE_SHIFT_7
599 select PCI_DRIVERS_GENERIC
600 select SMP_UP if SMP
601 select SWAP_IO_SPACE
602 select SYS_HAS_CPU_MIPS64_R6
603 select SYS_SUPPORTS_64BIT_KERNEL
604 select SYS_SUPPORTS_HIGHMEM
605 select SYS_SUPPORTS_LITTLE_ENDIAN
606 select SYS_SUPPORTS_MIPS_CPS
607 select SYS_SUPPORTS_RELOCATABLE
608 select SYS_SUPPORTS_ZBOOT
609 select UHI_BOOT
610 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
611 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
612 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
613 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
614 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
615 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
616 select USE_OF
617 help
618 Select this to build a kernel supporting EyeQ5 SoC from Mobileye.
619
620 bool
621
622config MACH_NINTENDO64
623 bool "Nintendo 64 console"
624 select CEVT_R4K
625 select CSRC_R4K
626 select SYS_HAS_CPU_R4300
627 select SYS_SUPPORTS_BIG_ENDIAN
628 select SYS_SUPPORTS_ZBOOT
629 select SYS_SUPPORTS_32BIT_KERNEL
630 select SYS_SUPPORTS_64BIT_KERNEL
631 select DMA_NONCOHERENT
632 select IRQ_MIPS_CPU
633
634config RALINK
635 bool "Ralink based machines"
636 select CEVT_R4K
637 select COMMON_CLK
638 select CSRC_R4K
639 select BOOT_RAW
640 select DMA_NONCOHERENT
641 select IRQ_MIPS_CPU
642 select USE_OF
643 select SYS_HAS_CPU_MIPS32_R2
644 select SYS_SUPPORTS_32BIT_KERNEL
645 select SYS_SUPPORTS_LITTLE_ENDIAN
646 select SYS_SUPPORTS_MIPS16
647 select SYS_SUPPORTS_ZBOOT
648 select SYS_HAS_EARLY_PRINTK
649 select ARCH_HAS_RESET_CONTROLLER
650 select RESET_CONTROLLER
651
652config MACH_REALTEK_RTL
653 bool "Realtek RTL838x/RTL839x based machines"
654 select MIPS_GENERIC
655 select MACH_GENERIC_CORE
656 select DMA_NONCOHERENT
657 select IRQ_MIPS_CPU
658 select CSRC_R4K
659 select CEVT_R4K
660 select SYS_HAS_CPU_MIPS32_R1
661 select SYS_HAS_CPU_MIPS32_R2
662 select SYS_SUPPORTS_BIG_ENDIAN
663 select SYS_SUPPORTS_32BIT_KERNEL
664 select SYS_SUPPORTS_MIPS16
665 select SYS_SUPPORTS_MULTITHREADING
666 select SYS_SUPPORTS_VPE_LOADER
667 select BOOT_RAW
668 select PINCTRL
669 select USE_OF
670
671config SGI_IP22
672 bool "SGI IP22 (Indy/Indigo2)"
673 select ARC_MEMORY
674 select ARC_PROMLIB
675 select FW_ARC
676 select FW_ARC32
677 select ARCH_MIGHT_HAVE_PC_SERIO
678 select BOOT_ELF32
679 select CEVT_R4K
680 select CSRC_R4K
681 select DEFAULT_SGI_PARTITION
682 select DMA_NONCOHERENT
683 select HAVE_EISA
684 select I8253
685 select I8259
686 select IP22_CPU_SCACHE
687 select IRQ_MIPS_CPU
688 select GENERIC_ISA_DMA_SUPPORT_BROKEN
689 select SGI_HAS_I8042
690 select SGI_HAS_INDYDOG
691 select SGI_HAS_HAL2
692 select SGI_HAS_SEEQ
693 select SGI_HAS_WD93
694 select SGI_HAS_ZILOG
695 select SWAP_IO_SPACE
696 select SYS_HAS_CPU_R4X00
697 select SYS_HAS_CPU_R5000
698 select SYS_HAS_EARLY_PRINTK
699 select SYS_SUPPORTS_32BIT_KERNEL
700 select SYS_SUPPORTS_64BIT_KERNEL
701 select SYS_SUPPORTS_BIG_ENDIAN
702 select WAR_R4600_V1_INDEX_ICACHEOP
703 select WAR_R4600_V1_HIT_CACHEOP
704 select WAR_R4600_V2_HIT_CACHEOP
705 select MIPS_L1_CACHE_SHIFT_7
706 help
707 This are the SGI Indy, Challenge S and Indigo2, as well as certain
708 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
709 that runs on these, say Y here.
710
711config SGI_IP27
712 bool "SGI IP27 (Origin200/2000)"
713 select ARCH_HAS_PHYS_TO_DMA
714 select ARCH_SPARSEMEM_ENABLE
715 select FW_ARC
716 select FW_ARC64
717 select ARC_CMDLINE_ONLY
718 select BOOT_ELF64
719 select DEFAULT_SGI_PARTITION
720 select FORCE_PCI
721 select SYS_HAS_EARLY_PRINTK
722 select HAVE_PCI
723 select IRQ_MIPS_CPU
724 select IRQ_DOMAIN_HIERARCHY
725 select NR_CPUS_DEFAULT_64
726 select PCI_DRIVERS_GENERIC
727 select PCI_XTALK_BRIDGE
728 select SYS_HAS_CPU_R10000
729 select SYS_SUPPORTS_64BIT_KERNEL
730 select SYS_SUPPORTS_BIG_ENDIAN
731 select SYS_SUPPORTS_NUMA
732 select SYS_SUPPORTS_SMP
733 select WAR_R10000_LLSC
734 select MIPS_L1_CACHE_SHIFT_7
735 select NUMA
736 select HAVE_ARCH_NODEDATA_EXTENSION
737 help
738 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
739 workstations. To compile a Linux kernel that runs on these, say Y
740 here.
741
742config SGI_IP28
743 bool "SGI IP28 (Indigo2 R10k)"
744 select ARC_MEMORY
745 select ARC_PROMLIB
746 select FW_ARC
747 select FW_ARC64
748 select ARCH_MIGHT_HAVE_PC_SERIO
749 select BOOT_ELF64
750 select CEVT_R4K
751 select CSRC_R4K
752 select DEFAULT_SGI_PARTITION
753 select DMA_NONCOHERENT
754 select GENERIC_ISA_DMA_SUPPORT_BROKEN
755 select IRQ_MIPS_CPU
756 select HAVE_EISA
757 select I8253
758 select I8259
759 select SGI_HAS_I8042
760 select SGI_HAS_INDYDOG
761 select SGI_HAS_HAL2
762 select SGI_HAS_SEEQ
763 select SGI_HAS_WD93
764 select SGI_HAS_ZILOG
765 select SWAP_IO_SPACE
766 select SYS_HAS_CPU_R10000
767 select SYS_HAS_EARLY_PRINTK
768 select SYS_SUPPORTS_64BIT_KERNEL
769 select SYS_SUPPORTS_BIG_ENDIAN
770 select WAR_R10000_LLSC
771 select MIPS_L1_CACHE_SHIFT_7
772 help
773 This is the SGI Indigo2 with R10000 processor. To compile a Linux
774 kernel that runs on these, say Y here.
775
776config SGI_IP30
777 bool "SGI IP30 (Octane/Octane2)"
778 select ARCH_HAS_PHYS_TO_DMA
779 select FW_ARC
780 select FW_ARC64
781 select BOOT_ELF64
782 select CEVT_R4K
783 select CSRC_R4K
784 select FORCE_PCI
785 select SYNC_R4K if SMP
786 select ZONE_DMA32
787 select HAVE_PCI
788 select IRQ_MIPS_CPU
789 select IRQ_DOMAIN_HIERARCHY
790 select PCI_DRIVERS_GENERIC
791 select PCI_XTALK_BRIDGE
792 select SYS_HAS_EARLY_PRINTK
793 select SYS_HAS_CPU_R10000
794 select SYS_SUPPORTS_64BIT_KERNEL
795 select SYS_SUPPORTS_BIG_ENDIAN
796 select SYS_SUPPORTS_SMP
797 select WAR_R10000_LLSC
798 select MIPS_L1_CACHE_SHIFT_7
799 select ARC_MEMORY
800 help
801 These are the SGI Octane and Octane2 graphics workstations. To
802 compile a Linux kernel that runs on these, say Y here.
803
804config SGI_IP32
805 bool "SGI IP32 (O2)"
806 select ARC_MEMORY
807 select ARC_PROMLIB
808 select ARCH_HAS_PHYS_TO_DMA
809 select FW_ARC
810 select FW_ARC32
811 select BOOT_ELF32
812 select CEVT_R4K
813 select CSRC_R4K
814 select DMA_NONCOHERENT
815 select HAVE_PCI
816 select IRQ_MIPS_CPU
817 select R5000_CPU_SCACHE
818 select RM7000_CPU_SCACHE
819 select SYS_HAS_CPU_R5000
820 select SYS_HAS_CPU_R10000 if BROKEN
821 select SYS_HAS_CPU_RM7000
822 select SYS_HAS_CPU_NEVADA
823 select SYS_SUPPORTS_64BIT_KERNEL
824 select SYS_SUPPORTS_BIG_ENDIAN
825 select WAR_ICACHE_REFILLS
826 help
827 If you want this kernel to run on SGI O2 workstation, say Y here.
828
829config SIBYTE_CRHONE
830 bool "Sibyte BCM91125C-CRhone"
831 select BOOT_ELF32
832 select SIBYTE_BCM1125
833 select SWAP_IO_SPACE
834 select SYS_HAS_CPU_SB1
835 select SYS_SUPPORTS_BIG_ENDIAN
836 select SYS_SUPPORTS_HIGHMEM
837 select SYS_SUPPORTS_LITTLE_ENDIAN
838
839config SIBYTE_RHONE
840 bool "Sibyte BCM91125E-Rhone"
841 select BOOT_ELF32
842 select SIBYTE_SB1250
843 select SWAP_IO_SPACE
844 select SYS_HAS_CPU_SB1
845 select SYS_SUPPORTS_BIG_ENDIAN
846 select SYS_SUPPORTS_LITTLE_ENDIAN
847
848config SIBYTE_SWARM
849 bool "Sibyte BCM91250A-SWARM"
850 select BOOT_ELF32
851 select HAVE_PATA_PLATFORM
852 select SIBYTE_SB1250
853 select SWAP_IO_SPACE
854 select SYS_HAS_CPU_SB1
855 select SYS_SUPPORTS_BIG_ENDIAN
856 select SYS_SUPPORTS_HIGHMEM
857 select SYS_SUPPORTS_LITTLE_ENDIAN
858 select ZONE_DMA32 if 64BIT
859 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
860
861config SIBYTE_LITTLESUR
862 bool "Sibyte BCM91250C2-LittleSur"
863 select BOOT_ELF32
864 select HAVE_PATA_PLATFORM
865 select SIBYTE_SB1250
866 select SWAP_IO_SPACE
867 select SYS_HAS_CPU_SB1
868 select SYS_SUPPORTS_BIG_ENDIAN
869 select SYS_SUPPORTS_HIGHMEM
870 select SYS_SUPPORTS_LITTLE_ENDIAN
871 select ZONE_DMA32 if 64BIT
872
873config SIBYTE_SENTOSA
874 bool "Sibyte BCM91250E-Sentosa"
875 select BOOT_ELF32
876 select SIBYTE_SB1250
877 select SWAP_IO_SPACE
878 select SYS_HAS_CPU_SB1
879 select SYS_SUPPORTS_BIG_ENDIAN
880 select SYS_SUPPORTS_LITTLE_ENDIAN
881 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
882
883config SIBYTE_BIGSUR
884 bool "Sibyte BCM91480B-BigSur"
885 select BOOT_ELF32
886 select NR_CPUS_DEFAULT_4
887 select SIBYTE_BCM1x80
888 select SWAP_IO_SPACE
889 select SYS_HAS_CPU_SB1
890 select SYS_SUPPORTS_BIG_ENDIAN
891 select SYS_SUPPORTS_HIGHMEM
892 select SYS_SUPPORTS_LITTLE_ENDIAN
893 select ZONE_DMA32 if 64BIT
894 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
895
896config SNI_RM
897 bool "SNI RM200/300/400"
898 select ARC_MEMORY
899 select ARC_PROMLIB
900 select FW_ARC if CPU_LITTLE_ENDIAN
901 select FW_ARC32 if CPU_LITTLE_ENDIAN
902 select FW_SNIPROM if CPU_BIG_ENDIAN
903 select ARCH_MAY_HAVE_PC_FDC
904 select ARCH_MIGHT_HAVE_PC_PARPORT
905 select ARCH_MIGHT_HAVE_PC_SERIO
906 select BOOT_ELF32
907 select CEVT_R4K
908 select CSRC_R4K
909 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
910 select DMA_NONCOHERENT
911 select GENERIC_ISA_DMA
912 select HAVE_EISA
913 select HAVE_PCSPKR_PLATFORM
914 select HAVE_PCI
915 select IRQ_MIPS_CPU
916 select I8253
917 select I8259
918 select ISA
919 select MIPS_L1_CACHE_SHIFT_6
920 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
921 select SYS_HAS_CPU_R4X00
922 select SYS_HAS_CPU_R5000
923 select SYS_HAS_CPU_R10000
924 select R5000_CPU_SCACHE
925 select SYS_HAS_EARLY_PRINTK
926 select SYS_SUPPORTS_32BIT_KERNEL
927 select SYS_SUPPORTS_64BIT_KERNEL
928 select SYS_SUPPORTS_BIG_ENDIAN
929 select SYS_SUPPORTS_HIGHMEM
930 select SYS_SUPPORTS_LITTLE_ENDIAN
931 select WAR_R4600_V2_HIT_CACHEOP
932 help
933 The SNI RM200/300/400 are MIPS-based machines manufactured by
934 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
935 Technology and now in turn merged with Fujitsu. Say Y here to
936 support this machine type.
937
938config MACH_TX49XX
939 bool "Toshiba TX49 series based machines"
940 select WAR_TX49XX_ICACHE_INDEX_INV
941
942config MIKROTIK_RB532
943 bool "Mikrotik RB532 boards"
944 select CEVT_R4K
945 select CSRC_R4K
946 select DMA_NONCOHERENT
947 select HAVE_PCI
948 select IRQ_MIPS_CPU
949 select SYS_HAS_CPU_MIPS32_R1
950 select SYS_SUPPORTS_32BIT_KERNEL
951 select SYS_SUPPORTS_LITTLE_ENDIAN
952 select SWAP_IO_SPACE
953 select BOOT_RAW
954 select GPIOLIB
955 select MIPS_L1_CACHE_SHIFT_4
956 help
957 Support the Mikrotik(tm) RouterBoard 532 series,
958 based on the IDT RC32434 SoC.
959
960config CAVIUM_OCTEON_SOC
961 bool "Cavium Networks Octeon SoC based boards"
962 select CEVT_R4K
963 select ARCH_HAS_PHYS_TO_DMA
964 select HAVE_RAPIDIO
965 select PHYS_ADDR_T_64BIT
966 select SYS_SUPPORTS_64BIT_KERNEL
967 select SYS_SUPPORTS_BIG_ENDIAN
968 select EDAC_SUPPORT
969 select EDAC_ATOMIC_SCRUB
970 select SYS_SUPPORTS_LITTLE_ENDIAN
971 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
972 select SYS_HAS_EARLY_PRINTK
973 select SYS_HAS_CPU_CAVIUM_OCTEON
974 select HAVE_PCI
975 select HAVE_PLAT_DELAY
976 select HAVE_PLAT_FW_INIT_CMDLINE
977 select HAVE_PLAT_MEMCPY
978 select ZONE_DMA32
979 select GPIOLIB
980 select USE_OF
981 select ARCH_SPARSEMEM_ENABLE
982 select SYS_SUPPORTS_SMP
983 select NR_CPUS_DEFAULT_64
984 select MIPS_NR_CPU_NR_MAP_1024
985 select BUILTIN_DTB
986 select MTD
987 select MTD_COMPLEX_MAPPINGS
988 select SWIOTLB
989 select SYS_SUPPORTS_RELOCATABLE
990 help
991 This option supports all of the Octeon reference boards from Cavium
992 Networks. It builds a kernel that dynamically determines the Octeon
993 CPU type and supports all known board reference implementations.
994 Some of the supported boards are:
995 EBT3000
996 EBH3000
997 EBH3100
998 Thunder
999 Kodama
1000 Hikari
1001 Say Y here for most Octeon reference boards.
1002
1003endchoice
1004
1005config FIT_IMAGE_FDT_EPM5
1006 bool "Include FDT for Mobileye EyeQ5 development platforms"
1007 depends on MACH_EYEQ5
1008 default n
1009 help
1010 Enable this to include the FDT for the EyeQ5 development platforms
1011 from Mobileye in the FIT kernel image.
1012 This requires u-boot on the platform.
1013
1014source "arch/mips/alchemy/Kconfig"
1015source "arch/mips/ath25/Kconfig"
1016source "arch/mips/ath79/Kconfig"
1017source "arch/mips/bcm47xx/Kconfig"
1018source "arch/mips/bcm63xx/Kconfig"
1019source "arch/mips/bmips/Kconfig"
1020source "arch/mips/generic/Kconfig"
1021source "arch/mips/ingenic/Kconfig"
1022source "arch/mips/jazz/Kconfig"
1023source "arch/mips/lantiq/Kconfig"
1024source "arch/mips/pic32/Kconfig"
1025source "arch/mips/ralink/Kconfig"
1026source "arch/mips/sgi-ip27/Kconfig"
1027source "arch/mips/sibyte/Kconfig"
1028source "arch/mips/txx9/Kconfig"
1029source "arch/mips/cavium-octeon/Kconfig"
1030source "arch/mips/loongson2ef/Kconfig"
1031source "arch/mips/loongson32/Kconfig"
1032source "arch/mips/loongson64/Kconfig"
1033
1034endmenu
1035
1036config GENERIC_HWEIGHT
1037 bool
1038 default y
1039
1040config GENERIC_CALIBRATE_DELAY
1041 bool
1042 default y
1043
1044config SCHED_OMIT_FRAME_POINTER
1045 bool
1046 default y
1047
1048#
1049# Select some configuration options automatically based on user selections.
1050#
1051config FW_ARC
1052 bool
1053
1054config ARCH_MAY_HAVE_PC_FDC
1055 bool
1056
1057config BOOT_RAW
1058 bool
1059
1060config CEVT_BCM1480
1061 bool
1062
1063config CEVT_DS1287
1064 bool
1065
1066config CEVT_GT641XX
1067 bool
1068
1069config CEVT_R4K
1070 bool
1071
1072config CEVT_SB1250
1073 bool
1074
1075config CEVT_TXX9
1076 bool
1077
1078config CSRC_BCM1480
1079 bool
1080
1081config CSRC_IOASIC
1082 bool
1083
1084config CSRC_R4K
1085 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1086 bool
1087
1088config CSRC_SB1250
1089 bool
1090
1091config MIPS_CLOCK_VSYSCALL
1092 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1093
1094config GPIO_TXX9
1095 select GPIOLIB
1096 bool
1097
1098config FW_CFE
1099 bool
1100
1101config ARCH_SUPPORTS_UPROBES
1102 def_bool y
1103
1104config DMA_NONCOHERENT
1105 bool
1106 #
1107 # MIPS allows mixing "slightly different" Cacheability and Coherency
1108 # Attribute bits. It is believed that the uncached access through
1109 # KSEG1 and the implementation specific "uncached accelerated" used
1110 # by pgprot_writcombine can be mixed, and the latter sometimes provides
1111 # significant advantages.
1112 #
1113 select ARCH_HAS_SETUP_DMA_OPS
1114 select ARCH_HAS_DMA_WRITE_COMBINE
1115 select ARCH_HAS_DMA_PREP_COHERENT
1116 select ARCH_HAS_SYNC_DMA_FOR_CPU
1117 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1118 select ARCH_HAS_DMA_SET_UNCACHED
1119 select DMA_NONCOHERENT_MMAP
1120 select NEED_DMA_MAP_STATE
1121
1122config SYS_HAS_EARLY_PRINTK
1123 bool
1124
1125config SYS_SUPPORTS_HOTPLUG_CPU
1126 bool
1127
1128config MIPS_BONITO64
1129 bool
1130
1131config MIPS_MSC
1132 bool
1133
1134config SYNC_R4K
1135 bool
1136
1137config NO_IOPORT_MAP
1138 def_bool n
1139
1140config GENERIC_CSUM
1141 def_bool CPU_NO_LOAD_STORE_LR
1142
1143config GENERIC_ISA_DMA
1144 bool
1145 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1146 select ISA_DMA_API
1147
1148config GENERIC_ISA_DMA_SUPPORT_BROKEN
1149 bool
1150 select GENERIC_ISA_DMA
1151
1152config HAVE_PLAT_DELAY
1153 bool
1154
1155config HAVE_PLAT_FW_INIT_CMDLINE
1156 bool
1157
1158config HAVE_PLAT_MEMCPY
1159 bool
1160
1161config ISA_DMA_API
1162 bool
1163
1164config SYS_SUPPORTS_RELOCATABLE
1165 bool
1166 help
1167 Selected if the platform supports relocating the kernel.
1168 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1169 to allow access to command line and entropy sources.
1170
1171#
1172# Endianness selection. Sufficiently obscure so many users don't know what to
1173# answer,so we try hard to limit the available choices. Also the use of a
1174# choice statement should be more obvious to the user.
1175#
1176choice
1177 prompt "Endianness selection"
1178 help
1179 Some MIPS machines can be configured for either little or big endian
1180 byte order. These modes require different kernels and a different
1181 Linux distribution. In general there is one preferred byteorder for a
1182 particular system but some systems are just as commonly used in the
1183 one or the other endianness.
1184
1185config CPU_BIG_ENDIAN
1186 bool "Big endian"
1187 depends on SYS_SUPPORTS_BIG_ENDIAN
1188
1189config CPU_LITTLE_ENDIAN
1190 bool "Little endian"
1191 depends on SYS_SUPPORTS_LITTLE_ENDIAN
1192
1193endchoice
1194
1195config EXPORT_UASM
1196 bool
1197
1198config SYS_SUPPORTS_APM_EMULATION
1199 bool
1200
1201config SYS_SUPPORTS_BIG_ENDIAN
1202 bool
1203
1204config SYS_SUPPORTS_LITTLE_ENDIAN
1205 bool
1206
1207config MIPS_HUGE_TLB_SUPPORT
1208 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
1209
1210config IRQ_TXX9
1211 bool
1212
1213config IRQ_GT641XX
1214 bool
1215
1216config PCI_GT64XXX_PCI0
1217 bool
1218
1219config PCI_XTALK_BRIDGE
1220 bool
1221
1222config NO_EXCEPT_FILL
1223 bool
1224
1225config MIPS_SPRAM
1226 bool
1227
1228config SWAP_IO_SPACE
1229 bool
1230
1231config SGI_HAS_INDYDOG
1232 bool
1233
1234config SGI_HAS_HAL2
1235 bool
1236
1237config SGI_HAS_SEEQ
1238 bool
1239
1240config SGI_HAS_WD93
1241 bool
1242
1243config SGI_HAS_ZILOG
1244 bool
1245
1246config SGI_HAS_I8042
1247 bool
1248
1249config DEFAULT_SGI_PARTITION
1250 bool
1251
1252config FW_ARC32
1253 bool
1254
1255config FW_SNIPROM
1256 bool
1257
1258config BOOT_ELF32
1259 bool
1260
1261config MIPS_L1_CACHE_SHIFT_4
1262 bool
1263
1264config MIPS_L1_CACHE_SHIFT_5
1265 bool
1266
1267config MIPS_L1_CACHE_SHIFT_6
1268 bool
1269
1270config MIPS_L1_CACHE_SHIFT_7
1271 bool
1272
1273config MIPS_L1_CACHE_SHIFT
1274 int
1275 default "7" if MIPS_L1_CACHE_SHIFT_7
1276 default "6" if MIPS_L1_CACHE_SHIFT_6
1277 default "5" if MIPS_L1_CACHE_SHIFT_5
1278 default "4" if MIPS_L1_CACHE_SHIFT_4
1279 default "5"
1280
1281config ARC_CMDLINE_ONLY
1282 bool
1283
1284config ARC_CONSOLE
1285 bool "ARC console support"
1286 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1287
1288config ARC_MEMORY
1289 bool
1290
1291config ARC_PROMLIB
1292 bool
1293
1294config FW_ARC64
1295 bool
1296
1297config BOOT_ELF64
1298 bool
1299
1300menu "CPU selection"
1301
1302choice
1303 prompt "CPU type"
1304 default CPU_R4X00
1305
1306config CPU_LOONGSON64
1307 bool "Loongson 64-bit CPU"
1308 depends on SYS_HAS_CPU_LOONGSON64
1309 select ARCH_HAS_PHYS_TO_DMA
1310 select CPU_MIPSR2
1311 select CPU_HAS_PREFETCH
1312 select CPU_SUPPORTS_64BIT_KERNEL
1313 select CPU_SUPPORTS_HIGHMEM
1314 select CPU_SUPPORTS_HUGEPAGES
1315 select CPU_SUPPORTS_MSA
1316 select CPU_SUPPORTS_VZ
1317 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1318 select CPU_MIPSR2_IRQ_VI
1319 select DMA_NONCOHERENT
1320 select WEAK_ORDERING
1321 select WEAK_REORDERING_BEYOND_LLSC
1322 select MIPS_ASID_BITS_VARIABLE
1323 select MIPS_PGD_C0_CONTEXT
1324 select MIPS_L1_CACHE_SHIFT_6
1325 select MIPS_FP_SUPPORT
1326 select GPIOLIB
1327 select SWIOTLB
1328 help
1329 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1330 cores implements the MIPS64R2 instruction set with many extensions,
1331 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1332 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1333 Loongson-2E/2F is not covered here and will be removed in future.
1334
1335config CPU_LOONGSON2E
1336 bool "Loongson 2E"
1337 depends on SYS_HAS_CPU_LOONGSON2E
1338 select CPU_LOONGSON2EF
1339 help
1340 The Loongson 2E processor implements the MIPS III instruction set
1341 with many extensions.
1342
1343 It has an internal FPGA northbridge, which is compatible to
1344 bonito64.
1345
1346config CPU_LOONGSON2F
1347 bool "Loongson 2F"
1348 depends on SYS_HAS_CPU_LOONGSON2F
1349 select CPU_LOONGSON2EF
1350 help
1351 The Loongson 2F processor implements the MIPS III instruction set
1352 with many extensions.
1353
1354 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1355 have a similar programming interface with FPGA northbridge used in
1356 Loongson2E.
1357
1358config CPU_LOONGSON1B
1359 bool "Loongson 1B"
1360 depends on SYS_HAS_CPU_LOONGSON1B
1361 select CPU_LOONGSON32
1362 select LEDS_GPIO_REGISTER
1363 help
1364 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1365 Release 1 instruction set and part of the MIPS32 Release 2
1366 instruction set.
1367
1368config CPU_LOONGSON1C
1369 bool "Loongson 1C"
1370 depends on SYS_HAS_CPU_LOONGSON1C
1371 select CPU_LOONGSON32
1372 select LEDS_GPIO_REGISTER
1373 help
1374 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1375 Release 1 instruction set and part of the MIPS32 Release 2
1376 instruction set.
1377
1378config CPU_MIPS32_R1
1379 bool "MIPS32 Release 1"
1380 depends on SYS_HAS_CPU_MIPS32_R1
1381 select CPU_HAS_PREFETCH
1382 select CPU_SUPPORTS_32BIT_KERNEL
1383 select CPU_SUPPORTS_HIGHMEM
1384 help
1385 Choose this option to build a kernel for release 1 or later of the
1386 MIPS32 architecture. Most modern embedded systems with a 32-bit
1387 MIPS processor are based on a MIPS32 processor. If you know the
1388 specific type of processor in your system, choose those that one
1389 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1390 Release 2 of the MIPS32 architecture is available since several
1391 years so chances are you even have a MIPS32 Release 2 processor
1392 in which case you should choose CPU_MIPS32_R2 instead for better
1393 performance.
1394
1395config CPU_MIPS32_R2
1396 bool "MIPS32 Release 2"
1397 depends on SYS_HAS_CPU_MIPS32_R2
1398 select CPU_HAS_PREFETCH
1399 select CPU_SUPPORTS_32BIT_KERNEL
1400 select CPU_SUPPORTS_HIGHMEM
1401 select CPU_SUPPORTS_MSA
1402 help
1403 Choose this option to build a kernel for release 2 or later of the
1404 MIPS32 architecture. Most modern embedded systems with a 32-bit
1405 MIPS processor are based on a MIPS32 processor. If you know the
1406 specific type of processor in your system, choose those that one
1407 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1408
1409config CPU_MIPS32_R5
1410 bool "MIPS32 Release 5"
1411 depends on SYS_HAS_CPU_MIPS32_R5
1412 select CPU_HAS_PREFETCH
1413 select CPU_SUPPORTS_32BIT_KERNEL
1414 select CPU_SUPPORTS_HIGHMEM
1415 select CPU_SUPPORTS_MSA
1416 select CPU_SUPPORTS_VZ
1417 select MIPS_O32_FP64_SUPPORT
1418 help
1419 Choose this option to build a kernel for release 5 or later of the
1420 MIPS32 architecture. New MIPS processors, starting with the Warrior
1421 family, are based on a MIPS32r5 processor. If you own an older
1422 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1423
1424config CPU_MIPS32_R6
1425 bool "MIPS32 Release 6"
1426 depends on SYS_HAS_CPU_MIPS32_R6
1427 select CPU_HAS_PREFETCH
1428 select CPU_NO_LOAD_STORE_LR
1429 select CPU_SUPPORTS_32BIT_KERNEL
1430 select CPU_SUPPORTS_HIGHMEM
1431 select CPU_SUPPORTS_MSA
1432 select CPU_SUPPORTS_VZ
1433 select MIPS_O32_FP64_SUPPORT
1434 help
1435 Choose this option to build a kernel for release 6 or later of the
1436 MIPS32 architecture. New MIPS processors, starting with the Warrior
1437 family, are based on a MIPS32r6 processor. If you own an older
1438 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1439
1440config CPU_MIPS64_R1
1441 bool "MIPS64 Release 1"
1442 depends on SYS_HAS_CPU_MIPS64_R1
1443 select CPU_HAS_PREFETCH
1444 select CPU_SUPPORTS_32BIT_KERNEL
1445 select CPU_SUPPORTS_64BIT_KERNEL
1446 select CPU_SUPPORTS_HIGHMEM
1447 select CPU_SUPPORTS_HUGEPAGES
1448 help
1449 Choose this option to build a kernel for release 1 or later of the
1450 MIPS64 architecture. Many modern embedded systems with a 64-bit
1451 MIPS processor are based on a MIPS64 processor. If you know the
1452 specific type of processor in your system, choose those that one
1453 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1454 Release 2 of the MIPS64 architecture is available since several
1455 years so chances are you even have a MIPS64 Release 2 processor
1456 in which case you should choose CPU_MIPS64_R2 instead for better
1457 performance.
1458
1459config CPU_MIPS64_R2
1460 bool "MIPS64 Release 2"
1461 depends on SYS_HAS_CPU_MIPS64_R2
1462 select CPU_HAS_PREFETCH
1463 select CPU_SUPPORTS_32BIT_KERNEL
1464 select CPU_SUPPORTS_64BIT_KERNEL
1465 select CPU_SUPPORTS_HIGHMEM
1466 select CPU_SUPPORTS_HUGEPAGES
1467 select CPU_SUPPORTS_MSA
1468 help
1469 Choose this option to build a kernel for release 2 or later of the
1470 MIPS64 architecture. Many modern embedded systems with a 64-bit
1471 MIPS processor are based on a MIPS64 processor. If you know the
1472 specific type of processor in your system, choose those that one
1473 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1474
1475config CPU_MIPS64_R5
1476 bool "MIPS64 Release 5"
1477 depends on SYS_HAS_CPU_MIPS64_R5
1478 select CPU_HAS_PREFETCH
1479 select CPU_SUPPORTS_32BIT_KERNEL
1480 select CPU_SUPPORTS_64BIT_KERNEL
1481 select CPU_SUPPORTS_HIGHMEM
1482 select CPU_SUPPORTS_HUGEPAGES
1483 select CPU_SUPPORTS_MSA
1484 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1485 select CPU_SUPPORTS_VZ
1486 help
1487 Choose this option to build a kernel for release 5 or later of the
1488 MIPS64 architecture. This is a intermediate MIPS architecture
1489 release partly implementing release 6 features. Though there is no
1490 any hardware known to be based on this release.
1491
1492config CPU_MIPS64_R6
1493 bool "MIPS64 Release 6"
1494 depends on SYS_HAS_CPU_MIPS64_R6
1495 select CPU_HAS_PREFETCH
1496 select CPU_NO_LOAD_STORE_LR
1497 select CPU_SUPPORTS_32BIT_KERNEL
1498 select CPU_SUPPORTS_64BIT_KERNEL
1499 select CPU_SUPPORTS_HIGHMEM
1500 select CPU_SUPPORTS_HUGEPAGES
1501 select CPU_SUPPORTS_MSA
1502 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1503 select CPU_SUPPORTS_VZ
1504 help
1505 Choose this option to build a kernel for release 6 or later of the
1506 MIPS64 architecture. New MIPS processors, starting with the Warrior
1507 family, are based on a MIPS64r6 processor. If you own an older
1508 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1509
1510config CPU_P5600
1511 bool "MIPS Warrior P5600"
1512 depends on SYS_HAS_CPU_P5600
1513 select CPU_HAS_PREFETCH
1514 select CPU_SUPPORTS_32BIT_KERNEL
1515 select CPU_SUPPORTS_HIGHMEM
1516 select CPU_SUPPORTS_MSA
1517 select CPU_SUPPORTS_CPUFREQ
1518 select CPU_SUPPORTS_VZ
1519 select CPU_MIPSR2_IRQ_VI
1520 select CPU_MIPSR2_IRQ_EI
1521 select MIPS_O32_FP64_SUPPORT
1522 help
1523 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1524 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1525 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1526 level features like up to six P5600 calculation cores, CM2 with L2
1527 cache, IOCU/IOMMU (though might be unused depending on the system-
1528 specific IP core configuration), GIC, CPC, virtualisation module,
1529 eJTAG and PDtrace.
1530
1531config CPU_R3000
1532 bool "R3000"
1533 depends on SYS_HAS_CPU_R3000
1534 select CPU_HAS_WB
1535 select CPU_R3K_TLB
1536 select CPU_SUPPORTS_32BIT_KERNEL
1537 select CPU_SUPPORTS_HIGHMEM
1538 help
1539 Please make sure to pick the right CPU type. Linux/MIPS is not
1540 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1541 *not* work on R4000 machines and vice versa. However, since most
1542 of the supported machines have an R4000 (or similar) CPU, R4x00
1543 might be a safe bet. If the resulting kernel does not work,
1544 try to recompile with R3000.
1545
1546config CPU_R4300
1547 bool "R4300"
1548 depends on SYS_HAS_CPU_R4300
1549 select CPU_SUPPORTS_32BIT_KERNEL
1550 select CPU_SUPPORTS_64BIT_KERNEL
1551 help
1552 MIPS Technologies R4300-series processors.
1553
1554config CPU_R4X00
1555 bool "R4x00"
1556 depends on SYS_HAS_CPU_R4X00
1557 select CPU_SUPPORTS_32BIT_KERNEL
1558 select CPU_SUPPORTS_64BIT_KERNEL
1559 select CPU_SUPPORTS_HUGEPAGES
1560 help
1561 MIPS Technologies R4000-series processors other than 4300, including
1562 the R4000, R4400, R4600, and 4700.
1563
1564config CPU_TX49XX
1565 bool "R49XX"
1566 depends on SYS_HAS_CPU_TX49XX
1567 select CPU_HAS_PREFETCH
1568 select CPU_SUPPORTS_32BIT_KERNEL
1569 select CPU_SUPPORTS_64BIT_KERNEL
1570 select CPU_SUPPORTS_HUGEPAGES
1571
1572config CPU_R5000
1573 bool "R5000"
1574 depends on SYS_HAS_CPU_R5000
1575 select CPU_SUPPORTS_32BIT_KERNEL
1576 select CPU_SUPPORTS_64BIT_KERNEL
1577 select CPU_SUPPORTS_HUGEPAGES
1578 help
1579 MIPS Technologies R5000-series processors other than the Nevada.
1580
1581config CPU_R5500
1582 bool "R5500"
1583 depends on SYS_HAS_CPU_R5500
1584 select CPU_SUPPORTS_32BIT_KERNEL
1585 select CPU_SUPPORTS_64BIT_KERNEL
1586 select CPU_SUPPORTS_HUGEPAGES
1587 help
1588 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1589 instruction set.
1590
1591config CPU_NEVADA
1592 bool "RM52xx"
1593 depends on SYS_HAS_CPU_NEVADA
1594 select CPU_SUPPORTS_32BIT_KERNEL
1595 select CPU_SUPPORTS_64BIT_KERNEL
1596 select CPU_SUPPORTS_HUGEPAGES
1597 help
1598 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1599
1600config CPU_R10000
1601 bool "R10000"
1602 depends on SYS_HAS_CPU_R10000
1603 select CPU_HAS_PREFETCH
1604 select CPU_SUPPORTS_32BIT_KERNEL
1605 select CPU_SUPPORTS_64BIT_KERNEL
1606 select CPU_SUPPORTS_HIGHMEM
1607 select CPU_SUPPORTS_HUGEPAGES
1608 help
1609 MIPS Technologies R10000-series processors.
1610
1611config CPU_RM7000
1612 bool "RM7000"
1613 depends on SYS_HAS_CPU_RM7000
1614 select CPU_HAS_PREFETCH
1615 select CPU_SUPPORTS_32BIT_KERNEL
1616 select CPU_SUPPORTS_64BIT_KERNEL
1617 select CPU_SUPPORTS_HIGHMEM
1618 select CPU_SUPPORTS_HUGEPAGES
1619
1620config CPU_SB1
1621 bool "SB1"
1622 depends on SYS_HAS_CPU_SB1
1623 select CPU_SUPPORTS_32BIT_KERNEL
1624 select CPU_SUPPORTS_64BIT_KERNEL
1625 select CPU_SUPPORTS_HIGHMEM
1626 select CPU_SUPPORTS_HUGEPAGES
1627 select WEAK_ORDERING
1628
1629config CPU_CAVIUM_OCTEON
1630 bool "Cavium Octeon processor"
1631 depends on SYS_HAS_CPU_CAVIUM_OCTEON
1632 select CPU_HAS_PREFETCH
1633 select CPU_SUPPORTS_64BIT_KERNEL
1634 select HAVE_PAGE_SIZE_8KB if !MIPS_VA_BITS_48
1635 select HAVE_PAGE_SIZE_32KB if !MIPS_VA_BITS_48
1636 select WEAK_ORDERING
1637 select CPU_SUPPORTS_HIGHMEM
1638 select CPU_SUPPORTS_HUGEPAGES
1639 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1640 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1641 select MIPS_L1_CACHE_SHIFT_7
1642 select CPU_SUPPORTS_VZ
1643 help
1644 The Cavium Octeon processor is a highly integrated chip containing
1645 many ethernet hardware widgets for networking tasks. The processor
1646 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1647 Full details can be found at http://www.caviumnetworks.com.
1648
1649config CPU_BMIPS
1650 bool "Broadcom BMIPS"
1651 depends on SYS_HAS_CPU_BMIPS
1652 select CPU_MIPS32
1653 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1654 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1655 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1656 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1657 select CPU_SUPPORTS_32BIT_KERNEL
1658 select DMA_NONCOHERENT
1659 select IRQ_MIPS_CPU
1660 select SWAP_IO_SPACE
1661 select WEAK_ORDERING
1662 select CPU_SUPPORTS_HIGHMEM
1663 select CPU_HAS_PREFETCH
1664 select CPU_SUPPORTS_CPUFREQ
1665 select MIPS_EXTERNAL_TIMER
1666 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1667 help
1668 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1669
1670endchoice
1671
1672config LOONGSON3_ENHANCEMENT
1673 bool "New Loongson-3 CPU Enhancements"
1674 default n
1675 depends on CPU_LOONGSON64
1676 help
1677 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1678 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1679 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1680 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1681 Fast TLB refill support, etc.
1682
1683 This option enable those enhancements which are not probed at run
1684 time. If you want a generic kernel to run on all Loongson 3 machines,
1685 please say 'N' here. If you want a high-performance kernel to run on
1686 new Loongson-3 machines only, please say 'Y' here.
1687
1688config CPU_LOONGSON3_WORKAROUNDS
1689 bool "Loongson-3 LLSC Workarounds"
1690 default y if SMP
1691 depends on CPU_LOONGSON64
1692 help
1693 Loongson-3 processors have the llsc issues which require workarounds.
1694 Without workarounds the system may hang unexpectedly.
1695
1696 Say Y, unless you know what you are doing.
1697
1698config CPU_LOONGSON3_CPUCFG_EMULATION
1699 bool "Emulate the CPUCFG instruction on older Loongson cores"
1700 default y
1701 depends on CPU_LOONGSON64
1702 help
1703 Loongson-3A R4 and newer have the CPUCFG instruction available for
1704 userland to query CPU capabilities, much like CPUID on x86. This
1705 option provides emulation of the instruction on older Loongson
1706 cores, back to Loongson-3A1000.
1707
1708 If unsure, please say Y.
1709
1710config CPU_MIPS32_3_5_FEATURES
1711 bool "MIPS32 Release 3.5 Features"
1712 depends on SYS_HAS_CPU_MIPS32_R3_5
1713 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1714 CPU_P5600
1715 help
1716 Choose this option to build a kernel for release 2 or later of the
1717 MIPS32 architecture including features from the 3.5 release such as
1718 support for Enhanced Virtual Addressing (EVA).
1719
1720config CPU_MIPS32_3_5_EVA
1721 bool "Enhanced Virtual Addressing (EVA)"
1722 depends on CPU_MIPS32_3_5_FEATURES
1723 select EVA
1724 default y
1725 help
1726 Choose this option if you want to enable the Enhanced Virtual
1727 Addressing (EVA) on your MIPS32 core (such as proAptiv).
1728 One of its primary benefits is an increase in the maximum size
1729 of lowmem (up to 3GB). If unsure, say 'N' here.
1730
1731config CPU_MIPS32_R5_FEATURES
1732 bool "MIPS32 Release 5 Features"
1733 depends on SYS_HAS_CPU_MIPS32_R5
1734 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1735 help
1736 Choose this option to build a kernel for release 2 or later of the
1737 MIPS32 architecture including features from release 5 such as
1738 support for Extended Physical Addressing (XPA).
1739
1740config CPU_MIPS32_R5_XPA
1741 bool "Extended Physical Addressing (XPA)"
1742 depends on CPU_MIPS32_R5_FEATURES
1743 depends on !EVA
1744 depends on !PAGE_SIZE_4KB
1745 depends on SYS_SUPPORTS_HIGHMEM
1746 select XPA
1747 select HIGHMEM
1748 select PHYS_ADDR_T_64BIT
1749 default n
1750 help
1751 Choose this option if you want to enable the Extended Physical
1752 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1753 benefit is to increase physical addressing equal to or greater
1754 than 40 bits. Note that this has the side effect of turning on
1755 64-bit addressing which in turn makes the PTEs 64-bit in size.
1756 If unsure, say 'N' here.
1757
1758if CPU_LOONGSON2F
1759config CPU_NOP_WORKAROUNDS
1760 bool
1761
1762config CPU_JUMP_WORKAROUNDS
1763 bool
1764
1765config CPU_LOONGSON2F_WORKAROUNDS
1766 bool "Loongson 2F Workarounds"
1767 default y
1768 select CPU_NOP_WORKAROUNDS
1769 select CPU_JUMP_WORKAROUNDS
1770 help
1771 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1772 require workarounds. Without workarounds the system may hang
1773 unexpectedly. For more information please refer to the gas
1774 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1775
1776 Loongson 2F03 and later have fixed these issues and no workarounds
1777 are needed. The workarounds have no significant side effect on them
1778 but may decrease the performance of the system so this option should
1779 be disabled unless the kernel is intended to be run on 2F01 or 2F02
1780 systems.
1781
1782 If unsure, please say Y.
1783endif # CPU_LOONGSON2F
1784
1785config SYS_SUPPORTS_ZBOOT
1786 bool
1787 select HAVE_KERNEL_GZIP
1788 select HAVE_KERNEL_BZIP2
1789 select HAVE_KERNEL_LZ4
1790 select HAVE_KERNEL_LZMA
1791 select HAVE_KERNEL_LZO
1792 select HAVE_KERNEL_XZ
1793 select HAVE_KERNEL_ZSTD
1794
1795config SYS_SUPPORTS_ZBOOT_UART16550
1796 bool
1797 select SYS_SUPPORTS_ZBOOT
1798
1799config SYS_SUPPORTS_ZBOOT_UART_PROM
1800 bool
1801 select SYS_SUPPORTS_ZBOOT
1802
1803config CPU_LOONGSON2EF
1804 bool
1805 select CPU_SUPPORTS_32BIT_KERNEL
1806 select CPU_SUPPORTS_64BIT_KERNEL
1807 select CPU_SUPPORTS_HIGHMEM
1808 select CPU_SUPPORTS_HUGEPAGES
1809
1810config CPU_LOONGSON32
1811 bool
1812 select CPU_MIPS32
1813 select CPU_MIPSR2
1814 select CPU_HAS_PREFETCH
1815 select CPU_SUPPORTS_32BIT_KERNEL
1816 select CPU_SUPPORTS_HIGHMEM
1817 select CPU_SUPPORTS_CPUFREQ
1818
1819config CPU_BMIPS32_3300
1820 select SMP_UP if SMP
1821 bool
1822
1823config CPU_BMIPS4350
1824 bool
1825 select SYS_SUPPORTS_SMP
1826 select SYS_SUPPORTS_HOTPLUG_CPU
1827
1828config CPU_BMIPS4380
1829 bool
1830 select MIPS_L1_CACHE_SHIFT_6
1831 select SYS_SUPPORTS_SMP
1832 select SYS_SUPPORTS_HOTPLUG_CPU
1833 select CPU_HAS_RIXI
1834
1835config CPU_BMIPS5000
1836 bool
1837 select MIPS_CPU_SCACHE
1838 select MIPS_L1_CACHE_SHIFT_7
1839 select SYS_SUPPORTS_SMP
1840 select SYS_SUPPORTS_HOTPLUG_CPU
1841 select CPU_HAS_RIXI
1842
1843config SYS_HAS_CPU_LOONGSON64
1844 bool
1845 select CPU_SUPPORTS_CPUFREQ
1846 select CPU_HAS_RIXI
1847
1848config SYS_HAS_CPU_LOONGSON2E
1849 bool
1850
1851config SYS_HAS_CPU_LOONGSON2F
1852 bool
1853 select CPU_SUPPORTS_CPUFREQ
1854 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1855
1856config SYS_HAS_CPU_LOONGSON1B
1857 bool
1858
1859config SYS_HAS_CPU_LOONGSON1C
1860 bool
1861
1862config SYS_HAS_CPU_MIPS32_R1
1863 bool
1864
1865config SYS_HAS_CPU_MIPS32_R2
1866 bool
1867
1868config SYS_HAS_CPU_MIPS32_R3_5
1869 bool
1870
1871config SYS_HAS_CPU_MIPS32_R5
1872 bool
1873
1874config SYS_HAS_CPU_MIPS32_R6
1875 bool
1876
1877config SYS_HAS_CPU_MIPS64_R1
1878 bool
1879
1880config SYS_HAS_CPU_MIPS64_R2
1881 bool
1882
1883config SYS_HAS_CPU_MIPS64_R5
1884 bool
1885
1886config SYS_HAS_CPU_MIPS64_R6
1887 bool
1888
1889config SYS_HAS_CPU_P5600
1890 bool
1891
1892config SYS_HAS_CPU_R3000
1893 bool
1894
1895config SYS_HAS_CPU_R4300
1896 bool
1897
1898config SYS_HAS_CPU_R4X00
1899 bool
1900
1901config SYS_HAS_CPU_TX49XX
1902 bool
1903
1904config SYS_HAS_CPU_R5000
1905 bool
1906
1907config SYS_HAS_CPU_R5500
1908 bool
1909
1910config SYS_HAS_CPU_NEVADA
1911 bool
1912
1913config SYS_HAS_CPU_R10000
1914 bool
1915
1916config SYS_HAS_CPU_RM7000
1917 bool
1918
1919config SYS_HAS_CPU_SB1
1920 bool
1921
1922config SYS_HAS_CPU_CAVIUM_OCTEON
1923 bool
1924
1925config SYS_HAS_CPU_BMIPS
1926 bool
1927
1928config SYS_HAS_CPU_BMIPS32_3300
1929 bool
1930 select SYS_HAS_CPU_BMIPS
1931
1932config SYS_HAS_CPU_BMIPS4350
1933 bool
1934 select SYS_HAS_CPU_BMIPS
1935
1936config SYS_HAS_CPU_BMIPS4380
1937 bool
1938 select SYS_HAS_CPU_BMIPS
1939
1940config SYS_HAS_CPU_BMIPS5000
1941 bool
1942 select SYS_HAS_CPU_BMIPS
1943
1944#
1945# CPU may reorder R->R, R->W, W->R, W->W
1946# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1947#
1948config WEAK_ORDERING
1949 bool
1950
1951#
1952# CPU may reorder reads and writes beyond LL/SC
1953# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1954#
1955config WEAK_REORDERING_BEYOND_LLSC
1956 bool
1957endmenu
1958
1959#
1960# These two indicate any level of the MIPS32 and MIPS64 architecture
1961#
1962config CPU_MIPS32
1963 bool
1964 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1965 CPU_MIPS32_R6 || CPU_P5600
1966
1967config CPU_MIPS64
1968 bool
1969 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1970 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1971
1972#
1973# These indicate the revision of the architecture
1974#
1975config CPU_MIPSR1
1976 bool
1977 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1978
1979config CPU_MIPSR2
1980 bool
1981 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1982 select CPU_HAS_RIXI
1983 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1984 select MIPS_SPRAM
1985
1986config CPU_MIPSR5
1987 bool
1988 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1989 select CPU_HAS_RIXI
1990 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1991 select MIPS_SPRAM
1992
1993config CPU_MIPSR6
1994 bool
1995 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1996 select CPU_HAS_RIXI
1997 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1998 select HAVE_ARCH_BITREVERSE
1999 select MIPS_ASID_BITS_VARIABLE
2000 select MIPS_CRC_SUPPORT
2001 select MIPS_SPRAM
2002
2003config TARGET_ISA_REV
2004 int
2005 default 1 if CPU_MIPSR1
2006 default 2 if CPU_MIPSR2
2007 default 5 if CPU_MIPSR5
2008 default 6 if CPU_MIPSR6
2009 default 0
2010 help
2011 Reflects the ISA revision being targeted by the kernel build. This
2012 is effectively the Kconfig equivalent of MIPS_ISA_REV.
2013
2014config EVA
2015 bool
2016
2017config XPA
2018 bool
2019
2020config SYS_SUPPORTS_32BIT_KERNEL
2021 bool
2022config SYS_SUPPORTS_64BIT_KERNEL
2023 bool
2024config CPU_SUPPORTS_32BIT_KERNEL
2025 bool
2026config CPU_SUPPORTS_64BIT_KERNEL
2027 bool
2028config CPU_SUPPORTS_CPUFREQ
2029 bool
2030config CPU_SUPPORTS_ADDRWINCFG
2031 bool
2032config CPU_SUPPORTS_HUGEPAGES
2033 bool
2034 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2035config CPU_SUPPORTS_VZ
2036 bool
2037config MIPS_PGD_C0_CONTEXT
2038 bool
2039 depends on 64BIT
2040 default y if (CPU_MIPSR2 || CPU_MIPSR6)
2041
2042#
2043# Set to y for ptrace access to watch registers.
2044#
2045config HARDWARE_WATCHPOINTS
2046 bool
2047 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2048
2049menu "Kernel type"
2050
2051choice
2052 prompt "Kernel code model"
2053 help
2054 You should only select this option if you have a workload that
2055 actually benefits from 64-bit processing or if your machine has
2056 large memory. You will only be presented a single option in this
2057 menu if your system does not support both 32-bit and 64-bit kernels.
2058
2059config 32BIT
2060 bool "32-bit kernel"
2061 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2062 select TRAD_SIGNALS
2063 help
2064 Select this option if you want to build a 32-bit kernel.
2065
2066config 64BIT
2067 bool "64-bit kernel"
2068 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
2069 help
2070 Select this option if you want to build a 64-bit kernel.
2071
2072endchoice
2073
2074config MIPS_VA_BITS_48
2075 bool "48 bits virtual memory"
2076 depends on 64BIT
2077 help
2078 Support a maximum at least 48 bits of application virtual
2079 memory. Default is 40 bits or less, depending on the CPU.
2080 For page sizes 16k and above, this option results in a small
2081 memory overhead for page tables. For 4k page size, a fourth
2082 level of page tables is added which imposes both a memory
2083 overhead as well as slower TLB fault handling.
2084
2085 If unsure, say N.
2086
2087config ZBOOT_LOAD_ADDRESS
2088 hex "Compressed kernel load address"
2089 default 0xffffffff80400000 if BCM47XX
2090 default 0x0
2091 depends on SYS_SUPPORTS_ZBOOT
2092 help
2093 The address to load compressed kernel, aka vmlinuz.
2094
2095 This is only used if non-zero.
2096
2097config ARCH_FORCE_MAX_ORDER
2098 int "Maximum zone order"
2099 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2100 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2101 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2102 default "10"
2103 help
2104 The kernel memory allocator divides physically contiguous memory
2105 blocks into "zones", where each zone is a power of two number of
2106 pages. This option selects the largest power of two that the kernel
2107 keeps in the memory allocator. If you need to allocate very large
2108 blocks of physically contiguous memory, then you may need to
2109 increase this value.
2110
2111 The page size is not necessarily 4KB. Keep this in mind
2112 when choosing a value for this option.
2113
2114config BOARD_SCACHE
2115 bool
2116
2117config IP22_CPU_SCACHE
2118 bool
2119 select BOARD_SCACHE
2120
2121#
2122# Support for a MIPS32 / MIPS64 style S-caches
2123#
2124config MIPS_CPU_SCACHE
2125 bool
2126 select BOARD_SCACHE
2127
2128config R5000_CPU_SCACHE
2129 bool
2130 select BOARD_SCACHE
2131
2132config RM7000_CPU_SCACHE
2133 bool
2134 select BOARD_SCACHE
2135
2136config SIBYTE_DMA_PAGEOPS
2137 bool "Use DMA to clear/copy pages"
2138 depends on CPU_SB1
2139 help
2140 Instead of using the CPU to zero and copy pages, use a Data Mover
2141 channel. These DMA channels are otherwise unused by the standard
2142 SiByte Linux port. Seems to give a small performance benefit.
2143
2144config CPU_HAS_PREFETCH
2145 bool
2146
2147config CPU_GENERIC_DUMP_TLB
2148 bool
2149 default y if !CPU_R3000
2150
2151config MIPS_FP_SUPPORT
2152 bool "Floating Point support" if EXPERT
2153 default y
2154 help
2155 Select y to include support for floating point in the kernel
2156 including initialization of FPU hardware, FP context save & restore
2157 and emulation of an FPU where necessary. Without this support any
2158 userland program attempting to use floating point instructions will
2159 receive a SIGILL.
2160
2161 If you know that your userland will not attempt to use floating point
2162 instructions then you can say n here to shrink the kernel a little.
2163
2164 If unsure, say y.
2165
2166config CPU_R2300_FPU
2167 bool
2168 depends on MIPS_FP_SUPPORT
2169 default y if CPU_R3000
2170
2171config CPU_R3K_TLB
2172 bool
2173
2174config CPU_R4K_FPU
2175 bool
2176 depends on MIPS_FP_SUPPORT
2177 default y if !CPU_R2300_FPU
2178
2179config CPU_R4K_CACHE_TLB
2180 bool
2181 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2182
2183config MIPS_MT_SMP
2184 bool "MIPS MT SMP support (1 TC on each available VPE)"
2185 default y
2186 depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6
2187 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS
2188 select CPU_MIPSR2_IRQ_VI
2189 select CPU_MIPSR2_IRQ_EI
2190 select SYNC_R4K
2191 select MIPS_MT
2192 select SMP
2193 select SMP_UP
2194 select SYS_SUPPORTS_SMP
2195 select SYS_SUPPORTS_SCHED_SMT
2196 select MIPS_PERF_SHARED_TC_COUNTERS
2197 help
2198 This is a kernel model which is known as SMVP. This is supported
2199 on cores with the MT ASE and uses the available VPEs to implement
2200 virtual processors which supports SMP. This is equivalent to the
2201 Intel Hyperthreading feature. For further information go to
2202 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2203
2204config MIPS_MT
2205 bool
2206
2207config SCHED_SMT
2208 bool "SMT (multithreading) scheduler support"
2209 depends on SYS_SUPPORTS_SCHED_SMT
2210 default n
2211 help
2212 SMT scheduler support improves the CPU scheduler's decision making
2213 when dealing with MIPS MT enabled cores at a cost of slightly
2214 increased overhead in some places. If unsure say N here.
2215
2216config SYS_SUPPORTS_SCHED_SMT
2217 bool
2218
2219config SYS_SUPPORTS_MULTITHREADING
2220 bool
2221
2222config MIPS_MT_FPAFF
2223 bool "Dynamic FPU affinity for FP-intensive threads"
2224 default y
2225 depends on MIPS_MT_SMP
2226
2227config MIPSR2_TO_R6_EMULATOR
2228 bool "MIPS R2-to-R6 emulator"
2229 depends on CPU_MIPSR6
2230 depends on MIPS_FP_SUPPORT
2231 default y
2232 help
2233 Choose this option if you want to run non-R6 MIPS userland code.
2234 Even if you say 'Y' here, the emulator will still be disabled by
2235 default. You can enable it using the 'mipsr2emu' kernel option.
2236 The only reason this is a build-time option is to save ~14K from the
2237 final kernel image.
2238
2239config SYS_SUPPORTS_VPE_LOADER
2240 bool
2241 depends on SYS_SUPPORTS_MULTITHREADING
2242 help
2243 Indicates that the platform supports the VPE loader, and provides
2244 physical_memsize.
2245
2246config MIPS_VPE_LOADER
2247 bool "VPE loader support."
2248 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2249 select CPU_MIPSR2_IRQ_VI
2250 select CPU_MIPSR2_IRQ_EI
2251 select MIPS_MT
2252 help
2253 Includes a loader for loading an elf relocatable object
2254 onto another VPE and running it.
2255
2256config MIPS_VPE_LOADER_MT
2257 bool
2258 default "y"
2259 depends on MIPS_VPE_LOADER
2260
2261config MIPS_VPE_LOADER_TOM
2262 bool "Load VPE program into memory hidden from linux"
2263 depends on MIPS_VPE_LOADER
2264 default y
2265 help
2266 The loader can use memory that is present but has been hidden from
2267 Linux using the kernel command line option "mem=xxMB". It's up to
2268 you to ensure the amount you put in the option and the space your
2269 program requires is less or equal to the amount physically present.
2270
2271config MIPS_VPE_APSP_API
2272 bool "Enable support for AP/SP API (RTLX)"
2273 depends on MIPS_VPE_LOADER
2274
2275config MIPS_VPE_APSP_API_MT
2276 bool
2277 default "y"
2278 depends on MIPS_VPE_APSP_API
2279
2280config MIPS_CPS
2281 bool "MIPS Coherent Processing System support"
2282 depends on SYS_SUPPORTS_MIPS_CPS
2283 select MIPS_CM
2284 select MIPS_CPS_PM if HOTPLUG_CPU
2285 select SMP
2286 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
2287 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2288 select SYS_SUPPORTS_HOTPLUG_CPU
2289 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2290 select SYS_SUPPORTS_SMP
2291 select WEAK_ORDERING
2292 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2293 help
2294 Select this if you wish to run an SMP kernel across multiple cores
2295 within a MIPS Coherent Processing System. When this option is
2296 enabled the kernel will probe for other cores and boot them with
2297 no external assistance. It is safe to enable this when hardware
2298 support is unavailable.
2299
2300config MIPS_CPS_PM
2301 depends on MIPS_CPS
2302 bool
2303
2304config MIPS_CM
2305 bool
2306 select MIPS_CPC
2307
2308config MIPS_CPC
2309 bool
2310
2311config SB1_PASS_2_WORKAROUNDS
2312 bool
2313 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2314 default y
2315
2316config SB1_PASS_2_1_WORKAROUNDS
2317 bool
2318 depends on CPU_SB1 && CPU_SB1_PASS_2
2319 default y
2320
2321choice
2322 prompt "SmartMIPS or microMIPS ASE support"
2323
2324config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2325 bool "None"
2326 help
2327 Select this if you want neither microMIPS nor SmartMIPS support
2328
2329config CPU_HAS_SMARTMIPS
2330 depends on SYS_SUPPORTS_SMARTMIPS
2331 bool "SmartMIPS"
2332 help
2333 SmartMIPS is a extension of the MIPS32 architecture aimed at
2334 increased security at both hardware and software level for
2335 smartcards. Enabling this option will allow proper use of the
2336 SmartMIPS instructions by Linux applications. However a kernel with
2337 this option will not work on a MIPS core without SmartMIPS core. If
2338 you don't know you probably don't have SmartMIPS and should say N
2339 here.
2340
2341config CPU_MICROMIPS
2342 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2343 bool "microMIPS"
2344 help
2345 When this option is enabled the kernel will be built using the
2346 microMIPS ISA
2347
2348endchoice
2349
2350config CPU_HAS_MSA
2351 bool "Support for the MIPS SIMD Architecture"
2352 depends on CPU_SUPPORTS_MSA
2353 depends on MIPS_FP_SUPPORT
2354 depends on 64BIT || MIPS_O32_FP64_SUPPORT
2355 help
2356 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2357 and a set of SIMD instructions to operate on them. When this option
2358 is enabled the kernel will support allocating & switching MSA
2359 vector register contexts. If you know that your kernel will only be
2360 running on CPUs which do not support MSA or that your userland will
2361 not be making use of it then you may wish to say N here to reduce
2362 the size & complexity of your kernel.
2363
2364 If unsure, say Y.
2365
2366config CPU_HAS_WB
2367 bool
2368
2369config XKS01
2370 bool
2371
2372config CPU_HAS_DIEI
2373 depends on !CPU_DIEI_BROKEN
2374 bool
2375
2376config CPU_DIEI_BROKEN
2377 bool
2378
2379config CPU_HAS_RIXI
2380 bool
2381
2382config CPU_NO_LOAD_STORE_LR
2383 bool
2384 help
2385 CPU lacks support for unaligned load and store instructions:
2386 LWL, LWR, SWL, SWR (Load/store word left/right).
2387 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2388 systems).
2389
2390#
2391# Vectored interrupt mode is an R2 feature
2392#
2393config CPU_MIPSR2_IRQ_VI
2394 bool
2395
2396#
2397# Extended interrupt mode is an R2 feature
2398#
2399config CPU_MIPSR2_IRQ_EI
2400 bool
2401
2402config CPU_HAS_SYNC
2403 bool
2404 depends on !CPU_R3000
2405 default y
2406
2407#
2408# CPU non-features
2409#
2410
2411# Work around the "daddi" and "daddiu" CPU errata:
2412#
2413# - The `daddi' instruction fails to trap on overflow.
2414# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2415# erratum #23
2416#
2417# - The `daddiu' instruction can produce an incorrect result.
2418# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2419# erratum #41
2420# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2421# #15
2422# "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2423# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2424config CPU_DADDI_WORKAROUNDS
2425 bool
2426
2427# Work around certain R4000 CPU errata (as implemented by GCC):
2428#
2429# - A double-word or a variable shift may give an incorrect result
2430# if executed immediately after starting an integer division:
2431# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2432# erratum #28
2433# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2434# #19
2435#
2436# - A double-word or a variable shift may give an incorrect result
2437# if executed while an integer multiplication is in progress:
2438# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2439# errata #16 & #28
2440#
2441# - An integer division may give an incorrect result if started in
2442# a delay slot of a taken branch or a jump:
2443# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2444# erratum #52
2445config CPU_R4000_WORKAROUNDS
2446 bool
2447 select CPU_R4400_WORKAROUNDS
2448
2449# Work around certain R4400 CPU errata (as implemented by GCC):
2450#
2451# - A double-word or a variable shift may give an incorrect result
2452# if executed immediately after starting an integer division:
2453# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2454# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2455config CPU_R4400_WORKAROUNDS
2456 bool
2457
2458config CPU_R4X00_BUGS64
2459 bool
2460 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2461
2462config MIPS_ASID_SHIFT
2463 int
2464 default 6 if CPU_R3000
2465 default 0
2466
2467config MIPS_ASID_BITS
2468 int
2469 default 0 if MIPS_ASID_BITS_VARIABLE
2470 default 6 if CPU_R3000
2471 default 8
2472
2473config MIPS_ASID_BITS_VARIABLE
2474 bool
2475
2476config MIPS_CRC_SUPPORT
2477 bool
2478
2479# R4600 erratum. Due to the lack of errata information the exact
2480# technical details aren't known. I've experimentally found that disabling
2481# interrupts during indexed I-cache flushes seems to be sufficient to deal
2482# with the issue.
2483config WAR_R4600_V1_INDEX_ICACHEOP
2484 bool
2485
2486# Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
2487#
2488# 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2489# Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2490# executed if there is no other dcache activity. If the dcache is
2491# accessed for another instruction immediately preceding when these
2492# cache instructions are executing, it is possible that the dcache
2493# tag match outputs used by these cache instructions will be
2494# incorrect. These cache instructions should be preceded by at least
2495# four instructions that are not any kind of load or store
2496# instruction.
2497#
2498# This is not allowed: lw
2499# nop
2500# nop
2501# nop
2502# cache Hit_Writeback_Invalidate_D
2503#
2504# This is allowed: lw
2505# nop
2506# nop
2507# nop
2508# nop
2509# cache Hit_Writeback_Invalidate_D
2510config WAR_R4600_V1_HIT_CACHEOP
2511 bool
2512
2513# Writeback and invalidate the primary cache dcache before DMA.
2514#
2515# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2516# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2517# operate correctly if the internal data cache refill buffer is empty. These
2518# CACHE instructions should be separated from any potential data cache miss
2519# by a load instruction to an uncached address to empty the response buffer."
2520# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2521# in .pdf format.)
2522config WAR_R4600_V2_HIT_CACHEOP
2523 bool
2524
2525# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2526# the line which this instruction itself exists, the following
2527# operation is not guaranteed."
2528#
2529# Workaround: do two phase flushing for Index_Invalidate_I
2530config WAR_TX49XX_ICACHE_INDEX_INV
2531 bool
2532
2533# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2534# opposes it being called that) where invalid instructions in the same
2535# I-cache line worth of instructions being fetched may case spurious
2536# exceptions.
2537config WAR_ICACHE_REFILLS
2538 bool
2539
2540# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2541# may cause ll / sc and lld / scd sequences to execute non-atomically.
2542config WAR_R10000_LLSC
2543 bool
2544
2545# 34K core erratum: "Problems Executing the TLBR Instruction"
2546config WAR_MIPS34K_MISSED_ITLB
2547 bool
2548
2549#
2550# - Highmem only makes sense for the 32-bit kernel.
2551# - The current highmem code will only work properly on physically indexed
2552# caches such as R3000, SB1, R7000 or those that look like they're virtually
2553# indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2554# moment we protect the user and offer the highmem option only on machines
2555# where it's known to be safe. This will not offer highmem on a few systems
2556# such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2557# indexed CPUs but we're playing safe.
2558# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2559# know they might have memory configurations that could make use of highmem
2560# support.
2561#
2562config HIGHMEM
2563 bool "High Memory Support"
2564 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2565 select KMAP_LOCAL
2566
2567config CPU_SUPPORTS_HIGHMEM
2568 bool
2569
2570config SYS_SUPPORTS_HIGHMEM
2571 bool
2572
2573config SYS_SUPPORTS_SMARTMIPS
2574 bool
2575
2576config SYS_SUPPORTS_MICROMIPS
2577 bool
2578
2579config SYS_SUPPORTS_MIPS16
2580 bool
2581 help
2582 This option must be set if a kernel might be executed on a MIPS16-
2583 enabled CPU even if MIPS16 is not actually being used. In other
2584 words, it makes the kernel MIPS16-tolerant.
2585
2586config CPU_SUPPORTS_MSA
2587 bool
2588
2589config ARCH_FLATMEM_ENABLE
2590 def_bool y
2591 depends on !NUMA && !CPU_LOONGSON2EF
2592
2593config ARCH_SPARSEMEM_ENABLE
2594 bool
2595
2596config NUMA
2597 bool "NUMA Support"
2598 depends on SYS_SUPPORTS_NUMA
2599 select SMP
2600 select HAVE_SETUP_PER_CPU_AREA
2601 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2602 help
2603 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2604 Access). This option improves performance on systems with more
2605 than two nodes; on two node systems it is generally better to
2606 leave it disabled; on single node systems leave this option
2607 disabled.
2608
2609config SYS_SUPPORTS_NUMA
2610 bool
2611
2612config HAVE_ARCH_NODEDATA_EXTENSION
2613 bool
2614
2615config RELOCATABLE
2616 bool "Relocatable kernel"
2617 depends on SYS_SUPPORTS_RELOCATABLE
2618 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2619 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2620 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2621 CPU_P5600 || CAVIUM_OCTEON_SOC || \
2622 CPU_LOONGSON64
2623 help
2624 This builds a kernel image that retains relocation information
2625 so it can be loaded someplace besides the default 1MB.
2626 The relocations make the kernel binary about 15% larger,
2627 but are discarded at runtime
2628
2629config RELOCATION_TABLE_SIZE
2630 hex "Relocation table size"
2631 depends on RELOCATABLE
2632 range 0x0 0x01000000
2633 default "0x00200000" if CPU_LOONGSON64
2634 default "0x00100000"
2635 help
2636 A table of relocation data will be appended to the kernel binary
2637 and parsed at boot to fix up the relocated kernel.
2638
2639 This option allows the amount of space reserved for the table to be
2640 adjusted, although the default of 1Mb should be ok in most cases.
2641
2642 The build will fail and a valid size suggested if this is too small.
2643
2644 If unsure, leave at the default value.
2645
2646config RANDOMIZE_BASE
2647 bool "Randomize the address of the kernel image"
2648 depends on RELOCATABLE
2649 help
2650 Randomizes the physical and virtual address at which the
2651 kernel image is loaded, as a security feature that
2652 deters exploit attempts relying on knowledge of the location
2653 of kernel internals.
2654
2655 Entropy is generated using any coprocessor 0 registers available.
2656
2657 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2658
2659 If unsure, say N.
2660
2661config RANDOMIZE_BASE_MAX_OFFSET
2662 hex "Maximum kASLR offset" if EXPERT
2663 depends on RANDOMIZE_BASE
2664 range 0x0 0x40000000 if EVA || 64BIT
2665 range 0x0 0x08000000
2666 default "0x01000000"
2667 help
2668 When kASLR is active, this provides the maximum offset that will
2669 be applied to the kernel image. It should be set according to the
2670 amount of physical RAM available in the target system minus
2671 PHYSICAL_START and must be a power of 2.
2672
2673 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2674 EVA or 64-bit. The default is 16Mb.
2675
2676config NODES_SHIFT
2677 int
2678 default "6"
2679 depends on NUMA
2680
2681config HW_PERF_EVENTS
2682 bool "Enable hardware performance counter support for perf events"
2683 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2684 default y
2685 help
2686 Enable hardware performance counter support for perf events. If
2687 disabled, perf events will use software events only.
2688
2689config DMI
2690 bool "Enable DMI scanning"
2691 depends on MACH_LOONGSON64
2692 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2693 default y
2694 help
2695 Enabled scanning of DMI to identify machine quirks. Say Y
2696 here unless you have verified that your setup is not
2697 affected by entries in the DMI blacklist. Required by PNP
2698 BIOS code.
2699
2700config SMP
2701 bool "Multi-Processing support"
2702 depends on SYS_SUPPORTS_SMP
2703 help
2704 This enables support for systems with more than one CPU. If you have
2705 a system with only one CPU, say N. If you have a system with more
2706 than one CPU, say Y.
2707
2708 If you say N here, the kernel will run on uni- and multiprocessor
2709 machines, but will use only one CPU of a multiprocessor machine. If
2710 you say Y here, the kernel will run on many, but not all,
2711 uniprocessor machines. On a uniprocessor machine, the kernel
2712 will run faster if you say N here.
2713
2714 People using multiprocessor machines who say Y here should also say
2715 Y to "Enhanced Real Time Clock Support", below.
2716
2717 See also the SMP-HOWTO available at
2718 <https://www.tldp.org/docs.html#howto>.
2719
2720 If you don't know what to do here, say N.
2721
2722config HOTPLUG_CPU
2723 bool "Support for hot-pluggable CPUs"
2724 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2725 help
2726 Say Y here to allow turning CPUs off and on. CPUs can be
2727 controlled through /sys/devices/system/cpu.
2728 (Note: power management support will enable this option
2729 automatically on SMP systems. )
2730 Say N if you want to disable CPU hotplug.
2731
2732config SMP_UP
2733 bool
2734
2735config SYS_SUPPORTS_MIPS_CPS
2736 bool
2737
2738config SYS_SUPPORTS_SMP
2739 bool
2740
2741config NR_CPUS_DEFAULT_4
2742 bool
2743
2744config NR_CPUS_DEFAULT_8
2745 bool
2746
2747config NR_CPUS_DEFAULT_16
2748 bool
2749
2750config NR_CPUS_DEFAULT_32
2751 bool
2752
2753config NR_CPUS_DEFAULT_64
2754 bool
2755
2756config NR_CPUS
2757 int "Maximum number of CPUs (2-256)"
2758 range 2 256
2759 depends on SMP
2760 default "4" if NR_CPUS_DEFAULT_4
2761 default "8" if NR_CPUS_DEFAULT_8
2762 default "16" if NR_CPUS_DEFAULT_16
2763 default "32" if NR_CPUS_DEFAULT_32
2764 default "64" if NR_CPUS_DEFAULT_64
2765 help
2766 This allows you to specify the maximum number of CPUs which this
2767 kernel will support. The maximum supported value is 32 for 32-bit
2768 kernel and 64 for 64-bit kernels; the minimum value which makes
2769 sense is 1 for Qemu (useful only for kernel debugging purposes)
2770 and 2 for all others.
2771
2772 This is purely to save memory - each supported CPU adds
2773 approximately eight kilobytes to the kernel image. For best
2774 performance should round up your number of processors to the next
2775 power of two.
2776
2777config MIPS_PERF_SHARED_TC_COUNTERS
2778 bool
2779
2780config MIPS_NR_CPU_NR_MAP_1024
2781 bool
2782
2783config MIPS_NR_CPU_NR_MAP
2784 int
2785 depends on SMP
2786 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2787 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2788
2789#
2790# Timer Interrupt Frequency Configuration
2791#
2792
2793choice
2794 prompt "Timer frequency"
2795 default HZ_250
2796 help
2797 Allows the configuration of the timer frequency.
2798
2799 config HZ_24
2800 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2801
2802 config HZ_48
2803 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2804
2805 config HZ_100
2806 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2807
2808 config HZ_128
2809 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2810
2811 config HZ_250
2812 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2813
2814 config HZ_256
2815 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2816
2817 config HZ_1000
2818 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2819
2820 config HZ_1024
2821 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2822
2823endchoice
2824
2825config SYS_SUPPORTS_24HZ
2826 bool
2827
2828config SYS_SUPPORTS_48HZ
2829 bool
2830
2831config SYS_SUPPORTS_100HZ
2832 bool
2833
2834config SYS_SUPPORTS_128HZ
2835 bool
2836
2837config SYS_SUPPORTS_250HZ
2838 bool
2839
2840config SYS_SUPPORTS_256HZ
2841 bool
2842
2843config SYS_SUPPORTS_1000HZ
2844 bool
2845
2846config SYS_SUPPORTS_1024HZ
2847 bool
2848
2849config SYS_SUPPORTS_ARBIT_HZ
2850 bool
2851 default y if !SYS_SUPPORTS_24HZ && \
2852 !SYS_SUPPORTS_48HZ && \
2853 !SYS_SUPPORTS_100HZ && \
2854 !SYS_SUPPORTS_128HZ && \
2855 !SYS_SUPPORTS_250HZ && \
2856 !SYS_SUPPORTS_256HZ && \
2857 !SYS_SUPPORTS_1000HZ && \
2858 !SYS_SUPPORTS_1024HZ
2859
2860config HZ
2861 int
2862 default 24 if HZ_24
2863 default 48 if HZ_48
2864 default 100 if HZ_100
2865 default 128 if HZ_128
2866 default 250 if HZ_250
2867 default 256 if HZ_256
2868 default 1000 if HZ_1000
2869 default 1024 if HZ_1024
2870
2871config SCHED_HRTICK
2872 def_bool HIGH_RES_TIMERS
2873
2874config ARCH_SUPPORTS_KEXEC
2875 def_bool y
2876
2877config ARCH_SUPPORTS_CRASH_DUMP
2878 def_bool y
2879
2880config PHYSICAL_START
2881 hex "Physical address where the kernel is loaded"
2882 default "0xffffffff84000000"
2883 depends on CRASH_DUMP
2884 help
2885 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2886 If you plan to use kernel for capturing the crash dump change
2887 this value to start of the reserved region (the "X" value as
2888 specified in the "crashkernel=YM@XM" command line boot parameter
2889 passed to the panic-ed kernel).
2890
2891config MIPS_O32_FP64_SUPPORT
2892 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2893 depends on 32BIT || MIPS32_O32
2894 help
2895 When this is enabled, the kernel will support use of 64-bit floating
2896 point registers with binaries using the O32 ABI along with the
2897 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2898 32-bit MIPS systems this support is at the cost of increasing the
2899 size and complexity of the compiled FPU emulator. Thus if you are
2900 running a MIPS32 system and know that none of your userland binaries
2901 will require 64-bit floating point, you may wish to reduce the size
2902 of your kernel & potentially improve FP emulation performance by
2903 saying N here.
2904
2905 Although binutils currently supports use of this flag the details
2906 concerning its effect upon the O32 ABI in userland are still being
2907 worked on. In order to avoid userland becoming dependent upon current
2908 behaviour before the details have been finalised, this option should
2909 be considered experimental and only enabled by those working upon
2910 said details.
2911
2912 If unsure, say N.
2913
2914config USE_OF
2915 bool
2916 select OF
2917 select OF_EARLY_FLATTREE
2918 select IRQ_DOMAIN
2919
2920config UHI_BOOT
2921 bool
2922
2923config BUILTIN_DTB
2924 bool
2925
2926choice
2927 prompt "Kernel appended dtb support" if USE_OF
2928 default MIPS_NO_APPENDED_DTB
2929
2930 config MIPS_NO_APPENDED_DTB
2931 bool "None"
2932 help
2933 Do not enable appended dtb support.
2934
2935 config MIPS_ELF_APPENDED_DTB
2936 bool "vmlinux"
2937 help
2938 With this option, the boot code will look for a device tree binary
2939 DTB) included in the vmlinux ELF section .appended_dtb. By default
2940 it is empty and the DTB can be appended using binutils command
2941 objcopy:
2942
2943 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2944
2945 This is meant as a backward compatibility convenience for those
2946 systems with a bootloader that can't be upgraded to accommodate
2947 the documented boot protocol using a device tree.
2948
2949 config MIPS_RAW_APPENDED_DTB
2950 bool "vmlinux.bin or vmlinuz.bin"
2951 help
2952 With this option, the boot code will look for a device tree binary
2953 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
2954 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2955
2956 This is meant as a backward compatibility convenience for those
2957 systems with a bootloader that can't be upgraded to accommodate
2958 the documented boot protocol using a device tree.
2959
2960 Beware that there is very little in terms of protection against
2961 this option being confused by leftover garbage in memory that might
2962 look like a DTB header after a reboot if no actual DTB is appended
2963 to vmlinux.bin. Do not leave this option active in a production kernel
2964 if you don't intend to always append a DTB.
2965endchoice
2966
2967choice
2968 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2969 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2970 !MACH_LOONGSON64 && !MIPS_MALTA && \
2971 !CAVIUM_OCTEON_SOC
2972 default MIPS_CMDLINE_FROM_BOOTLOADER
2973
2974 config MIPS_CMDLINE_FROM_DTB
2975 depends on USE_OF
2976 bool "Dtb kernel arguments if available"
2977
2978 config MIPS_CMDLINE_DTB_EXTEND
2979 depends on USE_OF
2980 bool "Extend dtb kernel arguments with bootloader arguments"
2981
2982 config MIPS_CMDLINE_FROM_BOOTLOADER
2983 bool "Bootloader kernel arguments if available"
2984
2985 config MIPS_CMDLINE_BUILTIN_EXTEND
2986 depends on CMDLINE_BOOL
2987 bool "Extend builtin kernel arguments with bootloader arguments"
2988endchoice
2989
2990endmenu
2991
2992config LOCKDEP_SUPPORT
2993 bool
2994 default y
2995
2996config STACKTRACE_SUPPORT
2997 bool
2998 default y
2999
3000config PGTABLE_LEVELS
3001 int
3002 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3003 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3004 default 2
3005
3006config MIPS_AUTO_PFN_OFFSET
3007 bool
3008
3009menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3010
3011config PCI_DRIVERS_GENERIC
3012 select PCI_DOMAINS_GENERIC if PCI
3013 bool
3014
3015config PCI_DRIVERS_LEGACY
3016 def_bool !PCI_DRIVERS_GENERIC
3017 select NO_GENERIC_PCI_IOPORT_MAP
3018 select PCI_DOMAINS if PCI
3019
3020#
3021# ISA support is now enabled via select. Too many systems still have the one
3022# or other ISA chip on the board that users don't know about so don't expect
3023# users to choose the right thing ...
3024#
3025config ISA
3026 bool
3027
3028config TC
3029 bool "TURBOchannel support"
3030 depends on MACH_DECSTATION
3031 help
3032 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3033 processors. TURBOchannel programming specifications are available
3034 at:
3035 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3036 and:
3037 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3038 Linux driver support status is documented at:
3039 <http://www.linux-mips.org/wiki/DECstation>
3040
3041config MMU
3042 bool
3043 default y
3044
3045config ARCH_MMAP_RND_BITS_MIN
3046 default 12 if 64BIT
3047 default 8
3048
3049config ARCH_MMAP_RND_BITS_MAX
3050 default 18 if 64BIT
3051 default 15
3052
3053config ARCH_MMAP_RND_COMPAT_BITS_MIN
3054 default 8
3055
3056config ARCH_MMAP_RND_COMPAT_BITS_MAX
3057 default 15
3058
3059config I8253
3060 bool
3061 select CLKSRC_I8253
3062 select CLKEVT_I8253
3063 select MIPS_EXTERNAL_TIMER
3064endmenu
3065
3066config TRAD_SIGNALS
3067 bool
3068
3069config MIPS32_COMPAT
3070 bool
3071
3072config COMPAT
3073 bool
3074
3075config MIPS32_O32
3076 bool "Kernel support for o32 binaries"
3077 depends on 64BIT
3078 select ARCH_WANT_OLD_COMPAT_IPC
3079 select COMPAT
3080 select MIPS32_COMPAT
3081 help
3082 Select this option if you want to run o32 binaries. These are pure
3083 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3084 existing binaries are in this format.
3085
3086 If unsure, say Y.
3087
3088config MIPS32_N32
3089 bool "Kernel support for n32 binaries"
3090 depends on 64BIT
3091 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3092 select COMPAT
3093 select MIPS32_COMPAT
3094 help
3095 Select this option if you want to run n32 binaries. These are
3096 64-bit binaries using 32-bit quantities for addressing and certain
3097 data that would normally be 64-bit. They are used in special
3098 cases.
3099
3100 If unsure, say N.
3101
3102config CC_HAS_MNO_BRANCH_LIKELY
3103 def_bool y
3104 depends on $(cc-option,-mno-branch-likely)
3105
3106# https://github.com/llvm/llvm-project/issues/61045
3107config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3108 def_bool y if CC_IS_CLANG
3109
3110menu "Power management options"
3111
3112config ARCH_HIBERNATION_POSSIBLE
3113 def_bool y
3114 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3115
3116config ARCH_SUSPEND_POSSIBLE
3117 def_bool y
3118 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3119
3120source "kernel/power/Kconfig"
3121
3122endmenu
3123
3124config MIPS_EXTERNAL_TIMER
3125 bool
3126
3127menu "CPU Power Management"
3128
3129if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3130source "drivers/cpufreq/Kconfig"
3131endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3132
3133source "drivers/cpuidle/Kconfig"
3134
3135endmenu
3136
3137source "arch/mips/kvm/Kconfig"
3138
3139source "arch/mips/vdso/Kconfig"