1/*
 
 2 * include/asm-sh/cpu-sh4/watchdog.h
 3 *
 4 * Copyright (C) 2002, 2003 Paul Mundt
 5 * Copyright (C) 2009 Siemens AG
 6 * Copyright (C) 2009 Sitdikov Valentin
 7 *
 8 * This file is subject to the terms and conditions of the GNU General Public
 9 * License.  See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#ifndef __ASM_CPU_SH4_WATCHDOG_H
13#define __ASM_CPU_SH4_WATCHDOG_H
14
15#if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780)
16/* Prefix definition */
17#define WTBST_HIGH	0x55
18/* Register definitions */
19#define WTCNT_R		0xffcc0010 /*WDTCNT*/
20#define WTCSR		0xffcc0004 /*WDTCSR*/
21#define WTCNT		0xffcc0000 /*WDTST*/
22#define WTST		WTCNT
23#define WTBST		0xffcc0008 /*WDTBST*/
24/* Register definitions */
25#elif	defined(CONFIG_CPU_SUBTYPE_SH7722) || \
26	defined(CONFIG_CPU_SUBTYPE_SH7723) || \
27	defined(CONFIG_CPU_SUBTYPE_SH7724)
28#define WTCNT		0xa4520000
29#define WTCSR		0xa4520004
30#else
31/* Register definitions */
32#define WTCNT		0xffc00008
33#define WTCSR		0xffc0000c
34#endif
35
36/* Bit definitions */
37#define WTCSR_TME	0x80
38#define WTCSR_WT	0x40
39#define WTCSR_RSTS	0x20
40#define WTCSR_WOVF	0x10
41#define WTCSR_IOVF	0x08
42
43#endif /* __ASM_CPU_SH4_WATCHDOG_H */
44

 1/* SPDX-License-Identifier: GPL-2.0
 2 *
 3 * include/asm-sh/cpu-sh4/watchdog.h
 4 *
 5 * Copyright (C) 2002, 2003 Paul Mundt
 6 * Copyright (C) 2009 Siemens AG
 7 * Copyright (C) 2009 Sitdikov Valentin
 
 
 
 
 8 */
 9#ifndef __ASM_CPU_SH4_WATCHDOG_H
10#define __ASM_CPU_SH4_WATCHDOG_H
11
12#if defined(CONFIG_CPU_SUBTYPE_SH7785) || defined(CONFIG_CPU_SUBTYPE_SH7780)
13/* Prefix definition */
14#define WTBST_HIGH	0x55
15/* Register definitions */
16#define WTCNT_R		0xffcc0010 /*WDTCNT*/
17#define WTCSR		0xffcc0004 /*WDTCSR*/
18#define WTCNT		0xffcc0000 /*WDTST*/
19#define WTST		WTCNT
20#define WTBST		0xffcc0008 /*WDTBST*/
21/* Register definitions */
22#elif	defined(CONFIG_CPU_SUBTYPE_SH7722) || \
23	defined(CONFIG_CPU_SUBTYPE_SH7723) || \
24	defined(CONFIG_CPU_SUBTYPE_SH7724)
25#define WTCNT		0xa4520000
26#define WTCSR		0xa4520004
27#else
28/* Register definitions */
29#define WTCNT		0xffc00008
30#define WTCSR		0xffc0000c
31#endif
32
33/* Bit definitions */
34#define WTCSR_TME	0x80
35#define WTCSR_WT	0x40
36#define WTCSR_RSTS	0x20
37#define WTCSR_WOVF	0x10
38#define WTCSR_IOVF	0x08
39
40#endif /* __ASM_CPU_SH4_WATCHDOG_H */
41