1# SPDX-License-Identifier: GPL-2.0-only
 2
 3if ARCH_APPLE || COMPILE_TEST
 4
 5menu "Apple SoC drivers"
 6
 7config APPLE_PMGR_PWRSTATE
 8	bool "Apple SoC PMGR power state control"
 9	depends on PM
10	select REGMAP
11	select MFD_SYSCON
12	select PM_GENERIC_DOMAINS
13	select RESET_CONTROLLER
14	default ARCH_APPLE
15	help
16	  The PMGR block in Apple SoCs provides high-level power state
17	  controls for SoC devices. This driver manages them through the
18	  generic power domain framework, and also provides reset support.
19
20config APPLE_RTKIT
21	tristate "Apple RTKit co-processor IPC protocol"
22	depends on MAILBOX
23	depends on ARCH_APPLE || COMPILE_TEST
24	default ARCH_APPLE
25	help
26	  Apple SoCs such as the M1 come with various co-processors running
27	  their proprietary RTKit operating system. This option enables support
28	  for the protocol library used to communicate with those. It is used
29	  by various client drivers.
30
31	  Say 'y' here if you have an Apple SoC.
32
33config APPLE_SART
34	tristate "Apple SART DMA address filter"
35	depends on ARCH_APPLE || COMPILE_TEST
36	default ARCH_APPLE
37	help
38	  Apple SART is a simple DMA address filter used on Apple SoCs such
39	  as the M1. It is usually required for the NVMe coprocessor which does
40	  not use a proper IOMMU.
41
42	  Say 'y' here if you have an Apple SoC.
43
44endmenu
45
46endif