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1/*
2 * SuperH On-Chip RTC Support
3 *
4 * Copyright (C) 2006 - 2009 Paul Mundt
5 * Copyright (C) 2006 Jamie Lenehan
6 * Copyright (C) 2008 Angelo Castello
7 *
8 * Based on the old arch/sh/kernel/cpu/rtc.c by:
9 *
10 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 */
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/bcd.h>
20#include <linux/rtc.h>
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/seq_file.h>
24#include <linux/interrupt.h>
25#include <linux/spinlock.h>
26#include <linux/io.h>
27#include <linux/log2.h>
28#include <linux/clk.h>
29#include <linux/slab.h>
30#include <asm/rtc.h>
31
32#define DRV_NAME "sh-rtc"
33#define DRV_VERSION "0.2.3"
34
35#define RTC_REG(r) ((r) * rtc_reg_size)
36
37#define R64CNT RTC_REG(0)
38
39#define RSECCNT RTC_REG(1) /* RTC sec */
40#define RMINCNT RTC_REG(2) /* RTC min */
41#define RHRCNT RTC_REG(3) /* RTC hour */
42#define RWKCNT RTC_REG(4) /* RTC week */
43#define RDAYCNT RTC_REG(5) /* RTC day */
44#define RMONCNT RTC_REG(6) /* RTC month */
45#define RYRCNT RTC_REG(7) /* RTC year */
46#define RSECAR RTC_REG(8) /* ALARM sec */
47#define RMINAR RTC_REG(9) /* ALARM min */
48#define RHRAR RTC_REG(10) /* ALARM hour */
49#define RWKAR RTC_REG(11) /* ALARM week */
50#define RDAYAR RTC_REG(12) /* ALARM day */
51#define RMONAR RTC_REG(13) /* ALARM month */
52#define RCR1 RTC_REG(14) /* Control */
53#define RCR2 RTC_REG(15) /* Control */
54
55/*
56 * Note on RYRAR and RCR3: Up until this point most of the register
57 * definitions are consistent across all of the available parts. However,
58 * the placement of the optional RYRAR and RCR3 (the RYRAR control
59 * register used to control RYRCNT/RYRAR compare) varies considerably
60 * across various parts, occasionally being mapped in to a completely
61 * unrelated address space. For proper RYRAR support a separate resource
62 * would have to be handed off, but as this is purely optional in
63 * practice, we simply opt not to support it, thereby keeping the code
64 * quite a bit more simplified.
65 */
66
67/* ALARM Bits - or with BCD encoded value */
68#define AR_ENB 0x80 /* Enable for alarm cmp */
69
70/* Period Bits */
71#define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
72#define PF_COUNT 0x200 /* Half periodic counter */
73#define PF_OXS 0x400 /* Periodic One x Second */
74#define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
75#define PF_MASK 0xf00
76
77/* RCR1 Bits */
78#define RCR1_CF 0x80 /* Carry Flag */
79#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
80#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
81#define RCR1_AF 0x01 /* Alarm Flag */
82
83/* RCR2 Bits */
84#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
85#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
86#define RCR2_RTCEN 0x08 /* ENable RTC */
87#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
88#define RCR2_RESET 0x02 /* Reset bit */
89#define RCR2_START 0x01 /* Start bit */
90
91struct sh_rtc {
92 void __iomem *regbase;
93 unsigned long regsize;
94 struct resource *res;
95 int alarm_irq;
96 int periodic_irq;
97 int carry_irq;
98 struct clk *clk;
99 struct rtc_device *rtc_dev;
100 spinlock_t lock;
101 unsigned long capabilities; /* See asm/rtc.h for cap bits */
102 unsigned short periodic_freq;
103};
104
105static int __sh_rtc_interrupt(struct sh_rtc *rtc)
106{
107 unsigned int tmp, pending;
108
109 tmp = readb(rtc->regbase + RCR1);
110 pending = tmp & RCR1_CF;
111 tmp &= ~RCR1_CF;
112 writeb(tmp, rtc->regbase + RCR1);
113
114 /* Users have requested One x Second IRQ */
115 if (pending && rtc->periodic_freq & PF_OXS)
116 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
117
118 return pending;
119}
120
121static int __sh_rtc_alarm(struct sh_rtc *rtc)
122{
123 unsigned int tmp, pending;
124
125 tmp = readb(rtc->regbase + RCR1);
126 pending = tmp & RCR1_AF;
127 tmp &= ~(RCR1_AF | RCR1_AIE);
128 writeb(tmp, rtc->regbase + RCR1);
129
130 if (pending)
131 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
132
133 return pending;
134}
135
136static int __sh_rtc_periodic(struct sh_rtc *rtc)
137{
138 struct rtc_device *rtc_dev = rtc->rtc_dev;
139 struct rtc_task *irq_task;
140 unsigned int tmp, pending;
141
142 tmp = readb(rtc->regbase + RCR2);
143 pending = tmp & RCR2_PEF;
144 tmp &= ~RCR2_PEF;
145 writeb(tmp, rtc->regbase + RCR2);
146
147 if (!pending)
148 return 0;
149
150 /* Half period enabled than one skipped and the next notified */
151 if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
152 rtc->periodic_freq &= ~PF_COUNT;
153 else {
154 if (rtc->periodic_freq & PF_HP)
155 rtc->periodic_freq |= PF_COUNT;
156 if (rtc->periodic_freq & PF_KOU) {
157 spin_lock(&rtc_dev->irq_task_lock);
158 irq_task = rtc_dev->irq_task;
159 if (irq_task)
160 irq_task->func(irq_task->private_data);
161 spin_unlock(&rtc_dev->irq_task_lock);
162 } else
163 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
164 }
165
166 return pending;
167}
168
169static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
170{
171 struct sh_rtc *rtc = dev_id;
172 int ret;
173
174 spin_lock(&rtc->lock);
175 ret = __sh_rtc_interrupt(rtc);
176 spin_unlock(&rtc->lock);
177
178 return IRQ_RETVAL(ret);
179}
180
181static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
182{
183 struct sh_rtc *rtc = dev_id;
184 int ret;
185
186 spin_lock(&rtc->lock);
187 ret = __sh_rtc_alarm(rtc);
188 spin_unlock(&rtc->lock);
189
190 return IRQ_RETVAL(ret);
191}
192
193static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
194{
195 struct sh_rtc *rtc = dev_id;
196 int ret;
197
198 spin_lock(&rtc->lock);
199 ret = __sh_rtc_periodic(rtc);
200 spin_unlock(&rtc->lock);
201
202 return IRQ_RETVAL(ret);
203}
204
205static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
206{
207 struct sh_rtc *rtc = dev_id;
208 int ret;
209
210 spin_lock(&rtc->lock);
211 ret = __sh_rtc_interrupt(rtc);
212 ret |= __sh_rtc_alarm(rtc);
213 ret |= __sh_rtc_periodic(rtc);
214 spin_unlock(&rtc->lock);
215
216 return IRQ_RETVAL(ret);
217}
218
219static int sh_rtc_irq_set_state(struct device *dev, int enable)
220{
221 struct sh_rtc *rtc = dev_get_drvdata(dev);
222 unsigned int tmp;
223
224 spin_lock_irq(&rtc->lock);
225
226 tmp = readb(rtc->regbase + RCR2);
227
228 if (enable) {
229 rtc->periodic_freq |= PF_KOU;
230 tmp &= ~RCR2_PEF; /* Clear PES bit */
231 tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
232 } else {
233 rtc->periodic_freq &= ~PF_KOU;
234 tmp &= ~(RCR2_PESMASK | RCR2_PEF);
235 }
236
237 writeb(tmp, rtc->regbase + RCR2);
238
239 spin_unlock_irq(&rtc->lock);
240
241 return 0;
242}
243
244static int sh_rtc_irq_set_freq(struct device *dev, int freq)
245{
246 struct sh_rtc *rtc = dev_get_drvdata(dev);
247 int tmp, ret = 0;
248
249 spin_lock_irq(&rtc->lock);
250 tmp = rtc->periodic_freq & PF_MASK;
251
252 switch (freq) {
253 case 0:
254 rtc->periodic_freq = 0x00;
255 break;
256 case 1:
257 rtc->periodic_freq = 0x60;
258 break;
259 case 2:
260 rtc->periodic_freq = 0x50;
261 break;
262 case 4:
263 rtc->periodic_freq = 0x40;
264 break;
265 case 8:
266 rtc->periodic_freq = 0x30 | PF_HP;
267 break;
268 case 16:
269 rtc->periodic_freq = 0x30;
270 break;
271 case 32:
272 rtc->periodic_freq = 0x20 | PF_HP;
273 break;
274 case 64:
275 rtc->periodic_freq = 0x20;
276 break;
277 case 128:
278 rtc->periodic_freq = 0x10 | PF_HP;
279 break;
280 case 256:
281 rtc->periodic_freq = 0x10;
282 break;
283 default:
284 ret = -ENOTSUPP;
285 }
286
287 if (ret == 0)
288 rtc->periodic_freq |= tmp;
289
290 spin_unlock_irq(&rtc->lock);
291 return ret;
292}
293
294static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
295{
296 struct sh_rtc *rtc = dev_get_drvdata(dev);
297 unsigned int tmp;
298
299 spin_lock_irq(&rtc->lock);
300
301 tmp = readb(rtc->regbase + RCR1);
302
303 if (enable)
304 tmp |= RCR1_AIE;
305 else
306 tmp &= ~RCR1_AIE;
307
308 writeb(tmp, rtc->regbase + RCR1);
309
310 spin_unlock_irq(&rtc->lock);
311}
312
313static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
314{
315 struct sh_rtc *rtc = dev_get_drvdata(dev);
316 unsigned int tmp;
317
318 tmp = readb(rtc->regbase + RCR1);
319 seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
320
321 tmp = readb(rtc->regbase + RCR2);
322 seq_printf(seq, "periodic_IRQ\t: %s\n",
323 (tmp & RCR2_PESMASK) ? "yes" : "no");
324
325 return 0;
326}
327
328static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
329{
330 struct sh_rtc *rtc = dev_get_drvdata(dev);
331 unsigned int tmp;
332
333 spin_lock_irq(&rtc->lock);
334
335 tmp = readb(rtc->regbase + RCR1);
336
337 if (!enable)
338 tmp &= ~RCR1_CIE;
339 else
340 tmp |= RCR1_CIE;
341
342 writeb(tmp, rtc->regbase + RCR1);
343
344 spin_unlock_irq(&rtc->lock);
345}
346
347static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
348{
349 sh_rtc_setaie(dev, enabled);
350 return 0;
351}
352
353static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
354{
355 struct platform_device *pdev = to_platform_device(dev);
356 struct sh_rtc *rtc = platform_get_drvdata(pdev);
357 unsigned int sec128, sec2, yr, yr100, cf_bit;
358
359 do {
360 unsigned int tmp;
361
362 spin_lock_irq(&rtc->lock);
363
364 tmp = readb(rtc->regbase + RCR1);
365 tmp &= ~RCR1_CF; /* Clear CF-bit */
366 tmp |= RCR1_CIE;
367 writeb(tmp, rtc->regbase + RCR1);
368
369 sec128 = readb(rtc->regbase + R64CNT);
370
371 tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
372 tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
373 tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
374 tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
375 tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
376 tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
377
378 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
379 yr = readw(rtc->regbase + RYRCNT);
380 yr100 = bcd2bin(yr >> 8);
381 yr &= 0xff;
382 } else {
383 yr = readb(rtc->regbase + RYRCNT);
384 yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
385 }
386
387 tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
388
389 sec2 = readb(rtc->regbase + R64CNT);
390 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
391
392 spin_unlock_irq(&rtc->lock);
393 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
394
395#if RTC_BIT_INVERTED != 0
396 if ((sec128 & RTC_BIT_INVERTED))
397 tm->tm_sec--;
398#endif
399
400 /* only keep the carry interrupt enabled if UIE is on */
401 if (!(rtc->periodic_freq & PF_OXS))
402 sh_rtc_setcie(dev, 0);
403
404 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
405 "mday=%d, mon=%d, year=%d, wday=%d\n",
406 __func__,
407 tm->tm_sec, tm->tm_min, tm->tm_hour,
408 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
409
410 return rtc_valid_tm(tm);
411}
412
413static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
414{
415 struct platform_device *pdev = to_platform_device(dev);
416 struct sh_rtc *rtc = platform_get_drvdata(pdev);
417 unsigned int tmp;
418 int year;
419
420 spin_lock_irq(&rtc->lock);
421
422 /* Reset pre-scaler & stop RTC */
423 tmp = readb(rtc->regbase + RCR2);
424 tmp |= RCR2_RESET;
425 tmp &= ~RCR2_START;
426 writeb(tmp, rtc->regbase + RCR2);
427
428 writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
429 writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
430 writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
431 writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
432 writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
433 writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
434
435 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
436 year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
437 bin2bcd(tm->tm_year % 100);
438 writew(year, rtc->regbase + RYRCNT);
439 } else {
440 year = tm->tm_year % 100;
441 writeb(bin2bcd(year), rtc->regbase + RYRCNT);
442 }
443
444 /* Start RTC */
445 tmp = readb(rtc->regbase + RCR2);
446 tmp &= ~RCR2_RESET;
447 tmp |= RCR2_RTCEN | RCR2_START;
448 writeb(tmp, rtc->regbase + RCR2);
449
450 spin_unlock_irq(&rtc->lock);
451
452 return 0;
453}
454
455static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
456{
457 unsigned int byte;
458 int value = 0xff; /* return 0xff for ignored values */
459
460 byte = readb(rtc->regbase + reg_off);
461 if (byte & AR_ENB) {
462 byte &= ~AR_ENB; /* strip the enable bit */
463 value = bcd2bin(byte);
464 }
465
466 return value;
467}
468
469static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
470{
471 struct platform_device *pdev = to_platform_device(dev);
472 struct sh_rtc *rtc = platform_get_drvdata(pdev);
473 struct rtc_time *tm = &wkalrm->time;
474
475 spin_lock_irq(&rtc->lock);
476
477 tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
478 tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
479 tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
480 tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
481 tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
482 tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
483 if (tm->tm_mon > 0)
484 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
485 tm->tm_year = 0xffff;
486
487 wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
488
489 spin_unlock_irq(&rtc->lock);
490
491 return 0;
492}
493
494static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
495 int value, int reg_off)
496{
497 /* < 0 for a value that is ignored */
498 if (value < 0)
499 writeb(0, rtc->regbase + reg_off);
500 else
501 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
502}
503
504static int sh_rtc_check_alarm(struct rtc_time *tm)
505{
506 /*
507 * The original rtc says anything > 0xc0 is "don't care" or "match
508 * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
509 * The original rtc doesn't support years - some things use -1 and
510 * some 0xffff. We use -1 to make out tests easier.
511 */
512 if (tm->tm_year == 0xffff)
513 tm->tm_year = -1;
514 if (tm->tm_mon >= 0xff)
515 tm->tm_mon = -1;
516 if (tm->tm_mday >= 0xff)
517 tm->tm_mday = -1;
518 if (tm->tm_wday >= 0xff)
519 tm->tm_wday = -1;
520 if (tm->tm_hour >= 0xff)
521 tm->tm_hour = -1;
522 if (tm->tm_min >= 0xff)
523 tm->tm_min = -1;
524 if (tm->tm_sec >= 0xff)
525 tm->tm_sec = -1;
526
527 if (tm->tm_year > 9999 ||
528 tm->tm_mon >= 12 ||
529 tm->tm_mday == 0 || tm->tm_mday >= 32 ||
530 tm->tm_wday >= 7 ||
531 tm->tm_hour >= 24 ||
532 tm->tm_min >= 60 ||
533 tm->tm_sec >= 60)
534 return -EINVAL;
535
536 return 0;
537}
538
539static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
540{
541 struct platform_device *pdev = to_platform_device(dev);
542 struct sh_rtc *rtc = platform_get_drvdata(pdev);
543 unsigned int rcr1;
544 struct rtc_time *tm = &wkalrm->time;
545 int mon, err;
546
547 err = sh_rtc_check_alarm(tm);
548 if (unlikely(err < 0))
549 return err;
550
551 spin_lock_irq(&rtc->lock);
552
553 /* disable alarm interrupt and clear the alarm flag */
554 rcr1 = readb(rtc->regbase + RCR1);
555 rcr1 &= ~(RCR1_AF | RCR1_AIE);
556 writeb(rcr1, rtc->regbase + RCR1);
557
558 /* set alarm time */
559 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
560 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
561 sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
562 sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
563 sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
564 mon = tm->tm_mon;
565 if (mon >= 0)
566 mon += 1;
567 sh_rtc_write_alarm_value(rtc, mon, RMONAR);
568
569 if (wkalrm->enabled) {
570 rcr1 |= RCR1_AIE;
571 writeb(rcr1, rtc->regbase + RCR1);
572 }
573
574 spin_unlock_irq(&rtc->lock);
575
576 return 0;
577}
578
579static struct rtc_class_ops sh_rtc_ops = {
580 .read_time = sh_rtc_read_time,
581 .set_time = sh_rtc_set_time,
582 .read_alarm = sh_rtc_read_alarm,
583 .set_alarm = sh_rtc_set_alarm,
584 .proc = sh_rtc_proc,
585 .alarm_irq_enable = sh_rtc_alarm_irq_enable,
586};
587
588static int __init sh_rtc_probe(struct platform_device *pdev)
589{
590 struct sh_rtc *rtc;
591 struct resource *res;
592 struct rtc_time r;
593 char clk_name[6];
594 int clk_id, ret;
595
596 rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
597 if (unlikely(!rtc))
598 return -ENOMEM;
599
600 spin_lock_init(&rtc->lock);
601
602 /* get periodic/carry/alarm irqs */
603 ret = platform_get_irq(pdev, 0);
604 if (unlikely(ret <= 0)) {
605 ret = -ENOENT;
606 dev_err(&pdev->dev, "No IRQ resource\n");
607 goto err_badres;
608 }
609
610 rtc->periodic_irq = ret;
611 rtc->carry_irq = platform_get_irq(pdev, 1);
612 rtc->alarm_irq = platform_get_irq(pdev, 2);
613
614 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
615 if (unlikely(res == NULL)) {
616 ret = -ENOENT;
617 dev_err(&pdev->dev, "No IO resource\n");
618 goto err_badres;
619 }
620
621 rtc->regsize = resource_size(res);
622
623 rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
624 if (unlikely(!rtc->res)) {
625 ret = -EBUSY;
626 goto err_badres;
627 }
628
629 rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
630 if (unlikely(!rtc->regbase)) {
631 ret = -EINVAL;
632 goto err_badmap;
633 }
634
635 clk_id = pdev->id;
636 /* With a single device, the clock id is still "rtc0" */
637 if (clk_id < 0)
638 clk_id = 0;
639
640 snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
641
642 rtc->clk = clk_get(&pdev->dev, clk_name);
643 if (IS_ERR(rtc->clk)) {
644 /*
645 * No error handling for rtc->clk intentionally, not all
646 * platforms will have a unique clock for the RTC, and
647 * the clk API can handle the struct clk pointer being
648 * NULL.
649 */
650 rtc->clk = NULL;
651 }
652
653 clk_enable(rtc->clk);
654
655 rtc->capabilities = RTC_DEF_CAPABILITIES;
656 if (pdev->dev.platform_data) {
657 struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
658
659 /*
660 * Some CPUs have special capabilities in addition to the
661 * default set. Add those in here.
662 */
663 rtc->capabilities |= pinfo->capabilities;
664 }
665
666 if (rtc->carry_irq <= 0) {
667 /* register shared periodic/carry/alarm irq */
668 ret = request_irq(rtc->periodic_irq, sh_rtc_shared,
669 0, "sh-rtc", rtc);
670 if (unlikely(ret)) {
671 dev_err(&pdev->dev,
672 "request IRQ failed with %d, IRQ %d\n", ret,
673 rtc->periodic_irq);
674 goto err_unmap;
675 }
676 } else {
677 /* register periodic/carry/alarm irqs */
678 ret = request_irq(rtc->periodic_irq, sh_rtc_periodic,
679 0, "sh-rtc period", rtc);
680 if (unlikely(ret)) {
681 dev_err(&pdev->dev,
682 "request period IRQ failed with %d, IRQ %d\n",
683 ret, rtc->periodic_irq);
684 goto err_unmap;
685 }
686
687 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt,
688 0, "sh-rtc carry", rtc);
689 if (unlikely(ret)) {
690 dev_err(&pdev->dev,
691 "request carry IRQ failed with %d, IRQ %d\n",
692 ret, rtc->carry_irq);
693 free_irq(rtc->periodic_irq, rtc);
694 goto err_unmap;
695 }
696
697 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm,
698 0, "sh-rtc alarm", rtc);
699 if (unlikely(ret)) {
700 dev_err(&pdev->dev,
701 "request alarm IRQ failed with %d, IRQ %d\n",
702 ret, rtc->alarm_irq);
703 free_irq(rtc->carry_irq, rtc);
704 free_irq(rtc->periodic_irq, rtc);
705 goto err_unmap;
706 }
707 }
708
709 platform_set_drvdata(pdev, rtc);
710
711 /* everything disabled by default */
712 sh_rtc_irq_set_freq(&pdev->dev, 0);
713 sh_rtc_irq_set_state(&pdev->dev, 0);
714 sh_rtc_setaie(&pdev->dev, 0);
715 sh_rtc_setcie(&pdev->dev, 0);
716
717 rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
718 &sh_rtc_ops, THIS_MODULE);
719 if (IS_ERR(rtc->rtc_dev)) {
720 ret = PTR_ERR(rtc->rtc_dev);
721 free_irq(rtc->periodic_irq, rtc);
722 free_irq(rtc->carry_irq, rtc);
723 free_irq(rtc->alarm_irq, rtc);
724 goto err_unmap;
725 }
726
727 rtc->rtc_dev->max_user_freq = 256;
728
729 /* reset rtc to epoch 0 if time is invalid */
730 if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
731 rtc_time_to_tm(0, &r);
732 rtc_set_time(rtc->rtc_dev, &r);
733 }
734
735 device_init_wakeup(&pdev->dev, 1);
736 return 0;
737
738err_unmap:
739 clk_disable(rtc->clk);
740 clk_put(rtc->clk);
741 iounmap(rtc->regbase);
742err_badmap:
743 release_mem_region(rtc->res->start, rtc->regsize);
744err_badres:
745 kfree(rtc);
746
747 return ret;
748}
749
750static int __exit sh_rtc_remove(struct platform_device *pdev)
751{
752 struct sh_rtc *rtc = platform_get_drvdata(pdev);
753
754 rtc_device_unregister(rtc->rtc_dev);
755 sh_rtc_irq_set_state(&pdev->dev, 0);
756
757 sh_rtc_setaie(&pdev->dev, 0);
758 sh_rtc_setcie(&pdev->dev, 0);
759
760 free_irq(rtc->periodic_irq, rtc);
761
762 if (rtc->carry_irq > 0) {
763 free_irq(rtc->carry_irq, rtc);
764 free_irq(rtc->alarm_irq, rtc);
765 }
766
767 iounmap(rtc->regbase);
768 release_mem_region(rtc->res->start, rtc->regsize);
769
770 clk_disable(rtc->clk);
771 clk_put(rtc->clk);
772
773 platform_set_drvdata(pdev, NULL);
774
775 kfree(rtc);
776
777 return 0;
778}
779
780static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
781{
782 struct platform_device *pdev = to_platform_device(dev);
783 struct sh_rtc *rtc = platform_get_drvdata(pdev);
784
785 irq_set_irq_wake(rtc->periodic_irq, enabled);
786
787 if (rtc->carry_irq > 0) {
788 irq_set_irq_wake(rtc->carry_irq, enabled);
789 irq_set_irq_wake(rtc->alarm_irq, enabled);
790 }
791}
792
793static int sh_rtc_suspend(struct device *dev)
794{
795 if (device_may_wakeup(dev))
796 sh_rtc_set_irq_wake(dev, 1);
797
798 return 0;
799}
800
801static int sh_rtc_resume(struct device *dev)
802{
803 if (device_may_wakeup(dev))
804 sh_rtc_set_irq_wake(dev, 0);
805
806 return 0;
807}
808
809static const struct dev_pm_ops sh_rtc_dev_pm_ops = {
810 .suspend = sh_rtc_suspend,
811 .resume = sh_rtc_resume,
812};
813
814static struct platform_driver sh_rtc_platform_driver = {
815 .driver = {
816 .name = DRV_NAME,
817 .owner = THIS_MODULE,
818 .pm = &sh_rtc_dev_pm_ops,
819 },
820 .remove = __exit_p(sh_rtc_remove),
821};
822
823static int __init sh_rtc_init(void)
824{
825 return platform_driver_probe(&sh_rtc_platform_driver, sh_rtc_probe);
826}
827
828static void __exit sh_rtc_exit(void)
829{
830 platform_driver_unregister(&sh_rtc_platform_driver);
831}
832
833module_init(sh_rtc_init);
834module_exit(sh_rtc_exit);
835
836MODULE_DESCRIPTION("SuperH on-chip RTC driver");
837MODULE_VERSION(DRV_VERSION);
838MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
839 "Jamie Lenehan <lenehan@twibble.org>, "
840 "Angelo Castello <angelo.castello@st.com>");
841MODULE_LICENSE("GPL");
842MODULE_ALIAS("platform:" DRV_NAME);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SuperH On-Chip RTC Support
4 *
5 * Copyright (C) 2006 - 2009 Paul Mundt
6 * Copyright (C) 2006 Jamie Lenehan
7 * Copyright (C) 2008 Angelo Castello
8 *
9 * Based on the old arch/sh/kernel/cpu/rtc.c by:
10 *
11 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
12 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
13 */
14#include <linux/module.h>
15#include <linux/mod_devicetable.h>
16#include <linux/kernel.h>
17#include <linux/bcd.h>
18#include <linux/rtc.h>
19#include <linux/init.h>
20#include <linux/platform_device.h>
21#include <linux/seq_file.h>
22#include <linux/interrupt.h>
23#include <linux/spinlock.h>
24#include <linux/io.h>
25#include <linux/log2.h>
26#include <linux/clk.h>
27#include <linux/slab.h>
28#ifdef CONFIG_SUPERH
29#include <asm/rtc.h>
30#else
31/* Default values for RZ/A RTC */
32#define rtc_reg_size sizeof(u16)
33#define RTC_BIT_INVERTED 0 /* no chip bugs */
34#define RTC_CAP_4_DIGIT_YEAR (1 << 0)
35#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
36#endif
37
38#define DRV_NAME "sh-rtc"
39
40#define RTC_REG(r) ((r) * rtc_reg_size)
41
42#define R64CNT RTC_REG(0)
43
44#define RSECCNT RTC_REG(1) /* RTC sec */
45#define RMINCNT RTC_REG(2) /* RTC min */
46#define RHRCNT RTC_REG(3) /* RTC hour */
47#define RWKCNT RTC_REG(4) /* RTC week */
48#define RDAYCNT RTC_REG(5) /* RTC day */
49#define RMONCNT RTC_REG(6) /* RTC month */
50#define RYRCNT RTC_REG(7) /* RTC year */
51#define RSECAR RTC_REG(8) /* ALARM sec */
52#define RMINAR RTC_REG(9) /* ALARM min */
53#define RHRAR RTC_REG(10) /* ALARM hour */
54#define RWKAR RTC_REG(11) /* ALARM week */
55#define RDAYAR RTC_REG(12) /* ALARM day */
56#define RMONAR RTC_REG(13) /* ALARM month */
57#define RCR1 RTC_REG(14) /* Control */
58#define RCR2 RTC_REG(15) /* Control */
59
60/*
61 * Note on RYRAR and RCR3: Up until this point most of the register
62 * definitions are consistent across all of the available parts. However,
63 * the placement of the optional RYRAR and RCR3 (the RYRAR control
64 * register used to control RYRCNT/RYRAR compare) varies considerably
65 * across various parts, occasionally being mapped in to a completely
66 * unrelated address space. For proper RYRAR support a separate resource
67 * would have to be handed off, but as this is purely optional in
68 * practice, we simply opt not to support it, thereby keeping the code
69 * quite a bit more simplified.
70 */
71
72/* ALARM Bits - or with BCD encoded value */
73#define AR_ENB 0x80 /* Enable for alarm cmp */
74
75/* Period Bits */
76#define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
77#define PF_COUNT 0x200 /* Half periodic counter */
78#define PF_OXS 0x400 /* Periodic One x Second */
79#define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
80#define PF_MASK 0xf00
81
82/* RCR1 Bits */
83#define RCR1_CF 0x80 /* Carry Flag */
84#define RCR1_CIE 0x10 /* Carry Interrupt Enable */
85#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
86#define RCR1_AF 0x01 /* Alarm Flag */
87
88/* RCR2 Bits */
89#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
90#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
91#define RCR2_RTCEN 0x08 /* ENable RTC */
92#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
93#define RCR2_RESET 0x02 /* Reset bit */
94#define RCR2_START 0x01 /* Start bit */
95
96struct sh_rtc {
97 void __iomem *regbase;
98 unsigned long regsize;
99 struct resource *res;
100 int alarm_irq;
101 int periodic_irq;
102 int carry_irq;
103 struct clk *clk;
104 struct rtc_device *rtc_dev;
105 spinlock_t lock;
106 unsigned long capabilities; /* See asm/rtc.h for cap bits */
107 unsigned short periodic_freq;
108};
109
110static int __sh_rtc_interrupt(struct sh_rtc *rtc)
111{
112 unsigned int tmp, pending;
113
114 tmp = readb(rtc->regbase + RCR1);
115 pending = tmp & RCR1_CF;
116 tmp &= ~RCR1_CF;
117 writeb(tmp, rtc->regbase + RCR1);
118
119 /* Users have requested One x Second IRQ */
120 if (pending && rtc->periodic_freq & PF_OXS)
121 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
122
123 return pending;
124}
125
126static int __sh_rtc_alarm(struct sh_rtc *rtc)
127{
128 unsigned int tmp, pending;
129
130 tmp = readb(rtc->regbase + RCR1);
131 pending = tmp & RCR1_AF;
132 tmp &= ~(RCR1_AF | RCR1_AIE);
133 writeb(tmp, rtc->regbase + RCR1);
134
135 if (pending)
136 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
137
138 return pending;
139}
140
141static int __sh_rtc_periodic(struct sh_rtc *rtc)
142{
143 unsigned int tmp, pending;
144
145 tmp = readb(rtc->regbase + RCR2);
146 pending = tmp & RCR2_PEF;
147 tmp &= ~RCR2_PEF;
148 writeb(tmp, rtc->regbase + RCR2);
149
150 if (!pending)
151 return 0;
152
153 /* Half period enabled than one skipped and the next notified */
154 if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
155 rtc->periodic_freq &= ~PF_COUNT;
156 else {
157 if (rtc->periodic_freq & PF_HP)
158 rtc->periodic_freq |= PF_COUNT;
159 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
160 }
161
162 return pending;
163}
164
165static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
166{
167 struct sh_rtc *rtc = dev_id;
168 int ret;
169
170 spin_lock(&rtc->lock);
171 ret = __sh_rtc_interrupt(rtc);
172 spin_unlock(&rtc->lock);
173
174 return IRQ_RETVAL(ret);
175}
176
177static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
178{
179 struct sh_rtc *rtc = dev_id;
180 int ret;
181
182 spin_lock(&rtc->lock);
183 ret = __sh_rtc_alarm(rtc);
184 spin_unlock(&rtc->lock);
185
186 return IRQ_RETVAL(ret);
187}
188
189static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
190{
191 struct sh_rtc *rtc = dev_id;
192 int ret;
193
194 spin_lock(&rtc->lock);
195 ret = __sh_rtc_periodic(rtc);
196 spin_unlock(&rtc->lock);
197
198 return IRQ_RETVAL(ret);
199}
200
201static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
202{
203 struct sh_rtc *rtc = dev_id;
204 int ret;
205
206 spin_lock(&rtc->lock);
207 ret = __sh_rtc_interrupt(rtc);
208 ret |= __sh_rtc_alarm(rtc);
209 ret |= __sh_rtc_periodic(rtc);
210 spin_unlock(&rtc->lock);
211
212 return IRQ_RETVAL(ret);
213}
214
215static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
216{
217 struct sh_rtc *rtc = dev_get_drvdata(dev);
218 unsigned int tmp;
219
220 spin_lock_irq(&rtc->lock);
221
222 tmp = readb(rtc->regbase + RCR1);
223
224 if (enable)
225 tmp |= RCR1_AIE;
226 else
227 tmp &= ~RCR1_AIE;
228
229 writeb(tmp, rtc->regbase + RCR1);
230
231 spin_unlock_irq(&rtc->lock);
232}
233
234static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
235{
236 struct sh_rtc *rtc = dev_get_drvdata(dev);
237 unsigned int tmp;
238
239 tmp = readb(rtc->regbase + RCR1);
240 seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
241
242 tmp = readb(rtc->regbase + RCR2);
243 seq_printf(seq, "periodic_IRQ\t: %s\n",
244 (tmp & RCR2_PESMASK) ? "yes" : "no");
245
246 return 0;
247}
248
249static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
250{
251 struct sh_rtc *rtc = dev_get_drvdata(dev);
252 unsigned int tmp;
253
254 spin_lock_irq(&rtc->lock);
255
256 tmp = readb(rtc->regbase + RCR1);
257
258 if (!enable)
259 tmp &= ~RCR1_CIE;
260 else
261 tmp |= RCR1_CIE;
262
263 writeb(tmp, rtc->regbase + RCR1);
264
265 spin_unlock_irq(&rtc->lock);
266}
267
268static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
269{
270 sh_rtc_setaie(dev, enabled);
271 return 0;
272}
273
274static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
275{
276 struct sh_rtc *rtc = dev_get_drvdata(dev);
277 unsigned int sec128, sec2, yr, yr100, cf_bit;
278
279 if (!(readb(rtc->regbase + RCR2) & RCR2_RTCEN))
280 return -EINVAL;
281
282 do {
283 unsigned int tmp;
284
285 spin_lock_irq(&rtc->lock);
286
287 tmp = readb(rtc->regbase + RCR1);
288 tmp &= ~RCR1_CF; /* Clear CF-bit */
289 tmp |= RCR1_CIE;
290 writeb(tmp, rtc->regbase + RCR1);
291
292 sec128 = readb(rtc->regbase + R64CNT);
293
294 tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
295 tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
296 tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
297 tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
298 tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
299 tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
300
301 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
302 yr = readw(rtc->regbase + RYRCNT);
303 yr100 = bcd2bin(yr >> 8);
304 yr &= 0xff;
305 } else {
306 yr = readb(rtc->regbase + RYRCNT);
307 yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
308 }
309
310 tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
311
312 sec2 = readb(rtc->regbase + R64CNT);
313 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
314
315 spin_unlock_irq(&rtc->lock);
316 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
317
318#if RTC_BIT_INVERTED != 0
319 if ((sec128 & RTC_BIT_INVERTED))
320 tm->tm_sec--;
321#endif
322
323 /* only keep the carry interrupt enabled if UIE is on */
324 if (!(rtc->periodic_freq & PF_OXS))
325 sh_rtc_setcie(dev, 0);
326
327 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
328 "mday=%d, mon=%d, year=%d, wday=%d\n",
329 __func__,
330 tm->tm_sec, tm->tm_min, tm->tm_hour,
331 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
332
333 return 0;
334}
335
336static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
337{
338 struct sh_rtc *rtc = dev_get_drvdata(dev);
339 unsigned int tmp;
340 int year;
341
342 spin_lock_irq(&rtc->lock);
343
344 /* Reset pre-scaler & stop RTC */
345 tmp = readb(rtc->regbase + RCR2);
346 tmp |= RCR2_RESET;
347 tmp &= ~RCR2_START;
348 writeb(tmp, rtc->regbase + RCR2);
349
350 writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
351 writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
352 writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
353 writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
354 writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
355 writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
356
357 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
358 year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
359 bin2bcd(tm->tm_year % 100);
360 writew(year, rtc->regbase + RYRCNT);
361 } else {
362 year = tm->tm_year % 100;
363 writeb(bin2bcd(year), rtc->regbase + RYRCNT);
364 }
365
366 /* Start RTC */
367 tmp = readb(rtc->regbase + RCR2);
368 tmp &= ~RCR2_RESET;
369 tmp |= RCR2_RTCEN | RCR2_START;
370 writeb(tmp, rtc->regbase + RCR2);
371
372 spin_unlock_irq(&rtc->lock);
373
374 return 0;
375}
376
377static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
378{
379 unsigned int byte;
380 int value = -1; /* return -1 for ignored values */
381
382 byte = readb(rtc->regbase + reg_off);
383 if (byte & AR_ENB) {
384 byte &= ~AR_ENB; /* strip the enable bit */
385 value = bcd2bin(byte);
386 }
387
388 return value;
389}
390
391static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
392{
393 struct sh_rtc *rtc = dev_get_drvdata(dev);
394 struct rtc_time *tm = &wkalrm->time;
395
396 spin_lock_irq(&rtc->lock);
397
398 tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
399 tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
400 tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
401 tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
402 tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
403 tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
404 if (tm->tm_mon > 0)
405 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
406
407 wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
408
409 spin_unlock_irq(&rtc->lock);
410
411 return 0;
412}
413
414static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
415 int value, int reg_off)
416{
417 /* < 0 for a value that is ignored */
418 if (value < 0)
419 writeb(0, rtc->regbase + reg_off);
420 else
421 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
422}
423
424static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
425{
426 struct sh_rtc *rtc = dev_get_drvdata(dev);
427 unsigned int rcr1;
428 struct rtc_time *tm = &wkalrm->time;
429 int mon;
430
431 spin_lock_irq(&rtc->lock);
432
433 /* disable alarm interrupt and clear the alarm flag */
434 rcr1 = readb(rtc->regbase + RCR1);
435 rcr1 &= ~(RCR1_AF | RCR1_AIE);
436 writeb(rcr1, rtc->regbase + RCR1);
437
438 /* set alarm time */
439 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
440 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
441 sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
442 sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
443 sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
444 mon = tm->tm_mon;
445 if (mon >= 0)
446 mon += 1;
447 sh_rtc_write_alarm_value(rtc, mon, RMONAR);
448
449 if (wkalrm->enabled) {
450 rcr1 |= RCR1_AIE;
451 writeb(rcr1, rtc->regbase + RCR1);
452 }
453
454 spin_unlock_irq(&rtc->lock);
455
456 return 0;
457}
458
459static const struct rtc_class_ops sh_rtc_ops = {
460 .read_time = sh_rtc_read_time,
461 .set_time = sh_rtc_set_time,
462 .read_alarm = sh_rtc_read_alarm,
463 .set_alarm = sh_rtc_set_alarm,
464 .proc = sh_rtc_proc,
465 .alarm_irq_enable = sh_rtc_alarm_irq_enable,
466};
467
468static int __init sh_rtc_probe(struct platform_device *pdev)
469{
470 struct sh_rtc *rtc;
471 struct resource *res;
472 char clk_name[6];
473 int clk_id, ret;
474
475 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
476 if (unlikely(!rtc))
477 return -ENOMEM;
478
479 spin_lock_init(&rtc->lock);
480
481 /* get periodic/carry/alarm irqs */
482 ret = platform_get_irq(pdev, 0);
483 if (unlikely(ret <= 0)) {
484 dev_err(&pdev->dev, "No IRQ resource\n");
485 return -ENOENT;
486 }
487
488 rtc->periodic_irq = ret;
489 rtc->carry_irq = platform_get_irq(pdev, 1);
490 rtc->alarm_irq = platform_get_irq(pdev, 2);
491
492 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
493 if (!res)
494 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
495 if (unlikely(res == NULL)) {
496 dev_err(&pdev->dev, "No IO resource\n");
497 return -ENOENT;
498 }
499
500 rtc->regsize = resource_size(res);
501
502 rtc->res = devm_request_mem_region(&pdev->dev, res->start,
503 rtc->regsize, pdev->name);
504 if (unlikely(!rtc->res))
505 return -EBUSY;
506
507 rtc->regbase = devm_ioremap(&pdev->dev, rtc->res->start, rtc->regsize);
508 if (unlikely(!rtc->regbase))
509 return -EINVAL;
510
511 if (!pdev->dev.of_node) {
512 clk_id = pdev->id;
513 /* With a single device, the clock id is still "rtc0" */
514 if (clk_id < 0)
515 clk_id = 0;
516
517 snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
518 } else
519 snprintf(clk_name, sizeof(clk_name), "fck");
520
521 rtc->clk = devm_clk_get(&pdev->dev, clk_name);
522 if (IS_ERR(rtc->clk)) {
523 /*
524 * No error handling for rtc->clk intentionally, not all
525 * platforms will have a unique clock for the RTC, and
526 * the clk API can handle the struct clk pointer being
527 * NULL.
528 */
529 rtc->clk = NULL;
530 }
531
532 rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
533 if (IS_ERR(rtc->rtc_dev))
534 return PTR_ERR(rtc->rtc_dev);
535
536 clk_enable(rtc->clk);
537
538 rtc->capabilities = RTC_DEF_CAPABILITIES;
539
540#ifdef CONFIG_SUPERH
541 if (dev_get_platdata(&pdev->dev)) {
542 struct sh_rtc_platform_info *pinfo =
543 dev_get_platdata(&pdev->dev);
544
545 /*
546 * Some CPUs have special capabilities in addition to the
547 * default set. Add those in here.
548 */
549 rtc->capabilities |= pinfo->capabilities;
550 }
551#endif
552
553 if (rtc->carry_irq <= 0) {
554 /* register shared periodic/carry/alarm irq */
555 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
556 sh_rtc_shared, 0, "sh-rtc", rtc);
557 if (unlikely(ret)) {
558 dev_err(&pdev->dev,
559 "request IRQ failed with %d, IRQ %d\n", ret,
560 rtc->periodic_irq);
561 goto err_unmap;
562 }
563 } else {
564 /* register periodic/carry/alarm irqs */
565 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
566 sh_rtc_periodic, 0, "sh-rtc period", rtc);
567 if (unlikely(ret)) {
568 dev_err(&pdev->dev,
569 "request period IRQ failed with %d, IRQ %d\n",
570 ret, rtc->periodic_irq);
571 goto err_unmap;
572 }
573
574 ret = devm_request_irq(&pdev->dev, rtc->carry_irq,
575 sh_rtc_interrupt, 0, "sh-rtc carry", rtc);
576 if (unlikely(ret)) {
577 dev_err(&pdev->dev,
578 "request carry IRQ failed with %d, IRQ %d\n",
579 ret, rtc->carry_irq);
580 goto err_unmap;
581 }
582
583 ret = devm_request_irq(&pdev->dev, rtc->alarm_irq,
584 sh_rtc_alarm, 0, "sh-rtc alarm", rtc);
585 if (unlikely(ret)) {
586 dev_err(&pdev->dev,
587 "request alarm IRQ failed with %d, IRQ %d\n",
588 ret, rtc->alarm_irq);
589 goto err_unmap;
590 }
591 }
592
593 platform_set_drvdata(pdev, rtc);
594
595 /* everything disabled by default */
596 sh_rtc_setaie(&pdev->dev, 0);
597 sh_rtc_setcie(&pdev->dev, 0);
598
599 rtc->rtc_dev->ops = &sh_rtc_ops;
600 rtc->rtc_dev->max_user_freq = 256;
601
602 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
603 rtc->rtc_dev->range_min = RTC_TIMESTAMP_BEGIN_1900;
604 rtc->rtc_dev->range_max = RTC_TIMESTAMP_END_9999;
605 } else {
606 rtc->rtc_dev->range_min = mktime64(1999, 1, 1, 0, 0, 0);
607 rtc->rtc_dev->range_max = mktime64(2098, 12, 31, 23, 59, 59);
608 }
609
610 ret = devm_rtc_register_device(rtc->rtc_dev);
611 if (ret)
612 goto err_unmap;
613
614 device_init_wakeup(&pdev->dev, 1);
615 return 0;
616
617err_unmap:
618 clk_disable(rtc->clk);
619
620 return ret;
621}
622
623static int __exit sh_rtc_remove(struct platform_device *pdev)
624{
625 struct sh_rtc *rtc = platform_get_drvdata(pdev);
626
627 sh_rtc_setaie(&pdev->dev, 0);
628 sh_rtc_setcie(&pdev->dev, 0);
629
630 clk_disable(rtc->clk);
631
632 return 0;
633}
634
635static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
636{
637 struct sh_rtc *rtc = dev_get_drvdata(dev);
638
639 irq_set_irq_wake(rtc->periodic_irq, enabled);
640
641 if (rtc->carry_irq > 0) {
642 irq_set_irq_wake(rtc->carry_irq, enabled);
643 irq_set_irq_wake(rtc->alarm_irq, enabled);
644 }
645}
646
647static int __maybe_unused sh_rtc_suspend(struct device *dev)
648{
649 if (device_may_wakeup(dev))
650 sh_rtc_set_irq_wake(dev, 1);
651
652 return 0;
653}
654
655static int __maybe_unused sh_rtc_resume(struct device *dev)
656{
657 if (device_may_wakeup(dev))
658 sh_rtc_set_irq_wake(dev, 0);
659
660 return 0;
661}
662
663static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
664
665static const struct of_device_id sh_rtc_of_match[] = {
666 { .compatible = "renesas,sh-rtc", },
667 { /* sentinel */ }
668};
669MODULE_DEVICE_TABLE(of, sh_rtc_of_match);
670
671static struct platform_driver sh_rtc_platform_driver = {
672 .driver = {
673 .name = DRV_NAME,
674 .pm = &sh_rtc_pm_ops,
675 .of_match_table = sh_rtc_of_match,
676 },
677 .remove = __exit_p(sh_rtc_remove),
678};
679
680module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe);
681
682MODULE_DESCRIPTION("SuperH on-chip RTC driver");
683MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
684 "Jamie Lenehan <lenehan@twibble.org>, "
685 "Angelo Castello <angelo.castello@st.com>");
686MODULE_LICENSE("GPL v2");
687MODULE_ALIAS("platform:" DRV_NAME);