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1/*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#include <linux/kernel.h>
25
26#include "i915_drv.h"
27#include "i915_irq.h"
28#include "intel_display_types.h"
29#include "intel_hotplug.h"
30
31/**
32 * DOC: Hotplug
33 *
34 * Simply put, hotplug occurs when a display is connected to or disconnected
35 * from the system. However, there may be adapters and docking stations and
36 * Display Port short pulses and MST devices involved, complicating matters.
37 *
38 * Hotplug in i915 is handled in many different levels of abstraction.
39 *
40 * The platform dependent interrupt handling code in i915_irq.c enables,
41 * disables, and does preliminary handling of the interrupts. The interrupt
42 * handlers gather the hotplug detect (HPD) information from relevant registers
43 * into a platform independent mask of hotplug pins that have fired.
44 *
45 * The platform independent interrupt handler intel_hpd_irq_handler() in
46 * intel_hotplug.c does hotplug irq storm detection and mitigation, and passes
47 * further processing to appropriate bottom halves (Display Port specific and
48 * regular hotplug).
49 *
50 * The Display Port work function i915_digport_work_func() calls into
51 * intel_dp_hpd_pulse() via hooks, which handles DP short pulses and DP MST long
52 * pulses, with failures and non-MST long pulses triggering regular hotplug
53 * processing on the connector.
54 *
55 * The regular hotplug work function i915_hotplug_work_func() calls connector
56 * detect hooks, and, if connector status changes, triggers sending of hotplug
57 * uevent to userspace via drm_kms_helper_hotplug_event().
58 *
59 * Finally, the userspace is responsible for triggering a modeset upon receiving
60 * the hotplug uevent, disabling or enabling the crtc as needed.
61 *
62 * The hotplug interrupt storm detection and mitigation code keeps track of the
63 * number of interrupts per hotplug pin per a period of time, and if the number
64 * of interrupts exceeds a certain threshold, the interrupt is disabled for a
65 * while before being re-enabled. The intention is to mitigate issues raising
66 * from broken hardware triggering massive amounts of interrupts and grinding
67 * the system to a halt.
68 *
69 * Current implementation expects that hotplug interrupt storm will not be
70 * seen when display port sink is connected, hence on platforms whose DP
71 * callback is handled by i915_digport_work_func reenabling of hpd is not
72 * performed (it was never expected to be disabled in the first place ;) )
73 * this is specific to DP sinks handled by this routine and any other display
74 * such as HDMI or DVI enabled on the same port will have proper logic since
75 * it will use i915_hotplug_work_func where this logic is handled.
76 */
77
78/**
79 * intel_hpd_pin_default - return default pin associated with certain port.
80 * @dev_priv: private driver data pointer
81 * @port: the hpd port to get associated pin
82 *
83 * It is only valid and used by digital port encoder.
84 *
85 * Return pin that is associatade with @port.
86 */
87enum hpd_pin intel_hpd_pin_default(struct drm_i915_private *dev_priv,
88 enum port port)
89{
90 return HPD_PORT_A + port - PORT_A;
91}
92
93/* Threshold == 5 for long IRQs, 50 for short */
94#define HPD_STORM_DEFAULT_THRESHOLD 50
95
96#define HPD_STORM_DETECT_PERIOD 1000
97#define HPD_STORM_REENABLE_DELAY (2 * 60 * 1000)
98#define HPD_RETRY_DELAY 1000
99
100static enum hpd_pin
101intel_connector_hpd_pin(struct intel_connector *connector)
102{
103 struct intel_encoder *encoder = intel_attached_encoder(connector);
104
105 /*
106 * MST connectors get their encoder attached dynamically
107 * so need to make sure we have an encoder here. But since
108 * MST encoders have their hpd_pin set to HPD_NONE we don't
109 * have to special case them beyond that.
110 */
111 return encoder ? encoder->hpd_pin : HPD_NONE;
112}
113
114/**
115 * intel_hpd_irq_storm_detect - gather stats and detect HPD IRQ storm on a pin
116 * @dev_priv: private driver data pointer
117 * @pin: the pin to gather stats on
118 * @long_hpd: whether the HPD IRQ was long or short
119 *
120 * Gather stats about HPD IRQs from the specified @pin, and detect IRQ
121 * storms. Only the pin specific stats and state are changed, the caller is
122 * responsible for further action.
123 *
124 * The number of IRQs that are allowed within @HPD_STORM_DETECT_PERIOD is
125 * stored in @dev_priv->display.hotplug.hpd_storm_threshold which defaults to
126 * @HPD_STORM_DEFAULT_THRESHOLD. Long IRQs count as +10 to this threshold, and
127 * short IRQs count as +1. If this threshold is exceeded, it's considered an
128 * IRQ storm and the IRQ state is set to @HPD_MARK_DISABLED.
129 *
130 * By default, most systems will only count long IRQs towards
131 * &dev_priv->display.hotplug.hpd_storm_threshold. However, some older systems also
132 * suffer from short IRQ storms and must also track these. Because short IRQ
133 * storms are naturally caused by sideband interactions with DP MST devices,
134 * short IRQ detection is only enabled for systems without DP MST support.
135 * Systems which are new enough to support DP MST are far less likely to
136 * suffer from IRQ storms at all, so this is fine.
137 *
138 * The HPD threshold can be controlled through i915_hpd_storm_ctl in debugfs,
139 * and should only be adjusted for automated hotplug testing.
140 *
141 * Return true if an IRQ storm was detected on @pin.
142 */
143static bool intel_hpd_irq_storm_detect(struct drm_i915_private *dev_priv,
144 enum hpd_pin pin, bool long_hpd)
145{
146 struct intel_hotplug *hpd = &dev_priv->display.hotplug;
147 unsigned long start = hpd->stats[pin].last_jiffies;
148 unsigned long end = start + msecs_to_jiffies(HPD_STORM_DETECT_PERIOD);
149 const int increment = long_hpd ? 10 : 1;
150 const int threshold = hpd->hpd_storm_threshold;
151 bool storm = false;
152
153 if (!threshold ||
154 (!long_hpd && !dev_priv->display.hotplug.hpd_short_storm_enabled))
155 return false;
156
157 if (!time_in_range(jiffies, start, end)) {
158 hpd->stats[pin].last_jiffies = jiffies;
159 hpd->stats[pin].count = 0;
160 }
161
162 hpd->stats[pin].count += increment;
163 if (hpd->stats[pin].count > threshold) {
164 hpd->stats[pin].state = HPD_MARK_DISABLED;
165 drm_dbg_kms(&dev_priv->drm,
166 "HPD interrupt storm detected on PIN %d\n", pin);
167 storm = true;
168 } else {
169 drm_dbg_kms(&dev_priv->drm,
170 "Received HPD interrupt on PIN %d - cnt: %d\n",
171 pin,
172 hpd->stats[pin].count);
173 }
174
175 return storm;
176}
177
178static void
179intel_hpd_irq_storm_switch_to_polling(struct drm_i915_private *dev_priv)
180{
181 struct drm_connector_list_iter conn_iter;
182 struct intel_connector *connector;
183 bool hpd_disabled = false;
184
185 lockdep_assert_held(&dev_priv->irq_lock);
186
187 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
188 for_each_intel_connector_iter(connector, &conn_iter) {
189 enum hpd_pin pin;
190
191 if (connector->base.polled != DRM_CONNECTOR_POLL_HPD)
192 continue;
193
194 pin = intel_connector_hpd_pin(connector);
195 if (pin == HPD_NONE ||
196 dev_priv->display.hotplug.stats[pin].state != HPD_MARK_DISABLED)
197 continue;
198
199 drm_info(&dev_priv->drm,
200 "HPD interrupt storm detected on connector %s: "
201 "switching from hotplug detection to polling\n",
202 connector->base.name);
203
204 dev_priv->display.hotplug.stats[pin].state = HPD_DISABLED;
205 connector->base.polled = DRM_CONNECTOR_POLL_CONNECT |
206 DRM_CONNECTOR_POLL_DISCONNECT;
207 hpd_disabled = true;
208 }
209 drm_connector_list_iter_end(&conn_iter);
210
211 /* Enable polling and queue hotplug re-enabling. */
212 if (hpd_disabled) {
213 drm_kms_helper_poll_enable(&dev_priv->drm);
214 mod_delayed_work(system_wq, &dev_priv->display.hotplug.reenable_work,
215 msecs_to_jiffies(HPD_STORM_REENABLE_DELAY));
216 }
217}
218
219static void intel_hpd_irq_storm_reenable_work(struct work_struct *work)
220{
221 struct drm_i915_private *dev_priv =
222 container_of(work, typeof(*dev_priv),
223 display.hotplug.reenable_work.work);
224 struct drm_connector_list_iter conn_iter;
225 struct intel_connector *connector;
226 intel_wakeref_t wakeref;
227 enum hpd_pin pin;
228
229 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
230
231 spin_lock_irq(&dev_priv->irq_lock);
232
233 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
234 for_each_intel_connector_iter(connector, &conn_iter) {
235 pin = intel_connector_hpd_pin(connector);
236 if (pin == HPD_NONE ||
237 dev_priv->display.hotplug.stats[pin].state != HPD_DISABLED)
238 continue;
239
240 if (connector->base.polled != connector->polled)
241 drm_dbg(&dev_priv->drm,
242 "Reenabling HPD on connector %s\n",
243 connector->base.name);
244 connector->base.polled = connector->polled;
245 }
246 drm_connector_list_iter_end(&conn_iter);
247
248 for_each_hpd_pin(pin) {
249 if (dev_priv->display.hotplug.stats[pin].state == HPD_DISABLED)
250 dev_priv->display.hotplug.stats[pin].state = HPD_ENABLED;
251 }
252
253 intel_hpd_irq_setup(dev_priv);
254
255 spin_unlock_irq(&dev_priv->irq_lock);
256
257 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
258}
259
260enum intel_hotplug_state
261intel_encoder_hotplug(struct intel_encoder *encoder,
262 struct intel_connector *connector)
263{
264 struct drm_device *dev = connector->base.dev;
265 enum drm_connector_status old_status;
266 u64 old_epoch_counter;
267 bool ret = false;
268
269 drm_WARN_ON(dev, !mutex_is_locked(&dev->mode_config.mutex));
270 old_status = connector->base.status;
271 old_epoch_counter = connector->base.epoch_counter;
272
273 connector->base.status =
274 drm_helper_probe_detect(&connector->base, NULL, false);
275
276 if (old_epoch_counter != connector->base.epoch_counter)
277 ret = true;
278
279 if (ret) {
280 drm_dbg_kms(dev, "[CONNECTOR:%d:%s] status updated from %s to %s (epoch counter %llu->%llu)\n",
281 connector->base.base.id,
282 connector->base.name,
283 drm_get_connector_status_name(old_status),
284 drm_get_connector_status_name(connector->base.status),
285 old_epoch_counter,
286 connector->base.epoch_counter);
287 return INTEL_HOTPLUG_CHANGED;
288 }
289 return INTEL_HOTPLUG_UNCHANGED;
290}
291
292static bool intel_encoder_has_hpd_pulse(struct intel_encoder *encoder)
293{
294 return intel_encoder_is_dig_port(encoder) &&
295 enc_to_dig_port(encoder)->hpd_pulse != NULL;
296}
297
298static void i915_digport_work_func(struct work_struct *work)
299{
300 struct drm_i915_private *dev_priv =
301 container_of(work, struct drm_i915_private, display.hotplug.dig_port_work);
302 u32 long_port_mask, short_port_mask;
303 struct intel_encoder *encoder;
304 u32 old_bits = 0;
305
306 spin_lock_irq(&dev_priv->irq_lock);
307 long_port_mask = dev_priv->display.hotplug.long_port_mask;
308 dev_priv->display.hotplug.long_port_mask = 0;
309 short_port_mask = dev_priv->display.hotplug.short_port_mask;
310 dev_priv->display.hotplug.short_port_mask = 0;
311 spin_unlock_irq(&dev_priv->irq_lock);
312
313 for_each_intel_encoder(&dev_priv->drm, encoder) {
314 struct intel_digital_port *dig_port;
315 enum port port = encoder->port;
316 bool long_hpd, short_hpd;
317 enum irqreturn ret;
318
319 if (!intel_encoder_has_hpd_pulse(encoder))
320 continue;
321
322 long_hpd = long_port_mask & BIT(port);
323 short_hpd = short_port_mask & BIT(port);
324
325 if (!long_hpd && !short_hpd)
326 continue;
327
328 dig_port = enc_to_dig_port(encoder);
329
330 ret = dig_port->hpd_pulse(dig_port, long_hpd);
331 if (ret == IRQ_NONE) {
332 /* fall back to old school hpd */
333 old_bits |= BIT(encoder->hpd_pin);
334 }
335 }
336
337 if (old_bits) {
338 spin_lock_irq(&dev_priv->irq_lock);
339 dev_priv->display.hotplug.event_bits |= old_bits;
340 spin_unlock_irq(&dev_priv->irq_lock);
341 queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
342 }
343}
344
345/**
346 * intel_hpd_trigger_irq - trigger an hpd irq event for a port
347 * @dig_port: digital port
348 *
349 * Trigger an HPD interrupt event for the given port, emulating a short pulse
350 * generated by the sink, and schedule the dig port work to handle it.
351 */
352void intel_hpd_trigger_irq(struct intel_digital_port *dig_port)
353{
354 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
355
356 spin_lock_irq(&i915->irq_lock);
357 i915->display.hotplug.short_port_mask |= BIT(dig_port->base.port);
358 spin_unlock_irq(&i915->irq_lock);
359
360 queue_work(i915->display.hotplug.dp_wq, &i915->display.hotplug.dig_port_work);
361}
362
363/*
364 * Handle hotplug events outside the interrupt handler proper.
365 */
366static void i915_hotplug_work_func(struct work_struct *work)
367{
368 struct drm_i915_private *dev_priv =
369 container_of(work, struct drm_i915_private,
370 display.hotplug.hotplug_work.work);
371 struct drm_connector_list_iter conn_iter;
372 struct intel_connector *connector;
373 u32 changed = 0, retry = 0;
374 u32 hpd_event_bits;
375 u32 hpd_retry_bits;
376
377 mutex_lock(&dev_priv->drm.mode_config.mutex);
378 drm_dbg_kms(&dev_priv->drm, "running encoder hotplug functions\n");
379
380 spin_lock_irq(&dev_priv->irq_lock);
381
382 hpd_event_bits = dev_priv->display.hotplug.event_bits;
383 dev_priv->display.hotplug.event_bits = 0;
384 hpd_retry_bits = dev_priv->display.hotplug.retry_bits;
385 dev_priv->display.hotplug.retry_bits = 0;
386
387 /* Enable polling for connectors which had HPD IRQ storms */
388 intel_hpd_irq_storm_switch_to_polling(dev_priv);
389
390 spin_unlock_irq(&dev_priv->irq_lock);
391
392 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
393 for_each_intel_connector_iter(connector, &conn_iter) {
394 enum hpd_pin pin;
395 u32 hpd_bit;
396
397 pin = intel_connector_hpd_pin(connector);
398 if (pin == HPD_NONE)
399 continue;
400
401 hpd_bit = BIT(pin);
402 if ((hpd_event_bits | hpd_retry_bits) & hpd_bit) {
403 struct intel_encoder *encoder =
404 intel_attached_encoder(connector);
405
406 if (hpd_event_bits & hpd_bit)
407 connector->hotplug_retries = 0;
408 else
409 connector->hotplug_retries++;
410
411 drm_dbg_kms(&dev_priv->drm,
412 "Connector %s (pin %i) received hotplug event. (retry %d)\n",
413 connector->base.name, pin,
414 connector->hotplug_retries);
415
416 switch (encoder->hotplug(encoder, connector)) {
417 case INTEL_HOTPLUG_UNCHANGED:
418 break;
419 case INTEL_HOTPLUG_CHANGED:
420 changed |= hpd_bit;
421 break;
422 case INTEL_HOTPLUG_RETRY:
423 retry |= hpd_bit;
424 break;
425 }
426 }
427 }
428 drm_connector_list_iter_end(&conn_iter);
429 mutex_unlock(&dev_priv->drm.mode_config.mutex);
430
431 if (changed)
432 drm_kms_helper_hotplug_event(&dev_priv->drm);
433
434 /* Remove shared HPD pins that have changed */
435 retry &= ~changed;
436 if (retry) {
437 spin_lock_irq(&dev_priv->irq_lock);
438 dev_priv->display.hotplug.retry_bits |= retry;
439 spin_unlock_irq(&dev_priv->irq_lock);
440
441 mod_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work,
442 msecs_to_jiffies(HPD_RETRY_DELAY));
443 }
444}
445
446
447/**
448 * intel_hpd_irq_handler - main hotplug irq handler
449 * @dev_priv: drm_i915_private
450 * @pin_mask: a mask of hpd pins that have triggered the irq
451 * @long_mask: a mask of hpd pins that may be long hpd pulses
452 *
453 * This is the main hotplug irq handler for all platforms. The platform specific
454 * irq handlers call the platform specific hotplug irq handlers, which read and
455 * decode the appropriate registers into bitmasks about hpd pins that have
456 * triggered (@pin_mask), and which of those pins may be long pulses
457 * (@long_mask). The @long_mask is ignored if the port corresponding to the pin
458 * is not a digital port.
459 *
460 * Here, we do hotplug irq storm detection and mitigation, and pass further
461 * processing to appropriate bottom halves.
462 */
463void intel_hpd_irq_handler(struct drm_i915_private *dev_priv,
464 u32 pin_mask, u32 long_mask)
465{
466 struct intel_encoder *encoder;
467 bool storm_detected = false;
468 bool queue_dig = false, queue_hp = false;
469 u32 long_hpd_pulse_mask = 0;
470 u32 short_hpd_pulse_mask = 0;
471 enum hpd_pin pin;
472
473 if (!pin_mask)
474 return;
475
476 spin_lock(&dev_priv->irq_lock);
477
478 /*
479 * Determine whether ->hpd_pulse() exists for each pin, and
480 * whether we have a short or a long pulse. This is needed
481 * as each pin may have up to two encoders (HDMI and DP) and
482 * only the one of them (DP) will have ->hpd_pulse().
483 */
484 for_each_intel_encoder(&dev_priv->drm, encoder) {
485 enum port port = encoder->port;
486 bool long_hpd;
487
488 pin = encoder->hpd_pin;
489 if (!(BIT(pin) & pin_mask))
490 continue;
491
492 if (!intel_encoder_has_hpd_pulse(encoder))
493 continue;
494
495 long_hpd = long_mask & BIT(pin);
496
497 drm_dbg(&dev_priv->drm,
498 "digital hpd on [ENCODER:%d:%s] - %s\n",
499 encoder->base.base.id, encoder->base.name,
500 long_hpd ? "long" : "short");
501 queue_dig = true;
502
503 if (long_hpd) {
504 long_hpd_pulse_mask |= BIT(pin);
505 dev_priv->display.hotplug.long_port_mask |= BIT(port);
506 } else {
507 short_hpd_pulse_mask |= BIT(pin);
508 dev_priv->display.hotplug.short_port_mask |= BIT(port);
509 }
510 }
511
512 /* Now process each pin just once */
513 for_each_hpd_pin(pin) {
514 bool long_hpd;
515
516 if (!(BIT(pin) & pin_mask))
517 continue;
518
519 if (dev_priv->display.hotplug.stats[pin].state == HPD_DISABLED) {
520 /*
521 * On GMCH platforms the interrupt mask bits only
522 * prevent irq generation, not the setting of the
523 * hotplug bits itself. So only WARN about unexpected
524 * interrupts on saner platforms.
525 */
526 drm_WARN_ONCE(&dev_priv->drm, !HAS_GMCH(dev_priv),
527 "Received HPD interrupt on pin %d although disabled\n",
528 pin);
529 continue;
530 }
531
532 if (dev_priv->display.hotplug.stats[pin].state != HPD_ENABLED)
533 continue;
534
535 /*
536 * Delegate to ->hpd_pulse() if one of the encoders for this
537 * pin has it, otherwise let the hotplug_work deal with this
538 * pin directly.
539 */
540 if (((short_hpd_pulse_mask | long_hpd_pulse_mask) & BIT(pin))) {
541 long_hpd = long_hpd_pulse_mask & BIT(pin);
542 } else {
543 dev_priv->display.hotplug.event_bits |= BIT(pin);
544 long_hpd = true;
545 queue_hp = true;
546 }
547
548 if (intel_hpd_irq_storm_detect(dev_priv, pin, long_hpd)) {
549 dev_priv->display.hotplug.event_bits &= ~BIT(pin);
550 storm_detected = true;
551 queue_hp = true;
552 }
553 }
554
555 /*
556 * Disable any IRQs that storms were detected on. Polling enablement
557 * happens later in our hotplug work.
558 */
559 if (storm_detected)
560 intel_hpd_irq_setup(dev_priv);
561 spin_unlock(&dev_priv->irq_lock);
562
563 /*
564 * Our hotplug handler can grab modeset locks (by calling down into the
565 * fb helpers). Hence it must not be run on our own dev-priv->wq work
566 * queue for otherwise the flush_work in the pageflip code will
567 * deadlock.
568 */
569 if (queue_dig)
570 queue_work(dev_priv->display.hotplug.dp_wq, &dev_priv->display.hotplug.dig_port_work);
571 if (queue_hp)
572 queue_delayed_work(system_wq, &dev_priv->display.hotplug.hotplug_work, 0);
573}
574
575/**
576 * intel_hpd_init - initializes and enables hpd support
577 * @dev_priv: i915 device instance
578 *
579 * This function enables the hotplug support. It requires that interrupts have
580 * already been enabled with intel_irq_init_hw(). From this point on hotplug and
581 * poll request can run concurrently to other code, so locking rules must be
582 * obeyed.
583 *
584 * This is a separate step from interrupt enabling to simplify the locking rules
585 * in the driver load and resume code.
586 *
587 * Also see: intel_hpd_poll_enable() and intel_hpd_poll_disable().
588 */
589void intel_hpd_init(struct drm_i915_private *dev_priv)
590{
591 int i;
592
593 if (!HAS_DISPLAY(dev_priv))
594 return;
595
596 for_each_hpd_pin(i) {
597 dev_priv->display.hotplug.stats[i].count = 0;
598 dev_priv->display.hotplug.stats[i].state = HPD_ENABLED;
599 }
600
601 /*
602 * Interrupt setup is already guaranteed to be single-threaded, this is
603 * just to make the assert_spin_locked checks happy.
604 */
605 spin_lock_irq(&dev_priv->irq_lock);
606 intel_hpd_irq_setup(dev_priv);
607 spin_unlock_irq(&dev_priv->irq_lock);
608}
609
610static void i915_hpd_poll_init_work(struct work_struct *work)
611{
612 struct drm_i915_private *dev_priv =
613 container_of(work, struct drm_i915_private,
614 display.hotplug.poll_init_work);
615 struct drm_connector_list_iter conn_iter;
616 struct intel_connector *connector;
617 bool enabled;
618
619 mutex_lock(&dev_priv->drm.mode_config.mutex);
620
621 enabled = READ_ONCE(dev_priv->display.hotplug.poll_enabled);
622
623 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
624 for_each_intel_connector_iter(connector, &conn_iter) {
625 enum hpd_pin pin;
626
627 pin = intel_connector_hpd_pin(connector);
628 if (pin == HPD_NONE)
629 continue;
630
631 connector->base.polled = connector->polled;
632
633 if (enabled && connector->base.polled == DRM_CONNECTOR_POLL_HPD)
634 connector->base.polled = DRM_CONNECTOR_POLL_CONNECT |
635 DRM_CONNECTOR_POLL_DISCONNECT;
636 }
637 drm_connector_list_iter_end(&conn_iter);
638
639 if (enabled)
640 drm_kms_helper_poll_enable(&dev_priv->drm);
641
642 mutex_unlock(&dev_priv->drm.mode_config.mutex);
643
644 /*
645 * We might have missed any hotplugs that happened while we were
646 * in the middle of disabling polling
647 */
648 if (!enabled)
649 drm_helper_hpd_irq_event(&dev_priv->drm);
650}
651
652/**
653 * intel_hpd_poll_enable - enable polling for connectors with hpd
654 * @dev_priv: i915 device instance
655 *
656 * This function enables polling for all connectors which support HPD.
657 * Under certain conditions HPD may not be functional. On most Intel GPUs,
658 * this happens when we enter runtime suspend.
659 * On Valleyview and Cherryview systems, this also happens when we shut off all
660 * of the powerwells.
661 *
662 * Since this function can get called in contexts where we're already holding
663 * dev->mode_config.mutex, we do the actual hotplug enabling in a seperate
664 * worker.
665 *
666 * Also see: intel_hpd_init() and intel_hpd_poll_disable().
667 */
668void intel_hpd_poll_enable(struct drm_i915_private *dev_priv)
669{
670 if (!HAS_DISPLAY(dev_priv) ||
671 !INTEL_DISPLAY_ENABLED(dev_priv))
672 return;
673
674 WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, true);
675
676 /*
677 * We might already be holding dev->mode_config.mutex, so do this in a
678 * seperate worker
679 * As well, there's no issue if we race here since we always reschedule
680 * this worker anyway
681 */
682 schedule_work(&dev_priv->display.hotplug.poll_init_work);
683}
684
685/**
686 * intel_hpd_poll_disable - disable polling for connectors with hpd
687 * @dev_priv: i915 device instance
688 *
689 * This function disables polling for all connectors which support HPD.
690 * Under certain conditions HPD may not be functional. On most Intel GPUs,
691 * this happens when we enter runtime suspend.
692 * On Valleyview and Cherryview systems, this also happens when we shut off all
693 * of the powerwells.
694 *
695 * Since this function can get called in contexts where we're already holding
696 * dev->mode_config.mutex, we do the actual hotplug enabling in a seperate
697 * worker.
698 *
699 * Also used during driver init to initialize connector->polled
700 * appropriately for all connectors.
701 *
702 * Also see: intel_hpd_init() and intel_hpd_poll_enable().
703 */
704void intel_hpd_poll_disable(struct drm_i915_private *dev_priv)
705{
706 if (!HAS_DISPLAY(dev_priv))
707 return;
708
709 WRITE_ONCE(dev_priv->display.hotplug.poll_enabled, false);
710 schedule_work(&dev_priv->display.hotplug.poll_init_work);
711}
712
713void intel_hpd_init_early(struct drm_i915_private *i915)
714{
715 INIT_DELAYED_WORK(&i915->display.hotplug.hotplug_work,
716 i915_hotplug_work_func);
717 INIT_WORK(&i915->display.hotplug.dig_port_work, i915_digport_work_func);
718 INIT_WORK(&i915->display.hotplug.poll_init_work, i915_hpd_poll_init_work);
719 INIT_DELAYED_WORK(&i915->display.hotplug.reenable_work,
720 intel_hpd_irq_storm_reenable_work);
721
722 i915->display.hotplug.hpd_storm_threshold = HPD_STORM_DEFAULT_THRESHOLD;
723 /* If we have MST support, we want to avoid doing short HPD IRQ storm
724 * detection, as short HPD storms will occur as a natural part of
725 * sideband messaging with MST.
726 * On older platforms however, IRQ storms can occur with both long and
727 * short pulses, as seen on some G4x systems.
728 */
729 i915->display.hotplug.hpd_short_storm_enabled = !HAS_DP_MST(i915);
730}
731
732void intel_hpd_cancel_work(struct drm_i915_private *dev_priv)
733{
734 if (!HAS_DISPLAY(dev_priv))
735 return;
736
737 spin_lock_irq(&dev_priv->irq_lock);
738
739 dev_priv->display.hotplug.long_port_mask = 0;
740 dev_priv->display.hotplug.short_port_mask = 0;
741 dev_priv->display.hotplug.event_bits = 0;
742 dev_priv->display.hotplug.retry_bits = 0;
743
744 spin_unlock_irq(&dev_priv->irq_lock);
745
746 cancel_work_sync(&dev_priv->display.hotplug.dig_port_work);
747 cancel_delayed_work_sync(&dev_priv->display.hotplug.hotplug_work);
748 cancel_work_sync(&dev_priv->display.hotplug.poll_init_work);
749 cancel_delayed_work_sync(&dev_priv->display.hotplug.reenable_work);
750}
751
752bool intel_hpd_disable(struct drm_i915_private *dev_priv, enum hpd_pin pin)
753{
754 bool ret = false;
755
756 if (pin == HPD_NONE)
757 return false;
758
759 spin_lock_irq(&dev_priv->irq_lock);
760 if (dev_priv->display.hotplug.stats[pin].state == HPD_ENABLED) {
761 dev_priv->display.hotplug.stats[pin].state = HPD_DISABLED;
762 ret = true;
763 }
764 spin_unlock_irq(&dev_priv->irq_lock);
765
766 return ret;
767}
768
769void intel_hpd_enable(struct drm_i915_private *dev_priv, enum hpd_pin pin)
770{
771 if (pin == HPD_NONE)
772 return;
773
774 spin_lock_irq(&dev_priv->irq_lock);
775 dev_priv->display.hotplug.stats[pin].state = HPD_ENABLED;
776 spin_unlock_irq(&dev_priv->irq_lock);
777}
778
779static int i915_hpd_storm_ctl_show(struct seq_file *m, void *data)
780{
781 struct drm_i915_private *dev_priv = m->private;
782 struct intel_hotplug *hotplug = &dev_priv->display.hotplug;
783
784 /* Synchronize with everything first in case there's been an HPD
785 * storm, but we haven't finished handling it in the kernel yet
786 */
787 intel_synchronize_irq(dev_priv);
788 flush_work(&dev_priv->display.hotplug.dig_port_work);
789 flush_delayed_work(&dev_priv->display.hotplug.hotplug_work);
790
791 seq_printf(m, "Threshold: %d\n", hotplug->hpd_storm_threshold);
792 seq_printf(m, "Detected: %s\n",
793 str_yes_no(delayed_work_pending(&hotplug->reenable_work)));
794
795 return 0;
796}
797
798static ssize_t i915_hpd_storm_ctl_write(struct file *file,
799 const char __user *ubuf, size_t len,
800 loff_t *offp)
801{
802 struct seq_file *m = file->private_data;
803 struct drm_i915_private *dev_priv = m->private;
804 struct intel_hotplug *hotplug = &dev_priv->display.hotplug;
805 unsigned int new_threshold;
806 int i;
807 char *newline;
808 char tmp[16];
809
810 if (len >= sizeof(tmp))
811 return -EINVAL;
812
813 if (copy_from_user(tmp, ubuf, len))
814 return -EFAULT;
815
816 tmp[len] = '\0';
817
818 /* Strip newline, if any */
819 newline = strchr(tmp, '\n');
820 if (newline)
821 *newline = '\0';
822
823 if (strcmp(tmp, "reset") == 0)
824 new_threshold = HPD_STORM_DEFAULT_THRESHOLD;
825 else if (kstrtouint(tmp, 10, &new_threshold) != 0)
826 return -EINVAL;
827
828 if (new_threshold > 0)
829 drm_dbg_kms(&dev_priv->drm,
830 "Setting HPD storm detection threshold to %d\n",
831 new_threshold);
832 else
833 drm_dbg_kms(&dev_priv->drm, "Disabling HPD storm detection\n");
834
835 spin_lock_irq(&dev_priv->irq_lock);
836 hotplug->hpd_storm_threshold = new_threshold;
837 /* Reset the HPD storm stats so we don't accidentally trigger a storm */
838 for_each_hpd_pin(i)
839 hotplug->stats[i].count = 0;
840 spin_unlock_irq(&dev_priv->irq_lock);
841
842 /* Re-enable hpd immediately if we were in an irq storm */
843 flush_delayed_work(&dev_priv->display.hotplug.reenable_work);
844
845 return len;
846}
847
848static int i915_hpd_storm_ctl_open(struct inode *inode, struct file *file)
849{
850 return single_open(file, i915_hpd_storm_ctl_show, inode->i_private);
851}
852
853static const struct file_operations i915_hpd_storm_ctl_fops = {
854 .owner = THIS_MODULE,
855 .open = i915_hpd_storm_ctl_open,
856 .read = seq_read,
857 .llseek = seq_lseek,
858 .release = single_release,
859 .write = i915_hpd_storm_ctl_write
860};
861
862static int i915_hpd_short_storm_ctl_show(struct seq_file *m, void *data)
863{
864 struct drm_i915_private *dev_priv = m->private;
865
866 seq_printf(m, "Enabled: %s\n",
867 str_yes_no(dev_priv->display.hotplug.hpd_short_storm_enabled));
868
869 return 0;
870}
871
872static int
873i915_hpd_short_storm_ctl_open(struct inode *inode, struct file *file)
874{
875 return single_open(file, i915_hpd_short_storm_ctl_show,
876 inode->i_private);
877}
878
879static ssize_t i915_hpd_short_storm_ctl_write(struct file *file,
880 const char __user *ubuf,
881 size_t len, loff_t *offp)
882{
883 struct seq_file *m = file->private_data;
884 struct drm_i915_private *dev_priv = m->private;
885 struct intel_hotplug *hotplug = &dev_priv->display.hotplug;
886 char *newline;
887 char tmp[16];
888 int i;
889 bool new_state;
890
891 if (len >= sizeof(tmp))
892 return -EINVAL;
893
894 if (copy_from_user(tmp, ubuf, len))
895 return -EFAULT;
896
897 tmp[len] = '\0';
898
899 /* Strip newline, if any */
900 newline = strchr(tmp, '\n');
901 if (newline)
902 *newline = '\0';
903
904 /* Reset to the "default" state for this system */
905 if (strcmp(tmp, "reset") == 0)
906 new_state = !HAS_DP_MST(dev_priv);
907 else if (kstrtobool(tmp, &new_state) != 0)
908 return -EINVAL;
909
910 drm_dbg_kms(&dev_priv->drm, "%sabling HPD short storm detection\n",
911 new_state ? "En" : "Dis");
912
913 spin_lock_irq(&dev_priv->irq_lock);
914 hotplug->hpd_short_storm_enabled = new_state;
915 /* Reset the HPD storm stats so we don't accidentally trigger a storm */
916 for_each_hpd_pin(i)
917 hotplug->stats[i].count = 0;
918 spin_unlock_irq(&dev_priv->irq_lock);
919
920 /* Re-enable hpd immediately if we were in an irq storm */
921 flush_delayed_work(&dev_priv->display.hotplug.reenable_work);
922
923 return len;
924}
925
926static const struct file_operations i915_hpd_short_storm_ctl_fops = {
927 .owner = THIS_MODULE,
928 .open = i915_hpd_short_storm_ctl_open,
929 .read = seq_read,
930 .llseek = seq_lseek,
931 .release = single_release,
932 .write = i915_hpd_short_storm_ctl_write,
933};
934
935void intel_hpd_debugfs_register(struct drm_i915_private *i915)
936{
937 struct drm_minor *minor = i915->drm.primary;
938
939 debugfs_create_file("i915_hpd_storm_ctl", 0644, minor->debugfs_root,
940 i915, &i915_hpd_storm_ctl_fops);
941 debugfs_create_file("i915_hpd_short_storm_ctl", 0644, minor->debugfs_root,
942 i915, &i915_hpd_short_storm_ctl_fops);
943}