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1/*
2 * ps3vram - Use extra PS3 video ram as MTD block device.
3 *
4 * Copyright 2009 Sony Corporation
5 *
6 * Based on the MTD ps3vram driver, which is
7 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
8 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
9 */
10
11#include <linux/blkdev.h>
12#include <linux/delay.h>
13#include <linux/module.h>
14#include <linux/proc_fs.h>
15#include <linux/seq_file.h>
16#include <linux/slab.h>
17
18#include <asm/cell-regs.h>
19#include <asm/firmware.h>
20#include <asm/lv1call.h>
21#include <asm/ps3.h>
22#include <asm/ps3gpu.h>
23
24
25#define DEVICE_NAME "ps3vram"
26
27
28#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
29#define XDR_IOIF 0x0c000000
30
31#define FIFO_BASE XDR_IOIF
32#define FIFO_SIZE (64 * 1024)
33
34#define DMA_PAGE_SIZE (4 * 1024)
35
36#define CACHE_PAGE_SIZE (256 * 1024)
37#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
38
39#define CACHE_OFFSET CACHE_PAGE_SIZE
40#define FIFO_OFFSET 0
41
42#define CTRL_PUT 0x10
43#define CTRL_GET 0x11
44#define CTRL_TOP 0x15
45
46#define UPLOAD_SUBCH 1
47#define DOWNLOAD_SUBCH 2
48
49#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
50#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
51
52#define CACHE_PAGE_PRESENT 1
53#define CACHE_PAGE_DIRTY 2
54
55struct ps3vram_tag {
56 unsigned int address;
57 unsigned int flags;
58};
59
60struct ps3vram_cache {
61 unsigned int page_count;
62 unsigned int page_size;
63 struct ps3vram_tag *tags;
64 unsigned int hit;
65 unsigned int miss;
66};
67
68struct ps3vram_priv {
69 struct request_queue *queue;
70 struct gendisk *gendisk;
71
72 u64 size;
73
74 u64 memory_handle;
75 u64 context_handle;
76 u32 *ctrl;
77 void *reports;
78 u8 *xdr_buf;
79
80 u32 *fifo_base;
81 u32 *fifo_ptr;
82
83 struct ps3vram_cache cache;
84
85 spinlock_t lock; /* protecting list of bios */
86 struct bio_list list;
87};
88
89
90static int ps3vram_major;
91
92
93static const struct block_device_operations ps3vram_fops = {
94 .owner = THIS_MODULE,
95};
96
97
98#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
99#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
100#define DMA_NOTIFIER_SIZE 0x40
101#define NOTIFIER 7 /* notifier used for completion report */
102
103static char *size = "256M";
104module_param(size, charp, 0);
105MODULE_PARM_DESC(size, "memory size");
106
107static u32 *ps3vram_get_notifier(void *reports, int notifier)
108{
109 return reports + DMA_NOTIFIER_OFFSET_BASE +
110 DMA_NOTIFIER_SIZE * notifier;
111}
112
113static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
114{
115 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
116 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
117 int i;
118
119 for (i = 0; i < 4; i++)
120 notify[i] = 0xffffffff;
121}
122
123static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
124 unsigned int timeout_ms)
125{
126 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
127 u32 *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
128 unsigned long timeout;
129
130 for (timeout = 20; timeout; timeout--) {
131 if (!notify[3])
132 return 0;
133 udelay(10);
134 }
135
136 timeout = jiffies + msecs_to_jiffies(timeout_ms);
137
138 do {
139 if (!notify[3])
140 return 0;
141 msleep(1);
142 } while (time_before(jiffies, timeout));
143
144 return -ETIMEDOUT;
145}
146
147static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
148{
149 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
150
151 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
152 priv->ctrl[CTRL_GET] = FIFO_BASE + FIFO_OFFSET;
153}
154
155static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
156 unsigned int timeout_ms)
157{
158 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
159 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
160
161 do {
162 if (priv->ctrl[CTRL_PUT] == priv->ctrl[CTRL_GET])
163 return 0;
164 msleep(1);
165 } while (time_before(jiffies, timeout));
166
167 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
168 priv->ctrl[CTRL_PUT], priv->ctrl[CTRL_GET],
169 priv->ctrl[CTRL_TOP]);
170
171 return -ETIMEDOUT;
172}
173
174static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
175{
176 *(priv->fifo_ptr)++ = data;
177}
178
179static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
180 u32 size)
181{
182 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
183}
184
185static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
186{
187 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
188 int status;
189
190 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
191
192 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET;
193
194 /* asking the HV for a blit will kick the FIFO */
195 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
196 if (status)
197 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
198 __func__, status);
199
200 priv->fifo_ptr = priv->fifo_base;
201}
202
203static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
204{
205 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
206 int status;
207
208 mutex_lock(&ps3_gpu_mutex);
209
210 priv->ctrl[CTRL_PUT] = FIFO_BASE + FIFO_OFFSET +
211 (priv->fifo_ptr - priv->fifo_base) * sizeof(u32);
212
213 /* asking the HV for a blit will kick the FIFO */
214 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
215 if (status)
216 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
217 __func__, status);
218
219 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
220 FIFO_SIZE - 1024) {
221 dev_dbg(&dev->core, "FIFO full, rewinding\n");
222 ps3vram_wait_ring(dev, 200);
223 ps3vram_rewind_ring(dev);
224 }
225
226 mutex_unlock(&ps3_gpu_mutex);
227}
228
229static void ps3vram_bind(struct ps3_system_bus_device *dev)
230{
231 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
232
233 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
234 ps3vram_out_ring(priv, 0x31337303);
235 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
236 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
237 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
238 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
239
240 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
241 ps3vram_out_ring(priv, 0x3137c0de);
242 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
243 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
244 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
245 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
246
247 ps3vram_fire_ring(dev);
248}
249
250static int ps3vram_upload(struct ps3_system_bus_device *dev,
251 unsigned int src_offset, unsigned int dst_offset,
252 int len, int count)
253{
254 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
255
256 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
257 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
258 ps3vram_out_ring(priv, XDR_IOIF + src_offset);
259 ps3vram_out_ring(priv, dst_offset);
260 ps3vram_out_ring(priv, len);
261 ps3vram_out_ring(priv, len);
262 ps3vram_out_ring(priv, len);
263 ps3vram_out_ring(priv, count);
264 ps3vram_out_ring(priv, (1 << 8) | 1);
265 ps3vram_out_ring(priv, 0);
266
267 ps3vram_notifier_reset(dev);
268 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
269 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
270 ps3vram_out_ring(priv, 0);
271 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
272 ps3vram_out_ring(priv, 0);
273 ps3vram_fire_ring(dev);
274 if (ps3vram_notifier_wait(dev, 200) < 0) {
275 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
276 return -1;
277 }
278
279 return 0;
280}
281
282static int ps3vram_download(struct ps3_system_bus_device *dev,
283 unsigned int src_offset, unsigned int dst_offset,
284 int len, int count)
285{
286 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
287
288 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
289 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
290 ps3vram_out_ring(priv, src_offset);
291 ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
292 ps3vram_out_ring(priv, len);
293 ps3vram_out_ring(priv, len);
294 ps3vram_out_ring(priv, len);
295 ps3vram_out_ring(priv, count);
296 ps3vram_out_ring(priv, (1 << 8) | 1);
297 ps3vram_out_ring(priv, 0);
298
299 ps3vram_notifier_reset(dev);
300 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
301 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
302 ps3vram_out_ring(priv, 0);
303 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
304 ps3vram_out_ring(priv, 0);
305 ps3vram_fire_ring(dev);
306 if (ps3vram_notifier_wait(dev, 200) < 0) {
307 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
308 return -1;
309 }
310
311 return 0;
312}
313
314static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
315{
316 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
317 struct ps3vram_cache *cache = &priv->cache;
318
319 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
320 return;
321
322 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
323 cache->tags[entry].address);
324 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
325 cache->tags[entry].address, DMA_PAGE_SIZE,
326 cache->page_size / DMA_PAGE_SIZE) < 0) {
327 dev_err(&dev->core,
328 "Failed to upload from 0x%x to " "0x%x size 0x%x\n",
329 entry * cache->page_size, cache->tags[entry].address,
330 cache->page_size);
331 }
332 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
333}
334
335static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
336 unsigned int address)
337{
338 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
339 struct ps3vram_cache *cache = &priv->cache;
340
341 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
342 if (ps3vram_download(dev, address,
343 CACHE_OFFSET + entry * cache->page_size,
344 DMA_PAGE_SIZE,
345 cache->page_size / DMA_PAGE_SIZE) < 0) {
346 dev_err(&dev->core,
347 "Failed to download from 0x%x to 0x%x size 0x%x\n",
348 address, entry * cache->page_size, cache->page_size);
349 }
350
351 cache->tags[entry].address = address;
352 cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
353}
354
355
356static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
357{
358 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
359 struct ps3vram_cache *cache = &priv->cache;
360 int i;
361
362 dev_dbg(&dev->core, "FLUSH\n");
363 for (i = 0; i < cache->page_count; i++) {
364 ps3vram_cache_evict(dev, i);
365 cache->tags[i].flags = 0;
366 }
367}
368
369static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
370 loff_t address)
371{
372 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
373 struct ps3vram_cache *cache = &priv->cache;
374 unsigned int base;
375 unsigned int offset;
376 int i;
377 static int counter;
378
379 offset = (unsigned int) (address & (cache->page_size - 1));
380 base = (unsigned int) (address - offset);
381
382 /* fully associative check */
383 for (i = 0; i < cache->page_count; i++) {
384 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
385 cache->tags[i].address == base) {
386 cache->hit++;
387 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
388 cache->tags[i].address);
389 return i;
390 }
391 }
392
393 /* choose a random entry */
394 i = (jiffies + (counter++)) % cache->page_count;
395 dev_dbg(&dev->core, "Using entry %d\n", i);
396
397 ps3vram_cache_evict(dev, i);
398 ps3vram_cache_load(dev, i, base);
399
400 cache->miss++;
401 return i;
402}
403
404static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
405{
406 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
407
408 priv->cache.page_count = CACHE_PAGE_COUNT;
409 priv->cache.page_size = CACHE_PAGE_SIZE;
410 priv->cache.tags = kzalloc(sizeof(struct ps3vram_tag) *
411 CACHE_PAGE_COUNT, GFP_KERNEL);
412 if (priv->cache.tags == NULL) {
413 dev_err(&dev->core, "Could not allocate cache tags\n");
414 return -ENOMEM;
415 }
416
417 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
418 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
419
420 return 0;
421}
422
423static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
424{
425 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
426
427 ps3vram_cache_flush(dev);
428 kfree(priv->cache.tags);
429}
430
431static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
432 size_t len, size_t *retlen, u_char *buf)
433{
434 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
435 unsigned int cached, count;
436
437 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
438 (unsigned int)from, len);
439
440 if (from >= priv->size)
441 return -EIO;
442
443 if (len > priv->size - from)
444 len = priv->size - from;
445
446 /* Copy from vram to buf */
447 count = len;
448 while (count) {
449 unsigned int offset, avail;
450 unsigned int entry;
451
452 offset = (unsigned int) (from & (priv->cache.page_size - 1));
453 avail = priv->cache.page_size - offset;
454
455 entry = ps3vram_cache_match(dev, from);
456 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
457
458 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
459 "avail=%08x count=%08x\n", __func__,
460 (unsigned int)from, cached, offset, avail, count);
461
462 if (avail > count)
463 avail = count;
464 memcpy(buf, priv->xdr_buf + cached, avail);
465
466 buf += avail;
467 count -= avail;
468 from += avail;
469 }
470
471 *retlen = len;
472 return 0;
473}
474
475static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
476 size_t len, size_t *retlen, const u_char *buf)
477{
478 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
479 unsigned int cached, count;
480
481 if (to >= priv->size)
482 return -EIO;
483
484 if (len > priv->size - to)
485 len = priv->size - to;
486
487 /* Copy from buf to vram */
488 count = len;
489 while (count) {
490 unsigned int offset, avail;
491 unsigned int entry;
492
493 offset = (unsigned int) (to & (priv->cache.page_size - 1));
494 avail = priv->cache.page_size - offset;
495
496 entry = ps3vram_cache_match(dev, to);
497 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
498
499 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
500 "avail=%08x count=%08x\n", __func__, (unsigned int)to,
501 cached, offset, avail, count);
502
503 if (avail > count)
504 avail = count;
505 memcpy(priv->xdr_buf + cached, buf, avail);
506
507 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
508
509 buf += avail;
510 count -= avail;
511 to += avail;
512 }
513
514 *retlen = len;
515 return 0;
516}
517
518static int ps3vram_proc_show(struct seq_file *m, void *v)
519{
520 struct ps3vram_priv *priv = m->private;
521
522 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
523 return 0;
524}
525
526static int ps3vram_proc_open(struct inode *inode, struct file *file)
527{
528 return single_open(file, ps3vram_proc_show, PDE(inode)->data);
529}
530
531static const struct file_operations ps3vram_proc_fops = {
532 .owner = THIS_MODULE,
533 .open = ps3vram_proc_open,
534 .read = seq_read,
535 .llseek = seq_lseek,
536 .release = single_release,
537};
538
539static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev)
540{
541 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
542 struct proc_dir_entry *pde;
543
544 pde = proc_create_data(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops,
545 priv);
546 if (!pde)
547 dev_warn(&dev->core, "failed to create /proc entry\n");
548}
549
550static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev,
551 struct bio *bio)
552{
553 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
554 int write = bio_data_dir(bio) == WRITE;
555 const char *op = write ? "write" : "read";
556 loff_t offset = bio->bi_sector << 9;
557 int error = 0;
558 struct bio_vec *bvec;
559 unsigned int i;
560 struct bio *next;
561
562 bio_for_each_segment(bvec, bio, i) {
563 /* PS3 is ppc64, so we don't handle highmem */
564 char *ptr = page_address(bvec->bv_page) + bvec->bv_offset;
565 size_t len = bvec->bv_len, retlen;
566
567 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op,
568 len, offset);
569 if (write)
570 error = ps3vram_write(dev, offset, len, &retlen, ptr);
571 else
572 error = ps3vram_read(dev, offset, len, &retlen, ptr);
573
574 if (error) {
575 dev_err(&dev->core, "%s failed\n", op);
576 goto out;
577 }
578
579 if (retlen != len) {
580 dev_err(&dev->core, "Short %s\n", op);
581 error = -EIO;
582 goto out;
583 }
584
585 offset += len;
586 }
587
588 dev_dbg(&dev->core, "%s completed\n", op);
589
590out:
591 spin_lock_irq(&priv->lock);
592 bio_list_pop(&priv->list);
593 next = bio_list_peek(&priv->list);
594 spin_unlock_irq(&priv->lock);
595
596 bio_endio(bio, error);
597 return next;
598}
599
600static void ps3vram_make_request(struct request_queue *q, struct bio *bio)
601{
602 struct ps3_system_bus_device *dev = q->queuedata;
603 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
604 int busy;
605
606 dev_dbg(&dev->core, "%s\n", __func__);
607
608 spin_lock_irq(&priv->lock);
609 busy = !bio_list_empty(&priv->list);
610 bio_list_add(&priv->list, bio);
611 spin_unlock_irq(&priv->lock);
612
613 if (busy)
614 return;
615
616 do {
617 bio = ps3vram_do_bio(dev, bio);
618 } while (bio);
619}
620
621static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
622{
623 struct ps3vram_priv *priv;
624 int error, status;
625 struct request_queue *queue;
626 struct gendisk *gendisk;
627 u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar,
628 reports_size, xdr_lpar;
629 char *rest;
630
631 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
632 if (!priv) {
633 error = -ENOMEM;
634 goto fail;
635 }
636
637 spin_lock_init(&priv->lock);
638 bio_list_init(&priv->list);
639 ps3_system_bus_set_drvdata(dev, priv);
640
641 /* Allocate XDR buffer (1MiB aligned) */
642 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
643 get_order(XDR_BUF_SIZE));
644 if (priv->xdr_buf == NULL) {
645 dev_err(&dev->core, "Could not allocate XDR buffer\n");
646 error = -ENOMEM;
647 goto fail_free_priv;
648 }
649
650 /* Put FIFO at begginning of XDR buffer */
651 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
652 priv->fifo_ptr = priv->fifo_base;
653
654 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
655 if (ps3_open_hv_device(dev)) {
656 dev_err(&dev->core, "ps3_open_hv_device failed\n");
657 error = -EAGAIN;
658 goto out_free_xdr_buf;
659 }
660
661 /* Request memory */
662 status = -1;
663 ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
664 if (!ddr_size) {
665 dev_err(&dev->core, "Specified size is too small\n");
666 error = -EINVAL;
667 goto out_close_gpu;
668 }
669
670 while (ddr_size > 0) {
671 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
672 &priv->memory_handle,
673 &ddr_lpar);
674 if (!status)
675 break;
676 ddr_size -= 1024*1024;
677 }
678 if (status) {
679 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
680 status);
681 error = -ENOMEM;
682 goto out_close_gpu;
683 }
684
685 /* Request context */
686 status = lv1_gpu_context_allocate(priv->memory_handle, 0,
687 &priv->context_handle, &ctrl_lpar,
688 &info_lpar, &reports_lpar,
689 &reports_size);
690 if (status) {
691 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
692 status);
693 error = -ENOMEM;
694 goto out_free_memory;
695 }
696
697 /* Map XDR buffer to RSX */
698 xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf));
699 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
700 xdr_lpar, XDR_BUF_SIZE,
701 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
702 CBE_IOPTE_M);
703 if (status) {
704 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
705 status);
706 error = -ENOMEM;
707 goto out_free_context;
708 }
709
710 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
711 if (!priv->ctrl) {
712 dev_err(&dev->core, "ioremap CTRL failed\n");
713 error = -ENOMEM;
714 goto out_unmap_context;
715 }
716
717 priv->reports = ioremap(reports_lpar, reports_size);
718 if (!priv->reports) {
719 dev_err(&dev->core, "ioremap REPORTS failed\n");
720 error = -ENOMEM;
721 goto out_unmap_ctrl;
722 }
723
724 mutex_lock(&ps3_gpu_mutex);
725 ps3vram_init_ring(dev);
726 mutex_unlock(&ps3_gpu_mutex);
727
728 priv->size = ddr_size;
729
730 ps3vram_bind(dev);
731
732 mutex_lock(&ps3_gpu_mutex);
733 error = ps3vram_wait_ring(dev, 100);
734 mutex_unlock(&ps3_gpu_mutex);
735 if (error < 0) {
736 dev_err(&dev->core, "Failed to initialize channels\n");
737 error = -ETIMEDOUT;
738 goto out_unmap_reports;
739 }
740
741 ps3vram_cache_init(dev);
742 ps3vram_proc_init(dev);
743
744 queue = blk_alloc_queue(GFP_KERNEL);
745 if (!queue) {
746 dev_err(&dev->core, "blk_alloc_queue failed\n");
747 error = -ENOMEM;
748 goto out_cache_cleanup;
749 }
750
751 priv->queue = queue;
752 queue->queuedata = dev;
753 blk_queue_make_request(queue, ps3vram_make_request);
754 blk_queue_max_segments(queue, BLK_MAX_SEGMENTS);
755 blk_queue_max_segment_size(queue, BLK_MAX_SEGMENT_SIZE);
756 blk_queue_max_hw_sectors(queue, BLK_SAFE_MAX_SECTORS);
757
758 gendisk = alloc_disk(1);
759 if (!gendisk) {
760 dev_err(&dev->core, "alloc_disk failed\n");
761 error = -ENOMEM;
762 goto fail_cleanup_queue;
763 }
764
765 priv->gendisk = gendisk;
766 gendisk->major = ps3vram_major;
767 gendisk->first_minor = 0;
768 gendisk->fops = &ps3vram_fops;
769 gendisk->queue = queue;
770 gendisk->private_data = dev;
771 gendisk->driverfs_dev = &dev->core;
772 strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
773 set_capacity(gendisk, priv->size >> 9);
774
775 dev_info(&dev->core, "%s: Using %lu MiB of GPU memory\n",
776 gendisk->disk_name, get_capacity(gendisk) >> 11);
777
778 add_disk(gendisk);
779 return 0;
780
781fail_cleanup_queue:
782 blk_cleanup_queue(queue);
783out_cache_cleanup:
784 remove_proc_entry(DEVICE_NAME, NULL);
785 ps3vram_cache_cleanup(dev);
786out_unmap_reports:
787 iounmap(priv->reports);
788out_unmap_ctrl:
789 iounmap(priv->ctrl);
790out_unmap_context:
791 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar,
792 XDR_BUF_SIZE, CBE_IOPTE_M);
793out_free_context:
794 lv1_gpu_context_free(priv->context_handle);
795out_free_memory:
796 lv1_gpu_memory_free(priv->memory_handle);
797out_close_gpu:
798 ps3_close_hv_device(dev);
799out_free_xdr_buf:
800 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
801fail_free_priv:
802 kfree(priv);
803 ps3_system_bus_set_drvdata(dev, NULL);
804fail:
805 return error;
806}
807
808static int ps3vram_remove(struct ps3_system_bus_device *dev)
809{
810 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
811
812 del_gendisk(priv->gendisk);
813 put_disk(priv->gendisk);
814 blk_cleanup_queue(priv->queue);
815 remove_proc_entry(DEVICE_NAME, NULL);
816 ps3vram_cache_cleanup(dev);
817 iounmap(priv->reports);
818 iounmap(priv->ctrl);
819 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
820 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
821 XDR_BUF_SIZE, CBE_IOPTE_M);
822 lv1_gpu_context_free(priv->context_handle);
823 lv1_gpu_memory_free(priv->memory_handle);
824 ps3_close_hv_device(dev);
825 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
826 kfree(priv);
827 ps3_system_bus_set_drvdata(dev, NULL);
828 return 0;
829}
830
831static struct ps3_system_bus_driver ps3vram = {
832 .match_id = PS3_MATCH_ID_GPU,
833 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
834 .core.name = DEVICE_NAME,
835 .core.owner = THIS_MODULE,
836 .probe = ps3vram_probe,
837 .remove = ps3vram_remove,
838 .shutdown = ps3vram_remove,
839};
840
841
842static int __init ps3vram_init(void)
843{
844 int error;
845
846 if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
847 return -ENODEV;
848
849 error = register_blkdev(0, DEVICE_NAME);
850 if (error <= 0) {
851 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
852 return error;
853 }
854 ps3vram_major = error;
855
856 pr_info("%s: registered block device major %d\n", DEVICE_NAME,
857 ps3vram_major);
858
859 error = ps3_system_bus_driver_register(&ps3vram);
860 if (error)
861 unregister_blkdev(ps3vram_major, DEVICE_NAME);
862
863 return error;
864}
865
866static void __exit ps3vram_exit(void)
867{
868 ps3_system_bus_driver_unregister(&ps3vram);
869 unregister_blkdev(ps3vram_major, DEVICE_NAME);
870}
871
872module_init(ps3vram_init);
873module_exit(ps3vram_exit);
874
875MODULE_LICENSE("GPL");
876MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
877MODULE_AUTHOR("Sony Corporation");
878MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * ps3vram - Use extra PS3 video ram as block device.
4 *
5 * Copyright 2009 Sony Corporation
6 *
7 * Based on the MTD ps3vram driver, which is
8 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
9 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
10 */
11
12#include <linux/blkdev.h>
13#include <linux/delay.h>
14#include <linux/module.h>
15#include <linux/proc_fs.h>
16#include <linux/seq_file.h>
17#include <linux/slab.h>
18
19#include <asm/cell-regs.h>
20#include <asm/firmware.h>
21#include <asm/lv1call.h>
22#include <asm/ps3.h>
23#include <asm/ps3gpu.h>
24
25
26#define DEVICE_NAME "ps3vram"
27
28
29#define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
30#define XDR_IOIF 0x0c000000
31
32#define FIFO_BASE XDR_IOIF
33#define FIFO_SIZE (64 * 1024)
34
35#define DMA_PAGE_SIZE (4 * 1024)
36
37#define CACHE_PAGE_SIZE (256 * 1024)
38#define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
39
40#define CACHE_OFFSET CACHE_PAGE_SIZE
41#define FIFO_OFFSET 0
42
43#define CTRL_PUT 0x10
44#define CTRL_GET 0x11
45#define CTRL_TOP 0x15
46
47#define UPLOAD_SUBCH 1
48#define DOWNLOAD_SUBCH 2
49
50#define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
51#define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
52
53#define CACHE_PAGE_PRESENT 1
54#define CACHE_PAGE_DIRTY 2
55
56struct ps3vram_tag {
57 unsigned int address;
58 unsigned int flags;
59};
60
61struct ps3vram_cache {
62 unsigned int page_count;
63 unsigned int page_size;
64 struct ps3vram_tag *tags;
65 unsigned int hit;
66 unsigned int miss;
67};
68
69struct ps3vram_priv {
70 struct gendisk *gendisk;
71
72 u64 size;
73
74 u64 memory_handle;
75 u64 context_handle;
76 u32 __iomem *ctrl;
77 void __iomem *reports;
78 u8 *xdr_buf;
79
80 u32 *fifo_base;
81 u32 *fifo_ptr;
82
83 struct ps3vram_cache cache;
84
85 spinlock_t lock; /* protecting list of bios */
86 struct bio_list list;
87};
88
89
90static int ps3vram_major;
91
92#define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
93#define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
94#define DMA_NOTIFIER_SIZE 0x40
95#define NOTIFIER 7 /* notifier used for completion report */
96
97static char *size = "256M";
98module_param(size, charp, 0);
99MODULE_PARM_DESC(size, "memory size");
100
101static u32 __iomem *ps3vram_get_notifier(void __iomem *reports, int notifier)
102{
103 return reports + DMA_NOTIFIER_OFFSET_BASE +
104 DMA_NOTIFIER_SIZE * notifier;
105}
106
107static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
108{
109 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
110 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
111 int i;
112
113 for (i = 0; i < 4; i++)
114 iowrite32be(0xffffffff, notify + i);
115}
116
117static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
118 unsigned int timeout_ms)
119{
120 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
121 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
122 unsigned long timeout;
123
124 for (timeout = 20; timeout; timeout--) {
125 if (!ioread32be(notify + 3))
126 return 0;
127 udelay(10);
128 }
129
130 timeout = jiffies + msecs_to_jiffies(timeout_ms);
131
132 do {
133 if (!ioread32be(notify + 3))
134 return 0;
135 msleep(1);
136 } while (time_before(jiffies, timeout));
137
138 return -ETIMEDOUT;
139}
140
141static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
142{
143 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
144
145 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
146 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_GET);
147}
148
149static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
150 unsigned int timeout_ms)
151{
152 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
153 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
154
155 do {
156 if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET))
157 return 0;
158 msleep(1);
159 } while (time_before(jiffies, timeout));
160
161 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
162 ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET),
163 ioread32be(priv->ctrl + CTRL_TOP));
164
165 return -ETIMEDOUT;
166}
167
168static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
169{
170 *(priv->fifo_ptr)++ = data;
171}
172
173static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
174 u32 size)
175{
176 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
177}
178
179static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
180{
181 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
182 int status;
183
184 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
185
186 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
187
188 /* asking the HV for a blit will kick the FIFO */
189 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
190 if (status)
191 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
192 __func__, status);
193
194 priv->fifo_ptr = priv->fifo_base;
195}
196
197static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
198{
199 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
200 int status;
201
202 mutex_lock(&ps3_gpu_mutex);
203
204 iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base)
205 * sizeof(u32), priv->ctrl + CTRL_PUT);
206
207 /* asking the HV for a blit will kick the FIFO */
208 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
209 if (status)
210 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
211 __func__, status);
212
213 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
214 FIFO_SIZE - 1024) {
215 dev_dbg(&dev->core, "FIFO full, rewinding\n");
216 ps3vram_wait_ring(dev, 200);
217 ps3vram_rewind_ring(dev);
218 }
219
220 mutex_unlock(&ps3_gpu_mutex);
221}
222
223static void ps3vram_bind(struct ps3_system_bus_device *dev)
224{
225 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
226
227 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
228 ps3vram_out_ring(priv, 0x31337303);
229 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
230 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
231 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
232 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
233
234 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
235 ps3vram_out_ring(priv, 0x3137c0de);
236 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
237 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
238 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
239 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
240
241 ps3vram_fire_ring(dev);
242}
243
244static int ps3vram_upload(struct ps3_system_bus_device *dev,
245 unsigned int src_offset, unsigned int dst_offset,
246 int len, int count)
247{
248 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
249
250 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
251 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
252 ps3vram_out_ring(priv, XDR_IOIF + src_offset);
253 ps3vram_out_ring(priv, dst_offset);
254 ps3vram_out_ring(priv, len);
255 ps3vram_out_ring(priv, len);
256 ps3vram_out_ring(priv, len);
257 ps3vram_out_ring(priv, count);
258 ps3vram_out_ring(priv, (1 << 8) | 1);
259 ps3vram_out_ring(priv, 0);
260
261 ps3vram_notifier_reset(dev);
262 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
263 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
264 ps3vram_out_ring(priv, 0);
265 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
266 ps3vram_out_ring(priv, 0);
267 ps3vram_fire_ring(dev);
268 if (ps3vram_notifier_wait(dev, 200) < 0) {
269 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
270 return -1;
271 }
272
273 return 0;
274}
275
276static int ps3vram_download(struct ps3_system_bus_device *dev,
277 unsigned int src_offset, unsigned int dst_offset,
278 int len, int count)
279{
280 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
281
282 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
283 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
284 ps3vram_out_ring(priv, src_offset);
285 ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
286 ps3vram_out_ring(priv, len);
287 ps3vram_out_ring(priv, len);
288 ps3vram_out_ring(priv, len);
289 ps3vram_out_ring(priv, count);
290 ps3vram_out_ring(priv, (1 << 8) | 1);
291 ps3vram_out_ring(priv, 0);
292
293 ps3vram_notifier_reset(dev);
294 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
295 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
296 ps3vram_out_ring(priv, 0);
297 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
298 ps3vram_out_ring(priv, 0);
299 ps3vram_fire_ring(dev);
300 if (ps3vram_notifier_wait(dev, 200) < 0) {
301 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
302 return -1;
303 }
304
305 return 0;
306}
307
308static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
309{
310 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
311 struct ps3vram_cache *cache = &priv->cache;
312
313 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
314 return;
315
316 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
317 cache->tags[entry].address);
318 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
319 cache->tags[entry].address, DMA_PAGE_SIZE,
320 cache->page_size / DMA_PAGE_SIZE) < 0) {
321 dev_err(&dev->core,
322 "Failed to upload from 0x%x to " "0x%x size 0x%x\n",
323 entry * cache->page_size, cache->tags[entry].address,
324 cache->page_size);
325 }
326 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
327}
328
329static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
330 unsigned int address)
331{
332 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
333 struct ps3vram_cache *cache = &priv->cache;
334
335 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
336 if (ps3vram_download(dev, address,
337 CACHE_OFFSET + entry * cache->page_size,
338 DMA_PAGE_SIZE,
339 cache->page_size / DMA_PAGE_SIZE) < 0) {
340 dev_err(&dev->core,
341 "Failed to download from 0x%x to 0x%x size 0x%x\n",
342 address, entry * cache->page_size, cache->page_size);
343 }
344
345 cache->tags[entry].address = address;
346 cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
347}
348
349
350static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
351{
352 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
353 struct ps3vram_cache *cache = &priv->cache;
354 int i;
355
356 dev_dbg(&dev->core, "FLUSH\n");
357 for (i = 0; i < cache->page_count; i++) {
358 ps3vram_cache_evict(dev, i);
359 cache->tags[i].flags = 0;
360 }
361}
362
363static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
364 loff_t address)
365{
366 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
367 struct ps3vram_cache *cache = &priv->cache;
368 unsigned int base;
369 unsigned int offset;
370 int i;
371 static int counter;
372
373 offset = (unsigned int) (address & (cache->page_size - 1));
374 base = (unsigned int) (address - offset);
375
376 /* fully associative check */
377 for (i = 0; i < cache->page_count; i++) {
378 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
379 cache->tags[i].address == base) {
380 cache->hit++;
381 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
382 cache->tags[i].address);
383 return i;
384 }
385 }
386
387 /* choose a random entry */
388 i = (jiffies + (counter++)) % cache->page_count;
389 dev_dbg(&dev->core, "Using entry %d\n", i);
390
391 ps3vram_cache_evict(dev, i);
392 ps3vram_cache_load(dev, i, base);
393
394 cache->miss++;
395 return i;
396}
397
398static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
399{
400 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
401
402 priv->cache.page_count = CACHE_PAGE_COUNT;
403 priv->cache.page_size = CACHE_PAGE_SIZE;
404 priv->cache.tags = kcalloc(CACHE_PAGE_COUNT,
405 sizeof(struct ps3vram_tag),
406 GFP_KERNEL);
407 if (!priv->cache.tags)
408 return -ENOMEM;
409
410 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
411 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
412
413 return 0;
414}
415
416static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
417{
418 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
419
420 ps3vram_cache_flush(dev);
421 kfree(priv->cache.tags);
422}
423
424static blk_status_t ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
425 size_t len, size_t *retlen, u_char *buf)
426{
427 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
428 unsigned int cached, count;
429
430 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
431 (unsigned int)from, len);
432
433 if (from >= priv->size)
434 return BLK_STS_IOERR;
435
436 if (len > priv->size - from)
437 len = priv->size - from;
438
439 /* Copy from vram to buf */
440 count = len;
441 while (count) {
442 unsigned int offset, avail;
443 unsigned int entry;
444
445 offset = (unsigned int) (from & (priv->cache.page_size - 1));
446 avail = priv->cache.page_size - offset;
447
448 entry = ps3vram_cache_match(dev, from);
449 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
450
451 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
452 "avail=%08x count=%08x\n", __func__,
453 (unsigned int)from, cached, offset, avail, count);
454
455 if (avail > count)
456 avail = count;
457 memcpy(buf, priv->xdr_buf + cached, avail);
458
459 buf += avail;
460 count -= avail;
461 from += avail;
462 }
463
464 *retlen = len;
465 return 0;
466}
467
468static blk_status_t ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
469 size_t len, size_t *retlen, const u_char *buf)
470{
471 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
472 unsigned int cached, count;
473
474 if (to >= priv->size)
475 return BLK_STS_IOERR;
476
477 if (len > priv->size - to)
478 len = priv->size - to;
479
480 /* Copy from buf to vram */
481 count = len;
482 while (count) {
483 unsigned int offset, avail;
484 unsigned int entry;
485
486 offset = (unsigned int) (to & (priv->cache.page_size - 1));
487 avail = priv->cache.page_size - offset;
488
489 entry = ps3vram_cache_match(dev, to);
490 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
491
492 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
493 "avail=%08x count=%08x\n", __func__, (unsigned int)to,
494 cached, offset, avail, count);
495
496 if (avail > count)
497 avail = count;
498 memcpy(priv->xdr_buf + cached, buf, avail);
499
500 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
501
502 buf += avail;
503 count -= avail;
504 to += avail;
505 }
506
507 *retlen = len;
508 return 0;
509}
510
511static int ps3vram_proc_show(struct seq_file *m, void *v)
512{
513 struct ps3vram_priv *priv = m->private;
514
515 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
516 return 0;
517}
518
519static void ps3vram_proc_init(struct ps3_system_bus_device *dev)
520{
521 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
522 struct proc_dir_entry *pde;
523
524 pde = proc_create_single_data(DEVICE_NAME, 0444, NULL,
525 ps3vram_proc_show, priv);
526 if (!pde)
527 dev_warn(&dev->core, "failed to create /proc entry\n");
528}
529
530static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev,
531 struct bio *bio)
532{
533 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
534 int write = bio_data_dir(bio) == WRITE;
535 const char *op = write ? "write" : "read";
536 loff_t offset = bio->bi_iter.bi_sector << 9;
537 blk_status_t error = 0;
538 struct bio_vec bvec;
539 struct bvec_iter iter;
540 struct bio *next;
541
542 bio_for_each_segment(bvec, bio, iter) {
543 /* PS3 is ppc64, so we don't handle highmem */
544 char *ptr = bvec_virt(&bvec);
545 size_t len = bvec.bv_len, retlen;
546
547 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op,
548 len, offset);
549 if (write)
550 error = ps3vram_write(dev, offset, len, &retlen, ptr);
551 else
552 error = ps3vram_read(dev, offset, len, &retlen, ptr);
553
554 if (error) {
555 dev_err(&dev->core, "%s failed\n", op);
556 goto out;
557 }
558
559 if (retlen != len) {
560 dev_err(&dev->core, "Short %s\n", op);
561 error = BLK_STS_IOERR;
562 goto out;
563 }
564
565 offset += len;
566 }
567
568 dev_dbg(&dev->core, "%s completed\n", op);
569
570out:
571 spin_lock_irq(&priv->lock);
572 bio_list_pop(&priv->list);
573 next = bio_list_peek(&priv->list);
574 spin_unlock_irq(&priv->lock);
575
576 bio->bi_status = error;
577 bio_endio(bio);
578 return next;
579}
580
581static void ps3vram_submit_bio(struct bio *bio)
582{
583 struct ps3_system_bus_device *dev = bio->bi_bdev->bd_disk->private_data;
584 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
585 int busy;
586
587 dev_dbg(&dev->core, "%s\n", __func__);
588
589 bio = bio_split_to_limits(bio);
590 if (!bio)
591 return;
592
593 spin_lock_irq(&priv->lock);
594 busy = !bio_list_empty(&priv->list);
595 bio_list_add(&priv->list, bio);
596 spin_unlock_irq(&priv->lock);
597
598 if (busy)
599 return;
600
601 do {
602 bio = ps3vram_do_bio(dev, bio);
603 } while (bio);
604}
605
606static const struct block_device_operations ps3vram_fops = {
607 .owner = THIS_MODULE,
608 .submit_bio = ps3vram_submit_bio,
609};
610
611static int ps3vram_probe(struct ps3_system_bus_device *dev)
612{
613 struct ps3vram_priv *priv;
614 int error, status;
615 struct gendisk *gendisk;
616 u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar,
617 reports_size, xdr_lpar;
618 char *rest;
619
620 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
621 if (!priv) {
622 error = -ENOMEM;
623 goto fail;
624 }
625
626 spin_lock_init(&priv->lock);
627 bio_list_init(&priv->list);
628 ps3_system_bus_set_drvdata(dev, priv);
629
630 /* Allocate XDR buffer (1MiB aligned) */
631 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
632 get_order(XDR_BUF_SIZE));
633 if (priv->xdr_buf == NULL) {
634 dev_err(&dev->core, "Could not allocate XDR buffer\n");
635 error = -ENOMEM;
636 goto fail_free_priv;
637 }
638
639 /* Put FIFO at begginning of XDR buffer */
640 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
641 priv->fifo_ptr = priv->fifo_base;
642
643 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
644 if (ps3_open_hv_device(dev)) {
645 dev_err(&dev->core, "ps3_open_hv_device failed\n");
646 error = -EAGAIN;
647 goto out_free_xdr_buf;
648 }
649
650 /* Request memory */
651 status = -1;
652 ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
653 if (!ddr_size) {
654 dev_err(&dev->core, "Specified size is too small\n");
655 error = -EINVAL;
656 goto out_close_gpu;
657 }
658
659 while (ddr_size > 0) {
660 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
661 &priv->memory_handle,
662 &ddr_lpar);
663 if (!status)
664 break;
665 ddr_size -= 1024*1024;
666 }
667 if (status) {
668 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
669 status);
670 error = -ENOMEM;
671 goto out_close_gpu;
672 }
673
674 /* Request context */
675 status = lv1_gpu_context_allocate(priv->memory_handle, 0,
676 &priv->context_handle, &ctrl_lpar,
677 &info_lpar, &reports_lpar,
678 &reports_size);
679 if (status) {
680 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
681 status);
682 error = -ENOMEM;
683 goto out_free_memory;
684 }
685
686 /* Map XDR buffer to RSX */
687 xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf));
688 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
689 xdr_lpar, XDR_BUF_SIZE,
690 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
691 CBE_IOPTE_M);
692 if (status) {
693 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
694 status);
695 error = -ENOMEM;
696 goto out_free_context;
697 }
698
699 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
700 if (!priv->ctrl) {
701 dev_err(&dev->core, "ioremap CTRL failed\n");
702 error = -ENOMEM;
703 goto out_unmap_context;
704 }
705
706 priv->reports = ioremap(reports_lpar, reports_size);
707 if (!priv->reports) {
708 dev_err(&dev->core, "ioremap REPORTS failed\n");
709 error = -ENOMEM;
710 goto out_unmap_ctrl;
711 }
712
713 mutex_lock(&ps3_gpu_mutex);
714 ps3vram_init_ring(dev);
715 mutex_unlock(&ps3_gpu_mutex);
716
717 priv->size = ddr_size;
718
719 ps3vram_bind(dev);
720
721 mutex_lock(&ps3_gpu_mutex);
722 error = ps3vram_wait_ring(dev, 100);
723 mutex_unlock(&ps3_gpu_mutex);
724 if (error < 0) {
725 dev_err(&dev->core, "Failed to initialize channels\n");
726 error = -ETIMEDOUT;
727 goto out_unmap_reports;
728 }
729
730 error = ps3vram_cache_init(dev);
731 if (error < 0) {
732 goto out_unmap_reports;
733 }
734
735 ps3vram_proc_init(dev);
736
737 gendisk = blk_alloc_disk(NUMA_NO_NODE);
738 if (!gendisk) {
739 dev_err(&dev->core, "blk_alloc_disk failed\n");
740 error = -ENOMEM;
741 goto out_cache_cleanup;
742 }
743
744 priv->gendisk = gendisk;
745 gendisk->major = ps3vram_major;
746 gendisk->minors = 1;
747 gendisk->flags |= GENHD_FL_NO_PART;
748 gendisk->fops = &ps3vram_fops;
749 gendisk->private_data = dev;
750 strscpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
751 set_capacity(gendisk, priv->size >> 9);
752 blk_queue_max_segments(gendisk->queue, BLK_MAX_SEGMENTS);
753 blk_queue_max_segment_size(gendisk->queue, BLK_MAX_SEGMENT_SIZE);
754 blk_queue_max_hw_sectors(gendisk->queue, BLK_SAFE_MAX_SECTORS);
755
756 dev_info(&dev->core, "%s: Using %llu MiB of GPU memory\n",
757 gendisk->disk_name, get_capacity(gendisk) >> 11);
758
759 error = device_add_disk(&dev->core, gendisk, NULL);
760 if (error)
761 goto out_cleanup_disk;
762
763 return 0;
764
765out_cleanup_disk:
766 put_disk(gendisk);
767out_cache_cleanup:
768 remove_proc_entry(DEVICE_NAME, NULL);
769 ps3vram_cache_cleanup(dev);
770out_unmap_reports:
771 iounmap(priv->reports);
772out_unmap_ctrl:
773 iounmap(priv->ctrl);
774out_unmap_context:
775 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar,
776 XDR_BUF_SIZE, CBE_IOPTE_M);
777out_free_context:
778 lv1_gpu_context_free(priv->context_handle);
779out_free_memory:
780 lv1_gpu_memory_free(priv->memory_handle);
781out_close_gpu:
782 ps3_close_hv_device(dev);
783out_free_xdr_buf:
784 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
785fail_free_priv:
786 kfree(priv);
787 ps3_system_bus_set_drvdata(dev, NULL);
788fail:
789 return error;
790}
791
792static void ps3vram_remove(struct ps3_system_bus_device *dev)
793{
794 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
795
796 del_gendisk(priv->gendisk);
797 put_disk(priv->gendisk);
798 remove_proc_entry(DEVICE_NAME, NULL);
799 ps3vram_cache_cleanup(dev);
800 iounmap(priv->reports);
801 iounmap(priv->ctrl);
802 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
803 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
804 XDR_BUF_SIZE, CBE_IOPTE_M);
805 lv1_gpu_context_free(priv->context_handle);
806 lv1_gpu_memory_free(priv->memory_handle);
807 ps3_close_hv_device(dev);
808 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
809 kfree(priv);
810 ps3_system_bus_set_drvdata(dev, NULL);
811}
812
813static struct ps3_system_bus_driver ps3vram = {
814 .match_id = PS3_MATCH_ID_GPU,
815 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
816 .core.name = DEVICE_NAME,
817 .core.owner = THIS_MODULE,
818 .probe = ps3vram_probe,
819 .remove = ps3vram_remove,
820 .shutdown = ps3vram_remove,
821};
822
823
824static int __init ps3vram_init(void)
825{
826 int error;
827
828 if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
829 return -ENODEV;
830
831 error = register_blkdev(0, DEVICE_NAME);
832 if (error <= 0) {
833 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
834 return error;
835 }
836 ps3vram_major = error;
837
838 pr_info("%s: registered block device major %d\n", DEVICE_NAME,
839 ps3vram_major);
840
841 error = ps3_system_bus_driver_register(&ps3vram);
842 if (error)
843 unregister_blkdev(ps3vram_major, DEVICE_NAME);
844
845 return error;
846}
847
848static void __exit ps3vram_exit(void)
849{
850 ps3_system_bus_driver_unregister(&ps3vram);
851 unregister_blkdev(ps3vram_major, DEVICE_NAME);
852}
853
854module_init(ps3vram_init);
855module_exit(ps3vram_exit);
856
857MODULE_LICENSE("GPL");
858MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
859MODULE_AUTHOR("Sony Corporation");
860MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);