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1/*
2 * linux/arch/arm/mach-realview/realview_pb1176.c
3 *
4 * Copyright (C) 2008 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */
21
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/device.h>
25#include <linux/amba/bus.h>
26#include <linux/amba/pl061.h>
27#include <linux/amba/mmci.h>
28#include <linux/amba/pl022.h>
29#include <linux/mtd/physmap.h>
30#include <linux/mtd/partitions.h>
31#include <linux/io.h>
32
33#include <mach/hardware.h>
34#include <asm/irq.h>
35#include <asm/leds.h>
36#include <asm/mach-types.h>
37#include <asm/pmu.h>
38#include <asm/pgtable.h>
39#include <asm/hardware/gic.h>
40#include <asm/hardware/cache-l2x0.h>
41
42#include <asm/mach/arch.h>
43#include <asm/mach/flash.h>
44#include <asm/mach/map.h>
45#include <asm/mach/time.h>
46
47#include <mach/board-pb1176.h>
48#include <mach/irqs.h>
49
50#include "core.h"
51
52static struct map_desc realview_pb1176_io_desc[] __initdata = {
53 {
54 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
55 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
56 .length = SZ_4K,
57 .type = MT_DEVICE,
58 }, {
59 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_CPU_BASE),
60 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_CPU_BASE),
61 .length = SZ_4K,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = IO_ADDRESS(REALVIEW_PB1176_GIC_DIST_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_PB1176_GIC_DIST_BASE),
66 .length = SZ_4K,
67 .type = MT_DEVICE,
68 }, {
69 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_CPU_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_CPU_BASE),
71 .length = SZ_4K,
72 .type = MT_DEVICE,
73 }, {
74 .virtual = IO_ADDRESS(REALVIEW_DC1176_GIC_DIST_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_DC1176_GIC_DIST_BASE),
76 .length = SZ_4K,
77 .type = MT_DEVICE,
78 }, {
79 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
80 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
81 .length = SZ_4K,
82 .type = MT_DEVICE,
83 }, {
84 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER0_1_BASE),
85 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER0_1_BASE),
86 .length = SZ_4K,
87 .type = MT_DEVICE,
88 }, {
89 .virtual = IO_ADDRESS(REALVIEW_PB1176_TIMER2_3_BASE),
90 .pfn = __phys_to_pfn(REALVIEW_PB1176_TIMER2_3_BASE),
91 .length = SZ_4K,
92 .type = MT_DEVICE,
93 }, {
94 .virtual = IO_ADDRESS(REALVIEW_PB1176_L220_BASE),
95 .pfn = __phys_to_pfn(REALVIEW_PB1176_L220_BASE),
96 .length = SZ_8K,
97 .type = MT_DEVICE,
98 },
99#ifdef CONFIG_DEBUG_LL
100 {
101 .virtual = IO_ADDRESS(REALVIEW_PB1176_UART0_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_PB1176_UART0_BASE),
103 .length = SZ_4K,
104 .type = MT_DEVICE,
105 },
106#endif
107};
108
109static void __init realview_pb1176_map_io(void)
110{
111 iotable_init(realview_pb1176_io_desc, ARRAY_SIZE(realview_pb1176_io_desc));
112}
113
114static struct pl061_platform_data gpio0_plat_data = {
115 .gpio_base = 0,
116};
117
118static struct pl061_platform_data gpio1_plat_data = {
119 .gpio_base = 8,
120};
121
122static struct pl061_platform_data gpio2_plat_data = {
123 .gpio_base = 16,
124};
125
126static struct pl022_ssp_controller ssp0_plat_data = {
127 .bus_id = 0,
128 .enable_dma = 0,
129 .num_chipselect = 1,
130};
131
132/*
133 * RealView PB1176 AMBA devices
134 */
135#define GPIO2_IRQ { IRQ_PB1176_GPIO2 }
136#define GPIO3_IRQ { IRQ_PB1176_GPIO3 }
137#define AACI_IRQ { IRQ_PB1176_AACI }
138#define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B }
139#define KMI0_IRQ { IRQ_PB1176_KMI0 }
140#define KMI1_IRQ { IRQ_PB1176_KMI1 }
141#define PB1176_SMC_IRQ { }
142#define MPMC_IRQ { }
143#define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD }
144#define SCTL_IRQ { }
145#define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG }
146#define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 }
147#define GPIO1_IRQ { IRQ_PB1176_GPIO1 }
148#define PB1176_RTC_IRQ { IRQ_DC1176_RTC }
149#define SCI_IRQ { IRQ_PB1176_SCI }
150#define PB1176_UART0_IRQ { IRQ_DC1176_UART0 }
151#define PB1176_UART1_IRQ { IRQ_DC1176_UART1 }
152#define PB1176_UART2_IRQ { IRQ_DC1176_UART2 }
153#define PB1176_UART3_IRQ { IRQ_DC1176_UART3 }
154#define PB1176_UART4_IRQ { IRQ_PB1176_UART4 }
155#define PB1176_SSP_IRQ { IRQ_DC1176_SSP }
156
157/* FPGA Primecells */
158APB_DEVICE(aaci, "fpga:aaci", AACI, NULL);
159APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data);
160APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL);
161APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL);
162APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL);
163
164/* DevChip Primecells */
165AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL);
166AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL);
167APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL);
168APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data);
169APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data);
170APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data);
171APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL);
172APB_DEVICE(sci0, "dev:sci0", SCI, NULL);
173APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL);
174APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL);
175APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL);
176APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL);
177APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data);
178AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data);
179
180static struct amba_device *amba_devs[] __initdata = {
181 &uart0_device,
182 &uart1_device,
183 &uart2_device,
184 &uart3_device,
185 &uart4_device,
186 &smc_device,
187 &clcd_device,
188 &sctl_device,
189 &wdog_device,
190 &gpio0_device,
191 &gpio1_device,
192 &gpio2_device,
193 &rtc_device,
194 &sci0_device,
195 &ssp0_device,
196 &aaci_device,
197 &mmc0_device,
198 &kmi0_device,
199 &kmi1_device,
200};
201
202/*
203 * RealView PB1176 platform devices
204 */
205static struct resource realview_pb1176_flash_resources[] = {
206 {
207 .start = REALVIEW_PB1176_FLASH_BASE,
208 .end = REALVIEW_PB1176_FLASH_BASE + REALVIEW_PB1176_FLASH_SIZE - 1,
209 .flags = IORESOURCE_MEM,
210 },
211#ifdef CONFIG_REALVIEW_PB1176_SECURE_FLASH
212 {
213 .start = REALVIEW_PB1176_SEC_FLASH_BASE,
214 .end = REALVIEW_PB1176_SEC_FLASH_BASE + REALVIEW_PB1176_SEC_FLASH_SIZE - 1,
215 .flags = IORESOURCE_MEM,
216 },
217#endif
218};
219
220static struct physmap_flash_data pb1176_rom_pdata = {
221 .probe_type = "map_rom",
222 .width = 4,
223 .nr_parts = 0,
224};
225
226static struct resource pb1176_rom_resources[] = {
227 /*
228 * This exposes the PB1176 DevChip ROM as an MTD ROM mapping.
229 * The reference manual states that this is actually a pseudo-ROM
230 * programmed in NVRAM.
231 */
232 {
233 .start = REALVIEW_DC1176_ROM_BASE,
234 .end = REALVIEW_DC1176_ROM_BASE + SZ_16K - 1,
235 .flags = IORESOURCE_MEM,
236 }
237};
238
239static struct platform_device pb1176_rom_device = {
240 .name = "physmap-flash",
241 .id = -1,
242 .num_resources = ARRAY_SIZE(pb1176_rom_resources),
243 .resource = pb1176_rom_resources,
244 .dev = {
245 .platform_data = &pb1176_rom_pdata,
246 },
247};
248
249static struct resource realview_pb1176_smsc911x_resources[] = {
250 [0] = {
251 .start = REALVIEW_PB1176_ETH_BASE,
252 .end = REALVIEW_PB1176_ETH_BASE + SZ_64K - 1,
253 .flags = IORESOURCE_MEM,
254 },
255 [1] = {
256 .start = IRQ_PB1176_ETH,
257 .end = IRQ_PB1176_ETH,
258 .flags = IORESOURCE_IRQ,
259 },
260};
261
262static struct resource realview_pb1176_isp1761_resources[] = {
263 [0] = {
264 .start = REALVIEW_PB1176_USB_BASE,
265 .end = REALVIEW_PB1176_USB_BASE + SZ_128K - 1,
266 .flags = IORESOURCE_MEM,
267 },
268 [1] = {
269 .start = IRQ_PB1176_USB,
270 .end = IRQ_PB1176_USB,
271 .flags = IORESOURCE_IRQ,
272 },
273};
274
275static struct resource pmu_resource = {
276 .start = IRQ_DC1176_CORE_PMU,
277 .end = IRQ_DC1176_CORE_PMU,
278 .flags = IORESOURCE_IRQ,
279};
280
281static struct platform_device pmu_device = {
282 .name = "arm-pmu",
283 .id = ARM_PMU_DEVICE_CPU,
284 .num_resources = 1,
285 .resource = &pmu_resource,
286};
287
288static struct resource char_lcd_resources[] = {
289 {
290 .start = REALVIEW_CHAR_LCD_BASE,
291 .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
292 .flags = IORESOURCE_MEM,
293 },
294 {
295 .start = IRQ_PB1176_CHARLCD,
296 .end = IRQ_PB1176_CHARLCD,
297 .flags = IORESOURCE_IRQ,
298 },
299};
300
301static struct platform_device char_lcd_device = {
302 .name = "arm-charlcd",
303 .id = -1,
304 .num_resources = ARRAY_SIZE(char_lcd_resources),
305 .resource = char_lcd_resources,
306};
307
308static void __init gic_init_irq(void)
309{
310 /* ARM1176 DevChip GIC, primary */
311 gic_init(0, IRQ_DC1176_GIC_START,
312 __io_address(REALVIEW_DC1176_GIC_DIST_BASE),
313 __io_address(REALVIEW_DC1176_GIC_CPU_BASE));
314
315 /* board GIC, secondary */
316 gic_init(1, IRQ_PB1176_GIC_START,
317 __io_address(REALVIEW_PB1176_GIC_DIST_BASE),
318 __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
319 gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
320}
321
322static void __init realview_pb1176_timer_init(void)
323{
324 timer0_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE);
325 timer1_va_base = __io_address(REALVIEW_PB1176_TIMER0_1_BASE) + 0x20;
326 timer2_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE);
327 timer3_va_base = __io_address(REALVIEW_PB1176_TIMER2_3_BASE) + 0x20;
328
329 realview_timer_init(IRQ_DC1176_TIMER0);
330}
331
332static struct sys_timer realview_pb1176_timer = {
333 .init = realview_pb1176_timer_init,
334};
335
336static void realview_pb1176_restart(char mode, const char *cmd)
337{
338 void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL);
339 void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK);
340 __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
341 __raw_writel(REALVIEW_PB1176_SYS_SOFT_RESET, reset_ctrl);
342 dsb();
343}
344
345static void realview_pb1176_fixup(struct tag *tags, char **from,
346 struct meminfo *meminfo)
347{
348 /*
349 * RealView PB1176 only has 128MB of RAM mapped at 0.
350 */
351 meminfo->bank[0].start = 0;
352 meminfo->bank[0].size = SZ_128M;
353 meminfo->nr_banks = 1;
354}
355
356static void __init realview_pb1176_init(void)
357{
358 int i;
359
360#ifdef CONFIG_CACHE_L2X0
361 /* 128Kb (16Kb/way) 8-way associativity. evmon/parity/share enabled. */
362 l2x0_init(__io_address(REALVIEW_PB1176_L220_BASE), 0x00730000, 0xfe000fff);
363#endif
364
365 realview_flash_register(realview_pb1176_flash_resources,
366 ARRAY_SIZE(realview_pb1176_flash_resources));
367 platform_device_register(&pb1176_rom_device);
368 realview_eth_register(NULL, realview_pb1176_smsc911x_resources);
369 platform_device_register(&realview_i2c_device);
370 realview_usb_register(realview_pb1176_isp1761_resources);
371 platform_device_register(&pmu_device);
372 platform_device_register(&char_lcd_device);
373
374 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
375 struct amba_device *d = amba_devs[i];
376 amba_device_register(d, &iomem_resource);
377 }
378
379#ifdef CONFIG_LEDS
380 leds_event = realview_leds_event;
381#endif
382}
383
384MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
385 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
386 .atag_offset = 0x100,
387 .fixup = realview_pb1176_fixup,
388 .map_io = realview_pb1176_map_io,
389 .init_early = realview_init_early,
390 .init_irq = gic_init_irq,
391 .timer = &realview_pb1176_timer,
392 .handle_irq = gic_handle_irq,
393 .init_machine = realview_pb1176_init,
394#ifdef CONFIG_ZONE_DMA
395 .dma_zone_size = SZ_256M,
396#endif
397 .restart = realview_pb1176_restart,
398MACHINE_END