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1/*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27#ifndef __ASSEMBLER__
28
29#include <linux/delay.h>
30#include <linux/i2c/twl.h>
31#include <plat/common.h>
32#include <asm/proc-fns.h>
33
34#ifdef CONFIG_SOC_OMAP2420
35extern void omap242x_map_common_io(void);
36#else
37static inline void omap242x_map_common_io(void)
38{
39}
40#endif
41
42#ifdef CONFIG_SOC_OMAP2430
43extern void omap243x_map_common_io(void);
44#else
45static inline void omap243x_map_common_io(void)
46{
47}
48#endif
49
50#ifdef CONFIG_ARCH_OMAP3
51extern void omap34xx_map_common_io(void);
52#else
53static inline void omap34xx_map_common_io(void)
54{
55}
56#endif
57
58#ifdef CONFIG_SOC_TI81XX
59extern void omapti81xx_map_common_io(void);
60#else
61static inline void omapti81xx_map_common_io(void)
62{
63}
64#endif
65
66#ifdef CONFIG_SOC_AM33XX
67extern void omapam33xx_map_common_io(void);
68#else
69static inline void omapam33xx_map_common_io(void)
70{
71}
72#endif
73
74#ifdef CONFIG_ARCH_OMAP4
75extern void omap44xx_map_common_io(void);
76#else
77static inline void omap44xx_map_common_io(void)
78{
79}
80#endif
81
82#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
83int omap2_pm_init(void);
84#else
85static inline int omap2_pm_init(void)
86{
87 return 0;
88}
89#endif
90
91#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
92int omap3_pm_init(void);
93#else
94static inline int omap3_pm_init(void)
95{
96 return 0;
97}
98#endif
99
100#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
101int omap4_pm_init(void);
102#else
103static inline int omap4_pm_init(void)
104{
105 return 0;
106}
107#endif
108
109#ifdef CONFIG_OMAP_MUX
110int omap_mux_late_init(void);
111#else
112static inline int omap_mux_late_init(void)
113{
114 return 0;
115}
116#endif
117
118extern void omap2_init_common_infrastructure(void);
119
120extern struct sys_timer omap2_timer;
121extern struct sys_timer omap3_timer;
122extern struct sys_timer omap3_secure_timer;
123extern struct sys_timer omap4_timer;
124
125void omap2420_init_early(void);
126void omap2430_init_early(void);
127void omap3430_init_early(void);
128void omap35xx_init_early(void);
129void omap3630_init_early(void);
130void omap3_init_early(void); /* Do not use this one */
131void am35xx_init_early(void);
132void ti81xx_init_early(void);
133void omap4430_init_early(void);
134void omap3_init_late(void); /* Do not use this one */
135void omap4430_init_late(void);
136void omap2420_init_late(void);
137void omap2430_init_late(void);
138void omap3430_init_late(void);
139void omap35xx_init_late(void);
140void omap3630_init_late(void);
141void am35xx_init_late(void);
142void ti81xx_init_late(void);
143void omap4430_init_late(void);
144int omap2_common_pm_late_init(void);
145void omap_prcm_restart(char, const char *);
146
147/*
148 * IO bases for various OMAP processors
149 * Except the tap base, rest all the io bases
150 * listed are physical addresses.
151 */
152struct omap_globals {
153 u32 class; /* OMAP class to detect */
154 void __iomem *tap; /* Control module ID code */
155 void __iomem *sdrc; /* SDRAM Controller */
156 void __iomem *sms; /* SDRAM Memory Scheduler */
157 void __iomem *ctrl; /* System Control Module */
158 void __iomem *ctrl_pad; /* PAD Control Module */
159 void __iomem *prm; /* Power and Reset Management */
160 void __iomem *cm; /* Clock Management */
161 void __iomem *cm2;
162 void __iomem *prcm_mpu;
163};
164
165void omap2_set_globals_242x(void);
166void omap2_set_globals_243x(void);
167void omap2_set_globals_3xxx(void);
168void omap2_set_globals_443x(void);
169void omap2_set_globals_ti81xx(void);
170void omap2_set_globals_am33xx(void);
171
172/* These get called from omap2_set_globals_xxxx(), do not call these */
173void omap2_set_globals_tap(struct omap_globals *);
174void omap2_set_globals_sdrc(struct omap_globals *);
175void omap2_set_globals_control(struct omap_globals *);
176void omap2_set_globals_prcm(struct omap_globals *);
177
178void omap242x_map_io(void);
179void omap243x_map_io(void);
180void omap3_map_io(void);
181void am33xx_map_io(void);
182void omap4_map_io(void);
183void ti81xx_map_io(void);
184void omap_barriers_init(void);
185
186/**
187 * omap_test_timeout - busy-loop, testing a condition
188 * @cond: condition to test until it evaluates to true
189 * @timeout: maximum number of microseconds in the timeout
190 * @index: loop index (integer)
191 *
192 * Loop waiting for @cond to become true or until at least @timeout
193 * microseconds have passed. To use, define some integer @index in the
194 * calling code. After running, if @index == @timeout, then the loop has
195 * timed out.
196 */
197#define omap_test_timeout(cond, timeout, index) \
198({ \
199 for (index = 0; index < timeout; index++) { \
200 if (cond) \
201 break; \
202 udelay(1); \
203 } \
204})
205
206extern struct device *omap2_get_mpuss_device(void);
207extern struct device *omap2_get_iva_device(void);
208extern struct device *omap2_get_l3_device(void);
209extern struct device *omap4_get_dsp_device(void);
210
211void omap2_init_irq(void);
212void omap3_init_irq(void);
213void ti81xx_init_irq(void);
214extern int omap_irq_pending(void);
215void omap_intc_save_context(void);
216void omap_intc_restore_context(void);
217void omap3_intc_suspend(void);
218void omap3_intc_prepare_idle(void);
219void omap3_intc_resume_idle(void);
220void omap2_intc_handle_irq(struct pt_regs *regs);
221void omap3_intc_handle_irq(struct pt_regs *regs);
222
223#ifdef CONFIG_CACHE_L2X0
224extern void __iomem *omap4_get_l2cache_base(void);
225#endif
226
227struct device_node;
228#ifdef CONFIG_OF
229int __init omap_intc_of_init(struct device_node *node,
230 struct device_node *parent);
231#else
232int __init omap_intc_of_init(struct device_node *node,
233 struct device_node *parent)
234{
235 return 0;
236}
237#endif
238
239#ifdef CONFIG_SMP
240extern void __iomem *omap4_get_scu_base(void);
241#else
242static inline void __iomem *omap4_get_scu_base(void)
243{
244 return NULL;
245}
246#endif
247
248extern void __init gic_init_irq(void);
249extern void omap_smc1(u32 fn, u32 arg);
250extern void __iomem *omap4_get_sar_ram_base(void);
251extern void omap_do_wfi(void);
252
253#ifdef CONFIG_SMP
254/* Needed for secondary core boot */
255extern void omap_secondary_startup(void);
256extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
257extern void omap_auxcoreboot_addr(u32 cpu_addr);
258extern u32 omap_read_auxcoreboot0(void);
259#endif
260
261#if defined(CONFIG_SMP) && defined(CONFIG_PM)
262extern int omap4_mpuss_init(void);
263extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
264extern int omap4_finish_suspend(unsigned long cpu_state);
265extern void omap4_cpu_resume(void);
266extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
267extern u32 omap4_mpuss_read_prev_context_state(void);
268#else
269static inline int omap4_enter_lowpower(unsigned int cpu,
270 unsigned int power_state)
271{
272 cpu_do_idle();
273 return 0;
274}
275
276static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
277{
278 cpu_do_idle();
279 return 0;
280}
281
282static inline int omap4_mpuss_init(void)
283{
284 return 0;
285}
286
287static inline int omap4_finish_suspend(unsigned long cpu_state)
288{
289 return 0;
290}
291
292static inline void omap4_cpu_resume(void)
293{}
294
295static inline u32 omap4_mpuss_read_prev_context_state(void)
296{
297 return 0;
298}
299#endif
300
301struct omap_sdrc_params;
302extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
303 struct omap_sdrc_params *sdrc_cs1);
304struct omap2_hsmmc_info;
305extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
306
307#endif /* __ASSEMBLER__ */
308#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
1/*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27#ifndef __ASSEMBLER__
28
29#include <linux/irq.h>
30#include <linux/delay.h>
31#include <linux/i2c.h>
32#include <linux/mfd/twl.h>
33#include <linux/platform_data/i2c-omap.h>
34#include <linux/reboot.h>
35#include <linux/irqchip/irq-omap-intc.h>
36
37#include <asm/proc-fns.h>
38#include <asm/hardware/cache-l2x0.h>
39
40#include "i2c.h"
41#include "serial.h"
42
43#include "usb.h"
44
45#define OMAP_INTC_START NR_IRQS
46
47extern int (*omap_pm_soc_init)(void);
48int omap_pm_nop_init(void);
49
50#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
51int omap2_pm_init(void);
52#else
53static inline int omap2_pm_init(void)
54{
55 return 0;
56}
57#endif
58
59#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
60int omap3_pm_init(void);
61#else
62static inline int omap3_pm_init(void)
63{
64 return 0;
65}
66#endif
67
68#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
69int omap4_pm_init(void);
70int omap4_pm_init_early(void);
71#else
72static inline int omap4_pm_init(void)
73{
74 return 0;
75}
76
77static inline int omap4_pm_init_early(void)
78{
79 return 0;
80}
81#endif
82
83#if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \
84 defined(CONFIG_SOC_AM43XX))
85int amx3_common_pm_init(void);
86#else
87static inline int amx3_common_pm_init(void)
88{
89 return 0;
90}
91#endif
92
93extern void omap2_init_common_infrastructure(void);
94
95extern void omap_init_time(void);
96extern void omap3_secure_sync32k_timer_init(void);
97extern void omap3_gptimer_timer_init(void);
98extern void omap4_local_timer_init(void);
99#ifdef CONFIG_CACHE_L2X0
100int omap_l2_cache_init(void);
101#define OMAP_L2C_AUX_CTRL (L2C_AUX_CTRL_SHARED_OVERRIDE | \
102 L310_AUX_CTRL_DATA_PREFETCH | \
103 L310_AUX_CTRL_INSTR_PREFETCH)
104void omap4_l2c310_write_sec(unsigned long val, unsigned reg);
105#else
106static inline int omap_l2_cache_init(void)
107{
108 return 0;
109}
110
111#define OMAP_L2C_AUX_CTRL 0
112#define omap4_l2c310_write_sec NULL
113#endif
114
115#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER
116extern void omap5_realtime_timer_init(void);
117#else
118static inline void omap5_realtime_timer_init(void)
119{
120}
121#endif
122
123void omap2420_init_early(void);
124void omap2430_init_early(void);
125void omap3430_init_early(void);
126void omap35xx_init_early(void);
127void omap3630_init_early(void);
128void omap3_init_early(void); /* Do not use this one */
129void am33xx_init_early(void);
130void am35xx_init_early(void);
131void ti814x_init_early(void);
132void ti816x_init_early(void);
133void am43xx_init_early(void);
134void am43xx_init_late(void);
135void omap4430_init_early(void);
136void omap5_init_early(void);
137void omap3_init_late(void);
138void omap4430_init_late(void);
139void omap2420_init_late(void);
140void omap2430_init_late(void);
141void ti81xx_init_late(void);
142void am33xx_init_late(void);
143void omap5_init_late(void);
144int omap2_common_pm_late_init(void);
145void dra7xx_init_early(void);
146void dra7xx_init_late(void);
147
148#ifdef CONFIG_SOC_BUS
149void omap_soc_device_init(void);
150#else
151static inline void omap_soc_device_init(void)
152{
153}
154#endif
155
156#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
157void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
158#else
159static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
160{
161}
162#endif
163
164#ifdef CONFIG_SOC_AM33XX
165void am33xx_restart(enum reboot_mode mode, const char *cmd);
166#else
167static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
168{
169}
170#endif
171
172#ifdef CONFIG_ARCH_OMAP3
173void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
174#else
175static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
176{
177}
178#endif
179
180#ifdef CONFIG_SOC_TI81XX
181void ti81xx_restart(enum reboot_mode mode, const char *cmd);
182#else
183static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
184{
185}
186#endif
187
188#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
189 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
190void omap44xx_restart(enum reboot_mode mode, const char *cmd);
191#else
192static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
193{
194}
195#endif
196
197#ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
198void omap_barrier_reserve_memblock(void);
199void omap_barriers_init(void);
200#else
201static inline void omap_barrier_reserve_memblock(void)
202{
203}
204#endif
205
206/* This gets called from mach-omap2/io.c, do not call this */
207void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
208
209void __init omap242x_map_io(void);
210void __init omap243x_map_io(void);
211void __init omap3_map_io(void);
212void __init am33xx_map_io(void);
213void __init omap4_map_io(void);
214void __init omap5_map_io(void);
215void __init dra7xx_map_io(void);
216void __init ti81xx_map_io(void);
217
218/**
219 * omap_test_timeout - busy-loop, testing a condition
220 * @cond: condition to test until it evaluates to true
221 * @timeout: maximum number of microseconds in the timeout
222 * @index: loop index (integer)
223 *
224 * Loop waiting for @cond to become true or until at least @timeout
225 * microseconds have passed. To use, define some integer @index in the
226 * calling code. After running, if @index == @timeout, then the loop has
227 * timed out.
228 */
229#define omap_test_timeout(cond, timeout, index) \
230({ \
231 for (index = 0; index < timeout; index++) { \
232 if (cond) \
233 break; \
234 udelay(1); \
235 } \
236})
237
238extern struct device *omap2_get_mpuss_device(void);
239extern struct device *omap2_get_iva_device(void);
240extern struct device *omap2_get_l3_device(void);
241extern struct device *omap4_get_dsp_device(void);
242
243void omap_gic_of_init(void);
244
245#ifdef CONFIG_CACHE_L2X0
246extern void __iomem *omap4_get_l2cache_base(void);
247#endif
248
249struct device_node;
250
251#ifdef CONFIG_SMP
252extern void __iomem *omap4_get_scu_base(void);
253#else
254static inline void __iomem *omap4_get_scu_base(void)
255{
256 return NULL;
257}
258#endif
259
260extern void gic_dist_disable(void);
261extern void gic_dist_enable(void);
262extern bool gic_dist_disabled(void);
263extern void gic_timer_retrigger(void);
264extern void _omap_smc1(u32 fn, u32 arg);
265extern void omap4_sar_ram_init(void);
266extern void __iomem *omap4_get_sar_ram_base(void);
267extern void omap4_mpuss_early_init(void);
268extern void omap_do_wfi(void);
269extern void omap_interconnect_sync(void);
270
271#ifdef CONFIG_SMP
272/* Needed for secondary core boot */
273extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
274extern void omap_auxcoreboot_addr(u32 cpu_addr);
275extern u32 omap_read_auxcoreboot0(void);
276
277extern void omap4_cpu_die(unsigned int cpu);
278extern int omap4_cpu_kill(unsigned int cpu);
279
280extern const struct smp_operations omap4_smp_ops;
281#endif
282
283extern u32 omap4_get_cpu1_ns_pa_addr(void);
284
285#if defined(CONFIG_SMP) && defined(CONFIG_PM)
286extern int omap4_mpuss_init(void);
287extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
288extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
289#else
290static inline int omap4_enter_lowpower(unsigned int cpu,
291 unsigned int power_state)
292{
293 cpu_do_idle();
294 return 0;
295}
296
297static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
298{
299 cpu_do_idle();
300 return 0;
301}
302
303static inline int omap4_mpuss_init(void)
304{
305 return 0;
306}
307
308#endif
309
310#ifdef CONFIG_ARCH_OMAP4
311void omap4_secondary_startup(void);
312void omap4460_secondary_startup(void);
313int omap4_finish_suspend(unsigned long cpu_state);
314void omap4_cpu_resume(void);
315#else
316static inline void omap4_secondary_startup(void)
317{
318}
319
320static inline void omap4460_secondary_startup(void)
321{
322}
323static inline int omap4_finish_suspend(unsigned long cpu_state)
324{
325 return 0;
326}
327static inline void omap4_cpu_resume(void)
328{
329}
330#endif
331
332#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
333void omap5_secondary_startup(void);
334void omap5_secondary_hyp_startup(void);
335#else
336static inline void omap5_secondary_startup(void)
337{
338}
339
340static inline void omap5_secondary_hyp_startup(void)
341{
342}
343#endif
344
345struct omap_system_dma_plat_info;
346
347void pdata_quirks_init(const struct of_device_id *);
348void omap_auxdata_legacy_init(struct device *dev);
349void omap_pcs_legacy_init(int irq, void (*rearm)(void));
350extern struct omap_system_dma_plat_info dma_plat_info;
351
352struct omap_sdrc_params;
353extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
354 struct omap_sdrc_params *sdrc_cs1);
355extern void omap_reserve(void);
356
357struct omap_hwmod;
358extern int omap_dss_reset(struct omap_hwmod *);
359
360/* SoC specific clock initializer */
361int omap_clk_init(void);
362
363#if IS_ENABLED(CONFIG_OMAP_IOMMU)
364int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
365 u8 *pwrst);
366#else
367static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
368 bool request, u8 *pwrst)
369{
370 return 0;
371}
372#endif
373
374#endif /* __ASSEMBLER__ */
375#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */