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1/* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
2 *
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
8 */
9
10#include <linux/linkage.h>
11#include <linux/errno.h>
12
13#include <asm/head.h>
14#include <asm/asi.h>
15#include <asm/smp.h>
16#include <asm/contregs.h>
17#include <asm/ptrace.h>
18#include <asm/asm-offsets.h>
19#include <asm/psr.h>
20#include <asm/vaddrs.h>
21#include <asm/page.h>
22#include <asm/pgtable.h>
23#include <asm/winmacro.h>
24#include <asm/signal.h>
25#include <asm/obio.h>
26#include <asm/mxcc.h>
27#include <asm/thread_info.h>
28#include <asm/param.h>
29#include <asm/unistd.h>
30
31#include <asm/asmmacro.h>
32
33#define curptr g6
34
35/* These are just handy. */
36#define _SV save %sp, -STACKFRAME_SZ, %sp
37#define _RS restore
38
39#define FLUSH_ALL_KERNEL_WINDOWS \
40 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
41 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
42
43 .text
44
45#ifdef CONFIG_KGDB
46 .align 4
47 .globl arch_kgdb_breakpoint
48 .type arch_kgdb_breakpoint,#function
49arch_kgdb_breakpoint:
50 ta 0x7d
51 retl
52 nop
53 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
54#endif
55
56#if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
57 .align 4
58 .globl floppy_hardint
59floppy_hardint:
60 /*
61 * This code cannot touch registers %l0 %l1 and %l2
62 * because SAVE_ALL depends on their values. It depends
63 * on %l3 also, but we regenerate it before a call.
64 * Other registers are:
65 * %l3 -- base address of fdc registers
66 * %l4 -- pdma_vaddr
67 * %l5 -- scratch for ld/st address
68 * %l6 -- pdma_size
69 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
70 */
71
72 /* Do we have work to do? */
73 sethi %hi(doing_pdma), %l7
74 ld [%l7 + %lo(doing_pdma)], %l7
75 cmp %l7, 0
76 be floppy_dosoftint
77 nop
78
79 /* Load fdc register base */
80 sethi %hi(fdc_status), %l3
81 ld [%l3 + %lo(fdc_status)], %l3
82
83 /* Setup register addresses */
84 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
85 ld [%l5 + %lo(pdma_vaddr)], %l4
86 sethi %hi(pdma_size), %l5 ! bytes to go
87 ld [%l5 + %lo(pdma_size)], %l6
88next_byte:
89 ldub [%l3], %l7
90
91 andcc %l7, 0x80, %g0 ! Does fifo still have data
92 bz floppy_fifo_emptied ! fifo has been emptied...
93 andcc %l7, 0x20, %g0 ! in non-dma mode still?
94 bz floppy_overrun ! nope, overrun
95 andcc %l7, 0x40, %g0 ! 0=write 1=read
96 bz floppy_write
97 sub %l6, 0x1, %l6
98
99 /* Ok, actually read this byte */
100 ldub [%l3 + 1], %l7
101 orcc %g0, %l6, %g0
102 stb %l7, [%l4]
103 bne next_byte
104 add %l4, 0x1, %l4
105
106 b floppy_tdone
107 nop
108
109floppy_write:
110 /* Ok, actually write this byte */
111 ldub [%l4], %l7
112 orcc %g0, %l6, %g0
113 stb %l7, [%l3 + 1]
114 bne next_byte
115 add %l4, 0x1, %l4
116
117 /* fall through... */
118floppy_tdone:
119 sethi %hi(pdma_vaddr), %l5
120 st %l4, [%l5 + %lo(pdma_vaddr)]
121 sethi %hi(pdma_size), %l5
122 st %l6, [%l5 + %lo(pdma_size)]
123 /* Flip terminal count pin */
124 set auxio_register, %l7
125 ld [%l7], %l7
126
127 ldub [%l7], %l5
128
129 or %l5, 0xc2, %l5
130 stb %l5, [%l7]
131 andn %l5, 0x02, %l5
132
1332:
134 /* Kill some time so the bits set */
135 WRITE_PAUSE
136 WRITE_PAUSE
137
138 stb %l5, [%l7]
139
140 /* Prevent recursion */
141 sethi %hi(doing_pdma), %l7
142 b floppy_dosoftint
143 st %g0, [%l7 + %lo(doing_pdma)]
144
145 /* We emptied the FIFO, but we haven't read everything
146 * as of yet. Store the current transfer address and
147 * bytes left to read so we can continue when the next
148 * fast IRQ comes in.
149 */
150floppy_fifo_emptied:
151 sethi %hi(pdma_vaddr), %l5
152 st %l4, [%l5 + %lo(pdma_vaddr)]
153 sethi %hi(pdma_size), %l7
154 st %l6, [%l7 + %lo(pdma_size)]
155
156 /* Restore condition codes */
157 wr %l0, 0x0, %psr
158 WRITE_PAUSE
159
160 jmp %l1
161 rett %l2
162
163floppy_overrun:
164 sethi %hi(pdma_vaddr), %l5
165 st %l4, [%l5 + %lo(pdma_vaddr)]
166 sethi %hi(pdma_size), %l5
167 st %l6, [%l5 + %lo(pdma_size)]
168 /* Prevent recursion */
169 sethi %hi(doing_pdma), %l7
170 st %g0, [%l7 + %lo(doing_pdma)]
171
172 /* fall through... */
173floppy_dosoftint:
174 rd %wim, %l3
175 SAVE_ALL
176
177 /* Set all IRQs off. */
178 or %l0, PSR_PIL, %l4
179 wr %l4, 0x0, %psr
180 WRITE_PAUSE
181 wr %l4, PSR_ET, %psr
182 WRITE_PAUSE
183
184 mov 11, %o0 ! floppy irq level (unused anyway)
185 mov %g0, %o1 ! devid is not used in fast interrupts
186 call sparc_floppy_irq
187 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
188
189 RESTORE_ALL
190
191#endif /* (CONFIG_BLK_DEV_FD) */
192
193 /* Bad trap handler */
194 .globl bad_trap_handler
195bad_trap_handler:
196 SAVE_ALL
197
198 wr %l0, PSR_ET, %psr
199 WRITE_PAUSE
200
201 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
202 call do_hw_interrupt
203 mov %l7, %o1 ! trap number
204
205 RESTORE_ALL
206
207/* For now all IRQ's not registered get sent here. handler_irq() will
208 * see if a routine is registered to handle this interrupt and if not
209 * it will say so on the console.
210 */
211
212 .align 4
213 .globl real_irq_entry, patch_handler_irq
214real_irq_entry:
215 SAVE_ALL
216
217#ifdef CONFIG_SMP
218 .globl patchme_maybe_smp_msg
219
220 cmp %l7, 11
221patchme_maybe_smp_msg:
222 bgu maybe_smp4m_msg
223 nop
224#endif
225
226real_irq_continue:
227 or %l0, PSR_PIL, %g2
228 wr %g2, 0x0, %psr
229 WRITE_PAUSE
230 wr %g2, PSR_ET, %psr
231 WRITE_PAUSE
232 mov %l7, %o0 ! irq level
233patch_handler_irq:
234 call handler_irq
235 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
236 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
237 wr %g2, PSR_ET, %psr ! keep ET up
238 WRITE_PAUSE
239
240 RESTORE_ALL
241
242#ifdef CONFIG_SMP
243 /* SMP per-cpu ticker interrupts are handled specially. */
244smp4m_ticker:
245 bne real_irq_continue+4
246 or %l0, PSR_PIL, %g2
247 wr %g2, 0x0, %psr
248 WRITE_PAUSE
249 wr %g2, PSR_ET, %psr
250 WRITE_PAUSE
251 call smp4m_percpu_timer_interrupt
252 add %sp, STACKFRAME_SZ, %o0
253 wr %l0, PSR_ET, %psr
254 WRITE_PAUSE
255 RESTORE_ALL
256
257#define GET_PROCESSOR4M_ID(reg) \
258 rd %tbr, %reg; \
259 srl %reg, 12, %reg; \
260 and %reg, 3, %reg;
261
262 /* Here is where we check for possible SMP IPI passed to us
263 * on some level other than 15 which is the NMI and only used
264 * for cross calls. That has a separate entry point below.
265 *
266 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
267 */
268maybe_smp4m_msg:
269 GET_PROCESSOR4M_ID(o3)
270 sethi %hi(sun4m_irq_percpu), %l5
271 sll %o3, 2, %o3
272 or %l5, %lo(sun4m_irq_percpu), %o5
273 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
274 ld [%o5 + %o3], %o1
275 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
276 andcc %o3, %o2, %g0
277 be,a smp4m_ticker
278 cmp %l7, 14
279 /* Soft-IRQ IPI */
280 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
281 WRITE_PAUSE
282 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
283 WRITE_PAUSE
284 or %l0, PSR_PIL, %l4
285 wr %l4, 0x0, %psr
286 WRITE_PAUSE
287 wr %l4, PSR_ET, %psr
288 WRITE_PAUSE
289 srl %o3, 28, %o2 ! shift for simpler checks below
290maybe_smp4m_msg_check_single:
291 andcc %o2, 0x1, %g0
292 beq,a maybe_smp4m_msg_check_mask
293 andcc %o2, 0x2, %g0
294 call smp_call_function_single_interrupt
295 nop
296 andcc %o2, 0x2, %g0
297maybe_smp4m_msg_check_mask:
298 beq,a maybe_smp4m_msg_check_resched
299 andcc %o2, 0x4, %g0
300 call smp_call_function_interrupt
301 nop
302 andcc %o2, 0x4, %g0
303maybe_smp4m_msg_check_resched:
304 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
305 beq,a maybe_smp4m_msg_out
306 nop
307 call smp_resched_interrupt
308 nop
309maybe_smp4m_msg_out:
310 RESTORE_ALL
311
312 .align 4
313 .globl linux_trap_ipi15_sun4m
314linux_trap_ipi15_sun4m:
315 SAVE_ALL
316 sethi %hi(0x80000000), %o2
317 GET_PROCESSOR4M_ID(o0)
318 sethi %hi(sun4m_irq_percpu), %l5
319 or %l5, %lo(sun4m_irq_percpu), %o5
320 sll %o0, 2, %o0
321 ld [%o5 + %o0], %o5
322 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
323 andcc %o3, %o2, %g0
324 be sun4m_nmi_error ! Must be an NMI async memory error
325 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
326 WRITE_PAUSE
327 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
328 WRITE_PAUSE
329 or %l0, PSR_PIL, %l4
330 wr %l4, 0x0, %psr
331 WRITE_PAUSE
332 wr %l4, PSR_ET, %psr
333 WRITE_PAUSE
334 call smp4m_cross_call_irq
335 nop
336 b ret_trap_lockless_ipi
337 clr %l6
338
339 .globl smp4d_ticker
340 /* SMP per-cpu ticker interrupts are handled specially. */
341smp4d_ticker:
342 SAVE_ALL
343 or %l0, PSR_PIL, %g2
344 sethi %hi(CC_ICLR), %o0
345 sethi %hi(1 << 14), %o1
346 or %o0, %lo(CC_ICLR), %o0
347 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
348 wr %g2, 0x0, %psr
349 WRITE_PAUSE
350 wr %g2, PSR_ET, %psr
351 WRITE_PAUSE
352 call smp4d_percpu_timer_interrupt
353 add %sp, STACKFRAME_SZ, %o0
354 wr %l0, PSR_ET, %psr
355 WRITE_PAUSE
356 RESTORE_ALL
357
358 .align 4
359 .globl linux_trap_ipi15_sun4d
360linux_trap_ipi15_sun4d:
361 SAVE_ALL
362 sethi %hi(CC_BASE), %o4
363 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
364 or %o4, (CC_EREG - CC_BASE), %o0
365 ldda [%o0] ASI_M_MXCC, %o0
366 andcc %o0, %o2, %g0
367 bne 1f
368 sethi %hi(BB_STAT2), %o2
369 lduba [%o2] ASI_M_CTL, %o2
370 andcc %o2, BB_STAT2_MASK, %g0
371 bne 2f
372 or %o4, (CC_ICLR - CC_BASE), %o0
373 sethi %hi(1 << 15), %o1
374 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
375 or %l0, PSR_PIL, %l4
376 wr %l4, 0x0, %psr
377 WRITE_PAUSE
378 wr %l4, PSR_ET, %psr
379 WRITE_PAUSE
380 call smp4d_cross_call_irq
381 nop
382 b ret_trap_lockless_ipi
383 clr %l6
384
3851: /* MXCC error */
3862: /* BB error */
387 /* Disable PIL 15 */
388 set CC_IMSK, %l4
389 lduha [%l4] ASI_M_MXCC, %l5
390 sethi %hi(1 << 15), %l7
391 or %l5, %l7, %l5
392 stha %l5, [%l4] ASI_M_MXCC
393 /* FIXME */
3941: b,a 1b
395
396 .globl smpleon_ipi
397 .extern leon_ipi_interrupt
398 /* SMP per-cpu IPI interrupts are handled specially. */
399smpleon_ipi:
400 SAVE_ALL
401 or %l0, PSR_PIL, %g2
402 wr %g2, 0x0, %psr
403 WRITE_PAUSE
404 wr %g2, PSR_ET, %psr
405 WRITE_PAUSE
406 call leonsmp_ipi_interrupt
407 add %sp, STACKFRAME_SZ, %o1 ! pt_regs
408 wr %l0, PSR_ET, %psr
409 WRITE_PAUSE
410 RESTORE_ALL
411
412 .align 4
413 .globl linux_trap_ipi15_leon
414linux_trap_ipi15_leon:
415 SAVE_ALL
416 or %l0, PSR_PIL, %l4
417 wr %l4, 0x0, %psr
418 WRITE_PAUSE
419 wr %l4, PSR_ET, %psr
420 WRITE_PAUSE
421 call leon_cross_call_irq
422 nop
423 b ret_trap_lockless_ipi
424 clr %l6
425
426#endif /* CONFIG_SMP */
427
428 /* This routine handles illegal instructions and privileged
429 * instruction attempts from user code.
430 */
431 .align 4
432 .globl bad_instruction
433bad_instruction:
434 sethi %hi(0xc1f80000), %l4
435 ld [%l1], %l5
436 sethi %hi(0x81d80000), %l7
437 and %l5, %l4, %l5
438 cmp %l5, %l7
439 be 1f
440 SAVE_ALL
441
442 wr %l0, PSR_ET, %psr ! re-enable traps
443 WRITE_PAUSE
444
445 add %sp, STACKFRAME_SZ, %o0
446 mov %l1, %o1
447 mov %l2, %o2
448 call do_illegal_instruction
449 mov %l0, %o3
450
451 RESTORE_ALL
452
4531: /* unimplemented flush - just skip */
454 jmpl %l2, %g0
455 rett %l2 + 4
456
457 .align 4
458 .globl priv_instruction
459priv_instruction:
460 SAVE_ALL
461
462 wr %l0, PSR_ET, %psr
463 WRITE_PAUSE
464
465 add %sp, STACKFRAME_SZ, %o0
466 mov %l1, %o1
467 mov %l2, %o2
468 call do_priv_instruction
469 mov %l0, %o3
470
471 RESTORE_ALL
472
473 /* This routine handles unaligned data accesses. */
474 .align 4
475 .globl mna_handler
476mna_handler:
477 andcc %l0, PSR_PS, %g0
478 be mna_fromuser
479 nop
480
481 SAVE_ALL
482
483 wr %l0, PSR_ET, %psr
484 WRITE_PAUSE
485
486 ld [%l1], %o1
487 call kernel_unaligned_trap
488 add %sp, STACKFRAME_SZ, %o0
489
490 RESTORE_ALL
491
492mna_fromuser:
493 SAVE_ALL
494
495 wr %l0, PSR_ET, %psr ! re-enable traps
496 WRITE_PAUSE
497
498 ld [%l1], %o1
499 call user_unaligned_trap
500 add %sp, STACKFRAME_SZ, %o0
501
502 RESTORE_ALL
503
504 /* This routine handles floating point disabled traps. */
505 .align 4
506 .globl fpd_trap_handler
507fpd_trap_handler:
508 SAVE_ALL
509
510 wr %l0, PSR_ET, %psr ! re-enable traps
511 WRITE_PAUSE
512
513 add %sp, STACKFRAME_SZ, %o0
514 mov %l1, %o1
515 mov %l2, %o2
516 call do_fpd_trap
517 mov %l0, %o3
518
519 RESTORE_ALL
520
521 /* This routine handles Floating Point Exceptions. */
522 .align 4
523 .globl fpe_trap_handler
524fpe_trap_handler:
525 set fpsave_magic, %l5
526 cmp %l1, %l5
527 be 1f
528 sethi %hi(fpsave), %l5
529 or %l5, %lo(fpsave), %l5
530 cmp %l1, %l5
531 bne 2f
532 sethi %hi(fpsave_catch2), %l5
533 or %l5, %lo(fpsave_catch2), %l5
534 wr %l0, 0x0, %psr
535 WRITE_PAUSE
536 jmp %l5
537 rett %l5 + 4
5381:
539 sethi %hi(fpsave_catch), %l5
540 or %l5, %lo(fpsave_catch), %l5
541 wr %l0, 0x0, %psr
542 WRITE_PAUSE
543 jmp %l5
544 rett %l5 + 4
545
5462:
547 SAVE_ALL
548
549 wr %l0, PSR_ET, %psr ! re-enable traps
550 WRITE_PAUSE
551
552 add %sp, STACKFRAME_SZ, %o0
553 mov %l1, %o1
554 mov %l2, %o2
555 call do_fpe_trap
556 mov %l0, %o3
557
558 RESTORE_ALL
559
560 /* This routine handles Tag Overflow Exceptions. */
561 .align 4
562 .globl do_tag_overflow
563do_tag_overflow:
564 SAVE_ALL
565
566 wr %l0, PSR_ET, %psr ! re-enable traps
567 WRITE_PAUSE
568
569 add %sp, STACKFRAME_SZ, %o0
570 mov %l1, %o1
571 mov %l2, %o2
572 call handle_tag_overflow
573 mov %l0, %o3
574
575 RESTORE_ALL
576
577 /* This routine handles Watchpoint Exceptions. */
578 .align 4
579 .globl do_watchpoint
580do_watchpoint:
581 SAVE_ALL
582
583 wr %l0, PSR_ET, %psr ! re-enable traps
584 WRITE_PAUSE
585
586 add %sp, STACKFRAME_SZ, %o0
587 mov %l1, %o1
588 mov %l2, %o2
589 call handle_watchpoint
590 mov %l0, %o3
591
592 RESTORE_ALL
593
594 /* This routine handles Register Access Exceptions. */
595 .align 4
596 .globl do_reg_access
597do_reg_access:
598 SAVE_ALL
599
600 wr %l0, PSR_ET, %psr ! re-enable traps
601 WRITE_PAUSE
602
603 add %sp, STACKFRAME_SZ, %o0
604 mov %l1, %o1
605 mov %l2, %o2
606 call handle_reg_access
607 mov %l0, %o3
608
609 RESTORE_ALL
610
611 /* This routine handles Co-Processor Disabled Exceptions. */
612 .align 4
613 .globl do_cp_disabled
614do_cp_disabled:
615 SAVE_ALL
616
617 wr %l0, PSR_ET, %psr ! re-enable traps
618 WRITE_PAUSE
619
620 add %sp, STACKFRAME_SZ, %o0
621 mov %l1, %o1
622 mov %l2, %o2
623 call handle_cp_disabled
624 mov %l0, %o3
625
626 RESTORE_ALL
627
628 /* This routine handles Co-Processor Exceptions. */
629 .align 4
630 .globl do_cp_exception
631do_cp_exception:
632 SAVE_ALL
633
634 wr %l0, PSR_ET, %psr ! re-enable traps
635 WRITE_PAUSE
636
637 add %sp, STACKFRAME_SZ, %o0
638 mov %l1, %o1
639 mov %l2, %o2
640 call handle_cp_exception
641 mov %l0, %o3
642
643 RESTORE_ALL
644
645 /* This routine handles Hardware Divide By Zero Exceptions. */
646 .align 4
647 .globl do_hw_divzero
648do_hw_divzero:
649 SAVE_ALL
650
651 wr %l0, PSR_ET, %psr ! re-enable traps
652 WRITE_PAUSE
653
654 add %sp, STACKFRAME_SZ, %o0
655 mov %l1, %o1
656 mov %l2, %o2
657 call handle_hw_divzero
658 mov %l0, %o3
659
660 RESTORE_ALL
661
662 .align 4
663 .globl do_flush_windows
664do_flush_windows:
665 SAVE_ALL
666
667 wr %l0, PSR_ET, %psr
668 WRITE_PAUSE
669
670 andcc %l0, PSR_PS, %g0
671 bne dfw_kernel
672 nop
673
674 call flush_user_windows
675 nop
676
677 /* Advance over the trap instruction. */
678 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
679 add %l1, 0x4, %l2
680 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
681 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
682
683 RESTORE_ALL
684
685 .globl flush_patch_one
686
687 /* We get these for debugging routines using __builtin_return_address() */
688dfw_kernel:
689flush_patch_one:
690 FLUSH_ALL_KERNEL_WINDOWS
691
692 /* Advance over the trap instruction. */
693 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
694 add %l1, 0x4, %l2
695 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
696 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
697
698 RESTORE_ALL
699
700 /* The getcc software trap. The user wants the condition codes from
701 * the %psr in register %g1.
702 */
703
704 .align 4
705 .globl getcc_trap_handler
706getcc_trap_handler:
707 srl %l0, 20, %g1 ! give user
708 and %g1, 0xf, %g1 ! only ICC bits in %psr
709 jmp %l2 ! advance over trap instruction
710 rett %l2 + 0x4 ! like this...
711
712 /* The setcc software trap. The user has condition codes in %g1
713 * that it would like placed in the %psr. Be careful not to flip
714 * any unintentional bits!
715 */
716
717 .align 4
718 .globl setcc_trap_handler
719setcc_trap_handler:
720 sll %g1, 0x14, %l4
721 set PSR_ICC, %l5
722 andn %l0, %l5, %l0 ! clear ICC bits in %psr
723 and %l4, %l5, %l4 ! clear non-ICC bits in user value
724 or %l4, %l0, %l4 ! or them in... mix mix mix
725
726 wr %l4, 0x0, %psr ! set new %psr
727 WRITE_PAUSE ! TI scumbags...
728
729 jmp %l2 ! advance over trap instruction
730 rett %l2 + 0x4 ! like this...
731
732sun4m_nmi_error:
733 /* NMI async memory error handling. */
734 sethi %hi(0x80000000), %l4
735 sethi %hi(sun4m_irq_global), %o5
736 ld [%o5 + %lo(sun4m_irq_global)], %l5
737 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
738 WRITE_PAUSE
739 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
740 WRITE_PAUSE
741 or %l0, PSR_PIL, %l4
742 wr %l4, 0x0, %psr
743 WRITE_PAUSE
744 wr %l4, PSR_ET, %psr
745 WRITE_PAUSE
746 call sun4m_nmi
747 nop
748 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
749 WRITE_PAUSE
750 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
751 WRITE_PAUSE
752 RESTORE_ALL
753
754#ifndef CONFIG_SMP
755 .align 4
756 .globl linux_trap_ipi15_sun4m
757linux_trap_ipi15_sun4m:
758 SAVE_ALL
759
760 ba sun4m_nmi_error
761 nop
762#endif /* CONFIG_SMP */
763
764 .align 4
765 .globl srmmu_fault
766srmmu_fault:
767 mov 0x400, %l5
768 mov 0x300, %l4
769
770LEON_PI(lda [%l5] ASI_LEON_MMUREGS, %l6) ! read sfar first
771SUN_PI_(lda [%l5] ASI_M_MMUREGS, %l6) ! read sfar first
772
773LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) ! read sfsr last
774SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) ! read sfsr last
775
776 andn %l6, 0xfff, %l6
777 srl %l5, 6, %l5 ! and encode all info into l7
778
779 and %l5, 2, %l5
780 or %l5, %l6, %l6
781
782 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
783
784 SAVE_ALL
785
786 mov %l7, %o1
787 mov %l7, %o2
788 and %o1, 1, %o1 ! arg2 = text_faultp
789 mov %l7, %o3
790 and %o2, 2, %o2 ! arg3 = writep
791 andn %o3, 0xfff, %o3 ! arg4 = faulting address
792
793 wr %l0, PSR_ET, %psr
794 WRITE_PAUSE
795
796 call do_sparc_fault
797 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
798
799 RESTORE_ALL
800
801 .align 4
802 .globl sys_nis_syscall
803sys_nis_syscall:
804 mov %o7, %l5
805 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
806 call c_sys_nis_syscall
807 mov %l5, %o7
808
809 .align 4
810 .globl sys_execve
811sys_execve:
812 mov %o7, %l5
813 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
814 call sparc_execve
815 mov %l5, %o7
816
817 .globl sunos_execv
818sunos_execv:
819 st %g0, [%sp + STACKFRAME_SZ + PT_I2]
820
821 call sparc_execve
822 add %sp, STACKFRAME_SZ, %o0
823
824 b ret_sys_call
825 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
826
827 .align 4
828 .globl sys_sparc_pipe
829sys_sparc_pipe:
830 mov %o7, %l5
831 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
832 call sparc_pipe
833 mov %l5, %o7
834
835 .align 4
836 .globl sys_sigaltstack
837sys_sigaltstack:
838 mov %o7, %l5
839 mov %fp, %o2
840 call do_sigaltstack
841 mov %l5, %o7
842
843 .align 4
844 .globl sys_sigstack
845sys_sigstack:
846 mov %o7, %l5
847 mov %fp, %o2
848 call do_sys_sigstack
849 mov %l5, %o7
850
851 .align 4
852 .globl sys_sigreturn
853sys_sigreturn:
854 call do_sigreturn
855 add %sp, STACKFRAME_SZ, %o0
856
857 ld [%curptr + TI_FLAGS], %l5
858 andcc %l5, _TIF_SYSCALL_TRACE, %g0
859 be 1f
860 nop
861
862 call syscall_trace
863 nop
864
8651:
866 /* We don't want to muck with user registers like a
867 * normal syscall, just return.
868 */
869 RESTORE_ALL
870
871 .align 4
872 .globl sys_rt_sigreturn
873sys_rt_sigreturn:
874 call do_rt_sigreturn
875 add %sp, STACKFRAME_SZ, %o0
876
877 ld [%curptr + TI_FLAGS], %l5
878 andcc %l5, _TIF_SYSCALL_TRACE, %g0
879 be 1f
880 nop
881
882 add %sp, STACKFRAME_SZ, %o0
883 call syscall_trace
884 mov 1, %o1
885
8861:
887 /* We are returning to a signal handler. */
888 RESTORE_ALL
889
890 /* Now that we have a real sys_clone, sys_fork() is
891 * implemented in terms of it. Our _real_ implementation
892 * of SunOS vfork() will use sys_vfork().
893 *
894 * XXX These three should be consolidated into mostly shared
895 * XXX code just like on sparc64... -DaveM
896 */
897 .align 4
898 .globl sys_fork, flush_patch_two
899sys_fork:
900 mov %o7, %l5
901flush_patch_two:
902 FLUSH_ALL_KERNEL_WINDOWS;
903 ld [%curptr + TI_TASK], %o4
904 rd %psr, %g4
905 WRITE_PAUSE
906 mov SIGCHLD, %o0 ! arg0: clone flags
907 rd %wim, %g5
908 WRITE_PAUSE
909 mov %fp, %o1 ! arg1: usp
910 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
911 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
912 mov 0, %o3
913 call sparc_do_fork
914 mov %l5, %o7
915
916 /* Whee, kernel threads! */
917 .globl sys_clone, flush_patch_three
918sys_clone:
919 mov %o7, %l5
920flush_patch_three:
921 FLUSH_ALL_KERNEL_WINDOWS;
922 ld [%curptr + TI_TASK], %o4
923 rd %psr, %g4
924 WRITE_PAUSE
925
926 /* arg0,1: flags,usp -- loaded already */
927 cmp %o1, 0x0 ! Is new_usp NULL?
928 rd %wim, %g5
929 WRITE_PAUSE
930 be,a 1f
931 mov %fp, %o1 ! yes, use callers usp
932 andn %o1, 7, %o1 ! no, align to 8 bytes
9331:
934 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
935 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
936 mov 0, %o3
937 call sparc_do_fork
938 mov %l5, %o7
939
940 /* Whee, real vfork! */
941 .globl sys_vfork, flush_patch_four
942sys_vfork:
943flush_patch_four:
944 FLUSH_ALL_KERNEL_WINDOWS;
945 ld [%curptr + TI_TASK], %o4
946 rd %psr, %g4
947 WRITE_PAUSE
948 rd %wim, %g5
949 WRITE_PAUSE
950 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
951 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
952 mov %fp, %o1
953 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
954 sethi %hi(sparc_do_fork), %l1
955 mov 0, %o3
956 jmpl %l1 + %lo(sparc_do_fork), %g0
957 add %sp, STACKFRAME_SZ, %o2
958
959 .align 4
960linux_sparc_ni_syscall:
961 sethi %hi(sys_ni_syscall), %l7
962 b syscall_is_too_hard
963 or %l7, %lo(sys_ni_syscall), %l7
964
965linux_fast_syscall:
966 andn %l7, 3, %l7
967 mov %i0, %o0
968 mov %i1, %o1
969 mov %i2, %o2
970 jmpl %l7 + %g0, %g0
971 mov %i3, %o3
972
973linux_syscall_trace:
974 add %sp, STACKFRAME_SZ, %o0
975 call syscall_trace
976 mov 0, %o1
977 cmp %o0, 0
978 bne 3f
979 mov -ENOSYS, %o0
980 mov %i0, %o0
981 mov %i1, %o1
982 mov %i2, %o2
983 mov %i3, %o3
984 b 2f
985 mov %i4, %o4
986
987 .globl ret_from_fork
988ret_from_fork:
989 call schedule_tail
990 ld [%g3 + TI_TASK], %o0
991 b ret_sys_call
992 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
993
994 /* Linux native system calls enter here... */
995 .align 4
996 .globl linux_sparc_syscall
997linux_sparc_syscall:
998 sethi %hi(PSR_SYSCALL), %l4
999 or %l0, %l4, %l0
1000 /* Direct access to user regs, must faster. */
1001 cmp %g1, NR_syscalls
1002 bgeu linux_sparc_ni_syscall
1003 sll %g1, 2, %l4
1004 ld [%l7 + %l4], %l7
1005 andcc %l7, 1, %g0
1006 bne linux_fast_syscall
1007 /* Just do first insn from SAVE_ALL in the delay slot */
1008
1009syscall_is_too_hard:
1010 SAVE_ALL_HEAD
1011 rd %wim, %l3
1012
1013 wr %l0, PSR_ET, %psr
1014 mov %i0, %o0
1015 mov %i1, %o1
1016 mov %i2, %o2
1017
1018 ld [%curptr + TI_FLAGS], %l5
1019 mov %i3, %o3
1020 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1021 mov %i4, %o4
1022 bne linux_syscall_trace
1023 mov %i0, %l5
10242:
1025 call %l7
1026 mov %i5, %o5
1027
10283:
1029 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1030
1031ret_sys_call:
1032 ld [%curptr + TI_FLAGS], %l6
1033 cmp %o0, -ERESTART_RESTARTBLOCK
1034 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1035 set PSR_C, %g2
1036 bgeu 1f
1037 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1038
1039 /* System call success, clear Carry condition code. */
1040 andn %g3, %g2, %g3
1041 clr %l6
1042 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1043 bne linux_syscall_trace2
1044 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1045 add %l1, 0x4, %l2 /* npc = npc+4 */
1046 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1047 b ret_trap_entry
1048 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
10491:
1050 /* System call failure, set Carry condition code.
1051 * Also, get abs(errno) to return to the process.
1052 */
1053 sub %g0, %o0, %o0
1054 or %g3, %g2, %g3
1055 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1056 mov 1, %l6
1057 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1058 bne linux_syscall_trace2
1059 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1060 add %l1, 0x4, %l2 /* npc = npc+4 */
1061 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1062 b ret_trap_entry
1063 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1064
1065linux_syscall_trace2:
1066 add %sp, STACKFRAME_SZ, %o0
1067 mov 1, %o1
1068 call syscall_trace
1069 add %l1, 0x4, %l2 /* npc = npc+4 */
1070 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1071 b ret_trap_entry
1072 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1073
1074
1075/* Saving and restoring the FPU state is best done from lowlevel code.
1076 *
1077 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1078 * void *fpqueue, unsigned long *fpqdepth)
1079 */
1080
1081 .globl fpsave
1082fpsave:
1083 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1084 ld [%o1], %g1
1085 set 0x2000, %g4
1086 andcc %g1, %g4, %g0
1087 be 2f
1088 mov 0, %g2
1089
1090 /* We have an fpqueue to save. */
10911:
1092 std %fq, [%o2]
1093fpsave_magic:
1094 st %fsr, [%o1]
1095 ld [%o1], %g3
1096 andcc %g3, %g4, %g0
1097 add %g2, 1, %g2
1098 bne 1b
1099 add %o2, 8, %o2
1100
11012:
1102 st %g2, [%o3]
1103
1104 std %f0, [%o0 + 0x00]
1105 std %f2, [%o0 + 0x08]
1106 std %f4, [%o0 + 0x10]
1107 std %f6, [%o0 + 0x18]
1108 std %f8, [%o0 + 0x20]
1109 std %f10, [%o0 + 0x28]
1110 std %f12, [%o0 + 0x30]
1111 std %f14, [%o0 + 0x38]
1112 std %f16, [%o0 + 0x40]
1113 std %f18, [%o0 + 0x48]
1114 std %f20, [%o0 + 0x50]
1115 std %f22, [%o0 + 0x58]
1116 std %f24, [%o0 + 0x60]
1117 std %f26, [%o0 + 0x68]
1118 std %f28, [%o0 + 0x70]
1119 retl
1120 std %f30, [%o0 + 0x78]
1121
1122 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1123 * code for pointing out this possible deadlock, while we save state
1124 * above we could trap on the fsr store so our low level fpu trap
1125 * code has to know how to deal with this.
1126 */
1127fpsave_catch:
1128 b fpsave_magic + 4
1129 st %fsr, [%o1]
1130
1131fpsave_catch2:
1132 b fpsave + 4
1133 st %fsr, [%o1]
1134
1135 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1136
1137 .globl fpload
1138fpload:
1139 ldd [%o0 + 0x00], %f0
1140 ldd [%o0 + 0x08], %f2
1141 ldd [%o0 + 0x10], %f4
1142 ldd [%o0 + 0x18], %f6
1143 ldd [%o0 + 0x20], %f8
1144 ldd [%o0 + 0x28], %f10
1145 ldd [%o0 + 0x30], %f12
1146 ldd [%o0 + 0x38], %f14
1147 ldd [%o0 + 0x40], %f16
1148 ldd [%o0 + 0x48], %f18
1149 ldd [%o0 + 0x50], %f20
1150 ldd [%o0 + 0x58], %f22
1151 ldd [%o0 + 0x60], %f24
1152 ldd [%o0 + 0x68], %f26
1153 ldd [%o0 + 0x70], %f28
1154 ldd [%o0 + 0x78], %f30
1155 ld [%o1], %fsr
1156 retl
1157 nop
1158
1159 /* __ndelay and __udelay take two arguments:
1160 * 0 - nsecs or usecs to delay
1161 * 1 - per_cpu udelay_val (loops per jiffy)
1162 *
1163 * Note that ndelay gives HZ times higher resolution but has a 10ms
1164 * limit. udelay can handle up to 1s.
1165 */
1166 .globl __ndelay
1167__ndelay:
1168 save %sp, -STACKFRAME_SZ, %sp
1169 mov %i0, %o0 ! round multiplier up so large ns ok
1170 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1171 umul %o0, %o1, %o0
1172 rd %y, %o1
1173 mov %i1, %o1 ! udelay_val
1174 umul %o0, %o1, %o0
1175 rd %y, %o1
1176 ba delay_continue
1177 mov %o1, %o0 ! >>32 later for better resolution
1178
1179 .globl __udelay
1180__udelay:
1181 save %sp, -STACKFRAME_SZ, %sp
1182 mov %i0, %o0
1183 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1184 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1185 umul %o0, %o1, %o0
1186 rd %y, %o1
1187 mov %i1, %o1 ! udelay_val
1188 umul %o0, %o1, %o0
1189 rd %y, %o1
1190 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1191 or %g0, %lo(0x028f4b62), %l0
1192 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1193 bcs,a 3f
1194 add %o1, 0x01, %o1
11953:
1196 mov HZ, %o0 ! >>32 earlier for wider range
1197 umul %o0, %o1, %o0
1198 rd %y, %o1
1199
1200delay_continue:
1201 cmp %o0, 0x0
12021:
1203 bne 1b
1204 subcc %o0, 1, %o0
1205
1206 ret
1207 restore
1208
1209 /* Handle a software breakpoint */
1210 /* We have to inform parent that child has stopped */
1211 .align 4
1212 .globl breakpoint_trap
1213breakpoint_trap:
1214 rd %wim,%l3
1215 SAVE_ALL
1216 wr %l0, PSR_ET, %psr
1217 WRITE_PAUSE
1218
1219 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1220 call sparc_breakpoint
1221 add %sp, STACKFRAME_SZ, %o0
1222
1223 RESTORE_ALL
1224
1225#ifdef CONFIG_KGDB
1226 .align 4
1227 .globl kgdb_trap_low
1228 .type kgdb_trap_low,#function
1229kgdb_trap_low:
1230 rd %wim,%l3
1231 SAVE_ALL
1232 wr %l0, PSR_ET, %psr
1233 WRITE_PAUSE
1234
1235 call kgdb_trap
1236 add %sp, STACKFRAME_SZ, %o0
1237
1238 RESTORE_ALL
1239 .size kgdb_trap_low,.-kgdb_trap_low
1240#endif
1241
1242 .align 4
1243 .globl flush_patch_exception
1244flush_patch_exception:
1245 FLUSH_ALL_KERNEL_WINDOWS;
1246 ldd [%o0], %o6
1247 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1248 mov 1, %g1 ! signal EFAULT condition
1249
1250 .align 4
1251 .globl kill_user_windows, kuw_patch1_7win
1252 .globl kuw_patch1
1253kuw_patch1_7win: sll %o3, 6, %o3
1254
1255 /* No matter how much overhead this routine has in the worst
1256 * case scenerio, it is several times better than taking the
1257 * traps with the old method of just doing flush_user_windows().
1258 */
1259kill_user_windows:
1260 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1261 orcc %g0, %o0, %g0 ! if no bits set, we are done
1262 be 3f ! nothing to do
1263 rd %psr, %o5 ! must clear interrupts
1264 or %o5, PSR_PIL, %o4 ! or else that could change
1265 wr %o4, 0x0, %psr ! the uwinmask state
1266 WRITE_PAUSE ! burn them cycles
12671:
1268 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1269 orcc %g0, %o0, %g0 ! did an interrupt come in?
1270 be 4f ! yep, we are done
1271 rd %wim, %o3 ! get current wim
1272 srl %o3, 1, %o4 ! simulate a save
1273kuw_patch1:
1274 sll %o3, 7, %o3 ! compute next wim
1275 or %o4, %o3, %o3 ! result
1276 andncc %o0, %o3, %o0 ! clean this bit in umask
1277 bne kuw_patch1 ! not done yet
1278 srl %o3, 1, %o4 ! begin another save simulation
1279 wr %o3, 0x0, %wim ! set the new wim
1280 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
12814:
1282 wr %o5, 0x0, %psr ! re-enable interrupts
1283 WRITE_PAUSE ! burn baby burn
12843:
1285 retl ! return
1286 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1287
1288 .align 4
1289 .globl restore_current
1290restore_current:
1291 LOAD_CURRENT(g6, o0)
1292 retl
1293 nop
1294
1295#ifdef CONFIG_PCIC_PCI
1296#include <asm/pcic.h>
1297
1298 .align 4
1299 .globl linux_trap_ipi15_pcic
1300linux_trap_ipi15_pcic:
1301 rd %wim, %l3
1302 SAVE_ALL
1303
1304 /*
1305 * First deactivate NMI
1306 * or we cannot drop ET, cannot get window spill traps.
1307 * The busy loop is necessary because the PIO error
1308 * sometimes does not go away quickly and we trap again.
1309 */
1310 sethi %hi(pcic_regs), %o1
1311 ld [%o1 + %lo(pcic_regs)], %o2
1312
1313 ! Get pending status for printouts later.
1314 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1315
1316 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1317 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
13181:
1319 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1320 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1321 bne 1b
1322 nop
1323
1324 or %l0, PSR_PIL, %l4
1325 wr %l4, 0x0, %psr
1326 WRITE_PAUSE
1327 wr %l4, PSR_ET, %psr
1328 WRITE_PAUSE
1329
1330 call pcic_nmi
1331 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1332 RESTORE_ALL
1333
1334 .globl pcic_nmi_trap_patch
1335pcic_nmi_trap_patch:
1336 sethi %hi(linux_trap_ipi15_pcic), %l3
1337 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1338 rd %psr, %l0
1339 .word 0
1340
1341#endif /* CONFIG_PCIC_PCI */
1342
1343 .globl flushw_all
1344flushw_all:
1345 save %sp, -0x40, %sp
1346 save %sp, -0x40, %sp
1347 save %sp, -0x40, %sp
1348 save %sp, -0x40, %sp
1349 save %sp, -0x40, %sp
1350 save %sp, -0x40, %sp
1351 save %sp, -0x40, %sp
1352 restore
1353 restore
1354 restore
1355 restore
1356 restore
1357 restore
1358 ret
1359 restore
1360
1361#ifdef CONFIG_SMP
1362ENTRY(hard_smp_processor_id)
1363661: rd %tbr, %g1
1364 srl %g1, 12, %o0
1365 and %o0, 3, %o0
1366 .section .cpuid_patch, "ax"
1367 /* Instruction location. */
1368 .word 661b
1369 /* SUN4D implementation. */
1370 lda [%g0] ASI_M_VIKING_TMP1, %o0
1371 nop
1372 nop
1373 /* LEON implementation. */
1374 rd %asr17, %o0
1375 srl %o0, 0x1c, %o0
1376 nop
1377 .previous
1378 retl
1379 nop
1380ENDPROC(hard_smp_processor_id)
1381#endif
1382
1383/* End of entry.S */
1/* SPDX-License-Identifier: GPL-2.0 */
2/* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
3 *
4 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
6 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
7 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
9 */
10
11#include <linux/linkage.h>
12#include <linux/errno.h>
13#include <linux/pgtable.h>
14
15#include <asm/head.h>
16#include <asm/asi.h>
17#include <asm/smp.h>
18#include <asm/contregs.h>
19#include <asm/ptrace.h>
20#include <asm/asm-offsets.h>
21#include <asm/psr.h>
22#include <asm/vaddrs.h>
23#include <asm/page.h>
24#include <asm/winmacro.h>
25#include <asm/signal.h>
26#include <asm/obio.h>
27#include <asm/mxcc.h>
28#include <asm/thread_info.h>
29#include <asm/param.h>
30#include <asm/unistd.h>
31
32#include <asm/asmmacro.h>
33#include <asm/export.h>
34
35#define curptr g6
36
37/* These are just handy. */
38#define _SV save %sp, -STACKFRAME_SZ, %sp
39#define _RS restore
40
41#define FLUSH_ALL_KERNEL_WINDOWS \
42 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
43 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
44
45 .text
46
47#ifdef CONFIG_KGDB
48 .align 4
49 .globl arch_kgdb_breakpoint
50 .type arch_kgdb_breakpoint,#function
51arch_kgdb_breakpoint:
52 ta 0x7d
53 retl
54 nop
55 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
56#endif
57
58#if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
59 .align 4
60 .globl floppy_hardint
61floppy_hardint:
62 /*
63 * This code cannot touch registers %l0 %l1 and %l2
64 * because SAVE_ALL depends on their values. It depends
65 * on %l3 also, but we regenerate it before a call.
66 * Other registers are:
67 * %l3 -- base address of fdc registers
68 * %l4 -- pdma_vaddr
69 * %l5 -- scratch for ld/st address
70 * %l6 -- pdma_size
71 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
72 */
73
74 /* Do we have work to do? */
75 sethi %hi(doing_pdma), %l7
76 ld [%l7 + %lo(doing_pdma)], %l7
77 cmp %l7, 0
78 be floppy_dosoftint
79 nop
80
81 /* Load fdc register base */
82 sethi %hi(fdc_status), %l3
83 ld [%l3 + %lo(fdc_status)], %l3
84
85 /* Setup register addresses */
86 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
87 ld [%l5 + %lo(pdma_vaddr)], %l4
88 sethi %hi(pdma_size), %l5 ! bytes to go
89 ld [%l5 + %lo(pdma_size)], %l6
90next_byte:
91 ldub [%l3], %l7
92
93 andcc %l7, 0x80, %g0 ! Does fifo still have data
94 bz floppy_fifo_emptied ! fifo has been emptied...
95 andcc %l7, 0x20, %g0 ! in non-dma mode still?
96 bz floppy_overrun ! nope, overrun
97 andcc %l7, 0x40, %g0 ! 0=write 1=read
98 bz floppy_write
99 sub %l6, 0x1, %l6
100
101 /* Ok, actually read this byte */
102 ldub [%l3 + 1], %l7
103 orcc %g0, %l6, %g0
104 stb %l7, [%l4]
105 bne next_byte
106 add %l4, 0x1, %l4
107
108 b floppy_tdone
109 nop
110
111floppy_write:
112 /* Ok, actually write this byte */
113 ldub [%l4], %l7
114 orcc %g0, %l6, %g0
115 stb %l7, [%l3 + 1]
116 bne next_byte
117 add %l4, 0x1, %l4
118
119 /* fall through... */
120floppy_tdone:
121 sethi %hi(pdma_vaddr), %l5
122 st %l4, [%l5 + %lo(pdma_vaddr)]
123 sethi %hi(pdma_size), %l5
124 st %l6, [%l5 + %lo(pdma_size)]
125 /* Flip terminal count pin */
126 set auxio_register, %l7
127 ld [%l7], %l7
128
129 ldub [%l7], %l5
130
131 or %l5, 0xc2, %l5
132 stb %l5, [%l7]
133 andn %l5, 0x02, %l5
134
1352:
136 /* Kill some time so the bits set */
137 WRITE_PAUSE
138 WRITE_PAUSE
139
140 stb %l5, [%l7]
141
142 /* Prevent recursion */
143 sethi %hi(doing_pdma), %l7
144 b floppy_dosoftint
145 st %g0, [%l7 + %lo(doing_pdma)]
146
147 /* We emptied the FIFO, but we haven't read everything
148 * as of yet. Store the current transfer address and
149 * bytes left to read so we can continue when the next
150 * fast IRQ comes in.
151 */
152floppy_fifo_emptied:
153 sethi %hi(pdma_vaddr), %l5
154 st %l4, [%l5 + %lo(pdma_vaddr)]
155 sethi %hi(pdma_size), %l7
156 st %l6, [%l7 + %lo(pdma_size)]
157
158 /* Restore condition codes */
159 wr %l0, 0x0, %psr
160 WRITE_PAUSE
161
162 jmp %l1
163 rett %l2
164
165floppy_overrun:
166 sethi %hi(pdma_vaddr), %l5
167 st %l4, [%l5 + %lo(pdma_vaddr)]
168 sethi %hi(pdma_size), %l5
169 st %l6, [%l5 + %lo(pdma_size)]
170 /* Prevent recursion */
171 sethi %hi(doing_pdma), %l7
172 st %g0, [%l7 + %lo(doing_pdma)]
173
174 /* fall through... */
175floppy_dosoftint:
176 rd %wim, %l3
177 SAVE_ALL
178
179 /* Set all IRQs off. */
180 or %l0, PSR_PIL, %l4
181 wr %l4, 0x0, %psr
182 WRITE_PAUSE
183 wr %l4, PSR_ET, %psr
184 WRITE_PAUSE
185
186 mov 11, %o0 ! floppy irq level (unused anyway)
187 mov %g0, %o1 ! devid is not used in fast interrupts
188 call sparc_floppy_irq
189 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
190
191 RESTORE_ALL
192
193#endif /* (CONFIG_BLK_DEV_FD) */
194
195 /* Bad trap handler */
196 .globl bad_trap_handler
197bad_trap_handler:
198 SAVE_ALL
199
200 wr %l0, PSR_ET, %psr
201 WRITE_PAUSE
202
203 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
204 call do_hw_interrupt
205 mov %l7, %o1 ! trap number
206
207 RESTORE_ALL
208
209/* For now all IRQ's not registered get sent here. handler_irq() will
210 * see if a routine is registered to handle this interrupt and if not
211 * it will say so on the console.
212 */
213
214 .align 4
215 .globl real_irq_entry, patch_handler_irq
216real_irq_entry:
217 SAVE_ALL
218
219#ifdef CONFIG_SMP
220 .globl patchme_maybe_smp_msg
221
222 cmp %l7, 11
223patchme_maybe_smp_msg:
224 bgu maybe_smp4m_msg
225 nop
226#endif
227
228real_irq_continue:
229 or %l0, PSR_PIL, %g2
230 wr %g2, 0x0, %psr
231 WRITE_PAUSE
232 wr %g2, PSR_ET, %psr
233 WRITE_PAUSE
234 mov %l7, %o0 ! irq level
235patch_handler_irq:
236 call handler_irq
237 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
238 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
239 wr %g2, PSR_ET, %psr ! keep ET up
240 WRITE_PAUSE
241
242 RESTORE_ALL
243
244#ifdef CONFIG_SMP
245 /* SMP per-cpu ticker interrupts are handled specially. */
246smp4m_ticker:
247 bne real_irq_continue+4
248 or %l0, PSR_PIL, %g2
249 wr %g2, 0x0, %psr
250 WRITE_PAUSE
251 wr %g2, PSR_ET, %psr
252 WRITE_PAUSE
253 call smp4m_percpu_timer_interrupt
254 add %sp, STACKFRAME_SZ, %o0
255 wr %l0, PSR_ET, %psr
256 WRITE_PAUSE
257 RESTORE_ALL
258
259#define GET_PROCESSOR4M_ID(reg) \
260 rd %tbr, %reg; \
261 srl %reg, 12, %reg; \
262 and %reg, 3, %reg;
263
264 /* Here is where we check for possible SMP IPI passed to us
265 * on some level other than 15 which is the NMI and only used
266 * for cross calls. That has a separate entry point below.
267 *
268 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
269 */
270maybe_smp4m_msg:
271 GET_PROCESSOR4M_ID(o3)
272 sethi %hi(sun4m_irq_percpu), %l5
273 sll %o3, 2, %o3
274 or %l5, %lo(sun4m_irq_percpu), %o5
275 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
276 ld [%o5 + %o3], %o1
277 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
278 andcc %o3, %o2, %g0
279 be,a smp4m_ticker
280 cmp %l7, 14
281 /* Soft-IRQ IPI */
282 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
283 WRITE_PAUSE
284 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
285 WRITE_PAUSE
286 or %l0, PSR_PIL, %l4
287 wr %l4, 0x0, %psr
288 WRITE_PAUSE
289 wr %l4, PSR_ET, %psr
290 WRITE_PAUSE
291 srl %o3, 28, %o2 ! shift for simpler checks below
292maybe_smp4m_msg_check_single:
293 andcc %o2, 0x1, %g0
294 beq,a maybe_smp4m_msg_check_mask
295 andcc %o2, 0x2, %g0
296 call smp_call_function_single_interrupt
297 nop
298 andcc %o2, 0x2, %g0
299maybe_smp4m_msg_check_mask:
300 beq,a maybe_smp4m_msg_check_resched
301 andcc %o2, 0x4, %g0
302 call smp_call_function_interrupt
303 nop
304 andcc %o2, 0x4, %g0
305maybe_smp4m_msg_check_resched:
306 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
307 beq,a maybe_smp4m_msg_out
308 nop
309 call smp_resched_interrupt
310 nop
311maybe_smp4m_msg_out:
312 RESTORE_ALL
313
314 .align 4
315 .globl linux_trap_ipi15_sun4m
316linux_trap_ipi15_sun4m:
317 SAVE_ALL
318 sethi %hi(0x80000000), %o2
319 GET_PROCESSOR4M_ID(o0)
320 sethi %hi(sun4m_irq_percpu), %l5
321 or %l5, %lo(sun4m_irq_percpu), %o5
322 sll %o0, 2, %o0
323 ld [%o5 + %o0], %o5
324 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
325 andcc %o3, %o2, %g0
326 be sun4m_nmi_error ! Must be an NMI async memory error
327 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
328 WRITE_PAUSE
329 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
330 WRITE_PAUSE
331 or %l0, PSR_PIL, %l4
332 wr %l4, 0x0, %psr
333 WRITE_PAUSE
334 wr %l4, PSR_ET, %psr
335 WRITE_PAUSE
336 call smp4m_cross_call_irq
337 nop
338 b ret_trap_lockless_ipi
339 clr %l6
340
341 .globl smp4d_ticker
342 /* SMP per-cpu ticker interrupts are handled specially. */
343smp4d_ticker:
344 SAVE_ALL
345 or %l0, PSR_PIL, %g2
346 sethi %hi(CC_ICLR), %o0
347 sethi %hi(1 << 14), %o1
348 or %o0, %lo(CC_ICLR), %o0
349 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
350 wr %g2, 0x0, %psr
351 WRITE_PAUSE
352 wr %g2, PSR_ET, %psr
353 WRITE_PAUSE
354 call smp4d_percpu_timer_interrupt
355 add %sp, STACKFRAME_SZ, %o0
356 wr %l0, PSR_ET, %psr
357 WRITE_PAUSE
358 RESTORE_ALL
359
360 .align 4
361 .globl linux_trap_ipi15_sun4d
362linux_trap_ipi15_sun4d:
363 SAVE_ALL
364 sethi %hi(CC_BASE), %o4
365 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
366 or %o4, (CC_EREG - CC_BASE), %o0
367 ldda [%o0] ASI_M_MXCC, %o0
368 andcc %o0, %o2, %g0
369 bne 1f
370 sethi %hi(BB_STAT2), %o2
371 lduba [%o2] ASI_M_CTL, %o2
372 andcc %o2, BB_STAT2_MASK, %g0
373 bne 2f
374 or %o4, (CC_ICLR - CC_BASE), %o0
375 sethi %hi(1 << 15), %o1
376 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
377 or %l0, PSR_PIL, %l4
378 wr %l4, 0x0, %psr
379 WRITE_PAUSE
380 wr %l4, PSR_ET, %psr
381 WRITE_PAUSE
382 call smp4d_cross_call_irq
383 nop
384 b ret_trap_lockless_ipi
385 clr %l6
386
3871: /* MXCC error */
3882: /* BB error */
389 /* Disable PIL 15 */
390 set CC_IMSK, %l4
391 lduha [%l4] ASI_M_MXCC, %l5
392 sethi %hi(1 << 15), %l7
393 or %l5, %l7, %l5
394 stha %l5, [%l4] ASI_M_MXCC
395 /* FIXME */
3961: b,a 1b
397
398 .globl smpleon_ipi
399 .extern leon_ipi_interrupt
400 /* SMP per-cpu IPI interrupts are handled specially. */
401smpleon_ipi:
402 SAVE_ALL
403 or %l0, PSR_PIL, %g2
404 wr %g2, 0x0, %psr
405 WRITE_PAUSE
406 wr %g2, PSR_ET, %psr
407 WRITE_PAUSE
408 call leonsmp_ipi_interrupt
409 add %sp, STACKFRAME_SZ, %o1 ! pt_regs
410 wr %l0, PSR_ET, %psr
411 WRITE_PAUSE
412 RESTORE_ALL
413
414 .align 4
415 .globl linux_trap_ipi15_leon
416linux_trap_ipi15_leon:
417 SAVE_ALL
418 or %l0, PSR_PIL, %l4
419 wr %l4, 0x0, %psr
420 WRITE_PAUSE
421 wr %l4, PSR_ET, %psr
422 WRITE_PAUSE
423 call leon_cross_call_irq
424 nop
425 b ret_trap_lockless_ipi
426 clr %l6
427
428#endif /* CONFIG_SMP */
429
430 /* This routine handles illegal instructions and privileged
431 * instruction attempts from user code.
432 */
433 .align 4
434 .globl bad_instruction
435bad_instruction:
436 sethi %hi(0xc1f80000), %l4
437 ld [%l1], %l5
438 sethi %hi(0x81d80000), %l7
439 and %l5, %l4, %l5
440 cmp %l5, %l7
441 be 1f
442 SAVE_ALL
443
444 wr %l0, PSR_ET, %psr ! re-enable traps
445 WRITE_PAUSE
446
447 add %sp, STACKFRAME_SZ, %o0
448 mov %l1, %o1
449 mov %l2, %o2
450 call do_illegal_instruction
451 mov %l0, %o3
452
453 RESTORE_ALL
454
4551: /* unimplemented flush - just skip */
456 jmpl %l2, %g0
457 rett %l2 + 4
458
459 .align 4
460 .globl priv_instruction
461priv_instruction:
462 SAVE_ALL
463
464 wr %l0, PSR_ET, %psr
465 WRITE_PAUSE
466
467 add %sp, STACKFRAME_SZ, %o0
468 mov %l1, %o1
469 mov %l2, %o2
470 call do_priv_instruction
471 mov %l0, %o3
472
473 RESTORE_ALL
474
475 /* This routine handles unaligned data accesses. */
476 .align 4
477 .globl mna_handler
478mna_handler:
479 andcc %l0, PSR_PS, %g0
480 be mna_fromuser
481 nop
482
483 SAVE_ALL
484
485 wr %l0, PSR_ET, %psr
486 WRITE_PAUSE
487
488 ld [%l1], %o1
489 call kernel_unaligned_trap
490 add %sp, STACKFRAME_SZ, %o0
491
492 RESTORE_ALL
493
494mna_fromuser:
495 SAVE_ALL
496
497 wr %l0, PSR_ET, %psr ! re-enable traps
498 WRITE_PAUSE
499
500 ld [%l1], %o1
501 call user_unaligned_trap
502 add %sp, STACKFRAME_SZ, %o0
503
504 RESTORE_ALL
505
506 /* This routine handles floating point disabled traps. */
507 .align 4
508 .globl fpd_trap_handler
509fpd_trap_handler:
510 SAVE_ALL
511
512 wr %l0, PSR_ET, %psr ! re-enable traps
513 WRITE_PAUSE
514
515 add %sp, STACKFRAME_SZ, %o0
516 mov %l1, %o1
517 mov %l2, %o2
518 call do_fpd_trap
519 mov %l0, %o3
520
521 RESTORE_ALL
522
523 /* This routine handles Floating Point Exceptions. */
524 .align 4
525 .globl fpe_trap_handler
526fpe_trap_handler:
527 set fpsave_magic, %l5
528 cmp %l1, %l5
529 be 1f
530 sethi %hi(fpsave), %l5
531 or %l5, %lo(fpsave), %l5
532 cmp %l1, %l5
533 bne 2f
534 sethi %hi(fpsave_catch2), %l5
535 or %l5, %lo(fpsave_catch2), %l5
536 wr %l0, 0x0, %psr
537 WRITE_PAUSE
538 jmp %l5
539 rett %l5 + 4
5401:
541 sethi %hi(fpsave_catch), %l5
542 or %l5, %lo(fpsave_catch), %l5
543 wr %l0, 0x0, %psr
544 WRITE_PAUSE
545 jmp %l5
546 rett %l5 + 4
547
5482:
549 SAVE_ALL
550
551 wr %l0, PSR_ET, %psr ! re-enable traps
552 WRITE_PAUSE
553
554 add %sp, STACKFRAME_SZ, %o0
555 mov %l1, %o1
556 mov %l2, %o2
557 call do_fpe_trap
558 mov %l0, %o3
559
560 RESTORE_ALL
561
562 /* This routine handles Tag Overflow Exceptions. */
563 .align 4
564 .globl do_tag_overflow
565do_tag_overflow:
566 SAVE_ALL
567
568 wr %l0, PSR_ET, %psr ! re-enable traps
569 WRITE_PAUSE
570
571 add %sp, STACKFRAME_SZ, %o0
572 mov %l1, %o1
573 mov %l2, %o2
574 call handle_tag_overflow
575 mov %l0, %o3
576
577 RESTORE_ALL
578
579 /* This routine handles Watchpoint Exceptions. */
580 .align 4
581 .globl do_watchpoint
582do_watchpoint:
583 SAVE_ALL
584
585 wr %l0, PSR_ET, %psr ! re-enable traps
586 WRITE_PAUSE
587
588 add %sp, STACKFRAME_SZ, %o0
589 mov %l1, %o1
590 mov %l2, %o2
591 call handle_watchpoint
592 mov %l0, %o3
593
594 RESTORE_ALL
595
596 /* This routine handles Register Access Exceptions. */
597 .align 4
598 .globl do_reg_access
599do_reg_access:
600 SAVE_ALL
601
602 wr %l0, PSR_ET, %psr ! re-enable traps
603 WRITE_PAUSE
604
605 add %sp, STACKFRAME_SZ, %o0
606 mov %l1, %o1
607 mov %l2, %o2
608 call handle_reg_access
609 mov %l0, %o3
610
611 RESTORE_ALL
612
613 /* This routine handles Co-Processor Disabled Exceptions. */
614 .align 4
615 .globl do_cp_disabled
616do_cp_disabled:
617 SAVE_ALL
618
619 wr %l0, PSR_ET, %psr ! re-enable traps
620 WRITE_PAUSE
621
622 add %sp, STACKFRAME_SZ, %o0
623 mov %l1, %o1
624 mov %l2, %o2
625 call handle_cp_disabled
626 mov %l0, %o3
627
628 RESTORE_ALL
629
630 /* This routine handles Co-Processor Exceptions. */
631 .align 4
632 .globl do_cp_exception
633do_cp_exception:
634 SAVE_ALL
635
636 wr %l0, PSR_ET, %psr ! re-enable traps
637 WRITE_PAUSE
638
639 add %sp, STACKFRAME_SZ, %o0
640 mov %l1, %o1
641 mov %l2, %o2
642 call handle_cp_exception
643 mov %l0, %o3
644
645 RESTORE_ALL
646
647 /* This routine handles Hardware Divide By Zero Exceptions. */
648 .align 4
649 .globl do_hw_divzero
650do_hw_divzero:
651 SAVE_ALL
652
653 wr %l0, PSR_ET, %psr ! re-enable traps
654 WRITE_PAUSE
655
656 add %sp, STACKFRAME_SZ, %o0
657 mov %l1, %o1
658 mov %l2, %o2
659 call handle_hw_divzero
660 mov %l0, %o3
661
662 RESTORE_ALL
663
664 .align 4
665 .globl do_flush_windows
666do_flush_windows:
667 SAVE_ALL
668
669 wr %l0, PSR_ET, %psr
670 WRITE_PAUSE
671
672 andcc %l0, PSR_PS, %g0
673 bne dfw_kernel
674 nop
675
676 call flush_user_windows
677 nop
678
679 /* Advance over the trap instruction. */
680 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
681 add %l1, 0x4, %l2
682 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
683 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
684
685 RESTORE_ALL
686
687 .globl flush_patch_one
688
689 /* We get these for debugging routines using __builtin_return_address() */
690dfw_kernel:
691flush_patch_one:
692 FLUSH_ALL_KERNEL_WINDOWS
693
694 /* Advance over the trap instruction. */
695 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
696 add %l1, 0x4, %l2
697 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
698 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
699
700 RESTORE_ALL
701
702 /* The getcc software trap. The user wants the condition codes from
703 * the %psr in register %g1.
704 */
705
706 .align 4
707 .globl getcc_trap_handler
708getcc_trap_handler:
709 srl %l0, 20, %g1 ! give user
710 and %g1, 0xf, %g1 ! only ICC bits in %psr
711 jmp %l2 ! advance over trap instruction
712 rett %l2 + 0x4 ! like this...
713
714 /* The setcc software trap. The user has condition codes in %g1
715 * that it would like placed in the %psr. Be careful not to flip
716 * any unintentional bits!
717 */
718
719 .align 4
720 .globl setcc_trap_handler
721setcc_trap_handler:
722 sll %g1, 0x14, %l4
723 set PSR_ICC, %l5
724 andn %l0, %l5, %l0 ! clear ICC bits in %psr
725 and %l4, %l5, %l4 ! clear non-ICC bits in user value
726 or %l4, %l0, %l4 ! or them in... mix mix mix
727
728 wr %l4, 0x0, %psr ! set new %psr
729 WRITE_PAUSE ! TI scumbags...
730
731 jmp %l2 ! advance over trap instruction
732 rett %l2 + 0x4 ! like this...
733
734sun4m_nmi_error:
735 /* NMI async memory error handling. */
736 sethi %hi(0x80000000), %l4
737 sethi %hi(sun4m_irq_global), %o5
738 ld [%o5 + %lo(sun4m_irq_global)], %l5
739 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
740 WRITE_PAUSE
741 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
742 WRITE_PAUSE
743 or %l0, PSR_PIL, %l4
744 wr %l4, 0x0, %psr
745 WRITE_PAUSE
746 wr %l4, PSR_ET, %psr
747 WRITE_PAUSE
748 call sun4m_nmi
749 nop
750 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
751 WRITE_PAUSE
752 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
753 WRITE_PAUSE
754 RESTORE_ALL
755
756#ifndef CONFIG_SMP
757 .align 4
758 .globl linux_trap_ipi15_sun4m
759linux_trap_ipi15_sun4m:
760 SAVE_ALL
761
762 ba sun4m_nmi_error
763 nop
764#endif /* CONFIG_SMP */
765
766 .align 4
767 .globl srmmu_fault
768srmmu_fault:
769 mov 0x400, %l5
770 mov 0x300, %l4
771
772LEON_PI(lda [%l5] ASI_LEON_MMUREGS, %l6) ! read sfar first
773SUN_PI_(lda [%l5] ASI_M_MMUREGS, %l6) ! read sfar first
774
775LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) ! read sfsr last
776SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) ! read sfsr last
777
778 andn %l6, 0xfff, %l6
779 srl %l5, 6, %l5 ! and encode all info into l7
780
781 and %l5, 2, %l5
782 or %l5, %l6, %l6
783
784 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
785
786 SAVE_ALL
787
788 mov %l7, %o1
789 mov %l7, %o2
790 and %o1, 1, %o1 ! arg2 = text_faultp
791 mov %l7, %o3
792 and %o2, 2, %o2 ! arg3 = writep
793 andn %o3, 0xfff, %o3 ! arg4 = faulting address
794
795 wr %l0, PSR_ET, %psr
796 WRITE_PAUSE
797
798 call do_sparc_fault
799 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
800
801 RESTORE_ALL
802
803 .align 4
804sunos_execv:
805 .globl sunos_execv
806 b sys_execve
807 clr %i2
808
809 .align 4
810 .globl sys_sigstack
811sys_sigstack:
812 mov %o7, %l5
813 mov %fp, %o2
814 call do_sys_sigstack
815 mov %l5, %o7
816
817 .align 4
818 .globl sys_sigreturn
819sys_sigreturn:
820 call do_sigreturn
821 add %sp, STACKFRAME_SZ, %o0
822
823 ld [%curptr + TI_FLAGS], %l5
824 andcc %l5, _TIF_SYSCALL_TRACE, %g0
825 be 1f
826 nop
827
828 call syscall_trace
829 mov 1, %o1
830
8311:
832 /* We don't want to muck with user registers like a
833 * normal syscall, just return.
834 */
835 RESTORE_ALL
836
837 .align 4
838 .globl sys_rt_sigreturn
839sys_rt_sigreturn:
840 call do_rt_sigreturn
841 add %sp, STACKFRAME_SZ, %o0
842
843 ld [%curptr + TI_FLAGS], %l5
844 andcc %l5, _TIF_SYSCALL_TRACE, %g0
845 be 1f
846 nop
847
848 add %sp, STACKFRAME_SZ, %o0
849 call syscall_trace
850 mov 1, %o1
851
8521:
853 /* We are returning to a signal handler. */
854 RESTORE_ALL
855
856 /* Now that we have a real sys_clone, sys_fork() is
857 * implemented in terms of it. Our _real_ implementation
858 * of SunOS vfork() will use sys_vfork().
859 *
860 * XXX These three should be consolidated into mostly shared
861 * XXX code just like on sparc64... -DaveM
862 */
863 .align 4
864 .globl sys_fork, flush_patch_two
865sys_fork:
866 mov %o7, %l5
867flush_patch_two:
868 FLUSH_ALL_KERNEL_WINDOWS;
869 ld [%curptr + TI_TASK], %o4
870 rd %psr, %g4
871 WRITE_PAUSE
872 rd %wim, %g5
873 WRITE_PAUSE
874 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
875 add %sp, STACKFRAME_SZ, %o0
876 call sparc_fork
877 mov %l5, %o7
878
879 /* Whee, kernel threads! */
880 .globl sys_clone, flush_patch_three
881sys_clone:
882 mov %o7, %l5
883flush_patch_three:
884 FLUSH_ALL_KERNEL_WINDOWS;
885 ld [%curptr + TI_TASK], %o4
886 rd %psr, %g4
887 WRITE_PAUSE
888 rd %wim, %g5
889 WRITE_PAUSE
890 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
891 add %sp, STACKFRAME_SZ, %o0
892 call sparc_clone
893 mov %l5, %o7
894
895 /* Whee, real vfork! */
896 .globl sys_vfork, flush_patch_four
897sys_vfork:
898flush_patch_four:
899 FLUSH_ALL_KERNEL_WINDOWS;
900 ld [%curptr + TI_TASK], %o4
901 rd %psr, %g4
902 WRITE_PAUSE
903 rd %wim, %g5
904 WRITE_PAUSE
905 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
906 sethi %hi(sparc_vfork), %l1
907 jmpl %l1 + %lo(sparc_vfork), %g0
908 add %sp, STACKFRAME_SZ, %o0
909
910 .align 4
911linux_sparc_ni_syscall:
912 sethi %hi(sys_ni_syscall), %l7
913 b do_syscall
914 or %l7, %lo(sys_ni_syscall), %l7
915
916linux_syscall_trace:
917 add %sp, STACKFRAME_SZ, %o0
918 call syscall_trace
919 mov 0, %o1
920 cmp %o0, 0
921 bne 3f
922 mov -ENOSYS, %o0
923
924 /* Syscall tracing can modify the registers. */
925 ld [%sp + STACKFRAME_SZ + PT_G1], %g1
926 sethi %hi(sys_call_table), %l7
927 ld [%sp + STACKFRAME_SZ + PT_I0], %i0
928 or %l7, %lo(sys_call_table), %l7
929 ld [%sp + STACKFRAME_SZ + PT_I1], %i1
930 ld [%sp + STACKFRAME_SZ + PT_I2], %i2
931 ld [%sp + STACKFRAME_SZ + PT_I3], %i3
932 ld [%sp + STACKFRAME_SZ + PT_I4], %i4
933 ld [%sp + STACKFRAME_SZ + PT_I5], %i5
934 cmp %g1, NR_syscalls
935 bgeu 3f
936 mov -ENOSYS, %o0
937
938 sll %g1, 2, %l4
939 mov %i0, %o0
940 ld [%l7 + %l4], %l7
941 mov %i1, %o1
942 mov %i2, %o2
943 mov %i3, %o3
944 b 2f
945 mov %i4, %o4
946
947 .globl ret_from_fork
948ret_from_fork:
949 call schedule_tail
950 ld [%g3 + TI_TASK], %o0
951 b ret_sys_call
952 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
953
954 .globl ret_from_kernel_thread
955ret_from_kernel_thread:
956 call schedule_tail
957 ld [%g3 + TI_TASK], %o0
958 ld [%sp + STACKFRAME_SZ + PT_G1], %l0
959 call %l0
960 ld [%sp + STACKFRAME_SZ + PT_G2], %o0
961 rd %psr, %l1
962 ld [%sp + STACKFRAME_SZ + PT_PSR], %l0
963 andn %l0, PSR_CWP, %l0
964 nop
965 and %l1, PSR_CWP, %l1
966 or %l0, %l1, %l0
967 st %l0, [%sp + STACKFRAME_SZ + PT_PSR]
968 b ret_sys_call
969 mov 0, %o0
970
971 /* Linux native system calls enter here... */
972 .align 4
973 .globl linux_sparc_syscall
974linux_sparc_syscall:
975 sethi %hi(PSR_SYSCALL), %l4
976 or %l0, %l4, %l0
977 /* Direct access to user regs, must faster. */
978 cmp %g1, NR_syscalls
979 bgeu linux_sparc_ni_syscall
980 sll %g1, 2, %l4
981 ld [%l7 + %l4], %l7
982
983do_syscall:
984 SAVE_ALL_HEAD
985 rd %wim, %l3
986
987 wr %l0, PSR_ET, %psr
988 mov %i0, %o0
989 mov %i1, %o1
990 mov %i2, %o2
991
992 ld [%curptr + TI_FLAGS], %l5
993 mov %i3, %o3
994 andcc %l5, _TIF_SYSCALL_TRACE, %g0
995 mov %i4, %o4
996 bne linux_syscall_trace
997 mov %i0, %l6
9982:
999 call %l7
1000 mov %i5, %o5
1001
10023:
1003 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1004
1005ret_sys_call:
1006 ld [%curptr + TI_FLAGS], %l5
1007 cmp %o0, -ERESTART_RESTARTBLOCK
1008 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1009 set PSR_C, %g2
1010 bgeu 1f
1011 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1012
1013 /* System call success, clear Carry condition code. */
1014 andn %g3, %g2, %g3
1015 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1016 bne linux_syscall_trace2
1017 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1018 add %l1, 0x4, %l2 /* npc = npc+4 */
1019 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1020 b ret_trap_entry
1021 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
10221:
1023 /* System call failure, set Carry condition code.
1024 * Also, get abs(errno) to return to the process.
1025 */
1026 sub %g0, %o0, %o0
1027 or %g3, %g2, %g3
1028 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1029 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1030 bne linux_syscall_trace2
1031 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1032 add %l1, 0x4, %l2 /* npc = npc+4 */
1033 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1034 b ret_trap_entry
1035 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1036
1037linux_syscall_trace2:
1038 add %sp, STACKFRAME_SZ, %o0
1039 mov 1, %o1
1040 call syscall_trace
1041 add %l1, 0x4, %l2 /* npc = npc+4 */
1042 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1043 b ret_trap_entry
1044 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1045
1046
1047/* Saving and restoring the FPU state is best done from lowlevel code.
1048 *
1049 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1050 * void *fpqueue, unsigned long *fpqdepth)
1051 */
1052
1053 .globl fpsave
1054fpsave:
1055 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1056 ld [%o1], %g1
1057 set 0x2000, %g4
1058 andcc %g1, %g4, %g0
1059 be 2f
1060 mov 0, %g2
1061
1062 /* We have an fpqueue to save. */
10631:
1064 std %fq, [%o2]
1065fpsave_magic:
1066 st %fsr, [%o1]
1067 ld [%o1], %g3
1068 andcc %g3, %g4, %g0
1069 add %g2, 1, %g2
1070 bne 1b
1071 add %o2, 8, %o2
1072
10732:
1074 st %g2, [%o3]
1075
1076 std %f0, [%o0 + 0x00]
1077 std %f2, [%o0 + 0x08]
1078 std %f4, [%o0 + 0x10]
1079 std %f6, [%o0 + 0x18]
1080 std %f8, [%o0 + 0x20]
1081 std %f10, [%o0 + 0x28]
1082 std %f12, [%o0 + 0x30]
1083 std %f14, [%o0 + 0x38]
1084 std %f16, [%o0 + 0x40]
1085 std %f18, [%o0 + 0x48]
1086 std %f20, [%o0 + 0x50]
1087 std %f22, [%o0 + 0x58]
1088 std %f24, [%o0 + 0x60]
1089 std %f26, [%o0 + 0x68]
1090 std %f28, [%o0 + 0x70]
1091 retl
1092 std %f30, [%o0 + 0x78]
1093
1094 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1095 * code for pointing out this possible deadlock, while we save state
1096 * above we could trap on the fsr store so our low level fpu trap
1097 * code has to know how to deal with this.
1098 */
1099fpsave_catch:
1100 b fpsave_magic + 4
1101 st %fsr, [%o1]
1102
1103fpsave_catch2:
1104 b fpsave + 4
1105 st %fsr, [%o1]
1106
1107 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1108
1109 .globl fpload
1110fpload:
1111 ldd [%o0 + 0x00], %f0
1112 ldd [%o0 + 0x08], %f2
1113 ldd [%o0 + 0x10], %f4
1114 ldd [%o0 + 0x18], %f6
1115 ldd [%o0 + 0x20], %f8
1116 ldd [%o0 + 0x28], %f10
1117 ldd [%o0 + 0x30], %f12
1118 ldd [%o0 + 0x38], %f14
1119 ldd [%o0 + 0x40], %f16
1120 ldd [%o0 + 0x48], %f18
1121 ldd [%o0 + 0x50], %f20
1122 ldd [%o0 + 0x58], %f22
1123 ldd [%o0 + 0x60], %f24
1124 ldd [%o0 + 0x68], %f26
1125 ldd [%o0 + 0x70], %f28
1126 ldd [%o0 + 0x78], %f30
1127 ld [%o1], %fsr
1128 retl
1129 nop
1130
1131 /* __ndelay and __udelay take two arguments:
1132 * 0 - nsecs or usecs to delay
1133 * 1 - per_cpu udelay_val (loops per jiffy)
1134 *
1135 * Note that ndelay gives HZ times higher resolution but has a 10ms
1136 * limit. udelay can handle up to 1s.
1137 */
1138 .globl __ndelay
1139__ndelay:
1140 save %sp, -STACKFRAME_SZ, %sp
1141 mov %i0, %o0 ! round multiplier up so large ns ok
1142 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1143 umul %o0, %o1, %o0
1144 rd %y, %o1
1145 mov %i1, %o1 ! udelay_val
1146 umul %o0, %o1, %o0
1147 rd %y, %o1
1148 ba delay_continue
1149 mov %o1, %o0 ! >>32 later for better resolution
1150
1151 .globl __udelay
1152__udelay:
1153 save %sp, -STACKFRAME_SZ, %sp
1154 mov %i0, %o0
1155 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1156 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1157 umul %o0, %o1, %o0
1158 rd %y, %o1
1159 mov %i1, %o1 ! udelay_val
1160 umul %o0, %o1, %o0
1161 rd %y, %o1
1162 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1163 or %g0, %lo(0x028f4b62), %l0
1164 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1165 bcs,a 3f
1166 add %o1, 0x01, %o1
11673:
1168 mov HZ, %o0 ! >>32 earlier for wider range
1169 umul %o0, %o1, %o0
1170 rd %y, %o1
1171
1172delay_continue:
1173 cmp %o0, 0x0
11741:
1175 bne 1b
1176 subcc %o0, 1, %o0
1177
1178 ret
1179 restore
1180EXPORT_SYMBOL(__udelay)
1181EXPORT_SYMBOL(__ndelay)
1182
1183 /* Handle a software breakpoint */
1184 /* We have to inform parent that child has stopped */
1185 .align 4
1186 .globl breakpoint_trap
1187breakpoint_trap:
1188 rd %wim,%l3
1189 SAVE_ALL
1190 wr %l0, PSR_ET, %psr
1191 WRITE_PAUSE
1192
1193 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1194 call sparc_breakpoint
1195 add %sp, STACKFRAME_SZ, %o0
1196
1197 RESTORE_ALL
1198
1199#ifdef CONFIG_KGDB
1200 ENTRY(kgdb_trap_low)
1201 rd %wim,%l3
1202 SAVE_ALL
1203 wr %l0, PSR_ET, %psr
1204 WRITE_PAUSE
1205
1206 mov %l7, %o0 ! trap_level
1207 call kgdb_trap
1208 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1209
1210 RESTORE_ALL
1211 ENDPROC(kgdb_trap_low)
1212#endif
1213
1214 .align 4
1215 .globl flush_patch_exception
1216flush_patch_exception:
1217 FLUSH_ALL_KERNEL_WINDOWS;
1218 ldd [%o0], %o6
1219 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1220 mov 1, %g1 ! signal EFAULT condition
1221
1222 .align 4
1223 .globl kill_user_windows, kuw_patch1_7win
1224 .globl kuw_patch1
1225kuw_patch1_7win: sll %o3, 6, %o3
1226
1227 /* No matter how much overhead this routine has in the worst
1228 * case scenario, it is several times better than taking the
1229 * traps with the old method of just doing flush_user_windows().
1230 */
1231kill_user_windows:
1232 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1233 orcc %g0, %o0, %g0 ! if no bits set, we are done
1234 be 3f ! nothing to do
1235 rd %psr, %o5 ! must clear interrupts
1236 or %o5, PSR_PIL, %o4 ! or else that could change
1237 wr %o4, 0x0, %psr ! the uwinmask state
1238 WRITE_PAUSE ! burn them cycles
12391:
1240 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1241 orcc %g0, %o0, %g0 ! did an interrupt come in?
1242 be 4f ! yep, we are done
1243 rd %wim, %o3 ! get current wim
1244 srl %o3, 1, %o4 ! simulate a save
1245kuw_patch1:
1246 sll %o3, 7, %o3 ! compute next wim
1247 or %o4, %o3, %o3 ! result
1248 andncc %o0, %o3, %o0 ! clean this bit in umask
1249 bne kuw_patch1 ! not done yet
1250 srl %o3, 1, %o4 ! begin another save simulation
1251 wr %o3, 0x0, %wim ! set the new wim
1252 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
12534:
1254 wr %o5, 0x0, %psr ! re-enable interrupts
1255 WRITE_PAUSE ! burn baby burn
12563:
1257 retl ! return
1258 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1259
1260 .align 4
1261 .globl restore_current
1262restore_current:
1263 LOAD_CURRENT(g6, o0)
1264 retl
1265 nop
1266
1267#ifdef CONFIG_PCIC_PCI
1268#include <asm/pcic.h>
1269
1270 .align 4
1271 .globl linux_trap_ipi15_pcic
1272linux_trap_ipi15_pcic:
1273 rd %wim, %l3
1274 SAVE_ALL
1275
1276 /*
1277 * First deactivate NMI
1278 * or we cannot drop ET, cannot get window spill traps.
1279 * The busy loop is necessary because the PIO error
1280 * sometimes does not go away quickly and we trap again.
1281 */
1282 sethi %hi(pcic_regs), %o1
1283 ld [%o1 + %lo(pcic_regs)], %o2
1284
1285 ! Get pending status for printouts later.
1286 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1287
1288 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1289 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
12901:
1291 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1292 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1293 bne 1b
1294 nop
1295
1296 or %l0, PSR_PIL, %l4
1297 wr %l4, 0x0, %psr
1298 WRITE_PAUSE
1299 wr %l4, PSR_ET, %psr
1300 WRITE_PAUSE
1301
1302 call pcic_nmi
1303 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1304 RESTORE_ALL
1305
1306 .globl pcic_nmi_trap_patch
1307pcic_nmi_trap_patch:
1308 sethi %hi(linux_trap_ipi15_pcic), %l3
1309 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1310 rd %psr, %l0
1311 .word 0
1312
1313#endif /* CONFIG_PCIC_PCI */
1314
1315 .globl flushw_all
1316flushw_all:
1317 save %sp, -0x40, %sp
1318 save %sp, -0x40, %sp
1319 save %sp, -0x40, %sp
1320 save %sp, -0x40, %sp
1321 save %sp, -0x40, %sp
1322 save %sp, -0x40, %sp
1323 save %sp, -0x40, %sp
1324 restore
1325 restore
1326 restore
1327 restore
1328 restore
1329 restore
1330 ret
1331 restore
1332
1333#ifdef CONFIG_SMP
1334ENTRY(hard_smp_processor_id)
1335661: rd %tbr, %g1
1336 srl %g1, 12, %o0
1337 and %o0, 3, %o0
1338 .section .cpuid_patch, "ax"
1339 /* Instruction location. */
1340 .word 661b
1341 /* SUN4D implementation. */
1342 lda [%g0] ASI_M_VIKING_TMP1, %o0
1343 nop
1344 nop
1345 /* LEON implementation. */
1346 rd %asr17, %o0
1347 srl %o0, 0x1c, %o0
1348 nop
1349 .previous
1350 retl
1351 nop
1352ENDPROC(hard_smp_processor_id)
1353#endif
1354
1355/* End of entry.S */