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1/*
2 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
3 * found on some Ricoh RL5c476 II cardbus bridge
4 *
5 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 *
21 */
22
23/*
24#define DEBUG
25#define VERBOSE_DEBUG
26*/
27#include <linux/delay.h>
28#include <linux/highmem.h>
29#include <linux/module.h>
30#include <linux/pci.h>
31#include <linux/ioport.h>
32#include <linux/scatterlist.h>
33
34#include <pcmcia/cistpl.h>
35#include <pcmcia/ds.h>
36#include <linux/io.h>
37
38#include <linux/mmc/host.h>
39
40#define DRIVER_NAME "sdricoh_cs"
41
42static unsigned int switchlocked;
43
44/* i/o region */
45#define SDRICOH_PCI_REGION 0
46#define SDRICOH_PCI_REGION_SIZE 0x1000
47
48/* registers */
49#define R104_VERSION 0x104
50#define R200_CMD 0x200
51#define R204_CMD_ARG 0x204
52#define R208_DATAIO 0x208
53#define R20C_RESP 0x20c
54#define R21C_STATUS 0x21c
55#define R2E0_INIT 0x2e0
56#define R2E4_STATUS_RESP 0x2e4
57#define R2F0_RESET 0x2f0
58#define R224_MODE 0x224
59#define R226_BLOCKSIZE 0x226
60#define R228_POWER 0x228
61#define R230_DATA 0x230
62
63/* flags for the R21C_STATUS register */
64#define STATUS_CMD_FINISHED 0x00000001
65#define STATUS_TRANSFER_FINISHED 0x00000004
66#define STATUS_CARD_INSERTED 0x00000020
67#define STATUS_CARD_LOCKED 0x00000080
68#define STATUS_CMD_TIMEOUT 0x00400000
69#define STATUS_READY_TO_READ 0x01000000
70#define STATUS_READY_TO_WRITE 0x02000000
71#define STATUS_BUSY 0x40000000
72
73/* timeouts */
74#define INIT_TIMEOUT 100
75#define CMD_TIMEOUT 100000
76#define TRANSFER_TIMEOUT 100000
77#define BUSY_TIMEOUT 32767
78
79/* list of supported pcmcia devices */
80static const struct pcmcia_device_id pcmcia_ids[] = {
81 /* vendor and device strings followed by their crc32 hashes */
82 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
83 0xc3901202),
84 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
85 0xace80909),
86 PCMCIA_DEVICE_NULL,
87};
88
89MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids);
90
91/* mmc privdata */
92struct sdricoh_host {
93 struct device *dev;
94 struct mmc_host *mmc; /* MMC structure */
95 unsigned char __iomem *iobase;
96 struct pci_dev *pci_dev;
97 int app_cmd;
98};
99
100/***************** register i/o helper functions *****************************/
101
102static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
103 unsigned int reg)
104{
105 unsigned int value = readl(host->iobase + reg);
106 dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
107 return value;
108}
109
110static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
111 unsigned int value)
112{
113 writel(value, host->iobase + reg);
114 dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
115
116}
117
118static inline unsigned int sdricoh_readw(struct sdricoh_host *host,
119 unsigned int reg)
120{
121 unsigned int value = readw(host->iobase + reg);
122 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
123 return value;
124}
125
126static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
127 unsigned short value)
128{
129 writew(value, host->iobase + reg);
130 dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
131}
132
133static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
134 unsigned int reg)
135{
136 unsigned int value = readb(host->iobase + reg);
137 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
138 return value;
139}
140
141static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted,
142 unsigned int timeout){
143 unsigned int loop;
144 unsigned int status = 0;
145 struct device *dev = host->dev;
146 for (loop = 0; loop < timeout; loop++) {
147 status = sdricoh_readl(host, R21C_STATUS);
148 sdricoh_writel(host, R2E4_STATUS_RESP, status);
149 if (status & wanted)
150 break;
151 }
152
153 if (loop == timeout) {
154 dev_err(dev, "query_status: timeout waiting for %x\n", wanted);
155 return -ETIMEDOUT;
156 }
157
158 /* do not do this check in the loop as some commands fail otherwise */
159 if (status & 0x7F0000) {
160 dev_err(dev, "waiting for status bit %x failed\n", wanted);
161 return -EINVAL;
162 }
163 return 0;
164
165}
166
167static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode,
168 unsigned int arg)
169{
170 unsigned int status;
171 int result = 0;
172 unsigned int loop = 0;
173 /* reset status reg? */
174 sdricoh_writel(host, R21C_STATUS, 0x18);
175 /* fill parameters */
176 sdricoh_writel(host, R204_CMD_ARG, arg);
177 sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
178 /* wait for command completion */
179 if (opcode) {
180 for (loop = 0; loop < CMD_TIMEOUT; loop++) {
181 status = sdricoh_readl(host, R21C_STATUS);
182 sdricoh_writel(host, R2E4_STATUS_RESP, status);
183 if (status & STATUS_CMD_FINISHED)
184 break;
185 }
186 /* don't check for timeout in the loop it is not always
187 reset correctly
188 */
189 if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT)
190 result = -ETIMEDOUT;
191
192 }
193
194 return result;
195
196}
197
198static int sdricoh_reset(struct sdricoh_host *host)
199{
200 dev_dbg(host->dev, "reset\n");
201 sdricoh_writel(host, R2F0_RESET, 0x10001);
202 sdricoh_writel(host, R2E0_INIT, 0x10000);
203 if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
204 return -EIO;
205 sdricoh_writel(host, R2E0_INIT, 0x10007);
206
207 sdricoh_writel(host, R224_MODE, 0x2000000);
208 sdricoh_writel(host, R228_POWER, 0xe0);
209
210
211 /* status register ? */
212 sdricoh_writel(host, R21C_STATUS, 0x18);
213
214 return 0;
215}
216
217static int sdricoh_blockio(struct sdricoh_host *host, int read,
218 u8 *buf, int len)
219{
220 int size;
221 u32 data = 0;
222 /* wait until the data is available */
223 if (read) {
224 if (sdricoh_query_status(host, STATUS_READY_TO_READ,
225 TRANSFER_TIMEOUT))
226 return -ETIMEDOUT;
227 sdricoh_writel(host, R21C_STATUS, 0x18);
228 /* read data */
229 while (len) {
230 data = sdricoh_readl(host, R230_DATA);
231 size = min(len, 4);
232 len -= size;
233 while (size) {
234 *buf = data & 0xFF;
235 buf++;
236 data >>= 8;
237 size--;
238 }
239 }
240 } else {
241 if (sdricoh_query_status(host, STATUS_READY_TO_WRITE,
242 TRANSFER_TIMEOUT))
243 return -ETIMEDOUT;
244 sdricoh_writel(host, R21C_STATUS, 0x18);
245 /* write data */
246 while (len) {
247 size = min(len, 4);
248 len -= size;
249 while (size) {
250 data >>= 8;
251 data |= (u32)*buf << 24;
252 buf++;
253 size--;
254 }
255 sdricoh_writel(host, R230_DATA, data);
256 }
257 }
258
259 if (len)
260 return -EIO;
261
262 return 0;
263}
264
265static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq)
266{
267 struct sdricoh_host *host = mmc_priv(mmc);
268 struct mmc_command *cmd = mrq->cmd;
269 struct mmc_data *data = cmd->data;
270 struct device *dev = host->dev;
271 unsigned char opcode = cmd->opcode;
272 int i;
273
274 dev_dbg(dev, "=============================\n");
275 dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode);
276
277 sdricoh_writel(host, R21C_STATUS, 0x18);
278
279 /* MMC_APP_CMDs need some special handling */
280 if (host->app_cmd) {
281 opcode |= 64;
282 host->app_cmd = 0;
283 } else if (opcode == 55)
284 host->app_cmd = 1;
285
286 /* read/write commands seem to require this */
287 if (data) {
288 sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
289 sdricoh_writel(host, R208_DATAIO, 0);
290 }
291
292 cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg);
293
294 /* read response buffer */
295 if (cmd->flags & MMC_RSP_PRESENT) {
296 if (cmd->flags & MMC_RSP_136) {
297 /* CRC is stripped so we need to do some shifting. */
298 for (i = 0; i < 4; i++) {
299 cmd->resp[i] =
300 sdricoh_readl(host,
301 R20C_RESP + (3 - i) * 4) << 8;
302 if (i != 3)
303 cmd->resp[i] |=
304 sdricoh_readb(host, R20C_RESP +
305 (3 - i) * 4 - 1);
306 }
307 } else
308 cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
309 }
310
311 /* transfer data */
312 if (data && cmd->error == 0) {
313 dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i "
314 "sg length %i\n", data->blksz, data->blocks,
315 data->sg_len, data->sg->length);
316
317 /* enter data reading mode */
318 sdricoh_writel(host, R21C_STATUS, 0x837f031e);
319 for (i = 0; i < data->blocks; i++) {
320 size_t len = data->blksz;
321 u8 *buf;
322 struct page *page;
323 int result;
324 page = sg_page(data->sg);
325
326 buf = kmap(page) + data->sg->offset + (len * i);
327 result =
328 sdricoh_blockio(host,
329 data->flags & MMC_DATA_READ, buf, len);
330 kunmap(page);
331 flush_dcache_page(page);
332 if (result) {
333 dev_err(dev, "sdricoh_request: cmd %i "
334 "block transfer failed\n", cmd->opcode);
335 cmd->error = result;
336 break;
337 } else
338 data->bytes_xfered += len;
339 }
340
341 sdricoh_writel(host, R208_DATAIO, 1);
342
343 if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED,
344 TRANSFER_TIMEOUT)) {
345 dev_err(dev, "sdricoh_request: transfer end error\n");
346 cmd->error = -EINVAL;
347 }
348 }
349 /* FIXME check busy flag */
350
351 mmc_request_done(mmc, mrq);
352 dev_dbg(dev, "=============================\n");
353}
354
355static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
356{
357 struct sdricoh_host *host = mmc_priv(mmc);
358 dev_dbg(host->dev, "set_ios\n");
359
360 if (ios->power_mode == MMC_POWER_ON) {
361 sdricoh_writel(host, R228_POWER, 0xc0e0);
362
363 if (ios->bus_width == MMC_BUS_WIDTH_4) {
364 sdricoh_writel(host, R224_MODE, 0x2000300);
365 sdricoh_writel(host, R228_POWER, 0x40e0);
366 } else {
367 sdricoh_writel(host, R224_MODE, 0x2000340);
368 }
369
370 } else if (ios->power_mode == MMC_POWER_UP) {
371 sdricoh_writel(host, R224_MODE, 0x2000320);
372 sdricoh_writel(host, R228_POWER, 0xe0);
373 }
374}
375
376static int sdricoh_get_ro(struct mmc_host *mmc)
377{
378 struct sdricoh_host *host = mmc_priv(mmc);
379 unsigned int status;
380
381 status = sdricoh_readl(host, R21C_STATUS);
382 sdricoh_writel(host, R2E4_STATUS_RESP, status);
383
384 /* some notebooks seem to have the locked flag switched */
385 if (switchlocked)
386 return !(status & STATUS_CARD_LOCKED);
387
388 return (status & STATUS_CARD_LOCKED);
389}
390
391static struct mmc_host_ops sdricoh_ops = {
392 .request = sdricoh_request,
393 .set_ios = sdricoh_set_ios,
394 .get_ro = sdricoh_get_ro,
395};
396
397/* initialize the control and register it to the mmc framework */
398static int sdricoh_init_mmc(struct pci_dev *pci_dev,
399 struct pcmcia_device *pcmcia_dev)
400{
401 int result = 0;
402 void __iomem *iobase = NULL;
403 struct mmc_host *mmc = NULL;
404 struct sdricoh_host *host = NULL;
405 struct device *dev = &pcmcia_dev->dev;
406 /* map iomem */
407 if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) !=
408 SDRICOH_PCI_REGION_SIZE) {
409 dev_dbg(dev, "unexpected pci resource len\n");
410 return -ENODEV;
411 }
412 iobase =
413 pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE);
414 if (!iobase) {
415 dev_err(dev, "unable to map iobase\n");
416 return -ENODEV;
417 }
418 /* check version? */
419 if (readl(iobase + R104_VERSION) != 0x4000) {
420 dev_dbg(dev, "no supported mmc controller found\n");
421 result = -ENODEV;
422 goto err;
423 }
424 /* allocate privdata */
425 mmc = pcmcia_dev->priv =
426 mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev);
427 if (!mmc) {
428 dev_err(dev, "mmc_alloc_host failed\n");
429 result = -ENOMEM;
430 goto err;
431 }
432 host = mmc_priv(mmc);
433
434 host->iobase = iobase;
435 host->dev = dev;
436 host->pci_dev = pci_dev;
437
438 mmc->ops = &sdricoh_ops;
439
440 /* FIXME: frequency and voltage handling is done by the controller
441 */
442 mmc->f_min = 450000;
443 mmc->f_max = 24000000;
444 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
445 mmc->caps |= MMC_CAP_4_BIT_DATA;
446
447 mmc->max_seg_size = 1024 * 512;
448 mmc->max_blk_size = 512;
449
450 /* reset the controller */
451 if (sdricoh_reset(host)) {
452 dev_dbg(dev, "could not reset\n");
453 result = -EIO;
454 goto err;
455
456 }
457
458 result = mmc_add_host(mmc);
459
460 if (!result) {
461 dev_dbg(dev, "mmc host registered\n");
462 return 0;
463 }
464
465err:
466 if (iobase)
467 pci_iounmap(pci_dev, iobase);
468 if (mmc)
469 mmc_free_host(mmc);
470
471 return result;
472}
473
474/* search for supported mmc controllers */
475static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev)
476{
477 struct pci_dev *pci_dev = NULL;
478
479 dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device"
480 " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]);
481
482 /* search pci cardbus bridge that contains the mmc controller */
483 /* the io region is already claimed by yenta_socket... */
484 while ((pci_dev =
485 pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476,
486 pci_dev))) {
487 /* try to init the device */
488 if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) {
489 dev_info(&pcmcia_dev->dev, "MMC controller found\n");
490 return 0;
491 }
492
493 }
494 dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n");
495 return -ENODEV;
496}
497
498static void sdricoh_pcmcia_detach(struct pcmcia_device *link)
499{
500 struct mmc_host *mmc = link->priv;
501
502 dev_dbg(&link->dev, "detach\n");
503
504 /* remove mmc host */
505 if (mmc) {
506 struct sdricoh_host *host = mmc_priv(mmc);
507 mmc_remove_host(mmc);
508 pci_iounmap(host->pci_dev, host->iobase);
509 pci_dev_put(host->pci_dev);
510 mmc_free_host(mmc);
511 }
512 pcmcia_disable_device(link);
513
514}
515
516#ifdef CONFIG_PM
517static int sdricoh_pcmcia_suspend(struct pcmcia_device *link)
518{
519 struct mmc_host *mmc = link->priv;
520 dev_dbg(&link->dev, "suspend\n");
521 mmc_suspend_host(mmc);
522 return 0;
523}
524
525static int sdricoh_pcmcia_resume(struct pcmcia_device *link)
526{
527 struct mmc_host *mmc = link->priv;
528 dev_dbg(&link->dev, "resume\n");
529 sdricoh_reset(mmc_priv(mmc));
530 mmc_resume_host(mmc);
531 return 0;
532}
533#else
534#define sdricoh_pcmcia_suspend NULL
535#define sdricoh_pcmcia_resume NULL
536#endif
537
538static struct pcmcia_driver sdricoh_driver = {
539 .name = DRIVER_NAME,
540 .probe = sdricoh_pcmcia_probe,
541 .remove = sdricoh_pcmcia_detach,
542 .id_table = pcmcia_ids,
543 .suspend = sdricoh_pcmcia_suspend,
544 .resume = sdricoh_pcmcia_resume,
545};
546
547/*****************************************************************************\
548 * *
549 * Driver init/exit *
550 * *
551\*****************************************************************************/
552
553static int __init sdricoh_drv_init(void)
554{
555 return pcmcia_register_driver(&sdricoh_driver);
556}
557
558static void __exit sdricoh_drv_exit(void)
559{
560 pcmcia_unregister_driver(&sdricoh_driver);
561}
562
563module_init(sdricoh_drv_init);
564module_exit(sdricoh_drv_exit);
565
566module_param(switchlocked, uint, 0444);
567
568MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
569MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
570MODULE_LICENSE("GPL");
571
572MODULE_PARM_DESC(switchlocked, "Switch the cards locked status."
573 "Use this when unlocked cards are shown readonly (default 0)");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
4 * found on some Ricoh RL5c476 II cardbus bridge
5 *
6 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
7 */
8
9/*
10#define DEBUG
11#define VERBOSE_DEBUG
12*/
13#include <linux/delay.h>
14#include <linux/highmem.h>
15#include <linux/module.h>
16#include <linux/pci.h>
17#include <linux/ioport.h>
18#include <linux/iopoll.h>
19#include <linux/scatterlist.h>
20
21#include <pcmcia/cistpl.h>
22#include <pcmcia/ds.h>
23#include <linux/io.h>
24
25#include <linux/mmc/host.h>
26#include <linux/mmc/mmc.h>
27
28#define DRIVER_NAME "sdricoh_cs"
29
30static unsigned int switchlocked;
31
32/* i/o region */
33#define SDRICOH_PCI_REGION 0
34#define SDRICOH_PCI_REGION_SIZE 0x1000
35
36/* registers */
37#define R104_VERSION 0x104
38#define R200_CMD 0x200
39#define R204_CMD_ARG 0x204
40#define R208_DATAIO 0x208
41#define R20C_RESP 0x20c
42#define R21C_STATUS 0x21c
43#define R2E0_INIT 0x2e0
44#define R2E4_STATUS_RESP 0x2e4
45#define R2F0_RESET 0x2f0
46#define R224_MODE 0x224
47#define R226_BLOCKSIZE 0x226
48#define R228_POWER 0x228
49#define R230_DATA 0x230
50
51/* flags for the R21C_STATUS register */
52#define STATUS_CMD_FINISHED 0x00000001
53#define STATUS_TRANSFER_FINISHED 0x00000004
54#define STATUS_CARD_INSERTED 0x00000020
55#define STATUS_CARD_LOCKED 0x00000080
56#define STATUS_CMD_TIMEOUT 0x00400000
57#define STATUS_READY_TO_READ 0x01000000
58#define STATUS_READY_TO_WRITE 0x02000000
59#define STATUS_BUSY 0x40000000
60
61/* timeouts */
62#define SDRICOH_CMD_TIMEOUT_US 1000000
63#define SDRICOH_DATA_TIMEOUT_US 1000000
64
65/* list of supported pcmcia devices */
66static const struct pcmcia_device_id pcmcia_ids[] = {
67 /* vendor and device strings followed by their crc32 hashes */
68 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
69 0xc3901202),
70 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
71 0xace80909),
72 PCMCIA_DEVICE_NULL,
73};
74
75MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids);
76
77/* mmc privdata */
78struct sdricoh_host {
79 struct device *dev;
80 struct mmc_host *mmc; /* MMC structure */
81 unsigned char __iomem *iobase;
82 struct pci_dev *pci_dev;
83 int app_cmd;
84};
85
86/***************** register i/o helper functions *****************************/
87
88static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
89 unsigned int reg)
90{
91 unsigned int value = readl(host->iobase + reg);
92 dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
93 return value;
94}
95
96static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
97 unsigned int value)
98{
99 writel(value, host->iobase + reg);
100 dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
101
102}
103
104static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
105 unsigned short value)
106{
107 writew(value, host->iobase + reg);
108 dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
109}
110
111static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
112 unsigned int reg)
113{
114 unsigned int value = readb(host->iobase + reg);
115 dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
116 return value;
117}
118
119static bool sdricoh_status_ok(struct sdricoh_host *host, unsigned int status,
120 unsigned int wanted)
121{
122 sdricoh_writel(host, R2E4_STATUS_RESP, status);
123 return status & wanted;
124}
125
126static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted)
127{
128 int ret;
129 unsigned int status = 0;
130 struct device *dev = host->dev;
131
132 ret = read_poll_timeout(sdricoh_readl, status,
133 sdricoh_status_ok(host, status, wanted),
134 32, SDRICOH_DATA_TIMEOUT_US, false,
135 host, R21C_STATUS);
136 if (ret) {
137 dev_err(dev, "query_status: timeout waiting for %x\n", wanted);
138 return -ETIMEDOUT;
139 }
140
141 /* do not do this check in the loop as some commands fail otherwise */
142 if (status & 0x7F0000) {
143 dev_err(dev, "waiting for status bit %x failed\n", wanted);
144 return -EINVAL;
145 }
146 return 0;
147
148}
149
150static int sdricoh_mmc_cmd(struct sdricoh_host *host, struct mmc_command *cmd)
151{
152 unsigned int status, timeout_us;
153 int ret;
154 unsigned char opcode = cmd->opcode;
155
156 /* reset status reg? */
157 sdricoh_writel(host, R21C_STATUS, 0x18);
158
159 /* MMC_APP_CMDs need some special handling */
160 if (host->app_cmd) {
161 opcode |= 64;
162 host->app_cmd = 0;
163 } else if (opcode == MMC_APP_CMD)
164 host->app_cmd = 1;
165
166 /* fill parameters */
167 sdricoh_writel(host, R204_CMD_ARG, cmd->arg);
168 sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
169
170 /* wait for command completion */
171 if (!opcode)
172 return 0;
173
174 timeout_us = cmd->busy_timeout ? cmd->busy_timeout * 1000 :
175 SDRICOH_CMD_TIMEOUT_US;
176
177 ret = read_poll_timeout(sdricoh_readl, status,
178 sdricoh_status_ok(host, status, STATUS_CMD_FINISHED),
179 32, timeout_us, false,
180 host, R21C_STATUS);
181
182 /*
183 * Don't check for timeout status in the loop, as it's not always reset
184 * correctly.
185 */
186 if (ret || status & STATUS_CMD_TIMEOUT)
187 return -ETIMEDOUT;
188
189 return 0;
190}
191
192static int sdricoh_reset(struct sdricoh_host *host)
193{
194 dev_dbg(host->dev, "reset\n");
195 sdricoh_writel(host, R2F0_RESET, 0x10001);
196 sdricoh_writel(host, R2E0_INIT, 0x10000);
197 if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
198 return -EIO;
199 sdricoh_writel(host, R2E0_INIT, 0x10007);
200
201 sdricoh_writel(host, R224_MODE, 0x2000000);
202 sdricoh_writel(host, R228_POWER, 0xe0);
203
204
205 /* status register ? */
206 sdricoh_writel(host, R21C_STATUS, 0x18);
207
208 return 0;
209}
210
211static int sdricoh_blockio(struct sdricoh_host *host, int read,
212 u8 *buf, int len)
213{
214 int size;
215 u32 data = 0;
216 /* wait until the data is available */
217 if (read) {
218 if (sdricoh_query_status(host, STATUS_READY_TO_READ))
219 return -ETIMEDOUT;
220 sdricoh_writel(host, R21C_STATUS, 0x18);
221 /* read data */
222 while (len) {
223 data = sdricoh_readl(host, R230_DATA);
224 size = min(len, 4);
225 len -= size;
226 while (size) {
227 *buf = data & 0xFF;
228 buf++;
229 data >>= 8;
230 size--;
231 }
232 }
233 } else {
234 if (sdricoh_query_status(host, STATUS_READY_TO_WRITE))
235 return -ETIMEDOUT;
236 sdricoh_writel(host, R21C_STATUS, 0x18);
237 /* write data */
238 while (len) {
239 size = min(len, 4);
240 len -= size;
241 while (size) {
242 data >>= 8;
243 data |= (u32)*buf << 24;
244 buf++;
245 size--;
246 }
247 sdricoh_writel(host, R230_DATA, data);
248 }
249 }
250
251 return 0;
252}
253
254static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq)
255{
256 struct sdricoh_host *host = mmc_priv(mmc);
257 struct mmc_command *cmd = mrq->cmd;
258 struct mmc_data *data = cmd->data;
259 struct device *dev = host->dev;
260 int i;
261
262 dev_dbg(dev, "=============================\n");
263 dev_dbg(dev, "sdricoh_request opcode=%i\n", cmd->opcode);
264
265 sdricoh_writel(host, R21C_STATUS, 0x18);
266
267 /* read/write commands seem to require this */
268 if (data) {
269 sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
270 sdricoh_writel(host, R208_DATAIO, 0);
271 }
272
273 cmd->error = sdricoh_mmc_cmd(host, cmd);
274
275 /* read response buffer */
276 if (cmd->flags & MMC_RSP_PRESENT) {
277 if (cmd->flags & MMC_RSP_136) {
278 /* CRC is stripped so we need to do some shifting. */
279 for (i = 0; i < 4; i++) {
280 cmd->resp[i] =
281 sdricoh_readl(host,
282 R20C_RESP + (3 - i) * 4) << 8;
283 if (i != 3)
284 cmd->resp[i] |=
285 sdricoh_readb(host, R20C_RESP +
286 (3 - i) * 4 - 1);
287 }
288 } else
289 cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
290 }
291
292 /* transfer data */
293 if (data && cmd->error == 0) {
294 dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i "
295 "sg length %i\n", data->blksz, data->blocks,
296 data->sg_len, data->sg->length);
297
298 /* enter data reading mode */
299 sdricoh_writel(host, R21C_STATUS, 0x837f031e);
300 for (i = 0; i < data->blocks; i++) {
301 size_t len = data->blksz;
302 u8 *buf;
303 struct page *page;
304 int result;
305 page = sg_page(data->sg);
306
307 buf = kmap(page) + data->sg->offset + (len * i);
308 result =
309 sdricoh_blockio(host,
310 data->flags & MMC_DATA_READ, buf, len);
311 kunmap(page);
312 flush_dcache_page(page);
313 if (result) {
314 dev_err(dev, "sdricoh_request: cmd %i "
315 "block transfer failed\n", cmd->opcode);
316 cmd->error = result;
317 break;
318 } else
319 data->bytes_xfered += len;
320 }
321
322 sdricoh_writel(host, R208_DATAIO, 1);
323
324 if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED)) {
325 dev_err(dev, "sdricoh_request: transfer end error\n");
326 cmd->error = -EINVAL;
327 }
328 }
329 /* FIXME check busy flag */
330
331 mmc_request_done(mmc, mrq);
332 dev_dbg(dev, "=============================\n");
333}
334
335static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
336{
337 struct sdricoh_host *host = mmc_priv(mmc);
338 dev_dbg(host->dev, "set_ios\n");
339
340 if (ios->power_mode == MMC_POWER_ON) {
341 sdricoh_writel(host, R228_POWER, 0xc0e0);
342
343 if (ios->bus_width == MMC_BUS_WIDTH_4) {
344 sdricoh_writel(host, R224_MODE, 0x2000300);
345 sdricoh_writel(host, R228_POWER, 0x40e0);
346 } else {
347 sdricoh_writel(host, R224_MODE, 0x2000340);
348 }
349
350 } else if (ios->power_mode == MMC_POWER_UP) {
351 sdricoh_writel(host, R224_MODE, 0x2000320);
352 sdricoh_writel(host, R228_POWER, 0xe0);
353 }
354}
355
356static int sdricoh_get_ro(struct mmc_host *mmc)
357{
358 struct sdricoh_host *host = mmc_priv(mmc);
359 unsigned int status;
360
361 status = sdricoh_readl(host, R21C_STATUS);
362 sdricoh_writel(host, R2E4_STATUS_RESP, status);
363
364 /* some notebooks seem to have the locked flag switched */
365 if (switchlocked)
366 return !(status & STATUS_CARD_LOCKED);
367
368 return (status & STATUS_CARD_LOCKED);
369}
370
371static const struct mmc_host_ops sdricoh_ops = {
372 .request = sdricoh_request,
373 .set_ios = sdricoh_set_ios,
374 .get_ro = sdricoh_get_ro,
375};
376
377/* initialize the control and register it to the mmc framework */
378static int sdricoh_init_mmc(struct pci_dev *pci_dev,
379 struct pcmcia_device *pcmcia_dev)
380{
381 int result;
382 void __iomem *iobase;
383 struct mmc_host *mmc;
384 struct sdricoh_host *host;
385 struct device *dev = &pcmcia_dev->dev;
386 /* map iomem */
387 if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) !=
388 SDRICOH_PCI_REGION_SIZE) {
389 dev_dbg(dev, "unexpected pci resource len\n");
390 return -ENODEV;
391 }
392 iobase =
393 pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE);
394 if (!iobase) {
395 dev_err(dev, "unable to map iobase\n");
396 return -ENODEV;
397 }
398 /* check version? */
399 if (readl(iobase + R104_VERSION) != 0x4000) {
400 dev_dbg(dev, "no supported mmc controller found\n");
401 result = -ENODEV;
402 goto unmap_io;
403 }
404 /* allocate privdata */
405 mmc = pcmcia_dev->priv =
406 mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev);
407 if (!mmc) {
408 dev_err(dev, "mmc_alloc_host failed\n");
409 result = -ENOMEM;
410 goto unmap_io;
411 }
412 host = mmc_priv(mmc);
413
414 host->iobase = iobase;
415 host->dev = dev;
416 host->pci_dev = pci_dev;
417
418 mmc->ops = &sdricoh_ops;
419
420 /* FIXME: frequency and voltage handling is done by the controller
421 */
422 mmc->f_min = 450000;
423 mmc->f_max = 24000000;
424 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
425 mmc->caps |= MMC_CAP_4_BIT_DATA;
426
427 mmc->max_seg_size = 1024 * 512;
428 mmc->max_blk_size = 512;
429
430 /* reset the controller */
431 if (sdricoh_reset(host)) {
432 dev_dbg(dev, "could not reset\n");
433 result = -EIO;
434 goto free_host;
435 }
436
437 result = mmc_add_host(mmc);
438
439 if (!result) {
440 dev_dbg(dev, "mmc host registered\n");
441 return 0;
442 }
443free_host:
444 mmc_free_host(mmc);
445unmap_io:
446 pci_iounmap(pci_dev, iobase);
447 return result;
448}
449
450/* search for supported mmc controllers */
451static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev)
452{
453 struct pci_dev *pci_dev = NULL;
454
455 dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device"
456 " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]);
457
458 /* search pci cardbus bridge that contains the mmc controller */
459 /* the io region is already claimed by yenta_socket... */
460 while ((pci_dev =
461 pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476,
462 pci_dev))) {
463 /* try to init the device */
464 if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) {
465 dev_info(&pcmcia_dev->dev, "MMC controller found\n");
466 return 0;
467 }
468
469 }
470 dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n");
471 return -ENODEV;
472}
473
474static void sdricoh_pcmcia_detach(struct pcmcia_device *link)
475{
476 struct mmc_host *mmc = link->priv;
477
478 dev_dbg(&link->dev, "detach\n");
479
480 /* remove mmc host */
481 if (mmc) {
482 struct sdricoh_host *host = mmc_priv(mmc);
483 mmc_remove_host(mmc);
484 pci_iounmap(host->pci_dev, host->iobase);
485 pci_dev_put(host->pci_dev);
486 mmc_free_host(mmc);
487 }
488 pcmcia_disable_device(link);
489
490}
491
492#ifdef CONFIG_PM
493static int sdricoh_pcmcia_suspend(struct pcmcia_device *link)
494{
495 dev_dbg(&link->dev, "suspend\n");
496 return 0;
497}
498
499static int sdricoh_pcmcia_resume(struct pcmcia_device *link)
500{
501 struct mmc_host *mmc = link->priv;
502 dev_dbg(&link->dev, "resume\n");
503 sdricoh_reset(mmc_priv(mmc));
504 return 0;
505}
506#else
507#define sdricoh_pcmcia_suspend NULL
508#define sdricoh_pcmcia_resume NULL
509#endif
510
511static struct pcmcia_driver sdricoh_driver = {
512 .name = DRIVER_NAME,
513 .probe = sdricoh_pcmcia_probe,
514 .remove = sdricoh_pcmcia_detach,
515 .id_table = pcmcia_ids,
516 .suspend = sdricoh_pcmcia_suspend,
517 .resume = sdricoh_pcmcia_resume,
518};
519module_pcmcia_driver(sdricoh_driver);
520
521module_param(switchlocked, uint, 0444);
522
523MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
524MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
525MODULE_LICENSE("GPL");
526
527MODULE_PARM_DESC(switchlocked, "Switch the cards locked status."
528 "Use this when unlocked cards are shown readonly (default 0)");