1// SPDX-License-Identifier: GPL-2.0
  2// Copyright (C) 2018 ROHM Semiconductors
  3
  4#include <linux/kernel.h>
  5#include <linux/module.h>
  6#include <linux/init.h>
  7#include <linux/err.h>
  8#include <linux/platform_device.h>
  9#include <linux/slab.h>
 10#include <linux/mfd/rohm-generic.h>
 11#include <linux/clk-provider.h>
 12#include <linux/clkdev.h>
 13#include <linux/regmap.h>
 14
 15/* clk control registers */
 16/* BD71815 */
 17#define BD71815_REG_OUT32K	0x1d
 18/* BD71828 */
 19#define BD71828_REG_OUT32K	0x4B
 20/* BD71837 and BD71847 */
 21#define BD718XX_REG_OUT32K	0x2E
 22
 23/*
 24 * BD71837, BD71847, and BD71828 all use bit [0] to clk output control
 25 */
 26#define CLK_OUT_EN_MASK		BIT(0)
 27
 28
 29struct bd718xx_clk {
 30	struct clk_hw hw;
 31	u8 reg;
 32	u8 mask;
 33	struct platform_device *pdev;
 34	struct regmap *regmap;
 35};
 36
 37static int bd71837_clk_set(struct bd718xx_clk *c, unsigned int status)
 38{
 39	return regmap_update_bits(c->regmap, c->reg, c->mask, status);
 40}
 41
 42static void bd71837_clk_disable(struct clk_hw *hw)
 43{
 44	int rv;
 45	struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);
 46
 47	rv = bd71837_clk_set(c, 0);
 48	if (rv)
 49		dev_dbg(&c->pdev->dev, "Failed to disable 32K clk (%d)\n", rv);
 50}
 51
 52static int bd71837_clk_enable(struct clk_hw *hw)
 53{
 54	struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);
 55
 56	return bd71837_clk_set(c, 0xffffffff);
 57}
 58
 59static int bd71837_clk_is_enabled(struct clk_hw *hw)
 60{
 61	int enabled;
 62	int rval;
 63	struct bd718xx_clk *c = container_of(hw, struct bd718xx_clk, hw);
 64
 65	rval = regmap_read(c->regmap, c->reg, &enabled);
 66
 67	if (rval)
 68		return rval;
 69
 70	return enabled & c->mask;
 71}
 72
 73static const struct clk_ops bd71837_clk_ops = {
 74	.prepare = &bd71837_clk_enable,
 75	.unprepare = &bd71837_clk_disable,
 76	.is_prepared = &bd71837_clk_is_enabled,
 77};
 78
 79static int bd71837_clk_probe(struct platform_device *pdev)
 80{
 81	struct bd718xx_clk *c;
 82	int rval = -ENOMEM;
 83	const char *parent_clk;
 84	struct device *parent = pdev->dev.parent;
 85	struct clk_init_data init = {
 86		.name = "bd718xx-32k-out",
 87		.ops = &bd71837_clk_ops,
 88	};
 89	enum rohm_chip_type chip = platform_get_device_id(pdev)->driver_data;
 90
 91	c = devm_kzalloc(&pdev->dev, sizeof(*c), GFP_KERNEL);
 92	if (!c)
 93		return -ENOMEM;
 94
 95	c->regmap = dev_get_regmap(pdev->dev.parent, NULL);
 96	if (!c->regmap)
 97		return -ENODEV;
 98
 99	init.num_parents = 1;
100	parent_clk = of_clk_get_parent_name(parent->of_node, 0);
101
102	init.parent_names = &parent_clk;
103	if (!parent_clk) {
104		dev_err(&pdev->dev, "No parent clk found\n");
105		return -EINVAL;
106	}
107	switch (chip) {
108	case ROHM_CHIP_TYPE_BD71837:
109	case ROHM_CHIP_TYPE_BD71847:
110		c->reg = BD718XX_REG_OUT32K;
111		c->mask = CLK_OUT_EN_MASK;
112		break;
113	case ROHM_CHIP_TYPE_BD71828:
114		c->reg = BD71828_REG_OUT32K;
115		c->mask = CLK_OUT_EN_MASK;
116		break;
117	case ROHM_CHIP_TYPE_BD71815:
118		c->reg = BD71815_REG_OUT32K;
119		c->mask = CLK_OUT_EN_MASK;
120		break;
121	default:
122		dev_err(&pdev->dev, "Unknown clk chip\n");
123		return -EINVAL;
124	}
125	c->pdev = pdev;
126	c->hw.init = &init;
127
128	of_property_read_string_index(parent->of_node,
129				      "clock-output-names", 0, &init.name);
130
131	rval = devm_clk_hw_register(&pdev->dev, &c->hw);
132	if (rval) {
133		dev_err(&pdev->dev, "failed to register 32K clk");
134		return rval;
135	}
136	rval = devm_of_clk_add_hw_provider(&pdev->dev, of_clk_hw_simple_get,
137					   &c->hw);
138	if (rval)
139		dev_err(&pdev->dev, "adding clk provider failed\n");
140
141	return rval;
142}
143
144static const struct platform_device_id bd718x7_clk_id[] = {
145	{ "bd71837-clk", ROHM_CHIP_TYPE_BD71837 },
146	{ "bd71847-clk", ROHM_CHIP_TYPE_BD71847 },
147	{ "bd71828-clk", ROHM_CHIP_TYPE_BD71828 },
148	{ "bd71815-clk", ROHM_CHIP_TYPE_BD71815 },
149	{ },
150};
151MODULE_DEVICE_TABLE(platform, bd718x7_clk_id);
152
153static struct platform_driver bd71837_clk = {
154	.driver = {
155		.name = "bd718xx-clk",
156	},
157	.probe = bd71837_clk_probe,
158	.id_table = bd718x7_clk_id,
159};
160
161module_platform_driver(bd71837_clk);
162
163MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
164MODULE_DESCRIPTION("BD718(15/18/28/37/47/50) and chip clk driver");
165MODULE_LICENSE("GPL");
166MODULE_ALIAS("platform:bd718xx-clk");