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1
2config CLKDEV_LOOKUP
3 bool
4 select HAVE_CLK
5
6config HAVE_CLK_PREPARE
7 bool
8
9config HAVE_MACH_CLKDEV
10 bool
11
12config COMMON_CLK
13 bool
14 select HAVE_CLK_PREPARE
15 select CLKDEV_LOOKUP
16 ---help---
17 The common clock framework is a single definition of struct
18 clk, useful across many platforms, as well as an
19 implementation of the clock API in include/linux/clk.h.
20 Architectures utilizing the common struct clk should select
21 this option.
22
23menu "Common Clock Framework"
24 depends on COMMON_CLK
25
26config COMMON_CLK_DEBUG
27 bool "DebugFS representation of clock tree"
28 depends on COMMON_CLK
29 select DEBUG_FS
30 ---help---
31 Creates a directory hierchy in debugfs for visualizing the clk
32 tree structure. Each directory contains read-only members
33 that export information specific to that clk node: clk_rate,
34 clk_flags, clk_prepare_count, clk_enable_count &
35 clk_notifier_count.
36
37endmenu
1# SPDX-License-Identifier: GPL-2.0
2
3config HAVE_CLK
4 bool
5 help
6 The <linux/clk.h> calls support software clock gating and
7 thus are a key power management tool on many systems.
8
9config HAVE_CLK_PREPARE
10 bool
11
12config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
13 bool
14 select HAVE_CLK
15 help
16 Select this option when the clock API in <linux/clk.h> is implemented
17 by platform/architecture code. This method is deprecated. Modern
18 code should select COMMON_CLK instead and not define a custom
19 'struct clk'.
20
21menuconfig COMMON_CLK
22 bool "Common Clock Framework"
23 depends on !HAVE_LEGACY_CLK
24 select HAVE_CLK_PREPARE
25 select HAVE_CLK
26 select RATIONAL
27 help
28 The common clock framework is a single definition of struct
29 clk, useful across many platforms, as well as an
30 implementation of the clock API in include/linux/clk.h.
31 Architectures utilizing the common struct clk should select
32 this option.
33
34if COMMON_CLK
35
36config COMMON_CLK_WM831X
37 tristate "Clock driver for WM831x/2x PMICs"
38 depends on MFD_WM831X
39 help
40 Supports the clocking subsystem of the WM831x/2x series of
41 PMICs from Wolfson Microelectronics.
42
43source "drivers/clk/versatile/Kconfig"
44
45config CLK_HSDK
46 bool "PLL Driver for HSDK platform"
47 depends on ARC_SOC_HSDK || COMPILE_TEST
48 depends on HAS_IOMEM
49 help
50 This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
51 control.
52
53config LMK04832
54 tristate "Ti LMK04832 JESD204B Compliant Clock Jitter Cleaner"
55 depends on SPI
56 select REGMAP_SPI
57 help
58 Say yes here to build support for Texas Instruments' LMK04832 Ultra
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
60
61config COMMON_CLK_APPLE_NCO
62 tristate "Clock driver for Apple SoC NCOs"
63 depends on ARCH_APPLE || COMPILE_TEST
64 default ARCH_APPLE
65 help
66 This driver supports NCO (Numerically Controlled Oscillator) blocks
67 found on Apple SoCs such as t8103 (M1). The blocks are typically
68 generators of audio clocks.
69
70config COMMON_CLK_MAX77686
71 tristate "Clock driver for Maxim 77620/77686/77802 MFD"
72 depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
73 help
74 This driver supports Maxim 77620/77686/77802 crystal oscillator
75 clock.
76
77config COMMON_CLK_MAX9485
78 tristate "Maxim 9485 Programmable Clock Generator"
79 depends on I2C
80 help
81 This driver supports Maxim 9485 Programmable Audio Clock Generator
82
83config COMMON_CLK_RK808
84 tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
85 depends on MFD_RK8XX
86 help
87 This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
89 Clkout1 is always on, Clkout2 can off by control register.
90
91config COMMON_CLK_HI655X
92 tristate "Clock driver for Hi655x" if EXPERT
93 depends on (MFD_HI655X_PMIC || COMPILE_TEST)
94 select REGMAP
95 default MFD_HI655X_PMIC
96 help
97 This driver supports the hi655x PMIC clock. This
98 multi-function device has one fixed-rate oscillator, clocked
99 at 32KHz.
100
101config COMMON_CLK_SCMI
102 tristate "Clock driver controlled via SCMI interface"
103 depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
104 help
105 This driver provides support for clocks that are controlled
106 by firmware that implements the SCMI interface.
107
108 This driver uses SCMI Message Protocol to interact with the
109 firmware providing all the clock controls.
110
111config COMMON_CLK_SCPI
112 tristate "Clock driver controlled via SCPI interface"
113 depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
114 help
115 This driver provides support for clocks that are controlled
116 by firmware that implements the SCPI interface.
117
118 This driver uses SCPI Message Protocol to interact with the
119 firmware providing all the clock controls.
120
121config COMMON_CLK_SI5341
122 tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
123 depends on I2C
124 select REGMAP_I2C
125 help
126 This driver supports Silicon Labs Si5341 and Si5340 programmable clock
127 generators. Not all features of these chips are currently supported
128 by the driver, in particular it only supports XTAL input. The chip can
129 be pre-programmed to support other configurations and features not yet
130 implemented in the driver.
131
132config COMMON_CLK_SI5351
133 tristate "Clock driver for SiLabs 5351A/B/C"
134 depends on I2C
135 select REGMAP_I2C
136 help
137 This driver supports Silicon Labs 5351A/B/C programmable clock
138 generators.
139
140config COMMON_CLK_SI514
141 tristate "Clock driver for SiLabs 514 devices"
142 depends on I2C
143 depends on OF
144 select REGMAP_I2C
145 help
146 This driver supports the Silicon Labs 514 programmable clock
147 generator.
148
149config COMMON_CLK_SI544
150 tristate "Clock driver for SiLabs 544 devices"
151 depends on I2C
152 select REGMAP_I2C
153 help
154 This driver supports the Silicon Labs 544 programmable clock
155 generator.
156
157config COMMON_CLK_SI570
158 tristate "Clock driver for SiLabs 570 and compatible devices"
159 depends on I2C
160 depends on OF
161 select REGMAP_I2C
162 help
163 This driver supports Silicon Labs 570/571/598/599 programmable
164 clock generators.
165
166config COMMON_CLK_BM1880
167 bool "Clock driver for Bitmain BM1880 SoC"
168 depends on ARCH_BITMAIN || COMPILE_TEST
169 default ARCH_BITMAIN
170 help
171 This driver supports the clocks on Bitmain BM1880 SoC.
172
173config COMMON_CLK_CDCE706
174 tristate "Clock driver for TI CDCE706 clock synthesizer"
175 depends on I2C
176 select REGMAP_I2C
177 help
178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
179
180config COMMON_CLK_TPS68470
181 tristate "Clock Driver for TI TPS68470 PMIC"
182 depends on I2C
183 depends on INTEL_SKL_INT3472 || COMPILE_TEST
184 select REGMAP_I2C
185 help
186 This driver supports the clocks provided by the TPS68470 PMIC.
187
188config COMMON_CLK_CDCE925
189 tristate "Clock driver for TI CDCE913/925/937/949 devices"
190 depends on I2C
191 depends on OF
192 select REGMAP_I2C
193 help
194 This driver supports the TI CDCE913/925/937/949 programmable clock
195 synthesizer. Each chip has different number of PLLs and outputs.
196 For example, the CDCE925 contains two PLLs with spread-spectrum
197 clocking support and five output dividers. The driver only supports
198 the following setup, and uses a fixed setting for the output muxes.
199 Y1 is derived from the input clock
200 Y2 and Y3 derive from PLL1
201 Y4 and Y5 derive from PLL2
202 Given a target output frequency, the driver will set the PLL and
203 divider to best approximate the desired output.
204
205config COMMON_CLK_CS2000_CP
206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
207 depends on I2C
208 select REGMAP_I2C
209 help
210 If you say yes here you get support for the CS2000 clock multiplier.
211
212config COMMON_CLK_EN7523
213 bool "Clock driver for Airoha EN7523 SoC system clocks"
214 depends on OF
215 depends on ARCH_AIROHA || COMPILE_TEST
216 default ARCH_AIROHA
217 help
218 This driver provides the fixed clocks and gates present on Airoha
219 ARM silicon.
220
221config COMMON_CLK_EP93XX
222 tristate "Clock driver for Cirrus Logic ep93xx SoC"
223 depends on ARCH_EP93XX || COMPILE_TEST
224 select AUXILIARY_BUS
225 select REGMAP_MMIO
226 help
227 This driver supports the SoC clocks on the Cirrus Logic ep93xx.
228
229config COMMON_CLK_EYEQ
230 bool "Clock driver for the Mobileye EyeQ platform"
231 depends on MACH_EYEQ5 || MACH_EYEQ6H || COMPILE_TEST
232 select AUXILIARY_BUS
233 default MACH_EYEQ5 || MACH_EYEQ6H
234 help
235 This driver provides clocks found on Mobileye EyeQ5, EyeQ6L and Eye6H
236 SoCs. Controllers live in shared register regions called OLB. Driver
237 provides read-only PLLs, derived from the main crystal clock (which
238 must be constant). It also exposes some divider clocks.
239
240config COMMON_CLK_FSL_FLEXSPI
241 tristate "Clock driver for FlexSPI on Layerscape SoCs"
242 depends on ARCH_LAYERSCAPE || COMPILE_TEST
243 default ARCH_LAYERSCAPE && SPI_NXP_FLEXSPI
244 help
245 On Layerscape SoCs there is a special clock for the FlexSPI
246 interface.
247
248config COMMON_CLK_FSL_SAI
249 bool "Clock driver for BCLK of Freescale SAI cores"
250 depends on ARCH_LAYERSCAPE || COMPILE_TEST
251 help
252 This driver supports the Freescale SAI (Synchronous Audio Interface)
253 to be used as a generic clock output. Some SoCs have restrictions
254 regarding the possible pin multiplexer settings. Eg. on some SoCs
255 two SAI interfaces can only be enabled together. If just one is
256 needed, the BCLK pin of the second one can be used as general
257 purpose clock output. Ideally, it can be used to drive an audio
258 codec (sometimes known as MCLK).
259
260config COMMON_CLK_GEMINI
261 bool "Clock driver for Cortina Systems Gemini SoC"
262 depends on ARCH_GEMINI || COMPILE_TEST
263 select MFD_SYSCON
264 select RESET_CONTROLLER
265 help
266 This driver supports the SoC clocks on the Cortina Systems Gemini
267 platform, also known as SL3516 or CS3516.
268
269config COMMON_CLK_LAN966X
270 tristate "Generic Clock Controller driver for LAN966X SoC"
271 depends on HAS_IOMEM
272 depends on OF
273 depends on SOC_LAN966 || ARCH_LAN969X || COMPILE_TEST
274 help
275 This driver provides support for Generic Clock Controller(GCK) on
276 LAN966X SoC. GCK generates and supplies clock to various peripherals
277 within the SoC.
278
279config COMMON_CLK_ASPEED
280 bool "Clock driver for Aspeed BMC SoCs"
281 depends on ARCH_ASPEED || COMPILE_TEST
282 default ARCH_ASPEED
283 select MFD_SYSCON
284 select RESET_CONTROLLER
285 help
286 This driver supports the SoC clocks on the Aspeed BMC platforms.
287
288 The G4 and G5 series, including the ast2400 and ast2500, are supported
289 by this driver.
290
291config COMMON_CLK_S2MPS11
292 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
293 depends on MFD_SEC_CORE || COMPILE_TEST
294 help
295 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
296 clock. These multi-function devices have two (S2MPS14) or three
297 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
298
299config CLK_TWL
300 tristate "Clock driver for the TWL PMIC family"
301 depends on TWL4030_CORE
302 help
303 Enable support for controlling the clock resources on TWL family
304 PMICs. These devices have some 32K clock outputs which can be
305 controlled by software. For now, the TWL6032 and TWL6030 clocks are
306 supported.
307
308config CLK_TWL6040
309 tristate "External McPDM functional clock from twl6040"
310 depends on TWL6040_CORE
311 help
312 Enable the external functional clock support on OMAP4+ platforms for
313 McPDM. McPDM module is using the external bit clock on the McPDM bus
314 as functional clock.
315
316config COMMON_CLK_AXI_CLKGEN
317 tristate "AXI clkgen driver"
318 depends on HAS_IOMEM || COMPILE_TEST
319 depends on OF
320 help
321 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
322 FPGAs. It is commonly used in Analog Devices' reference designs.
323
324config CLK_QORIQ
325 bool "Clock driver for Freescale QorIQ platforms"
326 depends on OF
327 depends on PPC_E500MC || SOC_LS1021A || ARCH_LAYERSCAPE || COMPILE_TEST
328 help
329 This adds the clock driver support for Freescale QorIQ platforms
330 using common clock framework.
331
332config CLK_LS1028A_PLLDIG
333 tristate "Clock driver for LS1028A Display output"
334 depends on ARCH_LAYERSCAPE || COMPILE_TEST
335 default ARCH_LAYERSCAPE
336 help
337 This driver support the Display output interfaces(LCD, DPHY) pixel clocks
338 of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
339 features of the PLL are currently supported by the driver. By default,
340 configured bypass mode with this PLL.
341
342config COMMON_CLK_XGENE
343 bool "Clock driver for APM XGene SoC"
344 default ARCH_XGENE
345 depends on ARM64 || COMPILE_TEST
346 help
347 Support for the APM X-Gene SoC reference, PLL, and device clocks.
348
349config COMMON_CLK_LOCHNAGAR
350 tristate "Cirrus Logic Lochnagar clock driver"
351 depends on MFD_LOCHNAGAR
352 help
353 This driver supports the clocking features of the Cirrus Logic
354 Lochnagar audio development board.
355
356config COMMON_CLK_NPCM8XX
357 tristate "Clock driver for the NPCM8XX SoC Family"
358 depends on ARCH_NPCM || COMPILE_TEST
359 help
360 This driver supports the clocks on the Nuvoton BMC NPCM8XX SoC Family,
361 all the clocks are initialized by the bootloader, so this driver
362 allows only reading of current settings directly from the hardware.
363
364config COMMON_CLK_LOONGSON2
365 bool "Clock driver for Loongson-2 SoC"
366 depends on LOONGARCH || COMPILE_TEST
367 help
368 This driver provides support for clock controller on Loongson-2 SoC.
369 The clock controller can generates and supplies clock to various
370 peripherals within the SoC.
371 Say Y here to support Loongson-2 SoC clock driver.
372
373config COMMON_CLK_NXP
374 def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
375 select REGMAP_MMIO if ARCH_LPC32XX
376 select MFD_SYSCON if ARCH_LPC18XX
377 help
378 Support for clock providers on NXP platforms.
379
380config COMMON_CLK_PALMAS
381 tristate "Clock driver for TI Palmas devices"
382 depends on MFD_PALMAS
383 help
384 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
385 using common clock framework.
386
387config COMMON_CLK_PWM
388 tristate "Clock driver for PWMs used as clock outputs"
389 depends on PWM
390 help
391 Adapter driver so that any PWM output can be (mis)used as clock signal
392 at 50% duty cycle.
393
394config COMMON_CLK_PXA
395 def_bool COMMON_CLK && ARCH_PXA
396 help
397 Support for the Marvell PXA SoC.
398
399config COMMON_CLK_RS9_PCIE
400 tristate "Clock driver for Renesas 9-series PCIe clock generators"
401 depends on I2C
402 depends on OF
403 select REGMAP_I2C
404 help
405 This driver supports the Renesas 9-series PCIe clock generator
406 models 9FGV/9DBV/9DMV/9FGL/9DML/9QXL/9SQ.
407
408config COMMON_CLK_SI521XX
409 tristate "Clock driver for SkyWorks Si521xx PCIe clock generators"
410 depends on I2C
411 depends on OF
412 select REGMAP_I2C
413 help
414 This driver supports the SkyWorks Si521xx PCIe clock generator
415 models Si52144/Si52146/Si52147.
416
417config COMMON_CLK_VC3
418 tristate "Clock driver for Renesas VersaClock 3 devices"
419 depends on I2C
420 depends on OF
421 select REGMAP_I2C
422 help
423 This driver supports the Renesas VersaClock 3 programmable clock
424 generators.
425
426config COMMON_CLK_VC5
427 tristate "Clock driver for IDT VersaClock 5,6 devices"
428 depends on I2C
429 depends on OF
430 select REGMAP_I2C
431 help
432 This driver supports the IDT VersaClock 5 and VersaClock 6
433 programmable clock generators.
434
435config COMMON_CLK_VC7
436 tristate "Clock driver for Renesas Versaclock 7 devices"
437 depends on I2C
438 depends on OF
439 select REGMAP_I2C
440 help
441 Renesas Versaclock7 is a family of configurable clock generator
442 and jitter attenuator ICs with fractional and integer dividers.
443
444config COMMON_CLK_STM32F
445 def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
446 help
447 Support for stm32f4 and stm32f7 SoC families clocks
448
449config COMMON_CLK_STM32H7
450 def_bool COMMON_CLK && MACH_STM32H743
451 help
452 Support for stm32h7 SoC family clocks
453
454config COMMON_CLK_MMP2
455 def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
456 help
457 Support for Marvell MMP2 and MMP3 SoC clocks
458
459config COMMON_CLK_MMP2_AUDIO
460 tristate "Clock driver for MMP2 Audio subsystem"
461 depends on COMMON_CLK_MMP2 || COMPILE_TEST
462 help
463 This driver supports clocks for Audio subsystem on MMP2 SoC.
464
465config COMMON_CLK_BD718XX
466 tristate "Clock driver for 32K clk gates on ROHM PMICs"
467 depends on MFD_ROHM_BD718XX || MFD_ROHM_BD71828
468 help
469 This driver supports ROHM BD71837, BD71847, BD71850, BD71815
470 and BD71828 PMICs clock gates.
471
472config COMMON_CLK_FIXED_MMIO
473 bool "Clock driver for Memory Mapped Fixed values"
474 depends on COMMON_CLK && OF
475 depends on HAS_IOMEM
476 help
477 Support for Memory Mapped IO Fixed clocks
478
479config COMMON_CLK_K210
480 bool "Clock driver for the Canaan Kendryte K210 SoC"
481 depends on OF && RISCV && SOC_CANAAN_K210
482 default SOC_CANAAN_K210
483 help
484 Support for the Canaan Kendryte K210 RISC-V SoC clocks.
485
486config COMMON_CLK_SP7021
487 tristate "Clock driver for Sunplus SP7021 SoC"
488 depends on SOC_SP7021 || COMPILE_TEST
489 default SOC_SP7021
490 help
491 This driver supports the Sunplus SP7021 SoC clocks.
492 It implements SP7021 PLLs/gate.
493 Not all features of the PLL are currently supported
494 by the driver.
495
496source "drivers/clk/actions/Kconfig"
497source "drivers/clk/analogbits/Kconfig"
498source "drivers/clk/baikal-t1/Kconfig"
499source "drivers/clk/bcm/Kconfig"
500source "drivers/clk/hisilicon/Kconfig"
501source "drivers/clk/imgtec/Kconfig"
502source "drivers/clk/imx/Kconfig"
503source "drivers/clk/ingenic/Kconfig"
504source "drivers/clk/keystone/Kconfig"
505source "drivers/clk/mediatek/Kconfig"
506source "drivers/clk/meson/Kconfig"
507source "drivers/clk/mstar/Kconfig"
508source "drivers/clk/microchip/Kconfig"
509source "drivers/clk/mvebu/Kconfig"
510source "drivers/clk/nuvoton/Kconfig"
511source "drivers/clk/pistachio/Kconfig"
512source "drivers/clk/qcom/Kconfig"
513source "drivers/clk/ralink/Kconfig"
514source "drivers/clk/renesas/Kconfig"
515source "drivers/clk/rockchip/Kconfig"
516source "drivers/clk/samsung/Kconfig"
517source "drivers/clk/sifive/Kconfig"
518source "drivers/clk/socfpga/Kconfig"
519source "drivers/clk/sophgo/Kconfig"
520source "drivers/clk/sprd/Kconfig"
521source "drivers/clk/starfive/Kconfig"
522source "drivers/clk/sunxi/Kconfig"
523source "drivers/clk/sunxi-ng/Kconfig"
524source "drivers/clk/tegra/Kconfig"
525source "drivers/clk/thead/Kconfig"
526source "drivers/clk/stm32/Kconfig"
527source "drivers/clk/ti/Kconfig"
528source "drivers/clk/uniphier/Kconfig"
529source "drivers/clk/visconti/Kconfig"
530source "drivers/clk/x86/Kconfig"
531source "drivers/clk/xilinx/Kconfig"
532source "drivers/clk/zynqmp/Kconfig"
533
534# Kunit test cases
535config CLK_KUNIT_TEST
536 tristate "Basic Clock Framework Kunit Tests" if !KUNIT_ALL_TESTS
537 depends on KUNIT
538 default KUNIT_ALL_TESTS
539 select DTC
540 help
541 Kunit tests for the common clock framework.
542
543config CLK_FIXED_RATE_KUNIT_TEST
544 tristate "Basic fixed rate clk type KUnit test" if !KUNIT_ALL_TESTS
545 depends on KUNIT
546 default KUNIT_ALL_TESTS
547 select DTC
548 help
549 KUnit tests for the basic fixed rate clk type.
550
551config CLK_GATE_KUNIT_TEST
552 tristate "Basic gate type Kunit test" if !KUNIT_ALL_TESTS
553 depends on KUNIT
554 depends on !S390
555 default KUNIT_ALL_TESTS
556 help
557 Kunit test for the basic clk gate type.
558
559config CLK_FD_KUNIT_TEST
560 tristate "Basic fractional divider type Kunit test" if !KUNIT_ALL_TESTS
561 depends on KUNIT
562 default KUNIT_ALL_TESTS
563 help
564 Kunit test for the clk-fractional-divider type.
565
566endif