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1/*
2 * Copyright (c) 2010, 2011 NVIDIA Corporation.
3 * Copyright (C) 2010, 2011 Google, Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/platform_device.h>
20#include <linux/serial_8250.h>
21#include <linux/of_serial.h>
22#include <linux/i2c.h>
23#include <linux/delay.h>
24#include <linux/input.h>
25#include <linux/io.h>
26#include <linux/gpio.h>
27#include <linux/gpio_keys.h>
28#include <linux/platform_data/tegra_usb.h>
29
30#include <sound/wm8903.h>
31
32#include <mach/iomap.h>
33#include <mach/irqs.h>
34#include <mach/sdhci.h>
35#include <mach/tegra_wm8903_pdata.h>
36
37#include <asm/mach-types.h>
38#include <asm/mach/arch.h>
39#include <asm/hardware/gic.h>
40
41#include "board.h"
42#include "board-seaboard.h"
43#include "clock.h"
44#include "devices.h"
45#include "gpio-names.h"
46
47static struct plat_serial8250_port debug_uart_platform_data[] = {
48 {
49 /* Memory and IRQ filled in before registration */
50 .flags = UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
51 .type = PORT_TEGRA,
52 .handle_break = tegra_serial_handle_break,
53 .iotype = UPIO_MEM,
54 .regshift = 2,
55 .uartclk = 216000000,
56 }, {
57 .flags = 0,
58 }
59};
60
61static struct platform_device debug_uart = {
62 .name = "serial8250",
63 .id = PLAT8250_DEV_PLATFORM,
64 .dev = {
65 .platform_data = debug_uart_platform_data,
66 },
67};
68
69static __initdata struct tegra_clk_init_table seaboard_clk_init_table[] = {
70 /* name parent rate enabled */
71 { "uartb", "pll_p", 216000000, true},
72 { "uartd", "pll_p", 216000000, true},
73 { "pll_a", "pll_p_out1", 56448000, true },
74 { "pll_a_out0", "pll_a", 11289600, true },
75 { "cdev1", NULL, 0, true },
76 { "i2s1", "pll_a_out0", 11289600, false},
77 { "usbd", "clk_m", 12000000, true},
78 { "usb3", "clk_m", 12000000, true},
79 { NULL, NULL, 0, 0},
80};
81
82static struct gpio_keys_button seaboard_gpio_keys_buttons[] = {
83 {
84 .code = SW_LID,
85 .gpio = TEGRA_GPIO_LIDSWITCH,
86 .active_low = 0,
87 .desc = "Lid",
88 .type = EV_SW,
89 .wakeup = 1,
90 .debounce_interval = 1,
91 },
92 {
93 .code = KEY_POWER,
94 .gpio = TEGRA_GPIO_POWERKEY,
95 .active_low = 1,
96 .desc = "Power",
97 .type = EV_KEY,
98 .wakeup = 1,
99 },
100};
101
102static struct gpio_keys_platform_data seaboard_gpio_keys = {
103 .buttons = seaboard_gpio_keys_buttons,
104 .nbuttons = ARRAY_SIZE(seaboard_gpio_keys_buttons),
105};
106
107static struct platform_device seaboard_gpio_keys_device = {
108 .name = "gpio-keys",
109 .id = -1,
110 .dev = {
111 .platform_data = &seaboard_gpio_keys,
112 }
113};
114
115static struct tegra_sdhci_platform_data sdhci_pdata1 = {
116 .cd_gpio = -1,
117 .wp_gpio = -1,
118 .power_gpio = -1,
119};
120
121static struct tegra_sdhci_platform_data sdhci_pdata3 = {
122 .cd_gpio = TEGRA_GPIO_SD2_CD,
123 .wp_gpio = TEGRA_GPIO_SD2_WP,
124 .power_gpio = TEGRA_GPIO_SD2_POWER,
125};
126
127static struct tegra_sdhci_platform_data sdhci_pdata4 = {
128 .cd_gpio = -1,
129 .wp_gpio = -1,
130 .power_gpio = -1,
131 .is_8bit = 1,
132};
133
134static struct tegra_wm8903_platform_data seaboard_audio_pdata = {
135 .gpio_spkr_en = TEGRA_GPIO_SPKR_EN,
136 .gpio_hp_det = TEGRA_GPIO_HP_DET,
137 .gpio_hp_mute = -1,
138 .gpio_int_mic_en = -1,
139 .gpio_ext_mic_en = -1,
140};
141
142static struct platform_device seaboard_audio_device = {
143 .name = "tegra-snd-wm8903",
144 .id = 0,
145 .dev = {
146 .platform_data = &seaboard_audio_pdata,
147 },
148};
149
150static struct platform_device *seaboard_devices[] __initdata = {
151 &debug_uart,
152 &tegra_pmu_device,
153 &tegra_sdhci_device4,
154 &tegra_sdhci_device3,
155 &tegra_sdhci_device1,
156 &seaboard_gpio_keys_device,
157 &tegra_i2s_device1,
158 &tegra_das_device,
159 &seaboard_audio_device,
160};
161
162static struct i2c_board_info __initdata isl29018_device = {
163 I2C_BOARD_INFO("isl29018", 0x44),
164};
165
166static struct i2c_board_info __initdata adt7461_device = {
167 I2C_BOARD_INFO("adt7461", 0x4c),
168};
169
170static struct wm8903_platform_data wm8903_pdata = {
171 .irq_active_low = 0,
172 .micdet_cfg = 0,
173 .micdet_delay = 100,
174 .gpio_base = SEABOARD_GPIO_WM8903(0),
175 .gpio_cfg = {
176 0,
177 0,
178 WM8903_GPIO_CONFIG_ZERO,
179 0,
180 0,
181 },
182};
183
184static struct i2c_board_info __initdata wm8903_device = {
185 I2C_BOARD_INFO("wm8903", 0x1a),
186 .platform_data = &wm8903_pdata,
187};
188
189static int seaboard_ehci_init(void)
190{
191 struct tegra_ehci_platform_data *pdata;
192
193 pdata = tegra_ehci1_device.dev.platform_data;
194 pdata->vbus_gpio = TEGRA_GPIO_USB1;
195
196 platform_device_register(&tegra_ehci1_device);
197 platform_device_register(&tegra_ehci3_device);
198
199 return 0;
200}
201
202static void __init seaboard_i2c_init(void)
203{
204 isl29018_device.irq = gpio_to_irq(TEGRA_GPIO_ISL29018_IRQ);
205 i2c_register_board_info(0, &isl29018_device, 1);
206
207 wm8903_device.irq = gpio_to_irq(TEGRA_GPIO_CDC_IRQ);
208 i2c_register_board_info(0, &wm8903_device, 1);
209
210 i2c_register_board_info(3, &adt7461_device, 1);
211
212 platform_device_register(&tegra_i2c_device1);
213 platform_device_register(&tegra_i2c_device2);
214 platform_device_register(&tegra_i2c_device3);
215 platform_device_register(&tegra_i2c_device4);
216}
217
218static void __init seaboard_common_init(void)
219{
220 seaboard_pinmux_init();
221
222 tegra_clk_init_from_table(seaboard_clk_init_table);
223
224 tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
225 tegra_sdhci_device3.dev.platform_data = &sdhci_pdata3;
226 tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
227
228 platform_add_devices(seaboard_devices, ARRAY_SIZE(seaboard_devices));
229
230 seaboard_ehci_init();
231}
232
233static void __init tegra_seaboard_init(void)
234{
235 /* Seaboard uses UARTD for the debug port. */
236 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTD_BASE);
237 debug_uart_platform_data[0].mapbase = TEGRA_UARTD_BASE;
238 debug_uart_platform_data[0].irq = INT_UARTD;
239
240 seaboard_common_init();
241
242 seaboard_i2c_init();
243}
244
245static void __init tegra_kaen_init(void)
246{
247 /* Kaen uses UARTB for the debug port. */
248 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
249 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
250 debug_uart_platform_data[0].irq = INT_UARTB;
251
252 seaboard_audio_pdata.gpio_hp_mute = TEGRA_GPIO_KAEN_HP_MUTE;
253
254 seaboard_common_init();
255
256 seaboard_i2c_init();
257}
258
259static void __init tegra_wario_init(void)
260{
261 /* Wario uses UARTB for the debug port. */
262 debug_uart_platform_data[0].membase = IO_ADDRESS(TEGRA_UARTB_BASE);
263 debug_uart_platform_data[0].mapbase = TEGRA_UARTB_BASE;
264 debug_uart_platform_data[0].irq = INT_UARTB;
265
266 seaboard_common_init();
267
268 seaboard_i2c_init();
269}
270
271
272MACHINE_START(SEABOARD, "seaboard")
273 .atag_offset = 0x100,
274 .map_io = tegra_map_common_io,
275 .init_early = tegra20_init_early,
276 .init_irq = tegra_init_irq,
277 .handle_irq = gic_handle_irq,
278 .timer = &tegra_timer,
279 .init_machine = tegra_seaboard_init,
280 .init_late = tegra_init_late,
281 .restart = tegra_assert_system_reset,
282MACHINE_END
283
284MACHINE_START(KAEN, "kaen")
285 .atag_offset = 0x100,
286 .map_io = tegra_map_common_io,
287 .init_early = tegra20_init_early,
288 .init_irq = tegra_init_irq,
289 .handle_irq = gic_handle_irq,
290 .timer = &tegra_timer,
291 .init_machine = tegra_kaen_init,
292 .init_late = tegra_init_late,
293 .restart = tegra_assert_system_reset,
294MACHINE_END
295
296MACHINE_START(WARIO, "wario")
297 .atag_offset = 0x100,
298 .map_io = tegra_map_common_io,
299 .init_early = tegra20_init_early,
300 .init_irq = tegra_init_irq,
301 .handle_irq = gic_handle_irq,
302 .timer = &tegra_timer,
303 .init_machine = tegra_wario_init,
304 .init_late = tegra_init_late,
305 .restart = tegra_assert_system_reset,
306MACHINE_END