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1/*
2 * omap iommu: omap device registration
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/platform_device.h>
15
16#include <plat/iommu.h>
17#include <plat/irqs.h>
18
19struct iommu_device {
20 resource_size_t base;
21 int irq;
22 struct iommu_platform_data pdata;
23 struct resource res[2];
24};
25static struct iommu_device *devices;
26static int num_iommu_devices;
27
28#ifdef CONFIG_ARCH_OMAP3
29static struct iommu_device omap3_devices[] = {
30 {
31 .base = 0x480bd400,
32 .irq = 24,
33 .pdata = {
34 .name = "isp",
35 .nr_tlb_entries = 8,
36 .clk_name = "cam_ick",
37 .da_start = 0x0,
38 .da_end = 0xFFFFF000,
39 },
40 },
41#if defined(CONFIG_OMAP_IOMMU_IVA2)
42 {
43 .base = 0x5d000000,
44 .irq = 28,
45 .pdata = {
46 .name = "iva2",
47 .nr_tlb_entries = 32,
48 .clk_name = "iva2_ck",
49 .da_start = 0x11000000,
50 .da_end = 0xFFFFF000,
51 },
52 },
53#endif
54};
55#define NR_OMAP3_IOMMU_DEVICES ARRAY_SIZE(omap3_devices)
56static struct platform_device *omap3_iommu_pdev[NR_OMAP3_IOMMU_DEVICES];
57#else
58#define omap3_devices NULL
59#define NR_OMAP3_IOMMU_DEVICES 0
60#define omap3_iommu_pdev NULL
61#endif
62
63#ifdef CONFIG_ARCH_OMAP4
64static struct iommu_device omap4_devices[] = {
65 {
66 .base = OMAP4_MMU1_BASE,
67 .irq = OMAP44XX_IRQ_DUCATI_MMU,
68 .pdata = {
69 .name = "ducati",
70 .nr_tlb_entries = 32,
71 .clk_name = "ipu_fck",
72 .da_start = 0x0,
73 .da_end = 0xFFFFF000,
74 },
75 },
76#if defined(CONFIG_MPU_TESLA_IOMMU)
77 {
78 .base = OMAP4_MMU2_BASE,
79 .irq = INT_44XX_DSP_MMU,
80 .pdata = {
81 .name = "tesla",
82 .nr_tlb_entries = 32,
83 .clk_name = "tesla_ick",
84 .da_start = 0x0,
85 .da_end = 0xFFFFF000,
86 },
87 },
88#endif
89};
90#define NR_OMAP4_IOMMU_DEVICES ARRAY_SIZE(omap4_devices)
91static struct platform_device *omap4_iommu_pdev[NR_OMAP4_IOMMU_DEVICES];
92#else
93#define omap4_devices NULL
94#define NR_OMAP4_IOMMU_DEVICES 0
95#define omap4_iommu_pdev NULL
96#endif
97
98static struct platform_device **omap_iommu_pdev;
99
100static int __init omap_iommu_init(void)
101{
102 int i, err;
103 struct resource res[] = {
104 { .flags = IORESOURCE_MEM },
105 { .flags = IORESOURCE_IRQ },
106 };
107
108 if (cpu_is_omap34xx()) {
109 devices = omap3_devices;
110 omap_iommu_pdev = omap3_iommu_pdev;
111 num_iommu_devices = NR_OMAP3_IOMMU_DEVICES;
112 } else if (cpu_is_omap44xx()) {
113 devices = omap4_devices;
114 omap_iommu_pdev = omap4_iommu_pdev;
115 num_iommu_devices = NR_OMAP4_IOMMU_DEVICES;
116 } else
117 return -ENODEV;
118
119 for (i = 0; i < num_iommu_devices; i++) {
120 struct platform_device *pdev;
121 const struct iommu_device *d = &devices[i];
122
123 pdev = platform_device_alloc("omap-iommu", i);
124 if (!pdev) {
125 err = -ENOMEM;
126 goto err_out;
127 }
128
129 res[0].start = d->base;
130 res[0].end = d->base + MMU_REG_SIZE - 1;
131 res[1].start = res[1].end = d->irq;
132
133 err = platform_device_add_resources(pdev, res,
134 ARRAY_SIZE(res));
135 if (err)
136 goto err_out;
137 err = platform_device_add_data(pdev, &d->pdata,
138 sizeof(d->pdata));
139 if (err)
140 goto err_out;
141 err = platform_device_add(pdev);
142 if (err)
143 goto err_out;
144 omap_iommu_pdev[i] = pdev;
145 }
146 return 0;
147
148err_out:
149 while (i--)
150 platform_device_put(omap_iommu_pdev[i]);
151 return err;
152}
153/* must be ready before omap3isp is probed */
154subsys_initcall(omap_iommu_init);
155
156static void __exit omap_iommu_exit(void)
157{
158 int i;
159
160 for (i = 0; i < num_iommu_devices; i++)
161 platform_device_unregister(omap_iommu_pdev[i]);
162}
163module_exit(omap_iommu_exit);
164
165MODULE_AUTHOR("Hiroshi DOYU");
166MODULE_DESCRIPTION("omap iommu: omap device registration");
167MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * OMAP IOMMU quirks for various TI SoCs
4 *
5 * Copyright (C) 2015-2019 Texas Instruments Incorporated - https://www.ti.com/
6 * Suman Anna <s-anna@ti.com>
7 */
8
9#include <linux/platform_device.h>
10#include <linux/err.h>
11#include <linux/clk.h>
12#include <linux/list.h>
13
14#include "clockdomain.h"
15#include "powerdomain.h"
16#include "common.h"
17
18struct pwrdm_link {
19 struct device *dev;
20 struct powerdomain *pwrdm;
21 struct list_head node;
22};
23
24static DEFINE_SPINLOCK(iommu_lock);
25static struct clockdomain *emu_clkdm;
26static atomic_t emu_count;
27
28static void omap_iommu_dra7_emu_swsup_config(struct platform_device *pdev,
29 bool enable)
30{
31 struct device_node *np = pdev->dev.of_node;
32 unsigned long flags;
33
34 if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu"))
35 return;
36
37 if (!emu_clkdm) {
38 emu_clkdm = clkdm_lookup("emu_clkdm");
39 if (WARN_ON_ONCE(!emu_clkdm))
40 return;
41 }
42
43 spin_lock_irqsave(&iommu_lock, flags);
44
45 if (enable && (atomic_inc_return(&emu_count) == 1))
46 clkdm_deny_idle(emu_clkdm);
47 else if (!enable && (atomic_dec_return(&emu_count) == 0))
48 clkdm_allow_idle(emu_clkdm);
49
50 spin_unlock_irqrestore(&iommu_lock, flags);
51}
52
53static struct powerdomain *_get_pwrdm(struct device *dev)
54{
55 struct clk *clk;
56 struct clk_hw_omap *hwclk;
57 struct clockdomain *clkdm;
58 struct powerdomain *pwrdm = NULL;
59 struct pwrdm_link *entry;
60 unsigned long flags;
61 static LIST_HEAD(cache);
62
63 spin_lock_irqsave(&iommu_lock, flags);
64
65 list_for_each_entry(entry, &cache, node) {
66 if (entry->dev == dev) {
67 pwrdm = entry->pwrdm;
68 break;
69 }
70 }
71
72 spin_unlock_irqrestore(&iommu_lock, flags);
73
74 if (pwrdm)
75 return pwrdm;
76
77 clk = of_clk_get(dev->of_node->parent, 0);
78 if (IS_ERR(clk)) {
79 dev_err(dev, "no fck found\n");
80 return NULL;
81 }
82
83 hwclk = to_clk_hw_omap(__clk_get_hw(clk));
84 clk_put(clk);
85 if (!hwclk || !hwclk->clkdm_name) {
86 dev_err(dev, "no hwclk data\n");
87 return NULL;
88 }
89
90 clkdm = clkdm_lookup(hwclk->clkdm_name);
91 if (!clkdm) {
92 dev_err(dev, "clkdm not found: %s\n", hwclk->clkdm_name);
93 return NULL;
94 }
95
96 pwrdm = clkdm_get_pwrdm(clkdm);
97 if (!pwrdm) {
98 dev_err(dev, "pwrdm not found: %s\n", clkdm->name);
99 return NULL;
100 }
101
102 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
103 if (entry) {
104 entry->dev = dev;
105 entry->pwrdm = pwrdm;
106 spin_lock_irqsave(&iommu_lock, flags);
107 list_add(&entry->node, &cache);
108 spin_unlock_irqrestore(&iommu_lock, flags);
109 }
110
111 return pwrdm;
112}
113
114int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
115 u8 *pwrst)
116{
117 struct powerdomain *pwrdm;
118 u8 next_pwrst;
119 int ret = 0;
120
121 pwrdm = _get_pwrdm(&pdev->dev);
122 if (!pwrdm)
123 return -ENODEV;
124
125 if (request) {
126 *pwrst = pwrdm_read_next_pwrst(pwrdm);
127 omap_iommu_dra7_emu_swsup_config(pdev, true);
128 }
129
130 if (*pwrst > PWRDM_POWER_RET)
131 goto out;
132
133 next_pwrst = request ? PWRDM_POWER_ON : *pwrst;
134
135 ret = pwrdm_set_next_pwrst(pwrdm, next_pwrst);
136
137out:
138 if (!request)
139 omap_iommu_dra7_emu_swsup_config(pdev, false);
140
141 return ret;
142}