1/*
  2 * linux/arch/arm/mach-omap2/board-3430sdp.c
  3 *
  4 * Copyright (C) 2007 Texas Instruments
  5 *
  6 * Modified from mach-omap2/board-generic.c
  7 *
  8 * Initial code: Syed Mohammed Khasim
  9 *
 10 * This program is free software; you can redistribute it and/or modify
 11 * it under the terms of the GNU General Public License version 2 as
 12 * published by the Free Software Foundation.
 13 */
 14
 15#include <linux/kernel.h>
 16#include <linux/init.h>
 17#include <linux/platform_device.h>
 18#include <linux/delay.h>
 19#include <linux/input.h>
 20#include <linux/input/matrix_keypad.h>
 21#include <linux/spi/spi.h>
 22#include <linux/i2c/twl.h>
 23#include <linux/regulator/machine.h>
 24#include <linux/io.h>
 25#include <linux/gpio.h>
 26#include <linux/mmc/host.h>
 27
 28#include <mach/hardware.h>
 29#include <asm/mach-types.h>
 30#include <asm/mach/arch.h>
 31#include <asm/mach/map.h>
 32
 33#include <plat/mcspi.h>
 34#include <plat/board.h>
 35#include <plat/usb.h>
 36#include "common.h"
 37#include <plat/dma.h>
 38#include <plat/gpmc.h>
 39#include <video/omapdss.h>
 40#include <video/omap-panel-tfp410.h>
 41
 42#include <plat/gpmc-smc91x.h>
 43
 44#include "board-flash.h"
 45#include "mux.h"
 46#include "sdram-qimonda-hyb18m512160af-6.h"
 47#include "hsmmc.h"
 48#include "pm.h"
 49#include "control.h"
 50#include "common-board-devices.h"
 51
 52#define CONFIG_DISABLE_HFCLK 1
 53
 54#define SDP3430_TS_GPIO_IRQ_SDPV1	3
 55#define SDP3430_TS_GPIO_IRQ_SDPV2	2
 56
 57#define ENABLE_VAUX3_DEDICATED	0x03
 58#define ENABLE_VAUX3_DEV_GRP	0x20
 59
 60#define TWL4030_MSECURE_GPIO 22
 61
 62static uint32_t board_keymap[] = {
 63	KEY(0, 0, KEY_LEFT),
 64	KEY(0, 1, KEY_RIGHT),
 65	KEY(0, 2, KEY_A),
 66	KEY(0, 3, KEY_B),
 67	KEY(0, 4, KEY_C),
 68	KEY(1, 0, KEY_DOWN),
 69	KEY(1, 1, KEY_UP),
 70	KEY(1, 2, KEY_E),
 71	KEY(1, 3, KEY_F),
 72	KEY(1, 4, KEY_G),
 73	KEY(2, 0, KEY_ENTER),
 74	KEY(2, 1, KEY_I),
 75	KEY(2, 2, KEY_J),
 76	KEY(2, 3, KEY_K),
 77	KEY(2, 4, KEY_3),
 78	KEY(3, 0, KEY_M),
 79	KEY(3, 1, KEY_N),
 80	KEY(3, 2, KEY_O),
 81	KEY(3, 3, KEY_P),
 82	KEY(3, 4, KEY_Q),
 83	KEY(4, 0, KEY_R),
 84	KEY(4, 1, KEY_4),
 85	KEY(4, 2, KEY_T),
 86	KEY(4, 3, KEY_U),
 87	KEY(4, 4, KEY_D),
 88	KEY(5, 0, KEY_V),
 89	KEY(5, 1, KEY_W),
 90	KEY(5, 2, KEY_L),
 91	KEY(5, 3, KEY_S),
 92	KEY(5, 4, KEY_H),
 93	0
 94};
 95
 96static struct matrix_keymap_data board_map_data = {
 97	.keymap			= board_keymap,
 98	.keymap_size		= ARRAY_SIZE(board_keymap),
 99};
100
101static struct twl4030_keypad_data sdp3430_kp_data = {
102	.keymap_data	= &board_map_data,
103	.rows		= 5,
104	.cols		= 6,
105	.rep		= 1,
106};
107
108#define SDP3430_LCD_PANEL_BACKLIGHT_GPIO	8
109#define SDP3430_LCD_PANEL_ENABLE_GPIO		5
110
111static struct gpio sdp3430_dss_gpios[] __initdata = {
112	{SDP3430_LCD_PANEL_ENABLE_GPIO,    GPIOF_OUT_INIT_LOW, "LCD reset"    },
113	{SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
114};
115
116static void __init sdp3430_display_init(void)
117{
118	int r;
119
120	r = gpio_request_array(sdp3430_dss_gpios,
121			       ARRAY_SIZE(sdp3430_dss_gpios));
122	if (r)
123		printk(KERN_ERR "failed to get LCD control GPIOs\n");
124
125}
126
127static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
128{
129	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
130	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
131
132	return 0;
133}
134
135static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
136{
137	gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
138	gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
139}
140
141static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
142{
143	return 0;
144}
145
146static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
147{
148}
149
150
151static struct omap_dss_device sdp3430_lcd_device = {
152	.name			= "lcd",
153	.driver_name		= "sharp_ls_panel",
154	.type			= OMAP_DISPLAY_TYPE_DPI,
155	.phy.dpi.data_lines	= 16,
156	.platform_enable	= sdp3430_panel_enable_lcd,
157	.platform_disable	= sdp3430_panel_disable_lcd,
158};
159
160static struct tfp410_platform_data dvi_panel = {
161	.power_down_gpio	= -1,
162};
163
164static struct omap_dss_device sdp3430_dvi_device = {
165	.name			= "dvi",
166	.type			= OMAP_DISPLAY_TYPE_DPI,
167	.driver_name		= "tfp410",
168	.data			= &dvi_panel,
169	.phy.dpi.data_lines	= 24,
170};
171
172static struct omap_dss_device sdp3430_tv_device = {
173	.name			= "tv",
174	.driver_name		= "venc",
175	.type			= OMAP_DISPLAY_TYPE_VENC,
176	.phy.venc.type		= OMAP_DSS_VENC_TYPE_SVIDEO,
177	.platform_enable	= sdp3430_panel_enable_tv,
178	.platform_disable	= sdp3430_panel_disable_tv,
179};
180
181
182static struct omap_dss_device *sdp3430_dss_devices[] = {
183	&sdp3430_lcd_device,
184	&sdp3430_dvi_device,
185	&sdp3430_tv_device,
186};
187
188static struct omap_dss_board_info sdp3430_dss_data = {
189	.num_devices	= ARRAY_SIZE(sdp3430_dss_devices),
190	.devices	= sdp3430_dss_devices,
191	.default_device	= &sdp3430_lcd_device,
192};
193
194static struct omap_board_config_kernel sdp3430_config[] __initdata = {
195};
196
197static struct omap2_hsmmc_info mmc[] = {
198	{
199		.mmc		= 1,
200		/* 8 bits (default) requires S6.3 == ON,
201		 * so the SIM card isn't used; else 4 bits.
202		 */
203		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
204		.gpio_wp	= 4,
205		.deferred	= true,
206	},
207	{
208		.mmc		= 2,
209		.caps		= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
210		.gpio_wp	= 7,
211		.deferred	= true,
212	},
213	{}	/* Terminator */
214};
215
216static int sdp3430_twl_gpio_setup(struct device *dev,
217		unsigned gpio, unsigned ngpio)
218{
219	/* gpio + 0 is "mmc0_cd" (input/IRQ),
220	 * gpio + 1 is "mmc1_cd" (input/IRQ)
221	 */
222	mmc[0].gpio_cd = gpio + 0;
223	mmc[1].gpio_cd = gpio + 1;
224	omap_hsmmc_late_init(mmc);
225
226	/* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
227	gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
228
229	/* gpio + 15 is "sub_lcd_nRST" (output) */
230	gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
231
232	return 0;
233}
234
235static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
236	.gpio_base	= OMAP_MAX_GPIO_LINES,
237	.irq_base	= TWL4030_GPIO_IRQ_BASE,
238	.irq_end	= TWL4030_GPIO_IRQ_END,
239	.pulldowns	= BIT(2) | BIT(6) | BIT(8) | BIT(13)
240				| BIT(16) | BIT(17),
241	.setup		= sdp3430_twl_gpio_setup,
242};
243
244/* regulator consumer mappings */
245
246/* ads7846 on SPI */
247static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
248	REGULATOR_SUPPLY("vcc", "spi1.0"),
249};
250
251static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
252	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
253};
254
255static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
256	REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
257};
258
259static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
260	REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
261};
262
263/*
264 * Apply all the fixed voltages since most versions of U-Boot
265 * don't bother with that initialization.
266 */
267
268/* VAUX1 for mainboard (irda and sub-lcd) */
269static struct regulator_init_data sdp3430_vaux1 = {
270	.constraints = {
271		.min_uV			= 2800000,
272		.max_uV			= 2800000,
273		.apply_uV		= true,
274		.valid_modes_mask	= REGULATOR_MODE_NORMAL
275					| REGULATOR_MODE_STANDBY,
276		.valid_ops_mask		= REGULATOR_CHANGE_MODE
277					| REGULATOR_CHANGE_STATUS,
278	},
279};
280
281/* VAUX2 for camera module */
282static struct regulator_init_data sdp3430_vaux2 = {
283	.constraints = {
284		.min_uV			= 2800000,
285		.max_uV			= 2800000,
286		.apply_uV		= true,
287		.valid_modes_mask	= REGULATOR_MODE_NORMAL
288					| REGULATOR_MODE_STANDBY,
289		.valid_ops_mask		= REGULATOR_CHANGE_MODE
290					| REGULATOR_CHANGE_STATUS,
291	},
292};
293
294/* VAUX3 for LCD board */
295static struct regulator_init_data sdp3430_vaux3 = {
296	.constraints = {
297		.min_uV			= 2800000,
298		.max_uV			= 2800000,
299		.apply_uV		= true,
300		.valid_modes_mask	= REGULATOR_MODE_NORMAL
301					| REGULATOR_MODE_STANDBY,
302		.valid_ops_mask		= REGULATOR_CHANGE_MODE
303					| REGULATOR_CHANGE_STATUS,
304	},
305	.num_consumer_supplies		= ARRAY_SIZE(sdp3430_vaux3_supplies),
306	.consumer_supplies		= sdp3430_vaux3_supplies,
307};
308
309/* VAUX4 for OMAP VDD_CSI2 (camera) */
310static struct regulator_init_data sdp3430_vaux4 = {
311	.constraints = {
312		.min_uV			= 1800000,
313		.max_uV			= 1800000,
314		.apply_uV		= true,
315		.valid_modes_mask	= REGULATOR_MODE_NORMAL
316					| REGULATOR_MODE_STANDBY,
317		.valid_ops_mask		= REGULATOR_CHANGE_MODE
318					| REGULATOR_CHANGE_STATUS,
319	},
320};
321
322/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
323static struct regulator_init_data sdp3430_vmmc1 = {
324	.constraints = {
325		.min_uV			= 1850000,
326		.max_uV			= 3150000,
327		.valid_modes_mask	= REGULATOR_MODE_NORMAL
328					| REGULATOR_MODE_STANDBY,
329		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
330					| REGULATOR_CHANGE_MODE
331					| REGULATOR_CHANGE_STATUS,
332	},
333	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc1_supplies),
334	.consumer_supplies	= sdp3430_vmmc1_supplies,
335};
336
337/* VMMC2 for MMC2 card */
338static struct regulator_init_data sdp3430_vmmc2 = {
339	.constraints = {
340		.min_uV			= 1850000,
341		.max_uV			= 1850000,
342		.apply_uV		= true,
343		.valid_modes_mask	= REGULATOR_MODE_NORMAL
344					| REGULATOR_MODE_STANDBY,
345		.valid_ops_mask		= REGULATOR_CHANGE_MODE
346					| REGULATOR_CHANGE_STATUS,
347	},
348	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vmmc2_supplies),
349	.consumer_supplies	= sdp3430_vmmc2_supplies,
350};
351
352/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
353static struct regulator_init_data sdp3430_vsim = {
354	.constraints = {
355		.min_uV			= 1800000,
356		.max_uV			= 3000000,
357		.valid_modes_mask	= REGULATOR_MODE_NORMAL
358					| REGULATOR_MODE_STANDBY,
359		.valid_ops_mask		= REGULATOR_CHANGE_VOLTAGE
360					| REGULATOR_CHANGE_MODE
361					| REGULATOR_CHANGE_STATUS,
362	},
363	.num_consumer_supplies	= ARRAY_SIZE(sdp3430_vsim_supplies),
364	.consumer_supplies	= sdp3430_vsim_supplies,
365};
366
367static struct twl4030_platform_data sdp3430_twldata = {
368	/* platform_data for children goes here */
369	.gpio		= &sdp3430_gpio_data,
370	.keypad		= &sdp3430_kp_data,
371
372	.vaux1		= &sdp3430_vaux1,
373	.vaux2		= &sdp3430_vaux2,
374	.vaux3		= &sdp3430_vaux3,
375	.vaux4		= &sdp3430_vaux4,
376	.vmmc1		= &sdp3430_vmmc1,
377	.vmmc2		= &sdp3430_vmmc2,
378	.vsim		= &sdp3430_vsim,
379};
380
381static int __init omap3430_i2c_init(void)
382{
383	/* i2c1 for PMIC only */
384	omap3_pmic_get_config(&sdp3430_twldata,
385			TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
386			TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
387			TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
388	sdp3430_twldata.vdac->constraints.apply_uV = true;
389	sdp3430_twldata.vpll2->constraints.apply_uV = true;
390	sdp3430_twldata.vpll2->constraints.name = "VDVI";
391
392	omap3_pmic_init("twl4030", &sdp3430_twldata);
393
394	/* i2c2 on camera connector (for sensor control) and optional isp1301 */
395	omap_register_i2c_bus(2, 400, NULL, 0);
396	/* i2c3 on display connector (for DVI, tfp410) */
397	omap_register_i2c_bus(3, 400, NULL, 0);
398	return 0;
399}
400
401#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
402
403static struct omap_smc91x_platform_data board_smc91x_data = {
404	.cs		= 3,
405	.flags		= GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
406				IORESOURCE_IRQ_LOWLEVEL,
407};
408
409static void __init board_smc91x_init(void)
410{
411	if (omap_rev() > OMAP3430_REV_ES1_0)
412		board_smc91x_data.gpio_irq = 6;
413	else
414		board_smc91x_data.gpio_irq = 29;
415
416	gpmc_smc91x_init(&board_smc91x_data);
417}
418
419#else
420
421static inline void board_smc91x_init(void)
422{
423}
424
425#endif
426
427static void enable_board_wakeup_source(void)
428{
429	/* T2 interrupt line (keypad) */
430	omap_mux_init_signal("sys_nirq",
431		OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
432}
433
434static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
435
436	.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
437	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
438	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
439
440	.phy_reset  = true,
441	.reset_gpio_port[0]  = 57,
442	.reset_gpio_port[1]  = 61,
443	.reset_gpio_port[2]  = -EINVAL
444};
445
446#ifdef CONFIG_OMAP_MUX
447static struct omap_board_mux board_mux[] __initdata = {
448	{ .reg_offset = OMAP_MUX_TERMINATOR },
449};
450#else
451#define board_mux	NULL
452#endif
453
454/*
455 * SDP3430 V2 Board CS organization
456 * Different from SDP3430 V1. Now 4 switches used to specify CS
457 *
458 * See also the Switch S8 settings in the comments.
459 */
460static char chip_sel_3430[][GPMC_CS_NUM] = {
461	{PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
462	{PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
463	{PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
464};
465
466static struct mtd_partition sdp_nor_partitions[] = {
467	/* bootloader (U-Boot, etc) in first sector */
468	{
469		.name		= "Bootloader-NOR",
470		.offset		= 0,
471		.size		= SZ_256K,
472		.mask_flags	= MTD_WRITEABLE, /* force read-only */
473	},
474	/* bootloader params in the next sector */
475	{
476		.name		= "Params-NOR",
477		.offset		= MTDPART_OFS_APPEND,
478		.size		= SZ_256K,
479		.mask_flags	= 0,
480	},
481	/* kernel */
482	{
483		.name		= "Kernel-NOR",
484		.offset		= MTDPART_OFS_APPEND,
485		.size		= SZ_2M,
486		.mask_flags	= 0
487	},
488	/* file system */
489	{
490		.name		= "Filesystem-NOR",
491		.offset		= MTDPART_OFS_APPEND,
492		.size		= MTDPART_SIZ_FULL,
493		.mask_flags	= 0
494	}
495};
496
497static struct mtd_partition sdp_onenand_partitions[] = {
498	{
499		.name		= "X-Loader-OneNAND",
500		.offset		= 0,
501		.size		= 4 * (64 * 2048),
502		.mask_flags	= MTD_WRITEABLE  /* force read-only */
503	},
504	{
505		.name		= "U-Boot-OneNAND",
506		.offset		= MTDPART_OFS_APPEND,
507		.size		= 2 * (64 * 2048),
508		.mask_flags	= MTD_WRITEABLE  /* force read-only */
509	},
510	{
511		.name		= "U-Boot Environment-OneNAND",
512		.offset		= MTDPART_OFS_APPEND,
513		.size		= 1 * (64 * 2048),
514	},
515	{
516		.name		= "Kernel-OneNAND",
517		.offset		= MTDPART_OFS_APPEND,
518		.size		= 16 * (64 * 2048),
519	},
520	{
521		.name		= "File System-OneNAND",
522		.offset		= MTDPART_OFS_APPEND,
523		.size		= MTDPART_SIZ_FULL,
524	},
525};
526
527static struct mtd_partition sdp_nand_partitions[] = {
528	/* All the partition sizes are listed in terms of NAND block size */
529	{
530		.name		= "X-Loader-NAND",
531		.offset		= 0,
532		.size		= 4 * (64 * 2048),
533		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
534	},
535	{
536		.name		= "U-Boot-NAND",
537		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x80000 */
538		.size		= 10 * (64 * 2048),
539		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
540	},
541	{
542		.name		= "Boot Env-NAND",
543
544		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x1c0000 */
545		.size		= 6 * (64 * 2048),
546	},
547	{
548		.name		= "Kernel-NAND",
549		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x280000 */
550		.size		= 40 * (64 * 2048),
551	},
552	{
553		.name		= "File System - NAND",
554		.size		= MTDPART_SIZ_FULL,
555		.offset		= MTDPART_OFS_APPEND,	/* Offset = 0x780000 */
556	},
557};
558
559static struct flash_partitions sdp_flash_partitions[] = {
560	{
561		.parts = sdp_nor_partitions,
562		.nr_parts = ARRAY_SIZE(sdp_nor_partitions),
563	},
564	{
565		.parts = sdp_onenand_partitions,
566		.nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
567	},
568	{
569		.parts = sdp_nand_partitions,
570		.nr_parts = ARRAY_SIZE(sdp_nand_partitions),
571	},
572};
573
574static void __init omap_3430sdp_init(void)
575{
576	int gpio_pendown;
577
578	omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
579	omap_board_config = sdp3430_config;
580	omap_board_config_size = ARRAY_SIZE(sdp3430_config);
581	omap_hsmmc_init(mmc);
582	omap3430_i2c_init();
583	omap_display_init(&sdp3430_dss_data);
584	if (omap_rev() > OMAP3430_REV_ES1_0)
585		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
586	else
587		gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
588	omap_ads7846_init(1, gpio_pendown, 310, NULL);
589	omap_serial_init();
590	omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
591	usb_musb_init(NULL);
592	board_smc91x_init();
593	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
594	sdp3430_display_init();
595	enable_board_wakeup_source();
596	usbhs_init(&usbhs_bdata);
597}
598
599MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
600	/* Maintainer: Syed Khasim - Texas Instruments Inc */
601	.atag_offset	= 0x100,
602	.reserve	= omap_reserve,
603	.map_io		= omap3_map_io,
604	.init_early	= omap3430_init_early,
605	.init_irq	= omap3_init_irq,
606	.handle_irq	= omap3_intc_handle_irq,
607	.init_machine	= omap_3430sdp_init,
608	.init_late	= omap3430_init_late,
609	.timer		= &omap3_timer,
610	.restart	= omap_prcm_restart,
611MACHINE_END