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v3.5.6
 
 
 1#include <linux/init.h>
 
 
 
 2
 
 
 3#include <asm/idmap.h>
 4#include <asm/pgalloc.h>
 5#include <asm/pgtable.h>
 6#include <asm/memory.h>
 7#include <asm/suspend.h>
 8#include <asm/tlbflush.h>
 
 9
10extern int __cpu_suspend(unsigned long, int (*)(unsigned long));
11extern void cpu_resume_mmu(void);
12
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
13/*
14 * This is called by __cpu_suspend() to save the state, and do whatever
15 * flushing is required to ensure that when the CPU goes to sleep we have
16 * the necessary data available when the caches are not searched.
17 */
18void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
19{
 
 
20	*save_ptr = virt_to_phys(ptr);
21
22	/* This must correspond to the LDM in cpu_resume() assembly */
23	*ptr++ = virt_to_phys(idmap_pgd);
24	*ptr++ = sp;
25	*ptr++ = virt_to_phys(cpu_do_resume);
26
27	cpu_do_suspend(ptr);
28
29	flush_cache_all();
 
 
 
 
 
 
 
 
 
 
 
 
 
30	outer_clean_range(*save_ptr, *save_ptr + ptrsz);
31	outer_clean_range(virt_to_phys(save_ptr),
32			  virt_to_phys(save_ptr) + sizeof(*save_ptr));
33}
34
35/*
36 * Hide the first two arguments to __cpu_suspend - these are an implementation
37 * detail which platform code shouldn't have to know about.
38 */
39int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
40{
41	struct mm_struct *mm = current->active_mm;
42	int ret;
43
44	if (!idmap_pgd)
45		return -EINVAL;
46
47	/*
48	 * Provide a temporary page table with an identity mapping for
49	 * the MMU-enable code, required for resuming.  On successful
50	 * resume (indicated by a zero return code), we need to switch
51	 * back to the correct page tables.
52	 */
53	ret = __cpu_suspend(arg, fn);
54	if (ret == 0) {
55		cpu_switch_mm(mm->pgd, mm);
56		local_flush_tlb_all();
57	}
58
59	return ret;
60}
v6.13.7
  1// SPDX-License-Identifier: GPL-2.0
  2#include <linux/ftrace.h>
  3#include <linux/init.h>
  4#include <linux/slab.h>
  5#include <linux/mm_types.h>
  6#include <linux/pgtable.h>
  7
  8#include <asm/bugs.h>
  9#include <asm/cacheflush.h>
 10#include <asm/idmap.h>
 11#include <asm/page.h>
 12#include <asm/smp_plat.h>
 
 13#include <asm/suspend.h>
 14#include <asm/tlbflush.h>
 15#include <asm/uaccess.h>
 16
 17extern int __cpu_suspend(unsigned long, int (*)(unsigned long), u32 cpuid);
 18extern void cpu_resume_mmu(void);
 19
 20#ifdef CONFIG_MMU
 21int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
 22{
 23	struct mm_struct *mm = current->active_mm;
 24	u32 __mpidr = cpu_logical_map(smp_processor_id());
 25	int ret;
 26
 27	if (!idmap_pgd)
 28		return -EINVAL;
 29
 30	/*
 31	 * Needed for the MMU disabling/enabing code to be able to run from
 32	 * TTBR0 addresses.
 33	 */
 34	if (IS_ENABLED(CONFIG_CPU_TTBR0_PAN))
 35		uaccess_save_and_enable();
 36
 37	/*
 38	 * Function graph tracer state gets incosistent when the kernel
 39	 * calls functions that never return (aka suspend finishers) hence
 40	 * disable graph tracing during their execution.
 41	 */
 42	pause_graph_tracing();
 43
 44	/*
 45	 * Provide a temporary page table with an identity mapping for
 46	 * the MMU-enable code, required for resuming.  On successful
 47	 * resume (indicated by a zero return code), we need to switch
 48	 * back to the correct page tables.
 49	 */
 50	ret = __cpu_suspend(arg, fn, __mpidr);
 51
 52	unpause_graph_tracing();
 53
 54	if (ret == 0) {
 55		cpu_switch_mm(mm->pgd, mm);
 56		local_flush_bp_all();
 57		local_flush_tlb_all();
 58		check_other_bugs();
 59	}
 60
 61	return ret;
 62}
 63#else
 64int cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
 65{
 66	u32 __mpidr = cpu_logical_map(smp_processor_id());
 67	int ret;
 68
 69	pause_graph_tracing();
 70	ret = __cpu_suspend(arg, fn, __mpidr);
 71	unpause_graph_tracing();
 72
 73	return ret;
 74}
 75#define	idmap_pgd	NULL
 76#endif
 77
 78/*
 79 * This is called by __cpu_suspend() to save the state, and do whatever
 80 * flushing is required to ensure that when the CPU goes to sleep we have
 81 * the necessary data available when the caches are not searched.
 82 */
 83void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr)
 84{
 85	u32 *ctx = ptr;
 86
 87	*save_ptr = virt_to_phys(ptr);
 88
 89	/* This must correspond to the LDM in cpu_resume() assembly */
 90	*ptr++ = virt_to_phys(idmap_pgd);
 91	*ptr++ = sp;
 92	*ptr++ = virt_to_phys(cpu_do_resume);
 93
 94	cpu_do_suspend(ptr);
 95
 96	flush_cache_louis();
 97
 98	/*
 99	 * flush_cache_louis does not guarantee that
100	 * save_ptr and ptr are cleaned to main memory,
101	 * just up to the Level of Unification Inner Shareable.
102	 * Since the context pointer and context itself
103	 * are to be retrieved with the MMU off that
104	 * data must be cleaned from all cache levels
105	 * to main memory using "area" cache primitives.
106	*/
107	__cpuc_flush_dcache_area(ctx, ptrsz);
108	__cpuc_flush_dcache_area(save_ptr, sizeof(*save_ptr));
109
110	outer_clean_range(*save_ptr, *save_ptr + ptrsz);
111	outer_clean_range(virt_to_phys(save_ptr),
112			  virt_to_phys(save_ptr) + sizeof(*save_ptr));
113}
114
115extern struct sleep_save_sp sleep_save_sp;
 
 
 
 
 
 
 
116
117static int cpu_suspend_alloc_sp(void)
118{
119	void *ctx_ptr;
120	/* ctx_ptr is an array of physical addresses */
121	ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(u32), GFP_KERNEL);
122
123	if (WARN_ON(!ctx_ptr))
124		return -ENOMEM;
125	sleep_save_sp.save_ptr_stash = ctx_ptr;
126	sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
127	sync_cache_w(&sleep_save_sp);
128	return 0;
 
 
 
 
129}
130early_initcall(cpu_suspend_alloc_sp);