1/* SPDX-License-Identifier: GPL-2.0 */
  2/*
  3 * Thunderbolt control channel messages
  4 *
  5 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
  6 * Copyright (C) 2017, Intel Corporation
  7 */
  8
  9#ifndef _TB_MSGS
 10#define _TB_MSGS
 11
 12#include <linux/types.h>
 13#include <linux/uuid.h>
 14
 15enum tb_cfg_space {
 16	TB_CFG_HOPS = 0,
 17	TB_CFG_PORT = 1,
 18	TB_CFG_SWITCH = 2,
 19	TB_CFG_COUNTERS = 3,
 20};
 21
 22enum tb_cfg_error {
 23	TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
 24	TB_CFG_ERROR_LINK_ERROR = 1,
 25	TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
 26	TB_CFG_ERROR_NO_SUCH_PORT = 4,
 27	TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
 28	TB_CFG_ERROR_LOOP = 8,
 29	TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
 30	TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
 31};
 32
 33/* common header */
 34struct tb_cfg_header {
 35	u32 route_hi:22;
 36	u32 unknown:10; /* highest order bit is set on replies */
 37	u32 route_lo;
 38} __packed;
 39
 40/* additional header for read/write packets */
 41struct tb_cfg_address {
 42	u32 offset:13; /* in dwords */
 43	u32 length:6; /* in dwords */
 44	u32 port:6;
 45	enum tb_cfg_space space:2;
 46	u32 seq:2; /* sequence number  */
 47	u32 zero:3;
 48} __packed;
 49
 50/* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
 51struct cfg_read_pkg {
 52	struct tb_cfg_header header;
 53	struct tb_cfg_address addr;
 54} __packed;
 55
 56/* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
 57struct cfg_write_pkg {
 58	struct tb_cfg_header header;
 59	struct tb_cfg_address addr;
 60	u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
 61} __packed;
 62
 63/* TB_CFG_PKG_ERROR */
 64struct cfg_error_pkg {
 65	struct tb_cfg_header header;
 66	enum tb_cfg_error error:4;
 67	u32 zero1:4;
 68	u32 port:6;
 69	u32 zero2:2; /* Both should be zero, still they are different fields. */
 70	u32 zero3:14;
 71	u32 pg:2;
 72} __packed;
 73
 74#define TB_CFG_ERROR_PG_HOT_PLUG	0x2
 75#define TB_CFG_ERROR_PG_HOT_UNPLUG	0x3
 76
 77/* TB_CFG_PKG_EVENT */
 78struct cfg_event_pkg {
 79	struct tb_cfg_header header;
 80	u32 port:6;
 81	u32 zero:25;
 82	bool unplug:1;
 83} __packed;
 84
 85/* TB_CFG_PKG_RESET */
 86struct cfg_reset_pkg {
 87	struct tb_cfg_header header;
 88} __packed;
 89
 90/* TB_CFG_PKG_PREPARE_TO_SLEEP */
 91struct cfg_pts_pkg {
 92	struct tb_cfg_header header;
 93	u32 data;
 94} __packed;
 95
 96/* ICM messages */
 97
 98enum icm_pkg_code {
 99	ICM_GET_TOPOLOGY = 0x1,
100	ICM_DRIVER_READY = 0x3,
101	ICM_APPROVE_DEVICE = 0x4,
102	ICM_CHALLENGE_DEVICE = 0x5,
103	ICM_ADD_DEVICE_KEY = 0x6,
104	ICM_GET_ROUTE = 0xa,
105	ICM_APPROVE_XDOMAIN = 0x10,
106	ICM_DISCONNECT_XDOMAIN = 0x11,
107	ICM_PREBOOT_ACL = 0x18,
108};
109
110enum icm_event_code {
111	ICM_EVENT_DEVICE_CONNECTED = 0x3,
112	ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
113	ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
114	ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
115	ICM_EVENT_RTD3_VETO = 0xa,
116};
117
118struct icm_pkg_header {
119	u8 code;
120	u8 flags;
121	u8 packet_id;
122	u8 total_packets;
123};
124
125#define ICM_FLAGS_ERROR			BIT(0)
126#define ICM_FLAGS_NO_KEY		BIT(1)
127#define ICM_FLAGS_SLEVEL_SHIFT		3
128#define ICM_FLAGS_SLEVEL_MASK		GENMASK(4, 3)
129#define ICM_FLAGS_DUAL_LANE		BIT(5)
130#define ICM_FLAGS_SPEED_GEN3		BIT(7)
131#define ICM_FLAGS_WRITE			BIT(7)
132
133struct icm_pkg_driver_ready {
134	struct icm_pkg_header hdr;
135};
136
137/* Falcon Ridge only messages */
138
139struct icm_fr_pkg_driver_ready_response {
140	struct icm_pkg_header hdr;
141	u8 romver;
142	u8 ramver;
143	u16 security_level;
144};
145
146#define ICM_FR_SLEVEL_MASK		0xf
147
148/* Falcon Ridge & Alpine Ridge common messages */
149
150struct icm_fr_pkg_get_topology {
151	struct icm_pkg_header hdr;
152};
153
154#define ICM_GET_TOPOLOGY_PACKETS	14
155
156struct icm_fr_pkg_get_topology_response {
157	struct icm_pkg_header hdr;
158	u32 route_lo;
159	u32 route_hi;
160	u8 first_data;
161	u8 second_data;
162	u8 drom_i2c_address_index;
163	u8 switch_index;
164	u32 reserved[2];
165	u32 ports[16];
166	u32 port_hop_info[16];
167};
168
169#define ICM_SWITCH_USED			BIT(0)
170#define ICM_SWITCH_UPSTREAM_PORT_MASK	GENMASK(7, 1)
171#define ICM_SWITCH_UPSTREAM_PORT_SHIFT	1
172
173#define ICM_PORT_TYPE_MASK		GENMASK(23, 0)
174#define ICM_PORT_INDEX_SHIFT		24
175#define ICM_PORT_INDEX_MASK		GENMASK(31, 24)
176
177struct icm_fr_event_device_connected {
178	struct icm_pkg_header hdr;
179	uuid_t ep_uuid;
180	u8 connection_key;
181	u8 connection_id;
182	u16 link_info;
183	u32 ep_name[55];
184};
185
186#define ICM_LINK_INFO_LINK_MASK		0x7
187#define ICM_LINK_INFO_DEPTH_SHIFT	4
188#define ICM_LINK_INFO_DEPTH_MASK	GENMASK(7, 4)
189#define ICM_LINK_INFO_APPROVED		BIT(8)
190#define ICM_LINK_INFO_REJECTED		BIT(9)
191#define ICM_LINK_INFO_BOOT		BIT(10)
192
193struct icm_fr_pkg_approve_device {
194	struct icm_pkg_header hdr;
195	uuid_t ep_uuid;
196	u8 connection_key;
197	u8 connection_id;
198	u16 reserved;
199};
200
201struct icm_fr_event_device_disconnected {
202	struct icm_pkg_header hdr;
203	u16 reserved;
204	u16 link_info;
205};
206
207struct icm_fr_event_xdomain_connected {
208	struct icm_pkg_header hdr;
209	u16 reserved;
210	u16 link_info;
211	uuid_t remote_uuid;
212	uuid_t local_uuid;
213	u32 local_route_hi;
214	u32 local_route_lo;
215	u32 remote_route_hi;
216	u32 remote_route_lo;
217};
218
219struct icm_fr_event_xdomain_disconnected {
220	struct icm_pkg_header hdr;
221	u16 reserved;
222	u16 link_info;
223	uuid_t remote_uuid;
224};
225
226struct icm_fr_pkg_add_device_key {
227	struct icm_pkg_header hdr;
228	uuid_t ep_uuid;
229	u8 connection_key;
230	u8 connection_id;
231	u16 reserved;
232	u32 key[8];
233};
234
235struct icm_fr_pkg_add_device_key_response {
236	struct icm_pkg_header hdr;
237	uuid_t ep_uuid;
238	u8 connection_key;
239	u8 connection_id;
240	u16 reserved;
241};
242
243struct icm_fr_pkg_challenge_device {
244	struct icm_pkg_header hdr;
245	uuid_t ep_uuid;
246	u8 connection_key;
247	u8 connection_id;
248	u16 reserved;
249	u32 challenge[8];
250};
251
252struct icm_fr_pkg_challenge_device_response {
253	struct icm_pkg_header hdr;
254	uuid_t ep_uuid;
255	u8 connection_key;
256	u8 connection_id;
257	u16 reserved;
258	u32 challenge[8];
259	u32 response[8];
260};
261
262struct icm_fr_pkg_approve_xdomain {
263	struct icm_pkg_header hdr;
264	u16 reserved;
265	u16 link_info;
266	uuid_t remote_uuid;
267	u16 transmit_path;
268	u16 transmit_ring;
269	u16 receive_path;
270	u16 receive_ring;
271};
272
273struct icm_fr_pkg_approve_xdomain_response {
274	struct icm_pkg_header hdr;
275	u16 reserved;
276	u16 link_info;
277	uuid_t remote_uuid;
278	u16 transmit_path;
279	u16 transmit_ring;
280	u16 receive_path;
281	u16 receive_ring;
282};
283
284/* Alpine Ridge only messages */
285
286struct icm_ar_pkg_driver_ready_response {
287	struct icm_pkg_header hdr;
288	u8 romver;
289	u8 ramver;
290	u16 info;
291};
292
293#define ICM_AR_FLAGS_RTD3		BIT(6)
294
295#define ICM_AR_INFO_SLEVEL_MASK		GENMASK(3, 0)
296#define ICM_AR_INFO_BOOT_ACL_SHIFT	7
297#define ICM_AR_INFO_BOOT_ACL_MASK	GENMASK(11, 7)
298#define ICM_AR_INFO_BOOT_ACL_SUPPORTED	BIT(13)
299
300struct icm_ar_pkg_get_route {
301	struct icm_pkg_header hdr;
302	u16 reserved;
303	u16 link_info;
304};
305
306struct icm_ar_pkg_get_route_response {
307	struct icm_pkg_header hdr;
308	u16 reserved;
309	u16 link_info;
310	u32 route_hi;
311	u32 route_lo;
312};
313
314struct icm_ar_boot_acl_entry {
315	u32 uuid_lo;
316	u32 uuid_hi;
317};
318
319#define ICM_AR_PREBOOT_ACL_ENTRIES	16
320
321struct icm_ar_pkg_preboot_acl {
322	struct icm_pkg_header hdr;
323	struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
324};
325
326struct icm_ar_pkg_preboot_acl_response {
327	struct icm_pkg_header hdr;
328	struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
329};
330
331/* Titan Ridge messages */
332
333struct icm_tr_pkg_driver_ready_response {
334	struct icm_pkg_header hdr;
335	u16 reserved1;
336	u16 info;
337	u32 nvm_version;
338	u16 device_id;
339	u16 reserved2;
340};
341
342#define ICM_TR_FLAGS_RTD3		BIT(6)
343
344#define ICM_TR_INFO_SLEVEL_MASK		GENMASK(2, 0)
345#define ICM_TR_INFO_BOOT_ACL_SHIFT	7
346#define ICM_TR_INFO_BOOT_ACL_MASK	GENMASK(12, 7)
347
348struct icm_tr_event_device_connected {
349	struct icm_pkg_header hdr;
350	uuid_t ep_uuid;
351	u32 route_hi;
352	u32 route_lo;
353	u8 connection_id;
354	u8 reserved;
355	u16 link_info;
356	u32 ep_name[55];
357};
358
359struct icm_tr_event_device_disconnected {
360	struct icm_pkg_header hdr;
361	u32 route_hi;
362	u32 route_lo;
363};
364
365struct icm_tr_event_xdomain_connected {
366	struct icm_pkg_header hdr;
367	u16 reserved;
368	u16 link_info;
369	uuid_t remote_uuid;
370	uuid_t local_uuid;
371	u32 local_route_hi;
372	u32 local_route_lo;
373	u32 remote_route_hi;
374	u32 remote_route_lo;
375};
376
377struct icm_tr_event_xdomain_disconnected {
378	struct icm_pkg_header hdr;
379	u32 route_hi;
380	u32 route_lo;
381	uuid_t remote_uuid;
382};
383
384struct icm_tr_pkg_approve_device {
385	struct icm_pkg_header hdr;
386	uuid_t ep_uuid;
387	u32 route_hi;
388	u32 route_lo;
389	u8 connection_id;
390	u8 reserved1[3];
391};
392
393struct icm_tr_pkg_add_device_key {
394	struct icm_pkg_header hdr;
395	uuid_t ep_uuid;
396	u32 route_hi;
397	u32 route_lo;
398	u8 connection_id;
399	u8 reserved[3];
400	u32 key[8];
401};
402
403struct icm_tr_pkg_challenge_device {
404	struct icm_pkg_header hdr;
405	uuid_t ep_uuid;
406	u32 route_hi;
407	u32 route_lo;
408	u8 connection_id;
409	u8 reserved[3];
410	u32 challenge[8];
411};
412
413struct icm_tr_pkg_approve_xdomain {
414	struct icm_pkg_header hdr;
415	u32 route_hi;
416	u32 route_lo;
417	uuid_t remote_uuid;
418	u16 transmit_path;
419	u16 transmit_ring;
420	u16 receive_path;
421	u16 receive_ring;
422};
423
424struct icm_tr_pkg_disconnect_xdomain {
425	struct icm_pkg_header hdr;
426	u8 stage;
427	u8 reserved[3];
428	u32 route_hi;
429	u32 route_lo;
430	uuid_t remote_uuid;
431};
432
433struct icm_tr_pkg_challenge_device_response {
434	struct icm_pkg_header hdr;
435	uuid_t ep_uuid;
436	u32 route_hi;
437	u32 route_lo;
438	u8 connection_id;
439	u8 reserved[3];
440	u32 challenge[8];
441	u32 response[8];
442};
443
444struct icm_tr_pkg_add_device_key_response {
445	struct icm_pkg_header hdr;
446	uuid_t ep_uuid;
447	u32 route_hi;
448	u32 route_lo;
449	u8 connection_id;
450	u8 reserved[3];
451};
452
453struct icm_tr_pkg_approve_xdomain_response {
454	struct icm_pkg_header hdr;
455	u32 route_hi;
456	u32 route_lo;
457	uuid_t remote_uuid;
458	u16 transmit_path;
459	u16 transmit_ring;
460	u16 receive_path;
461	u16 receive_ring;
462};
463
464struct icm_tr_pkg_disconnect_xdomain_response {
465	struct icm_pkg_header hdr;
466	u8 stage;
467	u8 reserved[3];
468	u32 route_hi;
469	u32 route_lo;
470	uuid_t remote_uuid;
471};
472
473/* Ice Lake messages */
474
475struct icm_icl_event_rtd3_veto {
476	struct icm_pkg_header hdr;
477	u32 veto_reason;
478};
479
480/* XDomain messages */
481
482struct tb_xdomain_header {
483	u32 route_hi;
484	u32 route_lo;
485	u32 length_sn;
486};
487
488#define TB_XDOMAIN_LENGTH_MASK	GENMASK(5, 0)
489#define TB_XDOMAIN_SN_MASK	GENMASK(28, 27)
490#define TB_XDOMAIN_SN_SHIFT	27
491
492enum tb_xdp_type {
493	UUID_REQUEST_OLD = 1,
494	UUID_RESPONSE = 2,
495	PROPERTIES_REQUEST,
496	PROPERTIES_RESPONSE,
497	PROPERTIES_CHANGED_REQUEST,
498	PROPERTIES_CHANGED_RESPONSE,
499	ERROR_RESPONSE,
500	UUID_REQUEST = 12,
501};
502
503struct tb_xdp_header {
504	struct tb_xdomain_header xd_hdr;
505	uuid_t uuid;
506	u32 type;
507};
508
509struct tb_xdp_uuid {
510	struct tb_xdp_header hdr;
511};
512
513struct tb_xdp_uuid_response {
514	struct tb_xdp_header hdr;
515	uuid_t src_uuid;
516	u32 src_route_hi;
517	u32 src_route_lo;
518};
519
520struct tb_xdp_properties {
521	struct tb_xdp_header hdr;
522	uuid_t src_uuid;
523	uuid_t dst_uuid;
524	u16 offset;
525	u16 reserved;
526};
527
528struct tb_xdp_properties_response {
529	struct tb_xdp_header hdr;
530	uuid_t src_uuid;
531	uuid_t dst_uuid;
532	u16 offset;
533	u16 data_length;
534	u32 generation;
535	u32 data[0];
536};
537
538/*
539 * Max length of data array single XDomain property response is allowed
540 * to carry.
541 */
542#define TB_XDP_PROPERTIES_MAX_DATA_LENGTH	\
543	(((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
544
545/* Maximum size of the total property block in dwords we allow */
546#define TB_XDP_PROPERTIES_MAX_LENGTH		500
547
548struct tb_xdp_properties_changed {
549	struct tb_xdp_header hdr;
550	uuid_t src_uuid;
551};
552
553struct tb_xdp_properties_changed_response {
554	struct tb_xdp_header hdr;
555};
556
557enum tb_xdp_error {
558	ERROR_SUCCESS,
559	ERROR_UNKNOWN_PACKET,
560	ERROR_UNKNOWN_DOMAIN,
561	ERROR_NOT_SUPPORTED,
562	ERROR_NOT_READY,
563};
564
565struct tb_xdp_error_response {
566	struct tb_xdp_header hdr;
567	u32 error;
568};
569
570#endif