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v3.5.6
 
  1/*
  2 * CE4100's SPI device is more or less the same one as found on PXA
  3 *
 
  4 */
 
 
  5#include <linux/pci.h>
  6#include <linux/platform_device.h>
  7#include <linux/of_device.h>
  8#include <linux/module.h>
  9#include <linux/spi/pxa2xx_spi.h>
 10
 11struct ce4100_info {
 12	struct ssp_device ssp;
 13	struct platform_device *spi_pdev;
 
 
 
 
 
 
 
 
 
 14};
 15
 16static DEFINE_MUTEX(ssp_lock);
 17static LIST_HEAD(ssp_list);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 18
 19struct ssp_device *pxa_ssp_request(int port, const char *label)
 20{
 21	struct ssp_device *ssp = NULL;
 22
 23	mutex_lock(&ssp_lock);
 
 24
 25	list_for_each_entry(ssp, &ssp_list, node) {
 26		if (ssp->port_id == port && ssp->use_count == 0) {
 27			ssp->use_count++;
 28			ssp->label = label;
 29			break;
 30		}
 
 
 
 
 
 
 
 
 
 
 
 
 
 31	}
 32
 33	mutex_unlock(&ssp_lock);
 
 34
 35	if (&ssp->node == &ssp_list)
 36		return NULL;
 
 
 37
 38	return ssp;
 
 39}
 40EXPORT_SYMBOL_GPL(pxa_ssp_request);
 41
 42void pxa_ssp_free(struct ssp_device *ssp)
 43{
 44	mutex_lock(&ssp_lock);
 45	if (ssp->use_count) {
 46		ssp->use_count--;
 47		ssp->label = NULL;
 48	} else
 49		dev_err(&ssp->pdev->dev, "device already free\n");
 50	mutex_unlock(&ssp_lock);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 51}
 52EXPORT_SYMBOL_GPL(pxa_ssp_free);
 53
 54static int __devinit ce4100_spi_probe(struct pci_dev *dev,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 55		const struct pci_device_id *ent)
 56{
 
 57	int ret;
 58	resource_size_t phys_beg;
 59	resource_size_t phys_len;
 60	struct ce4100_info *spi_info;
 61	struct platform_device *pdev;
 62	struct pxa2xx_spi_master spi_pdata;
 63	struct ssp_device *ssp;
 
 
 64
 65	ret = pci_enable_device(dev);
 66	if (ret)
 67		return ret;
 68
 69	phys_beg = pci_resource_start(dev, 0);
 70	phys_len = pci_resource_len(dev, 0);
 71
 72	if (!request_mem_region(phys_beg, phys_len,
 73				"CE4100 SPI")) {
 74		dev_err(&dev->dev, "Can't request register space.\n");
 75		ret = -EBUSY;
 76		return ret;
 77	}
 78
 79	pdev = platform_device_alloc("pxa2xx-spi", dev->devfn);
 80	spi_info = kzalloc(sizeof(*spi_info), GFP_KERNEL);
 81	if (!pdev || !spi_info ) {
 82		ret = -ENOMEM;
 83		goto err_nomem;
 84	}
 85	memset(&spi_pdata, 0, sizeof(spi_pdata));
 86	spi_pdata.num_chipselect = dev->devfn;
 87
 88	ret = platform_device_add_data(pdev, &spi_pdata, sizeof(spi_pdata));
 89	if (ret)
 90		goto err_nomem;
 
 
 
 
 91
 92	pdev->dev.parent = &dev->dev;
 93	pdev->dev.of_node = dev->dev.of_node;
 94	ssp = &spi_info->ssp;
 95	ssp->phys_base = pci_resource_start(dev, 0);
 96	ssp->mmio_base = ioremap(phys_beg, phys_len);
 97	if (!ssp->mmio_base) {
 98		dev_err(&pdev->dev, "failed to ioremap() registers\n");
 99		ret = -EIO;
100		goto err_nomem;
101	}
102	ssp->irq = dev->irq;
103	ssp->port_id = pdev->id;
104	ssp->type = PXA25x_SSP;
105
106	mutex_lock(&ssp_lock);
107	list_add(&ssp->node, &ssp_list);
108	mutex_unlock(&ssp_lock);
109
110	pci_set_drvdata(dev, spi_info);
 
 
 
111
112	ret = platform_device_add(pdev);
113	if (ret)
114		goto err_dev_add;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
115
116	return ret;
117
118err_dev_add:
119	pci_set_drvdata(dev, NULL);
120	mutex_lock(&ssp_lock);
121	list_del(&ssp->node);
122	mutex_unlock(&ssp_lock);
123	iounmap(ssp->mmio_base);
124
125err_nomem:
126	release_mem_region(phys_beg, phys_len);
127	platform_device_put(pdev);
128	kfree(spi_info);
129	return ret;
130}
131
132static void __devexit ce4100_spi_remove(struct pci_dev *dev)
133{
134	struct ce4100_info *spi_info;
135	struct ssp_device *ssp;
 
 
136
137	spi_info = pci_get_drvdata(dev);
138	ssp = &spi_info->ssp;
139	platform_device_unregister(spi_info->spi_pdev);
140
141	iounmap(ssp->mmio_base);
142	release_mem_region(pci_resource_start(dev, 0),
143			pci_resource_len(dev, 0));
144
145	mutex_lock(&ssp_lock);
146	list_del(&ssp->node);
147	mutex_unlock(&ssp_lock);
148
149	pci_set_drvdata(dev, NULL);
150	pci_disable_device(dev);
151	kfree(spi_info);
152}
153
154static DEFINE_PCI_DEVICE_TABLE(ce4100_spi_devices) = {
155	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x2e6a) },
 
 
 
 
 
 
 
156	{ },
157};
158MODULE_DEVICE_TABLE(pci, ce4100_spi_devices);
159
160static struct pci_driver ce4100_spi_driver = {
161	.name           = "ce4100_spi",
162	.id_table       = ce4100_spi_devices,
163	.probe          = ce4100_spi_probe,
164	.remove         = __devexit_p(ce4100_spi_remove),
165};
166
167module_pci_driver(ce4100_spi_driver);
168
169MODULE_DESCRIPTION("CE4100 PCI-SPI glue code for PXA's driver");
170MODULE_LICENSE("GPL v2");
171MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");
v5.9
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * CE4100's SPI device is more or less the same one as found on PXA
  4 *
  5 * Copyright (C) 2016, Intel Corporation
  6 */
  7#include <linux/clk-provider.h>
  8#include <linux/module.h>
  9#include <linux/pci.h>
 10#include <linux/platform_device.h>
 
 
 11#include <linux/spi/pxa2xx_spi.h>
 12
 13#include <linux/dmaengine.h>
 14#include <linux/platform_data/dma-dw.h>
 15
 16enum {
 17	PORT_QUARK_X1000,
 18	PORT_BYT,
 19	PORT_MRFLD,
 20	PORT_BSW0,
 21	PORT_BSW1,
 22	PORT_BSW2,
 23	PORT_CE4100,
 24	PORT_LPT,
 25};
 26
 27struct pxa_spi_info {
 28	enum pxa_ssp_type type;
 29	int port_id;
 30	int num_chipselect;
 31	unsigned long max_clk_rate;
 32
 33	/* DMA channel request parameters */
 34	bool (*dma_filter)(struct dma_chan *chan, void *param);
 35	void *tx_param;
 36	void *rx_param;
 37
 38	int dma_burst_size;
 39
 40	int (*setup)(struct pci_dev *pdev, struct pxa_spi_info *c);
 41};
 42
 43static struct dw_dma_slave byt_tx_param = { .dst_id = 0 };
 44static struct dw_dma_slave byt_rx_param = { .src_id = 1 };
 45
 46static struct dw_dma_slave mrfld3_tx_param = { .dst_id = 15 };
 47static struct dw_dma_slave mrfld3_rx_param = { .src_id = 14 };
 48static struct dw_dma_slave mrfld5_tx_param = { .dst_id = 13 };
 49static struct dw_dma_slave mrfld5_rx_param = { .src_id = 12 };
 50static struct dw_dma_slave mrfld6_tx_param = { .dst_id = 11 };
 51static struct dw_dma_slave mrfld6_rx_param = { .src_id = 10 };
 52
 53static struct dw_dma_slave bsw0_tx_param = { .dst_id = 0 };
 54static struct dw_dma_slave bsw0_rx_param = { .src_id = 1 };
 55static struct dw_dma_slave bsw1_tx_param = { .dst_id = 6 };
 56static struct dw_dma_slave bsw1_rx_param = { .src_id = 7 };
 57static struct dw_dma_slave bsw2_tx_param = { .dst_id = 8 };
 58static struct dw_dma_slave bsw2_rx_param = { .src_id = 9 };
 59
 60static struct dw_dma_slave lpt_tx_param = { .dst_id = 0 };
 61static struct dw_dma_slave lpt_rx_param = { .src_id = 1 };
 62
 63static bool lpss_dma_filter(struct dma_chan *chan, void *param)
 64{
 65	struct dw_dma_slave *dws = param;
 66
 67	if (dws->dma_dev != chan->device->dev)
 68		return false;
 69
 70	chan->private = dws;
 71	return true;
 72}
 73
 74static int lpss_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
 75{
 76	struct pci_dev *dma_dev;
 77
 78	c->num_chipselect = 1;
 79	c->max_clk_rate = 50000000;
 80
 81	dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
 82
 83	if (c->tx_param) {
 84		struct dw_dma_slave *slave = c->tx_param;
 85
 86		slave->dma_dev = &dma_dev->dev;
 87		slave->m_master = 0;
 88		slave->p_master = 1;
 89	}
 90
 91	if (c->rx_param) {
 92		struct dw_dma_slave *slave = c->rx_param;
 93
 94		slave->dma_dev = &dma_dev->dev;
 95		slave->m_master = 0;
 96		slave->p_master = 1;
 97	}
 98
 99	c->dma_filter = lpss_dma_filter;
100	return 0;
101}
 
102
103static int mrfld_spi_setup(struct pci_dev *dev, struct pxa_spi_info *c)
104{
105	struct pci_dev *dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(21, 0));
106	struct dw_dma_slave *tx, *rx;
107
108	switch (PCI_FUNC(dev->devfn)) {
109	case 0:
110		c->port_id = 3;
111		c->num_chipselect = 1;
112		c->tx_param = &mrfld3_tx_param;
113		c->rx_param = &mrfld3_rx_param;
114		break;
115	case 1:
116		c->port_id = 5;
117		c->num_chipselect = 4;
118		c->tx_param = &mrfld5_tx_param;
119		c->rx_param = &mrfld5_rx_param;
120		break;
121	case 2:
122		c->port_id = 6;
123		c->num_chipselect = 1;
124		c->tx_param = &mrfld6_tx_param;
125		c->rx_param = &mrfld6_rx_param;
126		break;
127	default:
128		return -ENODEV;
129	}
130
131	tx = c->tx_param;
132	tx->dma_dev = &dma_dev->dev;
133
134	rx = c->rx_param;
135	rx->dma_dev = &dma_dev->dev;
136
137	c->dma_filter = lpss_dma_filter;
138	c->dma_burst_size = 8;
139	return 0;
140}
 
141
142static struct pxa_spi_info spi_info_configs[] = {
143	[PORT_CE4100] = {
144		.type = PXA25x_SSP,
145		.port_id =  -1,
146		.num_chipselect = -1,
147		.max_clk_rate = 3686400,
148	},
149	[PORT_BYT] = {
150		.type = LPSS_BYT_SSP,
151		.port_id = 0,
152		.setup = lpss_spi_setup,
153		.tx_param = &byt_tx_param,
154		.rx_param = &byt_rx_param,
155	},
156	[PORT_BSW0] = {
157		.type = LPSS_BSW_SSP,
158		.port_id = 0,
159		.setup = lpss_spi_setup,
160		.tx_param = &bsw0_tx_param,
161		.rx_param = &bsw0_rx_param,
162	},
163	[PORT_BSW1] = {
164		.type = LPSS_BSW_SSP,
165		.port_id = 1,
166		.setup = lpss_spi_setup,
167		.tx_param = &bsw1_tx_param,
168		.rx_param = &bsw1_rx_param,
169	},
170	[PORT_BSW2] = {
171		.type = LPSS_BSW_SSP,
172		.port_id = 2,
173		.setup = lpss_spi_setup,
174		.tx_param = &bsw2_tx_param,
175		.rx_param = &bsw2_rx_param,
176	},
177	[PORT_MRFLD] = {
178		.type = PXA27x_SSP,
179		.max_clk_rate = 25000000,
180		.setup = mrfld_spi_setup,
181	},
182	[PORT_QUARK_X1000] = {
183		.type = QUARK_X1000_SSP,
184		.port_id = -1,
185		.num_chipselect = 1,
186		.max_clk_rate = 50000000,
187	},
188	[PORT_LPT] = {
189		.type = LPSS_LPT_SSP,
190		.port_id = 0,
191		.setup = lpss_spi_setup,
192		.tx_param = &lpt_tx_param,
193		.rx_param = &lpt_rx_param,
194	},
195};
196
197static int pxa2xx_spi_pci_probe(struct pci_dev *dev,
198		const struct pci_device_id *ent)
199{
200	struct platform_device_info pi;
201	int ret;
 
 
 
202	struct platform_device *pdev;
203	struct pxa2xx_spi_controller spi_pdata;
204	struct ssp_device *ssp;
205	struct pxa_spi_info *c;
206	char buf[40];
207
208	ret = pcim_enable_device(dev);
209	if (ret)
210		return ret;
211
212	ret = pcim_iomap_regions(dev, 1 << 0, "PXA2xx SPI");
213	if (ret)
 
 
 
 
 
214		return ret;
 
215
216	c = &spi_info_configs[ent->driver_data];
217	if (c->setup) {
218		ret = c->setup(dev, c);
219		if (ret)
220			return ret;
221	}
 
 
222
223	memset(&spi_pdata, 0, sizeof(spi_pdata));
224	spi_pdata.num_chipselect = (c->num_chipselect > 0) ? c->num_chipselect : dev->devfn;
225	spi_pdata.dma_filter = c->dma_filter;
226	spi_pdata.tx_param = c->tx_param;
227	spi_pdata.rx_param = c->rx_param;
228	spi_pdata.enable_dma = c->rx_param && c->tx_param;
229	spi_pdata.dma_burst_size = c->dma_burst_size ? c->dma_burst_size : 1;
230
231	ssp = &spi_pdata.ssp;
 
 
232	ssp->phys_base = pci_resource_start(dev, 0);
233	ssp->mmio_base = pcim_iomap_table(dev)[0];
234	ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn;
235	ssp->type = c->type;
 
 
 
 
 
 
236
237	pci_set_master(dev);
 
 
238
239	ret = pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_ALL_TYPES);
240	if (ret < 0)
241		return ret;
242	ssp->irq = pci_irq_vector(dev, 0);
243
244	snprintf(buf, sizeof(buf), "pxa2xx-spi.%d", ssp->port_id);
245	ssp->clk = clk_register_fixed_rate(&dev->dev, buf , NULL, 0,
246					   c->max_clk_rate);
247	 if (IS_ERR(ssp->clk))
248		return PTR_ERR(ssp->clk);
249
250	memset(&pi, 0, sizeof(pi));
251	pi.fwnode = dev->dev.fwnode;
252	pi.parent = &dev->dev;
253	pi.name = "pxa2xx-spi";
254	pi.id = ssp->port_id;
255	pi.data = &spi_pdata;
256	pi.size_data = sizeof(spi_pdata);
257
258	pdev = platform_device_register_full(&pi);
259	if (IS_ERR(pdev)) {
260		clk_unregister(ssp->clk);
261		return PTR_ERR(pdev);
262	}
263
264	pci_set_drvdata(dev, pdev);
265
266	return 0;
 
 
 
 
 
 
 
 
 
 
 
267}
268
269static void pxa2xx_spi_pci_remove(struct pci_dev *dev)
270{
271	struct platform_device *pdev = pci_get_drvdata(dev);
272	struct pxa2xx_spi_controller *spi_pdata;
273
274	spi_pdata = dev_get_platdata(&pdev->dev);
275
276	platform_device_unregister(pdev);
277	clk_unregister(spi_pdata->ssp.clk);
 
 
 
 
 
 
 
 
 
 
 
 
 
278}
279
280static const struct pci_device_id pxa2xx_spi_pci_devices[] = {
281	{ PCI_VDEVICE(INTEL, 0x0935), PORT_QUARK_X1000 },
282	{ PCI_VDEVICE(INTEL, 0x0f0e), PORT_BYT },
283	{ PCI_VDEVICE(INTEL, 0x1194), PORT_MRFLD },
284	{ PCI_VDEVICE(INTEL, 0x228e), PORT_BSW0 },
285	{ PCI_VDEVICE(INTEL, 0x2290), PORT_BSW1 },
286	{ PCI_VDEVICE(INTEL, 0x22ac), PORT_BSW2 },
287	{ PCI_VDEVICE(INTEL, 0x2e6a), PORT_CE4100 },
288	{ PCI_VDEVICE(INTEL, 0x9ce6), PORT_LPT },
289	{ },
290};
291MODULE_DEVICE_TABLE(pci, pxa2xx_spi_pci_devices);
292
293static struct pci_driver pxa2xx_spi_pci_driver = {
294	.name           = "pxa2xx_spi_pci",
295	.id_table       = pxa2xx_spi_pci_devices,
296	.probe          = pxa2xx_spi_pci_probe,
297	.remove         = pxa2xx_spi_pci_remove,
298};
299
300module_pci_driver(pxa2xx_spi_pci_driver);
301
302MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
303MODULE_LICENSE("GPL v2");
304MODULE_AUTHOR("Sebastian Andrzej Siewior <bigeasy@linutronix.de>");