1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (c) 2019, Linaro Ltd.
  4 */
  5
  6#include <linux/bitops.h>
  7#include <linux/err.h>
  8#include <linux/platform_device.h>
  9#include <linux/module.h>
 10#include <linux/of_address.h>
 11#include <linux/pm_clock.h>
 12#include <linux/pm_runtime.h>
 13#include <linux/regmap.h>
 14
 15#include <dt-bindings/clock/qcom,turingcc-qcs404.h>
 16
 17#include "clk-regmap.h"
 18#include "clk-branch.h"
 19#include "common.h"
 20#include "reset.h"
 21
 22static struct clk_branch turing_wrapper_aon_cbcr = {
 23	.halt_reg = 0x5098,
 24	.halt_check = BRANCH_HALT,
 25	.clkr = {
 26		.enable_reg = 0x5098,
 27		.enable_mask = BIT(0),
 28		.hw.init = &(struct clk_init_data) {
 29			.name = "turing_wrapper_aon_clk",
 30			.ops = &clk_branch2_aon_ops,
 31		},
 32	},
 33};
 34
 35static struct clk_branch turing_q6ss_ahbm_aon_cbcr = {
 36	.halt_reg = 0x9000,
 37	.halt_check = BRANCH_HALT,
 38	.clkr = {
 39		.enable_reg = 0x9000,
 40		.enable_mask = BIT(0),
 41		.hw.init = &(struct clk_init_data) {
 42			.name = "turing_q6ss_ahbm_aon_cbcr",
 43			.ops = &clk_branch2_ops,
 44		},
 45	},
 46};
 47
 48static struct clk_branch turing_q6ss_q6_axim_clk = {
 49	.halt_reg = 0xb000,
 50	.halt_check = BRANCH_HALT,
 51	.clkr = {
 52		.enable_reg = 0xb000,
 53		.enable_mask = BIT(0),
 54		.hw.init = &(struct clk_init_data) {
 55			.name = "turing_q6ss_q6_axim_clk",
 56			.ops = &clk_branch2_aon_ops,
 57		},
 58	},
 59};
 60
 61static struct clk_branch turing_q6ss_ahbs_aon_cbcr = {
 62	.halt_reg = 0x10000,
 63	.halt_check = BRANCH_HALT,
 64	.clkr = {
 65		.enable_reg = 0x10000,
 66		.enable_mask = BIT(0),
 67		.hw.init = &(struct clk_init_data) {
 68			.name = "turing_q6ss_ahbs_aon_clk",
 69			.ops = &clk_branch2_aon_ops,
 70		},
 71	},
 72};
 73
 74static struct clk_branch turing_wrapper_qos_ahbs_aon_cbcr = {
 75	.halt_reg = 0x11014,
 76	.halt_check = BRANCH_HALT,
 77	.clkr = {
 78		.enable_reg = 0x11014,
 79		.enable_mask = BIT(0),
 80		.hw.init = &(struct clk_init_data) {
 81			.name = "turing_wrapper_qos_ahbs_aon_clk",
 82			.ops = &clk_branch2_aon_ops,
 83		},
 84	},
 85};
 86
 87static struct clk_regmap *turingcc_clocks[] = {
 88	[TURING_WRAPPER_AON_CLK] = &turing_wrapper_aon_cbcr.clkr,
 89	[TURING_Q6SS_AHBM_AON_CLK] = &turing_q6ss_ahbm_aon_cbcr.clkr,
 90	[TURING_Q6SS_Q6_AXIM_CLK] = &turing_q6ss_q6_axim_clk.clkr,
 91	[TURING_Q6SS_AHBS_AON_CLK] = &turing_q6ss_ahbs_aon_cbcr.clkr,
 92	[TURING_WRAPPER_QOS_AHBS_AON_CLK] = &turing_wrapper_qos_ahbs_aon_cbcr.clkr,
 93};
 94
 95static const struct regmap_config turingcc_regmap_config = {
 96	.reg_bits	= 32,
 97	.reg_stride	= 4,
 98	.val_bits	= 32,
 99	.max_register	= 0x23004,
100	.fast_io	= true,
101};
102
103static const struct qcom_cc_desc turingcc_desc = {
104	.config = &turingcc_regmap_config,
105	.clks = turingcc_clocks,
106	.num_clks = ARRAY_SIZE(turingcc_clocks),
107};
108
109static int turingcc_probe(struct platform_device *pdev)
110{
111	int ret;
112
113	pm_runtime_enable(&pdev->dev);
114	ret = pm_clk_create(&pdev->dev);
115	if (ret)
116		goto disable_pm_runtime;
117
118	ret = pm_clk_add(&pdev->dev, NULL);
119	if (ret < 0) {
120		dev_err(&pdev->dev, "failed to acquire iface clock\n");
121		goto destroy_pm_clk;
122	}
123
124	ret = qcom_cc_probe(pdev, &turingcc_desc);
125	if (ret < 0)
126		goto destroy_pm_clk;
127
128	return 0;
129
130destroy_pm_clk:
131	pm_clk_destroy(&pdev->dev);
132
133disable_pm_runtime:
134	pm_runtime_disable(&pdev->dev);
135
136	return ret;
137}
138
139static int turingcc_remove(struct platform_device *pdev)
140{
141	pm_clk_destroy(&pdev->dev);
142	pm_runtime_disable(&pdev->dev);
143
144	return 0;
145}
146
147static const struct dev_pm_ops turingcc_pm_ops = {
148	SET_RUNTIME_PM_OPS(pm_clk_suspend, pm_clk_resume, NULL)
149};
150
151static const struct of_device_id turingcc_match_table[] = {
152	{ .compatible = "qcom,qcs404-turingcc" },
153	{ }
154};
155MODULE_DEVICE_TABLE(of, turingcc_match_table);
156
157static struct platform_driver turingcc_driver = {
158	.probe		= turingcc_probe,
159	.remove		= turingcc_remove,
160	.driver		= {
161		.name	= "qcs404-turingcc",
162		.of_match_table = turingcc_match_table,
163		.pm = &turingcc_pm_ops,
164	},
165};
166
167module_platform_driver(turingcc_driver);
168
169MODULE_DESCRIPTION("Qualcomm QCS404 Turing Clock Controller");
170MODULE_LICENSE("GPL v2");