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1# Put here option for CPU selection and depending optimization
2choice
3 prompt "Processor family"
4 default M686 if X86_32
5 default GENERIC_CPU if X86_64
6
7config M386
8 bool "386"
9 depends on X86_32 && !UML
10 ---help---
11 This is the processor type of your CPU. This information is used for
12 optimizing purposes. In order to compile a kernel that can run on
13 all x86 CPU types (albeit not optimally fast), you can specify
14 "386" here.
15
16 The kernel will not necessarily run on earlier architectures than
17 the one you have chosen, e.g. a Pentium optimized kernel will run on
18 a PPro, but not necessarily on a i486.
19
20 Here are the settings recommended for greatest speed:
21 - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
22 486DLC/DLC2, and UMC 486SX-S. Only "386" kernels will run on a 386
23 class machine.
24 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
25 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
26 - "586" for generic Pentium CPUs lacking the TSC
27 (time stamp counter) register.
28 - "Pentium-Classic" for the Intel Pentium.
29 - "Pentium-MMX" for the Intel Pentium MMX.
30 - "Pentium-Pro" for the Intel Pentium Pro.
31 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
32 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
33 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
34 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
35 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
36 - "Crusoe" for the Transmeta Crusoe series.
37 - "Efficeon" for the Transmeta Efficeon series.
38 - "Winchip-C6" for original IDT Winchip.
39 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
40 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
41 - "Geode GX/LX" For AMD Geode GX and LX processors.
42 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
43 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
44 - "VIA C7" for VIA C7.
45
46 If you don't know what to do, choose "386".
47
48config M486
49 bool "486"
50 depends on X86_32
51 ---help---
52 Select this for a 486 series processor, either Intel or one of the
53 compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
54 DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
55 U5S.
56
57config M586
58 bool "586/K5/5x86/6x86/6x86MX"
59 depends on X86_32
60 ---help---
61 Select this for an 586 or 686 series processor such as the AMD K5,
62 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
63 assume the RDTSC (Read Time Stamp Counter) instruction.
64
65config M586TSC
66 bool "Pentium-Classic"
67 depends on X86_32
68 ---help---
69 Select this for a Pentium Classic processor with the RDTSC (Read
70 Time Stamp Counter) instruction for benchmarking.
71
72config M586MMX
73 bool "Pentium-MMX"
74 depends on X86_32
75 ---help---
76 Select this for a Pentium with the MMX graphics/multimedia
77 extended instructions.
78
79config M686
80 bool "Pentium-Pro"
81 depends on X86_32
82 ---help---
83 Select this for Intel Pentium Pro chips. This enables the use of
84 Pentium Pro extended instructions, and disables the init-time guard
85 against the f00f bug found in earlier Pentiums.
86
87config MPENTIUMII
88 bool "Pentium-II/Celeron(pre-Coppermine)"
89 depends on X86_32
90 ---help---
91 Select this for Intel chips based on the Pentium-II and
92 pre-Coppermine Celeron core. This option enables an unaligned
93 copy optimization, compiles the kernel with optimization flags
94 tailored for the chip, and applies any applicable Pentium Pro
95 optimizations.
96
97config MPENTIUMIII
98 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
99 depends on X86_32
100 ---help---
101 Select this for Intel chips based on the Pentium-III and
102 Celeron-Coppermine core. This option enables use of some
103 extended prefetch instructions in addition to the Pentium II
104 extensions.
105
106config MPENTIUMM
107 bool "Pentium M"
108 depends on X86_32
109 ---help---
110 Select this for Intel Pentium M (not Pentium-4 M)
111 notebook chips.
112
113config MPENTIUM4
114 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
115 depends on X86_32
116 ---help---
117 Select this for Intel Pentium 4 chips. This includes the
118 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
119 Pentium-4 M (not Pentium M) chips. This option enables compile
120 flags optimized for the chip, uses the correct cache line size, and
121 applies any applicable optimizations.
122
123 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
124
125 Select this for:
126 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
127 -Willamette
128 -Northwood
129 -Mobile Pentium 4
130 -Mobile Pentium 4 M
131 -Extreme Edition (Gallatin)
132 -Prescott
133 -Prescott 2M
134 -Cedar Mill
135 -Presler
136 -Smithfiled
137 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
138 -Foster
139 -Prestonia
140 -Gallatin
141 -Nocona
142 -Irwindale
143 -Cranford
144 -Potomac
145 -Paxville
146 -Dempsey
147
148
149config MK6
150 bool "K6/K6-II/K6-III"
151 depends on X86_32
152 ---help---
153 Select this for an AMD K6-family processor. Enables use of
154 some extended instructions, and passes appropriate optimization
155 flags to GCC.
156
157config MK7
158 bool "Athlon/Duron/K7"
159 depends on X86_32
160 ---help---
161 Select this for an AMD Athlon K7-family processor. Enables use of
162 some extended instructions, and passes appropriate optimization
163 flags to GCC.
164
165config MK8
166 bool "Opteron/Athlon64/Hammer/K8"
167 ---help---
168 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
169 Enables use of some extended instructions, and passes appropriate
170 optimization flags to GCC.
171
172config MCRUSOE
173 bool "Crusoe"
174 depends on X86_32
175 ---help---
176 Select this for a Transmeta Crusoe processor. Treats the processor
177 like a 586 with TSC, and sets some GCC optimization flags (like a
178 Pentium Pro with no alignment requirements).
179
180config MEFFICEON
181 bool "Efficeon"
182 depends on X86_32
183 ---help---
184 Select this for a Transmeta Efficeon processor.
185
186config MWINCHIPC6
187 bool "Winchip-C6"
188 depends on X86_32
189 ---help---
190 Select this for an IDT Winchip C6 chip. Linux and GCC
191 treat this chip as a 586TSC with some extended instructions
192 and alignment requirements.
193
194config MWINCHIP3D
195 bool "Winchip-2/Winchip-2A/Winchip-3"
196 depends on X86_32
197 ---help---
198 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
199 treat this chip as a 586TSC with some extended instructions
200 and alignment requirements. Also enable out of order memory
201 stores for this CPU, which can increase performance of some
202 operations.
203
204config MELAN
205 bool "AMD Elan"
206 depends on X86_32
207 ---help---
208 Select this for an AMD Elan processor.
209
210 Do not use this option for K6/Athlon/Opteron processors!
211
212config MGEODEGX1
213 bool "GeodeGX1"
214 depends on X86_32
215 ---help---
216 Select this for a Geode GX1 (Cyrix MediaGX) chip.
217
218config MGEODE_LX
219 bool "Geode GX/LX"
220 depends on X86_32
221 ---help---
222 Select this for AMD Geode GX and LX processors.
223
224config MCYRIXIII
225 bool "CyrixIII/VIA-C3"
226 depends on X86_32
227 ---help---
228 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
229 treat this chip as a generic 586. Whilst the CPU is 686 class,
230 it lacks the cmov extension which gcc assumes is present when
231 generating 686 code.
232 Note that Nehemiah (Model 9) and above will not boot with this
233 kernel due to them lacking the 3DNow! instructions used in earlier
234 incarnations of the CPU.
235
236config MVIAC3_2
237 bool "VIA C3-2 (Nehemiah)"
238 depends on X86_32
239 ---help---
240 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
241 of SSE and tells gcc to treat the CPU as a 686.
242 Note, this kernel will not boot on older (pre model 9) C3s.
243
244config MVIAC7
245 bool "VIA C7"
246 depends on X86_32
247 ---help---
248 Select this for a VIA C7. Selecting this uses the correct cache
249 shift and tells gcc to treat the CPU as a 686.
250
251config MPSC
252 bool "Intel P4 / older Netburst based Xeon"
253 depends on X86_64
254 ---help---
255 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
256 Xeon CPUs with Intel 64bit which is compatible with x86-64.
257 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
258 Netburst core and shouldn't use this option. You can distinguish them
259 using the cpu family field
260 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
261
262config MCORE2
263 bool "Core 2/newer Xeon"
264 ---help---
265
266 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
267 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
268 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
269 (not a typo)
270
271config MATOM
272 bool "Intel Atom"
273 ---help---
274
275 Select this for the Intel Atom platform. Intel Atom CPUs have an
276 in-order pipelining architecture and thus can benefit from
277 accordingly optimized code. Use a recent GCC with specific Atom
278 support in order to fully benefit from selecting this option.
279
280config GENERIC_CPU
281 bool "Generic-x86-64"
282 depends on X86_64
283 ---help---
284 Generic x86-64 CPU.
285 Run equally well on all x86-64 CPUs.
286
287endchoice
288
289config X86_GENERIC
290 bool "Generic x86 support"
291 depends on X86_32
292 ---help---
293 Instead of just including optimizations for the selected
294 x86 variant (e.g. PII, Crusoe or Athlon), include some more
295 generic optimizations as well. This will make the kernel
296 perform better on x86 CPUs other than that selected.
297
298 This is really intended for distributors who need more
299 generic optimizations.
300
301#
302# Define implied options from the CPU selection here
303config X86_INTERNODE_CACHE_SHIFT
304 int
305 default "12" if X86_VSMP
306 default X86_L1_CACHE_SHIFT
307
308config X86_CMPXCHG
309 def_bool X86_64 || (X86_32 && !M386)
310
311config X86_L1_CACHE_SHIFT
312 int
313 default "7" if MPENTIUM4 || MPSC
314 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
315 default "4" if MELAN || M486 || M386 || MGEODEGX1
316 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
317
318config X86_XADD
319 def_bool y
320 depends on X86_64 || !M386
321
322config X86_PPRO_FENCE
323 bool "PentiumPro memory ordering errata workaround"
324 depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
325 ---help---
326 Old PentiumPro multiprocessor systems had errata that could cause
327 memory operations to violate the x86 ordering standard in rare cases.
328 Enabling this option will attempt to work around some (but not all)
329 occurrences of this problem, at the cost of much heavier spinlock and
330 memory barrier operations.
331
332 If unsure, say n here. Even distro kernels should think twice before
333 enabling this: there are few systems, and an unlikely bug.
334
335config X86_F00F_BUG
336 def_bool y
337 depends on M586MMX || M586TSC || M586 || M486 || M386
338
339config X86_INVD_BUG
340 def_bool y
341 depends on M486 || M386
342
343config X86_WP_WORKS_OK
344 def_bool y
345 depends on !M386
346
347config X86_INVLPG
348 def_bool y
349 depends on X86_32 && !M386
350
351config X86_BSWAP
352 def_bool y
353 depends on X86_32 && !M386
354
355config X86_POPAD_OK
356 def_bool y
357 depends on X86_32 && !M386
358
359config X86_ALIGNMENT_16
360 def_bool y
361 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
362
363config X86_INTEL_USERCOPY
364 def_bool y
365 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
366
367config X86_USE_PPRO_CHECKSUM
368 def_bool y
369 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
370
371config X86_USE_3DNOW
372 def_bool y
373 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
374
375config X86_OOSTORE
376 def_bool y
377 depends on (MWINCHIP3D || MWINCHIPC6) && MTRR
378
379#
380# P6_NOPs are a relatively minor optimization that require a family >=
381# 6 processor, except that it is broken on certain VIA chips.
382# Furthermore, AMD chips prefer a totally different sequence of NOPs
383# (which work on all CPUs). In addition, it looks like Virtual PC
384# does not understand them.
385#
386# As a result, disallow these if we're not compiling for X86_64 (these
387# NOPs do work on all x86-64 capable chips); the list of processors in
388# the right-hand clause are the cores that benefit from this optimization.
389#
390config X86_P6_NOP
391 def_bool y
392 depends on X86_64
393 depends on (MCORE2 || MPENTIUM4 || MPSC)
394
395config X86_TSC
396 def_bool y
397 depends on ((MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) && !X86_NUMAQ) || X86_64
398
399config X86_CMPXCHG64
400 def_bool y
401 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MATOM
402
403# this should be set for all -march=.. options where the compiler
404# generates cmov.
405config X86_CMOV
406 def_bool y
407 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
408
409config X86_MINIMUM_CPU_FAMILY
410 int
411 default "64" if X86_64
412 default "6" if X86_32 && X86_P6_NOP
413 default "5" if X86_32 && X86_CMPXCHG64
414 default "4" if X86_32 && (X86_XADD || X86_CMPXCHG || X86_BSWAP || X86_WP_WORKS_OK)
415 default "3"
416
417config X86_DEBUGCTLMSR
418 def_bool y
419 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486 || M386) && !UML
420
421menuconfig PROCESSOR_SELECT
422 bool "Supported processor vendors" if EXPERT
423 ---help---
424 This lets you choose what x86 vendor support code your kernel
425 will include.
426
427config CPU_SUP_INTEL
428 default y
429 bool "Support Intel processors" if PROCESSOR_SELECT
430 ---help---
431 This enables detection, tunings and quirks for Intel processors
432
433 You need this enabled if you want your kernel to run on an
434 Intel CPU. Disabling this option on other types of CPUs
435 makes the kernel a tiny bit smaller. Disabling it on an Intel
436 CPU might render the kernel unbootable.
437
438 If unsure, say N.
439
440config CPU_SUP_CYRIX_32
441 default y
442 bool "Support Cyrix processors" if PROCESSOR_SELECT
443 depends on M386 || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
444 ---help---
445 This enables detection, tunings and quirks for Cyrix processors
446
447 You need this enabled if you want your kernel to run on a
448 Cyrix CPU. Disabling this option on other types of CPUs
449 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
450 CPU might render the kernel unbootable.
451
452 If unsure, say N.
453
454config CPU_SUP_AMD
455 default y
456 bool "Support AMD processors" if PROCESSOR_SELECT
457 ---help---
458 This enables detection, tunings and quirks for AMD processors
459
460 You need this enabled if you want your kernel to run on an
461 AMD CPU. Disabling this option on other types of CPUs
462 makes the kernel a tiny bit smaller. Disabling it on an AMD
463 CPU might render the kernel unbootable.
464
465 If unsure, say N.
466
467config CPU_SUP_CENTAUR
468 default y
469 bool "Support Centaur processors" if PROCESSOR_SELECT
470 ---help---
471 This enables detection, tunings and quirks for Centaur processors
472
473 You need this enabled if you want your kernel to run on a
474 Centaur CPU. Disabling this option on other types of CPUs
475 makes the kernel a tiny bit smaller. Disabling it on a Centaur
476 CPU might render the kernel unbootable.
477
478 If unsure, say N.
479
480config CPU_SUP_TRANSMETA_32
481 default y
482 bool "Support Transmeta processors" if PROCESSOR_SELECT
483 depends on !64BIT
484 ---help---
485 This enables detection, tunings and quirks for Transmeta processors
486
487 You need this enabled if you want your kernel to run on a
488 Transmeta CPU. Disabling this option on other types of CPUs
489 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
490 CPU might render the kernel unbootable.
491
492 If unsure, say N.
493
494config CPU_SUP_UMC_32
495 default y
496 bool "Support UMC processors" if PROCESSOR_SELECT
497 depends on M386 || M486 || (EXPERT && !64BIT)
498 ---help---
499 This enables detection, tunings and quirks for UMC processors
500
501 You need this enabled if you want your kernel to run on a
502 UMC CPU. Disabling this option on other types of CPUs
503 makes the kernel a tiny bit smaller. Disabling it on a UMC
504 CPU might render the kernel unbootable.
505
506 If unsure, say N.
1# SPDX-License-Identifier: GPL-2.0
2# Put here option for CPU selection and depending optimization
3choice
4 prompt "Processor family"
5 default M686 if X86_32
6 default GENERIC_CPU if X86_64
7 help
8 This is the processor type of your CPU. This information is
9 used for optimizing purposes. In order to compile a kernel
10 that can run on all supported x86 CPU types (albeit not
11 optimally fast), you can specify "486" here.
12
13 Note that the 386 is no longer supported, this includes
14 AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
15 UMC 486SX-S and the NexGen Nx586.
16
17 The kernel will not necessarily run on earlier architectures than
18 the one you have chosen, e.g. a Pentium optimized kernel will run on
19 a PPro, but not necessarily on a i486.
20
21 Here are the settings recommended for greatest speed:
22 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
23 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
24 - "586" for generic Pentium CPUs lacking the TSC
25 (time stamp counter) register.
26 - "Pentium-Classic" for the Intel Pentium.
27 - "Pentium-MMX" for the Intel Pentium MMX.
28 - "Pentium-Pro" for the Intel Pentium Pro.
29 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
30 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
31 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
32 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
33 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
34 - "Opteron/Athlon64/Hammer/K8" for all K8 and newer AMD CPUs.
35 - "Crusoe" for the Transmeta Crusoe series.
36 - "Efficeon" for the Transmeta Efficeon series.
37 - "Winchip-C6" for original IDT Winchip.
38 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
39 - "AMD Elan" for the 32-bit AMD Elan embedded CPU.
40 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
41 - "Geode GX/LX" For AMD Geode GX and LX processors.
42 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
43 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
44 - "VIA C7" for VIA C7.
45 - "Intel P4" for the Pentium 4/Netburst microarchitecture.
46 - "Core 2/newer Xeon" for all core2 and newer Intel CPUs.
47 - "Intel Atom" for the Atom-microarchitecture CPUs.
48 - "Generic-x86-64" for a kernel which runs on any x86-64 CPU.
49
50 See each option's help text for additional details. If you don't know
51 what to do, choose "486".
52
53config M486SX
54 bool "486SX"
55 depends on X86_32
56 help
57 Select this for an 486-class CPU without an FPU such as
58 AMD/Cyrix/IBM/Intel SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5S.
59
60config M486
61 bool "486DX"
62 depends on X86_32
63 help
64 Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel
65 486DX/DX2/DX4 and UMC U5D.
66
67config M586
68 bool "586/K5/5x86/6x86/6x86MX"
69 depends on X86_32
70 help
71 Select this for an 586 or 686 series processor such as the AMD K5,
72 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
73 assume the RDTSC (Read Time Stamp Counter) instruction.
74
75config M586TSC
76 bool "Pentium-Classic"
77 depends on X86_32
78 help
79 Select this for a Pentium Classic processor with the RDTSC (Read
80 Time Stamp Counter) instruction for benchmarking.
81
82config M586MMX
83 bool "Pentium-MMX"
84 depends on X86_32
85 help
86 Select this for a Pentium with the MMX graphics/multimedia
87 extended instructions.
88
89config M686
90 bool "Pentium-Pro"
91 depends on X86_32
92 help
93 Select this for Intel Pentium Pro chips. This enables the use of
94 Pentium Pro extended instructions, and disables the init-time guard
95 against the f00f bug found in earlier Pentiums.
96
97config MPENTIUMII
98 bool "Pentium-II/Celeron(pre-Coppermine)"
99 depends on X86_32
100 help
101 Select this for Intel chips based on the Pentium-II and
102 pre-Coppermine Celeron core. This option enables an unaligned
103 copy optimization, compiles the kernel with optimization flags
104 tailored for the chip, and applies any applicable Pentium Pro
105 optimizations.
106
107config MPENTIUMIII
108 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
109 depends on X86_32
110 help
111 Select this for Intel chips based on the Pentium-III and
112 Celeron-Coppermine core. This option enables use of some
113 extended prefetch instructions in addition to the Pentium II
114 extensions.
115
116config MPENTIUMM
117 bool "Pentium M"
118 depends on X86_32
119 help
120 Select this for Intel Pentium M (not Pentium-4 M)
121 notebook chips.
122
123config MPENTIUM4
124 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
125 depends on X86_32
126 help
127 Select this for Intel Pentium 4 chips. This includes the
128 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
129 Pentium-4 M (not Pentium M) chips. This option enables compile
130 flags optimized for the chip, uses the correct cache line size, and
131 applies any applicable optimizations.
132
133 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
134
135 Select this for:
136 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
137 -Willamette
138 -Northwood
139 -Mobile Pentium 4
140 -Mobile Pentium 4 M
141 -Extreme Edition (Gallatin)
142 -Prescott
143 -Prescott 2M
144 -Cedar Mill
145 -Presler
146 -Smithfiled
147 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
148 -Foster
149 -Prestonia
150 -Gallatin
151 -Nocona
152 -Irwindale
153 -Cranford
154 -Potomac
155 -Paxville
156 -Dempsey
157
158
159config MK6
160 bool "K6/K6-II/K6-III"
161 depends on X86_32
162 help
163 Select this for an AMD K6-family processor. Enables use of
164 some extended instructions, and passes appropriate optimization
165 flags to GCC.
166
167config MK7
168 bool "Athlon/Duron/K7"
169 depends on X86_32
170 help
171 Select this for an AMD Athlon K7-family processor. Enables use of
172 some extended instructions, and passes appropriate optimization
173 flags to GCC.
174
175config MK8
176 bool "Opteron/Athlon64/Hammer/K8"
177 help
178 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
179 Enables use of some extended instructions, and passes appropriate
180 optimization flags to GCC.
181
182config MCRUSOE
183 bool "Crusoe"
184 depends on X86_32
185 help
186 Select this for a Transmeta Crusoe processor. Treats the processor
187 like a 586 with TSC, and sets some GCC optimization flags (like a
188 Pentium Pro with no alignment requirements).
189
190config MEFFICEON
191 bool "Efficeon"
192 depends on X86_32
193 help
194 Select this for a Transmeta Efficeon processor.
195
196config MWINCHIPC6
197 bool "Winchip-C6"
198 depends on X86_32
199 help
200 Select this for an IDT Winchip C6 chip. Linux and GCC
201 treat this chip as a 586TSC with some extended instructions
202 and alignment requirements.
203
204config MWINCHIP3D
205 bool "Winchip-2/Winchip-2A/Winchip-3"
206 depends on X86_32
207 help
208 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
209 treat this chip as a 586TSC with some extended instructions
210 and alignment requirements. Also enable out of order memory
211 stores for this CPU, which can increase performance of some
212 operations.
213
214config MELAN
215 bool "AMD Elan"
216 depends on X86_32
217 help
218 Select this for an AMD Elan processor.
219
220 Do not use this option for K6/Athlon/Opteron processors!
221
222config MGEODEGX1
223 bool "GeodeGX1"
224 depends on X86_32
225 help
226 Select this for a Geode GX1 (Cyrix MediaGX) chip.
227
228config MGEODE_LX
229 bool "Geode GX/LX"
230 depends on X86_32
231 help
232 Select this for AMD Geode GX and LX processors.
233
234config MCYRIXIII
235 bool "CyrixIII/VIA-C3"
236 depends on X86_32
237 help
238 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
239 treat this chip as a generic 586. Whilst the CPU is 686 class,
240 it lacks the cmov extension which gcc assumes is present when
241 generating 686 code.
242 Note that Nehemiah (Model 9) and above will not boot with this
243 kernel due to them lacking the 3DNow! instructions used in earlier
244 incarnations of the CPU.
245
246config MVIAC3_2
247 bool "VIA C3-2 (Nehemiah)"
248 depends on X86_32
249 help
250 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
251 of SSE and tells gcc to treat the CPU as a 686.
252 Note, this kernel will not boot on older (pre model 9) C3s.
253
254config MVIAC7
255 bool "VIA C7"
256 depends on X86_32
257 help
258 Select this for a VIA C7. Selecting this uses the correct cache
259 shift and tells gcc to treat the CPU as a 686.
260
261config MPSC
262 bool "Intel P4 / older Netburst based Xeon"
263 depends on X86_64
264 help
265 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
266 Xeon CPUs with Intel 64bit which is compatible with x86-64.
267 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
268 Netburst core and shouldn't use this option. You can distinguish them
269 using the cpu family field
270 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
271
272config MCORE2
273 bool "Core 2/newer Xeon"
274 help
275
276 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
277 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
278 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
279 (not a typo)
280
281config MATOM
282 bool "Intel Atom"
283 help
284
285 Select this for the Intel Atom platform. Intel Atom CPUs have an
286 in-order pipelining architecture and thus can benefit from
287 accordingly optimized code. Use a recent GCC with specific Atom
288 support in order to fully benefit from selecting this option.
289
290config GENERIC_CPU
291 bool "Generic-x86-64"
292 depends on X86_64
293 help
294 Generic x86-64 CPU.
295 Run equally well on all x86-64 CPUs.
296
297endchoice
298
299config X86_GENERIC
300 bool "Generic x86 support"
301 depends on X86_32
302 help
303 Instead of just including optimizations for the selected
304 x86 variant (e.g. PII, Crusoe or Athlon), include some more
305 generic optimizations as well. This will make the kernel
306 perform better on x86 CPUs other than that selected.
307
308 This is really intended for distributors who need more
309 generic optimizations.
310
311#
312# Define implied options from the CPU selection here
313config X86_INTERNODE_CACHE_SHIFT
314 int
315 default "12" if X86_VSMP
316 default X86_L1_CACHE_SHIFT
317
318config X86_L1_CACHE_SHIFT
319 int
320 default "7" if MPENTIUM4 || MPSC
321 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
322 default "4" if MELAN || M486SX || M486 || MGEODEGX1
323 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
324
325config X86_F00F_BUG
326 def_bool y
327 depends on M586MMX || M586TSC || M586 || M486SX || M486
328
329config X86_INVD_BUG
330 def_bool y
331 depends on M486SX || M486
332
333config X86_ALIGNMENT_16
334 def_bool y
335 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486SX || M486 || MVIAC3_2 || MGEODEGX1
336
337config X86_INTEL_USERCOPY
338 def_bool y
339 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
340
341config X86_USE_PPRO_CHECKSUM
342 def_bool y
343 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
344
345config X86_USE_3DNOW
346 def_bool y
347 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
348
349#
350# P6_NOPs are a relatively minor optimization that require a family >=
351# 6 processor, except that it is broken on certain VIA chips.
352# Furthermore, AMD chips prefer a totally different sequence of NOPs
353# (which work on all CPUs). In addition, it looks like Virtual PC
354# does not understand them.
355#
356# As a result, disallow these if we're not compiling for X86_64 (these
357# NOPs do work on all x86-64 capable chips); the list of processors in
358# the right-hand clause are the cores that benefit from this optimization.
359#
360config X86_P6_NOP
361 def_bool y
362 depends on X86_64
363 depends on (MCORE2 || MPENTIUM4 || MPSC)
364
365config X86_TSC
366 def_bool y
367 depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
368
369config X86_CMPXCHG64
370 def_bool y
371 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8
372
373# this should be set for all -march=.. options where the compiler
374# generates cmov.
375config X86_CMOV
376 def_bool y
377 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
378
379config X86_MINIMUM_CPU_FAMILY
380 int
381 default "64" if X86_64
382 default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCRUSOE || MCORE2 || MK7 || MK8)
383 default "5" if X86_32 && X86_CMPXCHG64
384 default "4"
385
386config X86_DEBUGCTLMSR
387 def_bool y
388 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486SX || M486) && !UML
389
390config IA32_FEAT_CTL
391 def_bool y
392 depends on CPU_SUP_INTEL || CPU_SUP_CENTAUR || CPU_SUP_ZHAOXIN
393
394config X86_VMX_FEATURE_NAMES
395 def_bool y
396 depends on IA32_FEAT_CTL && X86_FEATURE_NAMES
397
398menuconfig PROCESSOR_SELECT
399 bool "Supported processor vendors" if EXPERT
400 help
401 This lets you choose what x86 vendor support code your kernel
402 will include.
403
404config CPU_SUP_INTEL
405 default y
406 bool "Support Intel processors" if PROCESSOR_SELECT
407 help
408 This enables detection, tunings and quirks for Intel processors
409
410 You need this enabled if you want your kernel to run on an
411 Intel CPU. Disabling this option on other types of CPUs
412 makes the kernel a tiny bit smaller. Disabling it on an Intel
413 CPU might render the kernel unbootable.
414
415 If unsure, say N.
416
417config CPU_SUP_CYRIX_32
418 default y
419 bool "Support Cyrix processors" if PROCESSOR_SELECT
420 depends on M486SX || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
421 help
422 This enables detection, tunings and quirks for Cyrix processors
423
424 You need this enabled if you want your kernel to run on a
425 Cyrix CPU. Disabling this option on other types of CPUs
426 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
427 CPU might render the kernel unbootable.
428
429 If unsure, say N.
430
431config CPU_SUP_AMD
432 default y
433 bool "Support AMD processors" if PROCESSOR_SELECT
434 help
435 This enables detection, tunings and quirks for AMD processors
436
437 You need this enabled if you want your kernel to run on an
438 AMD CPU. Disabling this option on other types of CPUs
439 makes the kernel a tiny bit smaller. Disabling it on an AMD
440 CPU might render the kernel unbootable.
441
442 If unsure, say N.
443
444config CPU_SUP_HYGON
445 default y
446 bool "Support Hygon processors" if PROCESSOR_SELECT
447 select CPU_SUP_AMD
448 help
449 This enables detection, tunings and quirks for Hygon processors
450
451 You need this enabled if you want your kernel to run on an
452 Hygon CPU. Disabling this option on other types of CPUs
453 makes the kernel a tiny bit smaller. Disabling it on an Hygon
454 CPU might render the kernel unbootable.
455
456 If unsure, say N.
457
458config CPU_SUP_CENTAUR
459 default y
460 bool "Support Centaur processors" if PROCESSOR_SELECT
461 help
462 This enables detection, tunings and quirks for Centaur processors
463
464 You need this enabled if you want your kernel to run on a
465 Centaur CPU. Disabling this option on other types of CPUs
466 makes the kernel a tiny bit smaller. Disabling it on a Centaur
467 CPU might render the kernel unbootable.
468
469 If unsure, say N.
470
471config CPU_SUP_TRANSMETA_32
472 default y
473 bool "Support Transmeta processors" if PROCESSOR_SELECT
474 depends on !64BIT
475 help
476 This enables detection, tunings and quirks for Transmeta processors
477
478 You need this enabled if you want your kernel to run on a
479 Transmeta CPU. Disabling this option on other types of CPUs
480 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
481 CPU might render the kernel unbootable.
482
483 If unsure, say N.
484
485config CPU_SUP_UMC_32
486 default y
487 bool "Support UMC processors" if PROCESSOR_SELECT
488 depends on M486SX || M486 || (EXPERT && !64BIT)
489 help
490 This enables detection, tunings and quirks for UMC processors
491
492 You need this enabled if you want your kernel to run on a
493 UMC CPU. Disabling this option on other types of CPUs
494 makes the kernel a tiny bit smaller. Disabling it on a UMC
495 CPU might render the kernel unbootable.
496
497 If unsure, say N.
498
499config CPU_SUP_ZHAOXIN
500 default y
501 bool "Support Zhaoxin processors" if PROCESSOR_SELECT
502 help
503 This enables detection, tunings and quirks for Zhaoxin processors
504
505 You need this enabled if you want your kernel to run on a
506 Zhaoxin CPU. Disabling this option on other types of CPUs
507 makes the kernel a tiny bit smaller. Disabling it on a Zhaoxin
508 CPU might render the kernel unbootable.
509
510 If unsure, say N.