1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef __SDHCI_PCI_H
  3#define __SDHCI_PCI_H
  4
  5/*
  6 * PCI device IDs, sub IDs
  7 */
  8
  9#define PCI_DEVICE_ID_O2_SDS0		0x8420
 10#define PCI_DEVICE_ID_O2_SDS1		0x8421
 11#define PCI_DEVICE_ID_O2_FUJIN2		0x8520
 12#define PCI_DEVICE_ID_O2_SEABIRD0	0x8620
 13#define PCI_DEVICE_ID_O2_SEABIRD1	0x8621
 14
 15#define PCI_DEVICE_ID_INTEL_PCH_SDIO0	0x8809
 16#define PCI_DEVICE_ID_INTEL_PCH_SDIO1	0x880a
 17#define PCI_DEVICE_ID_INTEL_BYT_EMMC	0x0f14
 18#define PCI_DEVICE_ID_INTEL_BYT_SDIO	0x0f15
 19#define PCI_DEVICE_ID_INTEL_BYT_SD	0x0f16
 20#define PCI_DEVICE_ID_INTEL_BYT_EMMC2	0x0f50
 21#define PCI_DEVICE_ID_INTEL_BSW_EMMC	0x2294
 22#define PCI_DEVICE_ID_INTEL_BSW_SDIO	0x2295
 23#define PCI_DEVICE_ID_INTEL_BSW_SD	0x2296
 24#define PCI_DEVICE_ID_INTEL_MRFLD_MMC	0x1190
 25#define PCI_DEVICE_ID_INTEL_CLV_SDIO0	0x08f9
 26#define PCI_DEVICE_ID_INTEL_CLV_SDIO1	0x08fa
 27#define PCI_DEVICE_ID_INTEL_CLV_SDIO2	0x08fb
 28#define PCI_DEVICE_ID_INTEL_CLV_EMMC0	0x08e5
 29#define PCI_DEVICE_ID_INTEL_CLV_EMMC1	0x08e6
 30#define PCI_DEVICE_ID_INTEL_QRK_SD	0x08A7
 31#define PCI_DEVICE_ID_INTEL_SPT_EMMC	0x9d2b
 32#define PCI_DEVICE_ID_INTEL_SPT_SDIO	0x9d2c
 33#define PCI_DEVICE_ID_INTEL_SPT_SD	0x9d2d
 34#define PCI_DEVICE_ID_INTEL_DNV_EMMC	0x19db
 35#define PCI_DEVICE_ID_INTEL_CDF_EMMC	0x18db
 36#define PCI_DEVICE_ID_INTEL_BXT_SD	0x0aca
 37#define PCI_DEVICE_ID_INTEL_BXT_EMMC	0x0acc
 38#define PCI_DEVICE_ID_INTEL_BXT_SDIO	0x0ad0
 39#define PCI_DEVICE_ID_INTEL_BXTM_SD	0x1aca
 40#define PCI_DEVICE_ID_INTEL_BXTM_EMMC	0x1acc
 41#define PCI_DEVICE_ID_INTEL_BXTM_SDIO	0x1ad0
 42#define PCI_DEVICE_ID_INTEL_APL_SD	0x5aca
 43#define PCI_DEVICE_ID_INTEL_APL_EMMC	0x5acc
 44#define PCI_DEVICE_ID_INTEL_APL_SDIO	0x5ad0
 45#define PCI_DEVICE_ID_INTEL_GLK_SD	0x31ca
 46#define PCI_DEVICE_ID_INTEL_GLK_EMMC	0x31cc
 47#define PCI_DEVICE_ID_INTEL_GLK_SDIO	0x31d0
 48#define PCI_DEVICE_ID_INTEL_CNP_EMMC	0x9dc4
 49#define PCI_DEVICE_ID_INTEL_CNP_SD	0x9df5
 50#define PCI_DEVICE_ID_INTEL_CNPH_SD	0xa375
 51#define PCI_DEVICE_ID_INTEL_ICP_EMMC	0x34c4
 52#define PCI_DEVICE_ID_INTEL_ICP_SD	0x34f8
 53#define PCI_DEVICE_ID_INTEL_EHL_EMMC	0x4b47
 54#define PCI_DEVICE_ID_INTEL_EHL_SD	0x4b48
 55#define PCI_DEVICE_ID_INTEL_CML_EMMC	0x02c4
 56#define PCI_DEVICE_ID_INTEL_CML_SD	0x02f5
 57#define PCI_DEVICE_ID_INTEL_CMLH_SD	0x06f5
 58
 59#define PCI_DEVICE_ID_SYSKONNECT_8000	0x8000
 60#define PCI_DEVICE_ID_VIA_95D0		0x95d0
 61#define PCI_DEVICE_ID_REALTEK_5250	0x5250
 62
 63#define PCI_SUBDEVICE_ID_NI_7884	0x7884
 64#define PCI_SUBDEVICE_ID_NI_78E3	0x78e3
 65
 66#define PCI_VENDOR_ID_ARASAN		0x16e6
 67#define PCI_DEVICE_ID_ARASAN_PHY_EMMC	0x0670
 68
 69#define PCI_DEVICE_ID_SYNOPSYS_DWC_MSHC 0xc202
 70
 71#define PCI_DEVICE_ID_GLI_9755		0x9755
 72#define PCI_DEVICE_ID_GLI_9750		0x9750
 73
 74/*
 75 * PCI device class and mask
 76 */
 77
 78#define SYSTEM_SDHCI			(PCI_CLASS_SYSTEM_SDHCI << 8)
 79#define PCI_CLASS_MASK			0xFFFF00
 80
 81/*
 82 * Macros for PCI device-description
 83 */
 84
 85#define _PCI_VEND(vend) PCI_VENDOR_ID_##vend
 86#define _PCI_DEV(vend, dev) PCI_DEVICE_ID_##vend##_##dev
 87#define _PCI_SUBDEV(subvend, subdev) PCI_SUBDEVICE_ID_##subvend##_##subdev
 88
 89#define SDHCI_PCI_DEVICE(vend, dev, cfg) { \
 90	.vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
 91	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
 92	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
 93}
 94
 95#define SDHCI_PCI_SUBDEVICE(vend, dev, subvend, subdev, cfg) { \
 96	.vendor = _PCI_VEND(vend), .device = _PCI_DEV(vend, dev), \
 97	.subvendor = _PCI_VEND(subvend), \
 98	.subdevice = _PCI_SUBDEV(subvend, subdev), \
 99	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
100}
101
102#define SDHCI_PCI_DEVICE_CLASS(vend, cl, cl_msk, cfg) { \
103	.vendor = _PCI_VEND(vend), .device = PCI_ANY_ID, \
104	.subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, \
105	.class = (cl), .class_mask = (cl_msk), \
106	.driver_data = (kernel_ulong_t)&(sdhci_##cfg) \
107}
108
109/*
110 * PCI registers
111 */
112
113#define PCI_SDHCI_IFPIO			0x00
114#define PCI_SDHCI_IFDMA			0x01
115#define PCI_SDHCI_IFVENDOR		0x02
116
117#define PCI_SLOT_INFO			0x40	/* 8 bits */
118#define  PCI_SLOT_INFO_SLOTS(x)		((x >> 4) & 7)
119#define  PCI_SLOT_INFO_FIRST_BAR_MASK	0x07
120
121#define MAX_SLOTS			8
122
123struct sdhci_pci_chip;
124struct sdhci_pci_slot;
125
126struct sdhci_pci_fixes {
127	unsigned int		quirks;
128	unsigned int		quirks2;
129	bool			allow_runtime_pm;
130	bool			own_cd_for_runtime_pm;
131
132	int			(*probe) (struct sdhci_pci_chip *);
133
134	int			(*probe_slot) (struct sdhci_pci_slot *);
135	int			(*add_host) (struct sdhci_pci_slot *);
136	void			(*remove_slot) (struct sdhci_pci_slot *, int);
137
138#ifdef CONFIG_PM_SLEEP
139	int			(*suspend) (struct sdhci_pci_chip *);
140	int			(*resume) (struct sdhci_pci_chip *);
141#endif
142#ifdef CONFIG_PM
143	int			(*runtime_suspend) (struct sdhci_pci_chip *);
144	int			(*runtime_resume) (struct sdhci_pci_chip *);
145#endif
146
147	const struct sdhci_ops	*ops;
148	size_t			priv_size;
149};
150
151struct sdhci_pci_slot {
152	struct sdhci_pci_chip	*chip;
153	struct sdhci_host	*host;
154	struct sdhci_pci_data	*data;
155
156	int			rst_n_gpio;
157	int			cd_gpio;
158	int			cd_irq;
159
160	int			cd_idx;
161	bool			cd_override_level;
162
163	void (*hw_reset)(struct sdhci_host *host);
164	unsigned long		private[0] ____cacheline_aligned;
165};
166
167struct sdhci_pci_chip {
168	struct pci_dev		*pdev;
169
170	unsigned int		quirks;
171	unsigned int		quirks2;
172	bool			allow_runtime_pm;
173	bool			pm_retune;
174	bool			rpm_retune;
175	const struct sdhci_pci_fixes *fixes;
176
177	int			num_slots;	/* Slots on controller */
178	struct sdhci_pci_slot	*slots[MAX_SLOTS]; /* Pointers to host slots */
179};
180
181static inline void *sdhci_pci_priv(struct sdhci_pci_slot *slot)
182{
183	return (void *)slot->private;
184}
185
186#ifdef CONFIG_PM_SLEEP
187int sdhci_pci_resume_host(struct sdhci_pci_chip *chip);
188#endif
189int sdhci_pci_enable_dma(struct sdhci_host *host);
190
191extern const struct sdhci_pci_fixes sdhci_arasan;
192extern const struct sdhci_pci_fixes sdhci_snps;
193extern const struct sdhci_pci_fixes sdhci_o2;
194extern const struct sdhci_pci_fixes sdhci_gl9750;
195extern const struct sdhci_pci_fixes sdhci_gl9755;
196
197#endif /* __SDHCI_PCI_H */