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1
2/*
3 * Copyright (C) 2008-2009 ST-Ericsson
4 *
5 * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2, as
9 * published by the Free Software Foundation.
10 *
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/platform_device.h>
16#include <linux/io.h>
17#include <linux/i2c.h>
18#include <linux/gpio.h>
19#include <linux/amba/bus.h>
20#include <linux/amba/pl022.h>
21#include <linux/amba/serial.h>
22#include <linux/spi/spi.h>
23#include <linux/mfd/abx500/ab8500.h>
24#include <linux/regulator/ab8500.h>
25#include <linux/mfd/tc3589x.h>
26#include <linux/mfd/tps6105x.h>
27#include <linux/mfd/abx500/ab8500-gpio.h>
28#include <linux/leds-lp5521.h>
29#include <linux/input.h>
30#include <linux/smsc911x.h>
31#include <linux/gpio_keys.h>
32#include <linux/delay.h>
33#include <linux/of.h>
34#include <linux/of_platform.h>
35#include <linux/leds.h>
36#include <linux/pinctrl/consumer.h>
37
38#include <asm/mach-types.h>
39#include <asm/mach/arch.h>
40#include <asm/hardware/gic.h>
41
42#include <plat/i2c.h>
43#include <plat/ste_dma40.h>
44#include <plat/gpio-nomadik.h>
45
46#include <mach/hardware.h>
47#include <mach/setup.h>
48#include <mach/devices.h>
49#include <mach/irqs.h>
50#include <mach/crypto-ux500.h>
51
52#include "ste-dma40-db8500.h"
53#include "devices-db8500.h"
54#include "board-mop500.h"
55#include "board-mop500-regulators.h"
56#include "board-mop500-msp.h"
57
58static struct gpio_led snowball_led_array[] = {
59 {
60 .name = "user_led",
61 .default_trigger = "none",
62 .gpio = 142,
63 },
64};
65
66static struct gpio_led_platform_data snowball_led_data = {
67 .leds = snowball_led_array,
68 .num_leds = ARRAY_SIZE(snowball_led_array),
69};
70
71static struct platform_device snowball_led_dev = {
72 .name = "leds-gpio",
73 .dev = {
74 .platform_data = &snowball_led_data,
75 },
76};
77
78static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
79 .gpio_base = MOP500_AB8500_PIN_GPIO(1),
80 .irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
81 /* config_reg is the initial configuration of ab8500 pins.
82 * The pins can be configured as GPIO or alt functions based
83 * on value present in GpioSel1 to GpioSel6 and AlternatFunction
84 * register. This is the array of 7 configuration settings.
85 * One has to compile time decide these settings. Below is the
86 * explanation of these setting
87 * GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
88 * GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
89 * GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
90 * GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
91 * GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
92 * GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
93 * AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
94 * as GPIO then this register selectes the alternate fucntions
95 */
96 .config_reg = {0x00, 0x1E, 0x80, 0x01,
97 0x7A, 0x00, 0x00},
98};
99
100static struct gpio_keys_button snowball_key_array[] = {
101 {
102 .gpio = 32,
103 .type = EV_KEY,
104 .code = KEY_1,
105 .desc = "userpb",
106 .active_low = 1,
107 .debounce_interval = 50,
108 .wakeup = 1,
109 },
110 {
111 .gpio = 151,
112 .type = EV_KEY,
113 .code = KEY_2,
114 .desc = "extkb1",
115 .active_low = 1,
116 .debounce_interval = 50,
117 .wakeup = 1,
118 },
119 {
120 .gpio = 152,
121 .type = EV_KEY,
122 .code = KEY_3,
123 .desc = "extkb2",
124 .active_low = 1,
125 .debounce_interval = 50,
126 .wakeup = 1,
127 },
128 {
129 .gpio = 161,
130 .type = EV_KEY,
131 .code = KEY_4,
132 .desc = "extkb3",
133 .active_low = 1,
134 .debounce_interval = 50,
135 .wakeup = 1,
136 },
137 {
138 .gpio = 162,
139 .type = EV_KEY,
140 .code = KEY_5,
141 .desc = "extkb4",
142 .active_low = 1,
143 .debounce_interval = 50,
144 .wakeup = 1,
145 },
146};
147
148static struct gpio_keys_platform_data snowball_key_data = {
149 .buttons = snowball_key_array,
150 .nbuttons = ARRAY_SIZE(snowball_key_array),
151};
152
153static struct platform_device snowball_key_dev = {
154 .name = "gpio-keys",
155 .id = -1,
156 .dev = {
157 .platform_data = &snowball_key_data,
158 }
159};
160
161static struct smsc911x_platform_config snowball_sbnet_cfg = {
162 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
163 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
164 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
165 .shift = 1,
166};
167
168static struct resource sbnet_res[] = {
169 {
170 .name = "smsc911x-memory",
171 .start = (0x5000 << 16),
172 .end = (0x5000 << 16) + 0xffff,
173 .flags = IORESOURCE_MEM,
174 },
175 {
176 .start = NOMADIK_GPIO_TO_IRQ(140),
177 .end = NOMADIK_GPIO_TO_IRQ(140),
178 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
179 },
180};
181
182static struct platform_device snowball_sbnet_dev = {
183 .name = "smsc911x",
184 .num_resources = ARRAY_SIZE(sbnet_res),
185 .resource = sbnet_res,
186 .dev = {
187 .platform_data = &snowball_sbnet_cfg,
188 },
189};
190
191static struct ab8500_platform_data ab8500_platdata = {
192 .irq_base = MOP500_AB8500_IRQ_BASE,
193 .regulator_reg_init = ab8500_regulator_reg_init,
194 .num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
195 .regulator = ab8500_regulators,
196 .num_regulator = ARRAY_SIZE(ab8500_regulators),
197 .gpio = &ab8500_gpio_pdata,
198};
199
200static struct resource ab8500_resources[] = {
201 [0] = {
202 .start = IRQ_DB8500_AB8500,
203 .end = IRQ_DB8500_AB8500,
204 .flags = IORESOURCE_IRQ
205 }
206};
207
208struct platform_device ab8500_device = {
209 .name = "ab8500-core",
210 .id = 0,
211 .dev = {
212 .platform_data = &ab8500_platdata,
213 },
214 .num_resources = 1,
215 .resource = ab8500_resources,
216};
217
218/*
219 * TPS61052
220 */
221
222static struct tps6105x_platform_data mop500_tps61052_data = {
223 .mode = TPS6105X_MODE_VOLTAGE,
224 .regulator_data = &tps61052_regulator,
225};
226
227/*
228 * TC35892
229 */
230
231static void mop500_tc35892_init(struct tc3589x *tc3589x, unsigned int base)
232{
233 struct device *parent = NULL;
234#if 0
235 /* FIXME: Is the sdi actually part of tc3589x? */
236 parent = tc3589x->dev;
237#endif
238 mop500_sdi_tc35892_init(parent);
239}
240
241static struct tc3589x_gpio_platform_data mop500_tc35892_gpio_data = {
242 .gpio_base = MOP500_EGPIO(0),
243 .setup = mop500_tc35892_init,
244};
245
246static struct tc3589x_platform_data mop500_tc35892_data = {
247 .block = TC3589x_BLOCK_GPIO,
248 .gpio = &mop500_tc35892_gpio_data,
249 .irq_base = MOP500_EGPIO_IRQ_BASE,
250};
251
252static struct lp5521_led_config lp5521_pri_led[] = {
253 [0] = {
254 .chan_nr = 0,
255 .led_current = 0x2f,
256 .max_current = 0x5f,
257 },
258 [1] = {
259 .chan_nr = 1,
260 .led_current = 0x2f,
261 .max_current = 0x5f,
262 },
263 [2] = {
264 .chan_nr = 2,
265 .led_current = 0x2f,
266 .max_current = 0x5f,
267 },
268};
269
270static struct lp5521_platform_data __initdata lp5521_pri_data = {
271 .label = "lp5521_pri",
272 .led_config = &lp5521_pri_led[0],
273 .num_channels = 3,
274 .clock_mode = LP5521_CLOCK_EXT,
275};
276
277static struct lp5521_led_config lp5521_sec_led[] = {
278 [0] = {
279 .chan_nr = 0,
280 .led_current = 0x2f,
281 .max_current = 0x5f,
282 },
283 [1] = {
284 .chan_nr = 1,
285 .led_current = 0x2f,
286 .max_current = 0x5f,
287 },
288 [2] = {
289 .chan_nr = 2,
290 .led_current = 0x2f,
291 .max_current = 0x5f,
292 },
293};
294
295static struct lp5521_platform_data __initdata lp5521_sec_data = {
296 .label = "lp5521_sec",
297 .led_config = &lp5521_sec_led[0],
298 .num_channels = 3,
299 .clock_mode = LP5521_CLOCK_EXT,
300};
301
302static struct i2c_board_info __initdata mop500_i2c0_devices[] = {
303 {
304 I2C_BOARD_INFO("tc3589x", 0x42),
305 .irq = NOMADIK_GPIO_TO_IRQ(217),
306 .platform_data = &mop500_tc35892_data,
307 },
308 /* I2C0 devices only available prior to HREFv60 */
309 {
310 I2C_BOARD_INFO("tps61052", 0x33),
311 .platform_data = &mop500_tps61052_data,
312 },
313};
314
315#define NUM_PRE_V60_I2C0_DEVICES 1
316
317static struct i2c_board_info __initdata mop500_i2c2_devices[] = {
318 {
319 /* lp5521 LED driver, 1st device */
320 I2C_BOARD_INFO("lp5521", 0x33),
321 .platform_data = &lp5521_pri_data,
322 },
323 {
324 /* lp5521 LED driver, 2st device */
325 I2C_BOARD_INFO("lp5521", 0x34),
326 .platform_data = &lp5521_sec_data,
327 },
328 {
329 /* Light sensor Rohm BH1780GLI */
330 I2C_BOARD_INFO("bh1780", 0x29),
331 },
332};
333
334#define U8500_I2C_CONTROLLER(id, _slsu, _tft, _rft, clk, t_out, _sm) \
335static struct nmk_i2c_controller u8500_i2c##id##_data = { \
336 /* \
337 * slave data setup time, which is \
338 * 250 ns,100ns,10ns which is 14,6,2 \
339 * respectively for a 48 Mhz \
340 * i2c clock \
341 */ \
342 .slsu = _slsu, \
343 /* Tx FIFO threshold */ \
344 .tft = _tft, \
345 /* Rx FIFO threshold */ \
346 .rft = _rft, \
347 /* std. mode operation */ \
348 .clk_freq = clk, \
349 /* Slave response timeout(ms) */\
350 .timeout = t_out, \
351 .sm = _sm, \
352}
353
354/*
355 * The board uses 4 i2c controllers, initialize all of
356 * them with slave data setup time of 250 ns,
357 * Tx & Rx FIFO threshold values as 8 and standard
358 * mode of operation
359 */
360U8500_I2C_CONTROLLER(0, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
361U8500_I2C_CONTROLLER(1, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
362U8500_I2C_CONTROLLER(2, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
363U8500_I2C_CONTROLLER(3, 0xe, 1, 8, 100000, 200, I2C_FREQ_MODE_FAST);
364
365static void __init mop500_i2c_init(struct device *parent)
366{
367 db8500_add_i2c0(parent, &u8500_i2c0_data);
368 db8500_add_i2c1(parent, &u8500_i2c1_data);
369 db8500_add_i2c2(parent, &u8500_i2c2_data);
370 db8500_add_i2c3(parent, &u8500_i2c3_data);
371}
372
373static struct gpio_keys_button mop500_gpio_keys[] = {
374 {
375 .desc = "SFH7741 Proximity Sensor",
376 .type = EV_SW,
377 .code = SW_FRONT_PROXIMITY,
378 .active_low = 0,
379 .can_disable = 1,
380 }
381};
382
383static struct regulator *prox_regulator;
384static int mop500_prox_activate(struct device *dev);
385static void mop500_prox_deactivate(struct device *dev);
386
387static struct gpio_keys_platform_data mop500_gpio_keys_data = {
388 .buttons = mop500_gpio_keys,
389 .nbuttons = ARRAY_SIZE(mop500_gpio_keys),
390 .enable = mop500_prox_activate,
391 .disable = mop500_prox_deactivate,
392};
393
394static struct platform_device mop500_gpio_keys_device = {
395 .name = "gpio-keys",
396 .id = 0,
397 .dev = {
398 .platform_data = &mop500_gpio_keys_data,
399 },
400};
401
402static int mop500_prox_activate(struct device *dev)
403{
404 prox_regulator = regulator_get(&mop500_gpio_keys_device.dev,
405 "vcc");
406 if (IS_ERR(prox_regulator)) {
407 dev_err(&mop500_gpio_keys_device.dev,
408 "no regulator\n");
409 return PTR_ERR(prox_regulator);
410 }
411 regulator_enable(prox_regulator);
412 return 0;
413}
414
415static void mop500_prox_deactivate(struct device *dev)
416{
417 regulator_disable(prox_regulator);
418 regulator_put(prox_regulator);
419}
420
421static struct cryp_platform_data u8500_cryp1_platform_data = {
422 .mem_to_engine = {
423 .dir = STEDMA40_MEM_TO_PERIPH,
424 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
425 .dst_dev_type = DB8500_DMA_DEV48_CAC1_TX,
426 .src_info.data_width = STEDMA40_WORD_WIDTH,
427 .dst_info.data_width = STEDMA40_WORD_WIDTH,
428 .mode = STEDMA40_MODE_LOGICAL,
429 .src_info.psize = STEDMA40_PSIZE_LOG_4,
430 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
431 },
432 .engine_to_mem = {
433 .dir = STEDMA40_PERIPH_TO_MEM,
434 .src_dev_type = DB8500_DMA_DEV48_CAC1_RX,
435 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
436 .src_info.data_width = STEDMA40_WORD_WIDTH,
437 .dst_info.data_width = STEDMA40_WORD_WIDTH,
438 .mode = STEDMA40_MODE_LOGICAL,
439 .src_info.psize = STEDMA40_PSIZE_LOG_4,
440 .dst_info.psize = STEDMA40_PSIZE_LOG_4,
441 }
442};
443
444static struct stedma40_chan_cfg u8500_hash_dma_cfg_tx = {
445 .dir = STEDMA40_MEM_TO_PERIPH,
446 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
447 .dst_dev_type = DB8500_DMA_DEV50_HAC1_TX,
448 .src_info.data_width = STEDMA40_WORD_WIDTH,
449 .dst_info.data_width = STEDMA40_WORD_WIDTH,
450 .mode = STEDMA40_MODE_LOGICAL,
451 .src_info.psize = STEDMA40_PSIZE_LOG_16,
452 .dst_info.psize = STEDMA40_PSIZE_LOG_16,
453};
454
455static struct hash_platform_data u8500_hash1_platform_data = {
456 .mem_to_engine = &u8500_hash_dma_cfg_tx,
457 .dma_filter = stedma40_filter,
458};
459
460/* add any platform devices here - TODO */
461static struct platform_device *mop500_platform_devs[] __initdata = {
462 &mop500_gpio_keys_device,
463 &ab8500_device,
464};
465
466#ifdef CONFIG_STE_DMA40
467static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
468 .mode = STEDMA40_MODE_LOGICAL,
469 .dir = STEDMA40_PERIPH_TO_MEM,
470 .src_dev_type = DB8500_DMA_DEV8_SSP0_RX,
471 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
472 .src_info.data_width = STEDMA40_BYTE_WIDTH,
473 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
474};
475
476static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
477 .mode = STEDMA40_MODE_LOGICAL,
478 .dir = STEDMA40_MEM_TO_PERIPH,
479 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
480 .dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
481 .src_info.data_width = STEDMA40_BYTE_WIDTH,
482 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
483};
484#endif
485
486static struct pl022_ssp_controller ssp0_plat = {
487 .bus_id = 0,
488#ifdef CONFIG_STE_DMA40
489 .enable_dma = 1,
490 .dma_filter = stedma40_filter,
491 .dma_rx_param = &ssp0_dma_cfg_rx,
492 .dma_tx_param = &ssp0_dma_cfg_tx,
493#else
494 .enable_dma = 0,
495#endif
496 /* on this platform, gpio 31,142,144,214 &
497 * 224 are connected as chip selects
498 */
499 .num_chipselect = 5,
500};
501
502static void __init mop500_spi_init(struct device *parent)
503{
504 db8500_add_ssp0(parent, &ssp0_plat);
505}
506
507#ifdef CONFIG_STE_DMA40
508static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
509 .mode = STEDMA40_MODE_LOGICAL,
510 .dir = STEDMA40_PERIPH_TO_MEM,
511 .src_dev_type = DB8500_DMA_DEV13_UART0_RX,
512 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
513 .src_info.data_width = STEDMA40_BYTE_WIDTH,
514 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
515};
516
517static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
518 .mode = STEDMA40_MODE_LOGICAL,
519 .dir = STEDMA40_MEM_TO_PERIPH,
520 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
521 .dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
522 .src_info.data_width = STEDMA40_BYTE_WIDTH,
523 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
524};
525
526static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
527 .mode = STEDMA40_MODE_LOGICAL,
528 .dir = STEDMA40_PERIPH_TO_MEM,
529 .src_dev_type = DB8500_DMA_DEV12_UART1_RX,
530 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
531 .src_info.data_width = STEDMA40_BYTE_WIDTH,
532 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
533};
534
535static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
536 .mode = STEDMA40_MODE_LOGICAL,
537 .dir = STEDMA40_MEM_TO_PERIPH,
538 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
539 .dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
540 .src_info.data_width = STEDMA40_BYTE_WIDTH,
541 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
542};
543
544static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
545 .mode = STEDMA40_MODE_LOGICAL,
546 .dir = STEDMA40_PERIPH_TO_MEM,
547 .src_dev_type = DB8500_DMA_DEV11_UART2_RX,
548 .dst_dev_type = STEDMA40_DEV_DST_MEMORY,
549 .src_info.data_width = STEDMA40_BYTE_WIDTH,
550 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
551};
552
553static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
554 .mode = STEDMA40_MODE_LOGICAL,
555 .dir = STEDMA40_MEM_TO_PERIPH,
556 .src_dev_type = STEDMA40_DEV_SRC_MEMORY,
557 .dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
558 .src_info.data_width = STEDMA40_BYTE_WIDTH,
559 .dst_info.data_width = STEDMA40_BYTE_WIDTH,
560};
561#endif
562
563#define PRCC_K_SOFTRST_SET 0x18
564#define PRCC_K_SOFTRST_CLEAR 0x1C
565static void ux500_uart0_reset(void)
566{
567 void __iomem *prcc_rst_set, *prcc_rst_clr;
568
569 prcc_rst_set = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
570 PRCC_K_SOFTRST_SET);
571 prcc_rst_clr = (void __iomem *)IO_ADDRESS(U8500_CLKRST1_BASE +
572 PRCC_K_SOFTRST_CLEAR);
573
574 /* Activate soft reset PRCC_K_SOFTRST_CLEAR */
575 writel((readl(prcc_rst_clr) | 0x1), prcc_rst_clr);
576 udelay(1);
577
578 /* Release soft reset PRCC_K_SOFTRST_SET */
579 writel((readl(prcc_rst_set) | 0x1), prcc_rst_set);
580 udelay(1);
581}
582
583static struct amba_pl011_data uart0_plat = {
584#ifdef CONFIG_STE_DMA40
585 .dma_filter = stedma40_filter,
586 .dma_rx_param = &uart0_dma_cfg_rx,
587 .dma_tx_param = &uart0_dma_cfg_tx,
588#endif
589 .reset = ux500_uart0_reset,
590};
591
592static struct amba_pl011_data uart1_plat = {
593#ifdef CONFIG_STE_DMA40
594 .dma_filter = stedma40_filter,
595 .dma_rx_param = &uart1_dma_cfg_rx,
596 .dma_tx_param = &uart1_dma_cfg_tx,
597#endif
598};
599
600static struct amba_pl011_data uart2_plat = {
601#ifdef CONFIG_STE_DMA40
602 .dma_filter = stedma40_filter,
603 .dma_rx_param = &uart2_dma_cfg_rx,
604 .dma_tx_param = &uart2_dma_cfg_tx,
605#endif
606};
607
608static void __init mop500_uart_init(struct device *parent)
609{
610 db8500_add_uart0(parent, &uart0_plat);
611 db8500_add_uart1(parent, &uart1_plat);
612 db8500_add_uart2(parent, &uart2_plat);
613}
614
615static void __init u8500_cryp1_hash1_init(struct device *parent)
616{
617 db8500_add_cryp1(parent, &u8500_cryp1_platform_data);
618 db8500_add_hash1(parent, &u8500_hash1_platform_data);
619}
620
621static struct platform_device *snowball_platform_devs[] __initdata = {
622 &snowball_led_dev,
623 &snowball_key_dev,
624 &snowball_sbnet_dev,
625 &ab8500_device,
626};
627
628static void __init mop500_init_machine(void)
629{
630 struct device *parent = NULL;
631 int i2c0_devs;
632 int i;
633
634 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
635
636 mop500_pinmaps_init();
637 parent = u8500_init_devices();
638
639 /* FIXME: parent of ab8500 should be prcmu */
640 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
641 mop500_platform_devs[i]->dev.parent = parent;
642
643 platform_add_devices(mop500_platform_devs,
644 ARRAY_SIZE(mop500_platform_devs));
645
646 mop500_i2c_init(parent);
647 mop500_sdi_init(parent);
648 mop500_spi_init(parent);
649 mop500_msp_init(parent);
650 mop500_uart_init(parent);
651
652 u8500_cryp1_hash1_init(parent);
653
654 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
655
656 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
657 i2c_register_board_info(2, mop500_i2c2_devices,
658 ARRAY_SIZE(mop500_i2c2_devices));
659
660 /* This board has full regulator constraints */
661 regulator_has_full_constraints();
662
663 mop500_uib_init();
664}
665
666static void __init snowball_init_machine(void)
667{
668 struct device *parent = NULL;
669 int i;
670
671 snowball_pinmaps_init();
672 parent = u8500_init_devices();
673
674 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
675 snowball_platform_devs[i]->dev.parent = parent;
676
677 platform_add_devices(snowball_platform_devs,
678 ARRAY_SIZE(snowball_platform_devs));
679
680 mop500_i2c_init(parent);
681 snowball_sdi_init(parent);
682 mop500_spi_init(parent);
683 mop500_msp_init(parent);
684 mop500_uart_init(parent);
685
686 /* This board has full regulator constraints */
687 regulator_has_full_constraints();
688}
689
690static void __init hrefv60_init_machine(void)
691{
692 struct device *parent = NULL;
693 int i2c0_devs;
694 int i;
695
696 /*
697 * The HREFv60 board removed a GPIO expander and routed
698 * all these GPIO pins to the internal GPIO controller
699 * instead.
700 */
701 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
702
703 hrefv60_pinmaps_init();
704 parent = u8500_init_devices();
705
706 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
707 mop500_platform_devs[i]->dev.parent = parent;
708
709 platform_add_devices(mop500_platform_devs,
710 ARRAY_SIZE(mop500_platform_devs));
711
712 mop500_i2c_init(parent);
713 hrefv60_sdi_init(parent);
714 mop500_spi_init(parent);
715 mop500_msp_init(parent);
716 mop500_uart_init(parent);
717
718 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
719
720 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
721
722 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
723 i2c_register_board_info(2, mop500_i2c2_devices,
724 ARRAY_SIZE(mop500_i2c2_devices));
725
726 /* This board has full regulator constraints */
727 regulator_has_full_constraints();
728
729 mop500_uib_init();
730}
731
732MACHINE_START(U8500, "ST-Ericsson MOP500 platform")
733 /* Maintainer: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> */
734 .atag_offset = 0x100,
735 .map_io = u8500_map_io,
736 .init_irq = ux500_init_irq,
737 /* we re-use nomadik timer here */
738 .timer = &ux500_timer,
739 .handle_irq = gic_handle_irq,
740 .init_machine = mop500_init_machine,
741 .init_late = ux500_init_late,
742MACHINE_END
743
744MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
745 .atag_offset = 0x100,
746 .map_io = u8500_map_io,
747 .init_irq = ux500_init_irq,
748 .timer = &ux500_timer,
749 .handle_irq = gic_handle_irq,
750 .init_machine = hrefv60_init_machine,
751 .init_late = ux500_init_late,
752MACHINE_END
753
754MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
755 .atag_offset = 0x100,
756 .map_io = u8500_map_io,
757 .init_irq = ux500_init_irq,
758 /* we re-use nomadik timer here */
759 .timer = &ux500_timer,
760 .handle_irq = gic_handle_irq,
761 .init_machine = snowball_init_machine,
762 .init_late = ux500_init_late,
763MACHINE_END
764
765#ifdef CONFIG_MACH_UX500_DT
766
767static struct platform_device *snowball_of_platform_devs[] __initdata = {
768 &snowball_led_dev,
769 &snowball_key_dev,
770};
771
772struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
773 /* Requires DMA and call-back bindings. */
774 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
775 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
776 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
777 /* Requires DMA bindings. */
778 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
779 /* Requires clock name bindings. */
780 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e000, "gpio.0", NULL),
781 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8012e080, "gpio.1", NULL),
782 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e000, "gpio.2", NULL),
783 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e080, "gpio.3", NULL),
784 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e100, "gpio.4", NULL),
785 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8000e180, "gpio.5", NULL),
786 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e000, "gpio.6", NULL),
787 OF_DEV_AUXDATA("st,nomadik-gpio", 0x8011e080, "gpio.7", NULL),
788 OF_DEV_AUXDATA("st,nomadik-gpio", 0xa03fe000, "gpio.8", NULL),
789 /* Requires device name bindings. */
790 OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
791 {},
792};
793
794static const struct of_device_id u8500_local_bus_nodes[] = {
795 /* only create devices below soc node */
796 { .compatible = "stericsson,db8500", },
797 { .compatible = "stericsson,db8500-prcmu", },
798 { .compatible = "stericsson,db8500-prcmu-regulator", },
799 { .compatible = "stericsson,ab8500", },
800 { .compatible = "stericsson,ab8500-regulator", },
801 { .compatible = "simple-bus"},
802 { },
803};
804
805static void __init u8500_init_machine(void)
806{
807 struct device *parent = NULL;
808 int i2c0_devs;
809 int i;
810
811 /* Pinmaps must be in place before devices register */
812 if (of_machine_is_compatible("st-ericsson,mop500"))
813 mop500_pinmaps_init();
814 else if (of_machine_is_compatible("calaosystems,snowball-a9500"))
815 snowball_pinmaps_init();
816 else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
817 hrefv60_pinmaps_init();
818
819 parent = u8500_of_init_devices();
820
821 for (i = 0; i < ARRAY_SIZE(mop500_platform_devs); i++)
822 mop500_platform_devs[i]->dev.parent = parent;
823 for (i = 0; i < ARRAY_SIZE(snowball_platform_devs); i++)
824 snowball_platform_devs[i]->dev.parent = parent;
825
826 /* automatically probe child nodes of db8500 device */
827 of_platform_populate(NULL, u8500_local_bus_nodes, u8500_auxdata_lookup, parent);
828
829 if (of_machine_is_compatible("st-ericsson,mop500")) {
830 mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
831
832 platform_add_devices(mop500_platform_devs,
833 ARRAY_SIZE(mop500_platform_devs));
834
835 mop500_sdi_init(parent);
836 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
837 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
838 i2c_register_board_info(2, mop500_i2c2_devices,
839 ARRAY_SIZE(mop500_i2c2_devices));
840
841 mop500_uib_init();
842
843 } else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
844 /*
845 * Devices to be DT:ed:
846 * snowball_led_dev = todo
847 * snowball_key_dev = todo
848 * snowball_sbnet_dev = done
849 * ab8500_device = done
850 */
851 platform_add_devices(snowball_of_platform_devs,
852 ARRAY_SIZE(snowball_of_platform_devs));
853
854 snowball_sdi_init(parent);
855 } else if (of_machine_is_compatible("st-ericsson,hrefv60+")) {
856 /*
857 * The HREFv60 board removed a GPIO expander and routed
858 * all these GPIO pins to the internal GPIO controller
859 * instead.
860 */
861 mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
862 platform_add_devices(mop500_platform_devs,
863 ARRAY_SIZE(mop500_platform_devs));
864
865 hrefv60_sdi_init(parent);
866
867 i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
868 i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
869
870 i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
871 i2c_register_board_info(2, mop500_i2c2_devices,
872 ARRAY_SIZE(mop500_i2c2_devices));
873
874 mop500_uib_init();
875 }
876 mop500_i2c_init(parent);
877
878 /* This board has full regulator constraints */
879 regulator_has_full_constraints();
880}
881
882static const char * u8500_dt_board_compat[] = {
883 "calaosystems,snowball-a9500",
884 "st-ericsson,hrefv60+",
885 "st-ericsson,u8500",
886 "st-ericsson,mop500",
887 NULL,
888};
889
890
891DT_MACHINE_START(U8500_DT, "ST-Ericsson U8500 platform (Device Tree Support)")
892 .map_io = u8500_map_io,
893 .init_irq = ux500_init_irq,
894 /* we re-use nomadik timer here */
895 .timer = &ux500_timer,
896 .handle_irq = gic_handle_irq,
897 .init_machine = u8500_init_machine,
898 .init_late = ux500_init_late,
899 .dt_compat = u8500_dt_board_compat,
900MACHINE_END
901#endif