1/*
  2 * arch/arm/mach-tegra/board-trimslice.c
  3 *
  4 * Copyright (C) 2011 CompuLab, Ltd.
  5 * Author: Mike Rapoport <mike@compulab.co.il>
  6 *
  7 * Based on board-harmony.c
  8 * Copyright (C) 2010 Google, Inc.
  9 *
 10 * This software is licensed under the terms of the GNU General Public
 11 * License version 2, as published by the Free Software Foundation, and
 12 * may be copied, distributed, and modified under those terms.
 13 *
 14 * This program is distributed in the hope that it will be useful,
 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 17 * GNU General Public License for more details.
 18 *
 19 */
 20
 21#include <linux/kernel.h>
 22#include <linux/init.h>
 23#include <linux/platform_device.h>
 24#include <linux/serial_8250.h>
 25#include <linux/of_serial.h>
 26#include <linux/io.h>
 27#include <linux/i2c.h>
 28#include <linux/gpio.h>
 29#include <linux/platform_data/tegra_usb.h>
 30
 31#include <asm/hardware/gic.h>
 32#include <asm/mach-types.h>
 33#include <asm/mach/arch.h>
 34#include <asm/setup.h>
 35
 36#include <mach/iomap.h>
 37#include <mach/sdhci.h>
 38
 39#include "board.h"
 40#include "clock.h"
 41#include "devices.h"
 42#include "gpio-names.h"
 43
 44#include "board-trimslice.h"
 45
 46static struct plat_serial8250_port debug_uart_platform_data[] = {
 47	{
 48		.membase	= IO_ADDRESS(TEGRA_UARTA_BASE),
 49		.mapbase	= TEGRA_UARTA_BASE,
 50		.irq		= INT_UARTA,
 51		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,
 52		.type		= PORT_TEGRA,
 53		.handle_break	= tegra_serial_handle_break,
 54		.iotype		= UPIO_MEM,
 55		.regshift	= 2,
 56		.uartclk	= 216000000,
 57	}, {
 58		.flags		= 0
 59	}
 60};
 61
 62static struct platform_device debug_uart = {
 63	.name	= "serial8250",
 64	.id	= PLAT8250_DEV_PLATFORM,
 65	.dev	= {
 66		.platform_data	= debug_uart_platform_data,
 67	},
 68};
 69static struct tegra_sdhci_platform_data sdhci_pdata1 = {
 70	.cd_gpio	= -1,
 71	.wp_gpio	= -1,
 72	.power_gpio	= -1,
 73};
 74
 75static struct tegra_sdhci_platform_data sdhci_pdata4 = {
 76	.cd_gpio	= TRIMSLICE_GPIO_SD4_CD,
 77	.wp_gpio	= TRIMSLICE_GPIO_SD4_WP,
 78	.power_gpio	= -1,
 79};
 80
 81static struct platform_device trimslice_audio_device = {
 82	.name	= "tegra-snd-trimslice",
 83	.id	= 0,
 84};
 85
 86static struct platform_device *trimslice_devices[] __initdata = {
 87	&debug_uart,
 88	&tegra_sdhci_device1,
 89	&tegra_sdhci_device4,
 90	&tegra_i2s_device1,
 91	&tegra_das_device,
 92	&trimslice_audio_device,
 93};
 94
 95static struct i2c_board_info trimslice_i2c3_board_info[] = {
 96	{
 97		I2C_BOARD_INFO("tlv320aic23", 0x1a),
 98	},
 99	{
100		I2C_BOARD_INFO("em3027", 0x56),
101	},
102};
103
104static void trimslice_i2c_init(void)
105{
106	platform_device_register(&tegra_i2c_device1);
107	platform_device_register(&tegra_i2c_device2);
108	platform_device_register(&tegra_i2c_device3);
109
110	i2c_register_board_info(2, trimslice_i2c3_board_info,
111				ARRAY_SIZE(trimslice_i2c3_board_info));
112}
113
114static void trimslice_usb_init(void)
115{
116	struct tegra_ehci_platform_data *pdata;
117
118	pdata = tegra_ehci1_device.dev.platform_data;
119	pdata->vbus_gpio = TRIMSLICE_GPIO_USB1_MODE;
120
121	tegra_ehci2_ulpi_phy_config.reset_gpio = TEGRA_GPIO_PV0;
122
123	platform_device_register(&tegra_ehci3_device);
124	platform_device_register(&tegra_ehci2_device);
125	platform_device_register(&tegra_ehci1_device);
126}
127
128static void __init tegra_trimslice_fixup(struct tag *tags, char **cmdline,
129	struct meminfo *mi)
130{
131	mi->nr_banks = 2;
132	mi->bank[0].start = PHYS_OFFSET;
133	mi->bank[0].size = 448 * SZ_1M;
134	mi->bank[1].start = SZ_512M;
135	mi->bank[1].size = SZ_512M;
136}
137
138static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
139	/* name		parent		rate		enabled */
140	{ "uarta",	"pll_p",	216000000,	true },
141	{ "pll_a",	"pll_p_out1",	56448000,	true },
142	{ "pll_a_out0",	"pll_a",	11289600,	true },
143	{ "cdev1",	NULL,		0,		true },
144	{ "i2s1",	"pll_a_out0",	11289600,	false},
145	{ NULL,		NULL,		0,		0},
146};
147
148static int __init tegra_trimslice_pci_init(void)
149{
150	if (!machine_is_trimslice())
151		return 0;
152
153	return tegra_pcie_init(true, true);
154}
155subsys_initcall(tegra_trimslice_pci_init);
156
157static void __init tegra_trimslice_init(void)
158{
159	tegra_clk_init_from_table(trimslice_clk_init_table);
160
161	trimslice_pinmux_init();
162
163	tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
164	tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
165
166	platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
167
168	trimslice_i2c_init();
169	trimslice_usb_init();
170}
171
172MACHINE_START(TRIMSLICE, "trimslice")
173	.atag_offset	= 0x100,
174	.fixup		= tegra_trimslice_fixup,
175	.map_io         = tegra_map_common_io,
176	.init_early	= tegra20_init_early,
177	.init_irq       = tegra_init_irq,
178	.handle_irq	= gic_handle_irq,
179	.timer          = &tegra_timer,
180	.init_machine   = tegra_trimslice_init,
181	.init_late	= tegra_init_late,
182	.restart	= tegra_assert_system_reset,
183MACHINE_END