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1/*
2 * arch/arm/mach-tegra/board-trimslice-pinmux.c
3 *
4 * Copyright (C) 2011 CompuLab, Ltd.
5 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17#include <linux/kernel.h>
18
19#include "board-trimslice.h"
20#include "board-pinmux.h"
21
22static struct pinctrl_map trimslice_map[] = {
23 TEGRA_MAP_MUXCONF("ata", "ide", none, tristate),
24 TEGRA_MAP_MUXCONF("atb", "sdio4", none, driven),
25 TEGRA_MAP_MUXCONF("atc", "nand", none, tristate),
26 TEGRA_MAP_MUXCONF("atd", "gmi", none, tristate),
27 TEGRA_MAP_MUXCONF("ate", "gmi", none, tristate),
28 TEGRA_MAP_MUXCONF("cdev1", "plla_out", none, driven),
29 TEGRA_MAP_MUXCONF("cdev2", "pllp_out4", down, tristate),
30 TEGRA_MAP_MUXCONF("crtp", "crt", none, tristate),
31 TEGRA_MAP_MUXCONF("csus", "vi_sensor_clk", down, tristate),
32 TEGRA_MAP_MUXCONF("dap1", "dap1", none, driven),
33 TEGRA_MAP_MUXCONF("dap2", "dap2", none, tristate),
34 TEGRA_MAP_MUXCONF("dap3", "dap3", none, tristate),
35 TEGRA_MAP_MUXCONF("dap4", "dap4", none, tristate),
36 TEGRA_MAP_MUXCONF("ddc", "i2c2", up, driven),
37 TEGRA_MAP_MUXCONF("dta", "vi", none, tristate),
38 TEGRA_MAP_MUXCONF("dtb", "vi", none, tristate),
39 TEGRA_MAP_MUXCONF("dtc", "vi", none, tristate),
40 TEGRA_MAP_MUXCONF("dtd", "vi", none, tristate),
41 TEGRA_MAP_MUXCONF("dte", "vi", none, tristate),
42 TEGRA_MAP_MUXCONF("dtf", "i2c3", up, driven),
43 TEGRA_MAP_MUXCONF("gma", "sdio4", none, driven),
44 TEGRA_MAP_MUXCONF("gmb", "nand", none, tristate),
45 TEGRA_MAP_MUXCONF("gmc", "sflash", none, driven),
46 TEGRA_MAP_MUXCONF("gmd", "sflash", none, driven),
47 TEGRA_MAP_MUXCONF("gme", "gmi", none, tristate),
48 TEGRA_MAP_MUXCONF("gpu", "uarta", none, driven),
49 TEGRA_MAP_MUXCONF("gpu7", "rtck", none, driven),
50 TEGRA_MAP_MUXCONF("gpv", "pcie", none, driven),
51 TEGRA_MAP_MUXCONF("hdint", "hdmi", na, tristate),
52 TEGRA_MAP_MUXCONF("i2cp", "i2cp", none, tristate),
53 TEGRA_MAP_MUXCONF("irrx", "uartb", up, tristate),
54 TEGRA_MAP_MUXCONF("irtx", "uartb", up, tristate),
55 TEGRA_MAP_MUXCONF("kbca", "kbc", up, tristate),
56 TEGRA_MAP_MUXCONF("kbcb", "kbc", up, tristate),
57 TEGRA_MAP_MUXCONF("kbcc", "kbc", up, tristate),
58 TEGRA_MAP_MUXCONF("kbcd", "kbc", up, tristate),
59 TEGRA_MAP_MUXCONF("kbce", "kbc", up, tristate),
60 TEGRA_MAP_MUXCONF("kbcf", "kbc", up, tristate),
61 TEGRA_MAP_MUXCONF("lcsn", "displaya", na, tristate),
62 TEGRA_MAP_MUXCONF("ld0", "displaya", na, driven),
63 TEGRA_MAP_MUXCONF("ld1", "displaya", na, driven),
64 TEGRA_MAP_MUXCONF("ld10", "displaya", na, driven),
65 TEGRA_MAP_MUXCONF("ld11", "displaya", na, driven),
66 TEGRA_MAP_MUXCONF("ld12", "displaya", na, driven),
67 TEGRA_MAP_MUXCONF("ld13", "displaya", na, driven),
68 TEGRA_MAP_MUXCONF("ld14", "displaya", na, driven),
69 TEGRA_MAP_MUXCONF("ld15", "displaya", na, driven),
70 TEGRA_MAP_MUXCONF("ld16", "displaya", na, driven),
71 TEGRA_MAP_MUXCONF("ld17", "displaya", na, driven),
72 TEGRA_MAP_MUXCONF("ld2", "displaya", na, driven),
73 TEGRA_MAP_MUXCONF("ld3", "displaya", na, driven),
74 TEGRA_MAP_MUXCONF("ld4", "displaya", na, driven),
75 TEGRA_MAP_MUXCONF("ld5", "displaya", na, driven),
76 TEGRA_MAP_MUXCONF("ld6", "displaya", na, driven),
77 TEGRA_MAP_MUXCONF("ld7", "displaya", na, driven),
78 TEGRA_MAP_MUXCONF("ld8", "displaya", na, driven),
79 TEGRA_MAP_MUXCONF("ld9", "displaya", na, driven),
80 TEGRA_MAP_MUXCONF("ldc", "displaya", na, tristate),
81 TEGRA_MAP_MUXCONF("ldi", "displaya", na, driven),
82 TEGRA_MAP_MUXCONF("lhp0", "displaya", na, driven),
83 TEGRA_MAP_MUXCONF("lhp1", "displaya", na, driven),
84 TEGRA_MAP_MUXCONF("lhp2", "displaya", na, driven),
85 TEGRA_MAP_MUXCONF("lhs", "displaya", na, driven),
86 TEGRA_MAP_MUXCONF("lm0", "displaya", na, driven),
87 TEGRA_MAP_MUXCONF("lm1", "displaya", na, tristate),
88 TEGRA_MAP_MUXCONF("lpp", "displaya", na, driven),
89 TEGRA_MAP_MUXCONF("lpw0", "displaya", na, driven),
90 TEGRA_MAP_MUXCONF("lpw1", "displaya", na, tristate),
91 TEGRA_MAP_MUXCONF("lpw2", "displaya", na, driven),
92 TEGRA_MAP_MUXCONF("lsc0", "displaya", na, driven),
93 TEGRA_MAP_MUXCONF("lsc1", "displaya", na, tristate),
94 TEGRA_MAP_MUXCONF("lsck", "displaya", na, tristate),
95 TEGRA_MAP_MUXCONF("lsda", "displaya", na, tristate),
96 TEGRA_MAP_MUXCONF("lsdi", "displaya", na, tristate),
97 TEGRA_MAP_MUXCONF("lspi", "displaya", na, driven),
98 TEGRA_MAP_MUXCONF("lvp0", "displaya", na, tristate),
99 TEGRA_MAP_MUXCONF("lvp1", "displaya", na, driven),
100 TEGRA_MAP_MUXCONF("lvs", "displaya", na, driven),
101 TEGRA_MAP_MUXCONF("owc", "rsvd2", up, tristate),
102 TEGRA_MAP_MUXCONF("pmc", "pwr_on", na, tristate),
103 TEGRA_MAP_MUXCONF("pta", "gmi", none, tristate),
104 TEGRA_MAP_MUXCONF("rm", "i2c1", up, driven),
105 TEGRA_MAP_MUXCONF("sdb", "pwm", na, driven),
106 TEGRA_MAP_MUXCONF("sdc", "pwm", up, driven),
107 TEGRA_MAP_MUXCONF("sdd", "pwm", up, driven),
108 TEGRA_MAP_MUXCONF("sdio1", "sdio1", none, driven),
109 TEGRA_MAP_MUXCONF("slxa", "pcie", none, driven),
110 TEGRA_MAP_MUXCONF("slxc", "sdio3", none, tristate),
111 TEGRA_MAP_MUXCONF("slxd", "sdio3", none, tristate),
112 TEGRA_MAP_MUXCONF("slxk", "pcie", none, driven),
113 TEGRA_MAP_MUXCONF("spdi", "spdif", none, tristate),
114 TEGRA_MAP_MUXCONF("spdo", "spdif", none, tristate),
115 TEGRA_MAP_MUXCONF("spia", "spi2", down, tristate),
116 TEGRA_MAP_MUXCONF("spib", "spi2", down, tristate),
117 TEGRA_MAP_MUXCONF("spic", "spi2", up, tristate),
118 TEGRA_MAP_MUXCONF("spid", "spi1", down, tristate),
119 TEGRA_MAP_MUXCONF("spie", "spi1", up, tristate),
120 TEGRA_MAP_MUXCONF("spif", "spi1", down, tristate),
121 TEGRA_MAP_MUXCONF("spig", "spi2_alt", up, tristate),
122 TEGRA_MAP_MUXCONF("spih", "spi2_alt", up, tristate),
123 TEGRA_MAP_MUXCONF("uaa", "ulpi", up, tristate),
124 TEGRA_MAP_MUXCONF("uab", "ulpi", up, tristate),
125 TEGRA_MAP_MUXCONF("uac", "rsvd2", none, driven),
126 TEGRA_MAP_MUXCONF("uad", "irda", up, tristate),
127 TEGRA_MAP_MUXCONF("uca", "uartc", up, tristate),
128 TEGRA_MAP_MUXCONF("ucb", "uartc", up, tristate),
129 TEGRA_MAP_MUXCONF("uda", "ulpi", none, tristate),
130 TEGRA_MAP_CONF("ck32", none, na),
131 TEGRA_MAP_CONF("ddrc", none, na),
132 TEGRA_MAP_CONF("pmca", none, na),
133 TEGRA_MAP_CONF("pmcb", none, na),
134 TEGRA_MAP_CONF("pmcc", none, na),
135 TEGRA_MAP_CONF("pmcd", none, na),
136 TEGRA_MAP_CONF("pmce", none, na),
137 TEGRA_MAP_CONF("xm2c", none, na),
138 TEGRA_MAP_CONF("xm2d", none, na),
139 TEGRA_MAP_CONF("ls", up, na),
140 TEGRA_MAP_CONF("lc", up, na),
141 TEGRA_MAP_CONF("ld17_0", down, na),
142 TEGRA_MAP_CONF("ld19_18", down, na),
143 TEGRA_MAP_CONF("ld21_20", down, na),
144 TEGRA_MAP_CONF("ld23_22", down, na),
145};
146
147static struct tegra_board_pinmux_conf conf = {
148 .maps = trimslice_map,
149 .map_count = ARRAY_SIZE(trimslice_map),
150};
151
152void trimslice_pinmux_init(void)
153{
154 tegra_board_pinmux_init(&conf, NULL);
155}