1/*
 2 * arch/arm/mach-ixp4xx/nas100d-pci.c
 3 *
 4 * NAS 100d board-level PCI initialization
 5 *
 6 * based on ixdp425-pci.c:
 7 *	Copyright (C) 2002 Intel Corporation.
 8 *	Copyright (C) 2003-2004 MontaVista Software, Inc.
 9 *
10 * Maintainer: http://www.nslu2-linux.org/
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 */
17
18#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/irq.h>
21#include <asm/mach/pci.h>
22#include <asm/mach-types.h>
 
 
23
24#define MAX_DEV		3
25#define IRQ_LINES	3
26
27/* PCI controller GPIO to IRQ pin mappings */
28#define INTA		11
29#define INTB		10
30#define INTC		9
31#define INTD		8
32#define INTE		7
33
34void __init nas100d_pci_preinit(void)
35{
36	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
37	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
38	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
39	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
40	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
41	ixp4xx_pci_preinit();
42}
43
44static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
45{
46	static int pci_irq_table[MAX_DEV][IRQ_LINES] = {
47		{ IXP4XX_GPIO_IRQ(INTA), -1, -1 },
48		{ IXP4XX_GPIO_IRQ(INTB), -1, -1 },
49		{ IXP4XX_GPIO_IRQ(INTC), IXP4XX_GPIO_IRQ(INTD),
50		  IXP4XX_GPIO_IRQ(INTE) },
51	};
52
53	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
54		return pci_irq_table[slot - 1][pin - 1];
55
56	return -1;
57}
58
59struct hw_pci __initdata nas100d_pci = {
60	.nr_controllers = 1,
61	.ops		= &ixp4xx_ops,
62	.preinit	= nas100d_pci_preinit,
63	.setup		= ixp4xx_setup,
64	.map_irq	= nas100d_map_irq,
65};
66
67int __init nas100d_pci_init(void)
68{
69	if (machine_is_nas100d())
70		pci_common_init(&nas100d_pci);
71
72	return 0;
73}
74
75subsys_initcall(nas100d_pci_init);

 1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * arch/arm/mach-ixp4xx/nas100d-pci.c
 4 *
 5 * NAS 100d board-level PCI initialization
 6 *
 7 * based on ixdp425-pci.c:
 8 *	Copyright (C) 2002 Intel Corporation.
 9 *	Copyright (C) 2003-2004 MontaVista Software, Inc.
10 *
11 * Maintainer: http://www.nslu2-linux.org/
 
 
 
 
 
12 */
13
14#include <linux/pci.h>
15#include <linux/init.h>
16#include <linux/irq.h>
17#include <asm/mach/pci.h>
18#include <asm/mach-types.h>
19
20#include "irqs.h"
21
22#define MAX_DEV		3
23#define IRQ_LINES	3
24
25/* PCI controller GPIO to IRQ pin mappings */
26#define INTA		11
27#define INTB		10
28#define INTC		9
29#define INTD		8
30#define INTE		7
31
32void __init nas100d_pci_preinit(void)
33{
34	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
35	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
36	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
37	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
38	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW);
39	ixp4xx_pci_preinit();
40}
41
42static int __init nas100d_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
43{
44	static int pci_irq_table[MAX_DEV][IRQ_LINES] = {
45		{ IXP4XX_GPIO_IRQ(INTA), -1, -1 },
46		{ IXP4XX_GPIO_IRQ(INTB), -1, -1 },
47		{ IXP4XX_GPIO_IRQ(INTC), IXP4XX_GPIO_IRQ(INTD),
48		  IXP4XX_GPIO_IRQ(INTE) },
49	};
50
51	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
52		return pci_irq_table[slot - 1][pin - 1];
53
54	return -1;
55}
56
57struct hw_pci __initdata nas100d_pci = {
58	.nr_controllers = 1,
59	.ops		= &ixp4xx_ops,
60	.preinit	= nas100d_pci_preinit,
61	.setup		= ixp4xx_setup,
62	.map_irq	= nas100d_map_irq,
63};
64
65int __init nas100d_pci_init(void)
66{
67	if (machine_is_nas100d())
68		pci_common_init(&nas100d_pci);
69
70	return 0;
71}
72
73subsys_initcall(nas100d_pci_init);