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v3.5.6
 
 1/*
 2 * arch/arm/mach-ixp4xx/ixdp425-pci.c
 3 *
 4 * IXDP425 board-level PCI initialization
 5 *
 6 * Copyright (C) 2002 Intel Corporation.
 7 * Copyright (C) 2003-2004 MontaVista Software, Inc.
 8 *
 9 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 *
15 */
16
17#include <linux/kernel.h>
18#include <linux/pci.h>
19#include <linux/init.h>
20#include <linux/irq.h>
21#include <linux/delay.h>
22#include <asm/mach/pci.h>
23#include <asm/irq.h>
24#include <mach/hardware.h>
25#include <asm/mach-types.h>
 
 
26
27#define MAX_DEV		4
28#define IRQ_LINES	4
29
30/* PCI controller GPIO to IRQ pin mappings */
31#define INTA		11
32#define INTB		10
33#define INTC		9
34#define INTD		8
35
36
37void __init ixdp425_pci_preinit(void)
38{
39	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
40	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
41	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
42	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
43	ixp4xx_pci_preinit();
44}
45
46static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
47{
48	static int pci_irq_table[IRQ_LINES] = {
49		IXP4XX_GPIO_IRQ(INTA),
50		IXP4XX_GPIO_IRQ(INTB),
51		IXP4XX_GPIO_IRQ(INTC),
52		IXP4XX_GPIO_IRQ(INTD)
53	};
54
55	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
56		return pci_irq_table[(slot + pin - 2) % 4];
57
58	return -1;
59}
60
61struct hw_pci ixdp425_pci __initdata = {
62	.nr_controllers = 1,
63	.ops		= &ixp4xx_ops,
64	.preinit	= ixdp425_pci_preinit,
65	.setup		= ixp4xx_setup,
66	.map_irq	= ixdp425_map_irq,
67};
68
69int __init ixdp425_pci_init(void)
70{
71	if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
72			machine_is_ixdp465() || machine_is_kixrp435())
73		pci_common_init(&ixdp425_pci);
74	return 0;
75}
76
77subsys_initcall(ixdp425_pci_init);
v5.4
 1// SPDX-License-Identifier: GPL-2.0-only
 2/*
 3 * arch/arm/mach-ixp4xx/ixdp425-pci.c
 4 *
 5 * IXDP425 board-level PCI initialization
 6 *
 7 * Copyright (C) 2002 Intel Corporation.
 8 * Copyright (C) 2003-2004 MontaVista Software, Inc.
 9 *
10 * Maintainer: Deepak Saxena <dsaxena@plexity.net>
 
 
 
 
 
11 */
12
13#include <linux/kernel.h>
14#include <linux/pci.h>
15#include <linux/init.h>
16#include <linux/irq.h>
17#include <linux/delay.h>
18#include <asm/mach/pci.h>
19#include <asm/irq.h>
20#include <mach/hardware.h>
21#include <asm/mach-types.h>
22
23#include "irqs.h"
24
25#define MAX_DEV		4
26#define IRQ_LINES	4
27
28/* PCI controller GPIO to IRQ pin mappings */
29#define INTA		11
30#define INTB		10
31#define INTC		9
32#define INTD		8
33
34
35void __init ixdp425_pci_preinit(void)
36{
37	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW);
38	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW);
39	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW);
40	irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW);
41	ixp4xx_pci_preinit();
42}
43
44static int __init ixdp425_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
45{
46	static int pci_irq_table[IRQ_LINES] = {
47		IXP4XX_GPIO_IRQ(INTA),
48		IXP4XX_GPIO_IRQ(INTB),
49		IXP4XX_GPIO_IRQ(INTC),
50		IXP4XX_GPIO_IRQ(INTD)
51	};
52
53	if (slot >= 1 && slot <= MAX_DEV && pin >= 1 && pin <= IRQ_LINES)
54		return pci_irq_table[(slot + pin - 2) % 4];
55
56	return -1;
57}
58
59struct hw_pci ixdp425_pci __initdata = {
60	.nr_controllers = 1,
61	.ops		= &ixp4xx_ops,
62	.preinit	= ixdp425_pci_preinit,
63	.setup		= ixp4xx_setup,
64	.map_irq	= ixdp425_map_irq,
65};
66
67int __init ixdp425_pci_init(void)
68{
69	if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
70			machine_is_ixdp465() || machine_is_kixrp435())
71		pci_common_init(&ixdp425_pci);
72	return 0;
73}
74
75subsys_initcall(ixdp425_pci_init);