1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Copyright (C) 2018 MediaTek Inc.
  4 * Author: Wenzhen Yu <Wenzhen Yu@mediatek.com>
  5 *	   Ryder Lee <ryder.lee@mediatek.com>
  6 */
  7
  8#include <linux/clk-provider.h>
  9#include <linux/of.h>
 10#include <linux/of_address.h>
 11#include <linux/of_device.h>
 12#include <linux/platform_device.h>
 13
 14#include "clk-mtk.h"
 15#include "clk-gate.h"
 16
 17#include <dt-bindings/clock/mt7629-clk.h>
 18
 19#define GATE_ETH(_id, _name, _parent, _shift) {		\
 20		.id = _id,				\
 21		.name = _name,				\
 22		.parent_name = _parent,			\
 23		.regs = &eth_cg_regs,			\
 24		.shift = _shift,			\
 25		.ops = &mtk_clk_gate_ops_no_setclr_inv,	\
 26	}
 27
 28static const struct mtk_gate_regs eth_cg_regs = {
 29	.set_ofs = 0x30,
 30	.clr_ofs = 0x30,
 31	.sta_ofs = 0x30,
 32};
 33
 34static const struct mtk_gate eth_clks[] = {
 35	GATE_ETH(CLK_ETH_FE_EN, "eth_fe_en", "eth2pll", 6),
 36	GATE_ETH(CLK_ETH_GP2_EN, "eth_gp2_en", "txclk_src_pre", 7),
 37	GATE_ETH(CLK_ETH_GP1_EN, "eth_gp1_en", "txclk_src_pre", 8),
 38	GATE_ETH(CLK_ETH_GP0_EN, "eth_gp0_en", "txclk_src_pre", 9),
 39	GATE_ETH(CLK_ETH_ESW_EN, "eth_esw_en", "eth_500m", 16),
 40};
 41
 42static const struct mtk_gate_regs sgmii_cg_regs = {
 43	.set_ofs = 0xE4,
 44	.clr_ofs = 0xE4,
 45	.sta_ofs = 0xE4,
 46};
 47
 48#define GATE_SGMII(_id, _name, _parent, _shift) {	\
 49		.id = _id,				\
 50		.name = _name,				\
 51		.parent_name = _parent,			\
 52		.regs = &sgmii_cg_regs,			\
 53		.shift = _shift,			\
 54		.ops = &mtk_clk_gate_ops_no_setclr_inv,	\
 55	}
 56
 57static const struct mtk_gate sgmii_clks[2][4] = {
 58	{
 59		GATE_SGMII(CLK_SGMII_TX_EN, "sgmii_tx_en",
 60			   "ssusb_tx250m", 2),
 61		GATE_SGMII(CLK_SGMII_RX_EN, "sgmii_rx_en",
 62			   "ssusb_eq_rx250m", 3),
 63		GATE_SGMII(CLK_SGMII_CDR_REF, "sgmii_cdr_ref",
 64			   "ssusb_cdr_ref", 4),
 65		GATE_SGMII(CLK_SGMII_CDR_FB, "sgmii_cdr_fb",
 66			   "ssusb_cdr_fb", 5),
 67	}, {
 68		GATE_SGMII(CLK_SGMII_TX_EN, "sgmii_tx_en1",
 69			   "ssusb_tx250m", 2),
 70		GATE_SGMII(CLK_SGMII_RX_EN, "sgmii_rx_en1",
 71			   "ssusb_eq_rx250m", 3),
 72		GATE_SGMII(CLK_SGMII_CDR_REF, "sgmii_cdr_ref1",
 73			   "ssusb_cdr_ref", 4),
 74		GATE_SGMII(CLK_SGMII_CDR_FB, "sgmii_cdr_fb1",
 75			   "ssusb_cdr_fb", 5),
 76	}
 77};
 78
 79static int clk_mt7629_ethsys_init(struct platform_device *pdev)
 80{
 81	struct clk_onecell_data *clk_data;
 82	struct device_node *node = pdev->dev.of_node;
 83	int r;
 84
 85	clk_data = mtk_alloc_clk_data(CLK_ETH_NR_CLK);
 86
 87	mtk_clk_register_gates(node, eth_clks, CLK_ETH_NR_CLK, clk_data);
 88
 89	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
 90	if (r)
 91		dev_err(&pdev->dev,
 92			"could not register clock provider: %s: %d\n",
 93			pdev->name, r);
 94
 95	mtk_register_reset_controller(node, 1, 0x34);
 96
 97	return r;
 98}
 99
100static int clk_mt7629_sgmiisys_init(struct platform_device *pdev)
101{
102	struct clk_onecell_data *clk_data;
103	struct device_node *node = pdev->dev.of_node;
104	static int id;
105	int r;
106
107	clk_data = mtk_alloc_clk_data(CLK_SGMII_NR_CLK);
108
109	mtk_clk_register_gates(node, sgmii_clks[id++], CLK_SGMII_NR_CLK,
110			       clk_data);
111
112	r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
113	if (r)
114		dev_err(&pdev->dev,
115			"could not register clock provider: %s: %d\n",
116			pdev->name, r);
117
118	return r;
119}
120
121static const struct of_device_id of_match_clk_mt7629_eth[] = {
122	{
123		.compatible = "mediatek,mt7629-ethsys",
124		.data = clk_mt7629_ethsys_init,
125	}, {
126		.compatible = "mediatek,mt7629-sgmiisys",
127		.data = clk_mt7629_sgmiisys_init,
128	}, {
129		/* sentinel */
130	}
131};
132
133static int clk_mt7629_eth_probe(struct platform_device *pdev)
134{
135	int (*clk_init)(struct platform_device *);
136	int r;
137
138	clk_init = of_device_get_match_data(&pdev->dev);
139	if (!clk_init)
140		return -EINVAL;
141
142	r = clk_init(pdev);
143	if (r)
144		dev_err(&pdev->dev,
145			"could not register clock provider: %s: %d\n",
146			pdev->name, r);
147
148	return r;
149}
150
151static struct platform_driver clk_mt7629_eth_drv = {
152	.probe = clk_mt7629_eth_probe,
153	.driver = {
154		.name = "clk-mt7629-eth",
155		.of_match_table = of_match_clk_mt7629_eth,
156	},
157};
158
159builtin_platform_driver(clk_mt7629_eth_drv);