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1# ==========================================================================
2# Building
3# ==========================================================================
4
5src := $(obj)
6
7PHONY := __build
8__build:
9
10# Init all relevant variables used in kbuild files so
11# 1) they have correct type
12# 2) they do not inherit any value from the environment
13obj-y :=
14obj-m :=
15lib-y :=
16lib-m :=
17always :=
18targets :=
19subdir-y :=
20subdir-m :=
21EXTRA_AFLAGS :=
22EXTRA_CFLAGS :=
23EXTRA_CPPFLAGS :=
24EXTRA_LDFLAGS :=
25asflags-y :=
26ccflags-y :=
27cppflags-y :=
28ldflags-y :=
29
30subdir-asflags-y :=
31subdir-ccflags-y :=
32
33# Read auto.conf if it exists, otherwise ignore
34-include include/config/auto.conf
35
36include scripts/Kbuild.include
37
38# For backward compatibility check that these variables do not change
39save-cflags := $(CFLAGS)
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46# If the save-* variables changed error out
47ifeq ($(KBUILD_NOPEDANTIC),)
48 ifneq ("$(save-cflags)","$(CFLAGS)")
49 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use ccflags-y)
50 endif
51endif
52
53#
54# make W=... settings
55#
56# W=1 - warnings that may be relevant and does not occur too often
57# W=2 - warnings that occur quite often but may still be relevant
58# W=3 - the more obscure warnings, can most likely be ignored
59#
60# $(call cc-option, -W...) handles gcc -W.. options which
61# are not supported by all versions of the compiler
62ifdef KBUILD_ENABLE_EXTRA_GCC_CHECKS
63warning- := $(empty)
64
65warning-1 := -Wextra -Wunused -Wno-unused-parameter
66warning-1 += -Wmissing-declarations
67warning-1 += -Wmissing-format-attribute
68warning-1 += -Wmissing-prototypes
69warning-1 += -Wold-style-definition
70warning-1 += $(call cc-option, -Wmissing-include-dirs)
71warning-1 += $(call cc-option, -Wunused-but-set-variable)
72warning-1 += $(call cc-disable-warning, missing-field-initializers)
73
74warning-2 := -Waggregate-return
75warning-2 += -Wcast-align
76warning-2 += -Wdisabled-optimization
77warning-2 += -Wnested-externs
78warning-2 += -Wshadow
79warning-2 += $(call cc-option, -Wlogical-op)
80warning-2 += $(call cc-option, -Wmissing-field-initializers)
81
82warning-3 := -Wbad-function-cast
83warning-3 += -Wcast-qual
84warning-3 += -Wconversion
85warning-3 += -Wpacked
86warning-3 += -Wpadded
87warning-3 += -Wpointer-arith
88warning-3 += -Wredundant-decls
89warning-3 += -Wswitch-default
90warning-3 += $(call cc-option, -Wpacked-bitfield-compat)
91warning-3 += $(call cc-option, -Wvla)
92
93warning := $(warning-$(findstring 1, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
94warning += $(warning-$(findstring 2, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
95warning += $(warning-$(findstring 3, $(KBUILD_ENABLE_EXTRA_GCC_CHECKS)))
96
97ifeq ("$(strip $(warning))","")
98 $(error W=$(KBUILD_ENABLE_EXTRA_GCC_CHECKS) is unknown)
99endif
100
101KBUILD_CFLAGS += $(warning)
102endif
103
104include scripts/Makefile.lib
105
106ifdef host-progs
107ifneq ($(hostprogs-y),$(host-progs))
108$(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
109hostprogs-y += $(host-progs)
110endif
111endif
112
113# Do not include host rules unless needed
114ifneq ($(hostprogs-y)$(hostprogs-m),)
115include scripts/Makefile.host
116endif
117
118ifneq ($(KBUILD_SRC),)
119# Create output directory if not already present
120_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
121
122# Create directories for object files if directory does not exist
123# Needed when obj-y := dir/file.o syntax is used
124_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
125endif
126
127ifndef obj
128$(warning kbuild: Makefile.build is included improperly)
129endif
130
131# ===========================================================================
132
133ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
134lib-target := $(obj)/lib.a
135endif
136
137ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(subdir-m) $(lib-target)),)
138builtin-target := $(obj)/built-in.o
139endif
140
141modorder-target := $(obj)/modules.order
142
143# We keep a list of all modules in $(MODVERDIR)
144
145__build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
146 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
147 $(subdir-ym) $(always)
148 @:
149
150# Linus' kernel sanity checking tool
151ifneq ($(KBUILD_CHECKSRC),0)
152 ifeq ($(KBUILD_CHECKSRC),2)
153 quiet_cmd_force_checksrc = CHECK $<
154 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
155 else
156 quiet_cmd_checksrc = CHECK $<
157 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
158 endif
159endif
160
161# Do section mismatch analysis for each module/built-in.o
162ifdef CONFIG_DEBUG_SECTION_MISMATCH
163 cmd_secanalysis = ; scripts/mod/modpost $@
164endif
165
166# Compile C sources (.c)
167# ---------------------------------------------------------------------------
168
169# Default is built-in, unless we know otherwise
170modkern_cflags = \
171 $(if $(part-of-module), \
172 $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
173 $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
174quiet_modtag := $(empty) $(empty)
175
176$(real-objs-m) : part-of-module := y
177$(real-objs-m:.o=.i) : part-of-module := y
178$(real-objs-m:.o=.s) : part-of-module := y
179$(real-objs-m:.o=.lst): part-of-module := y
180
181$(real-objs-m) : quiet_modtag := [M]
182$(real-objs-m:.o=.i) : quiet_modtag := [M]
183$(real-objs-m:.o=.s) : quiet_modtag := [M]
184$(real-objs-m:.o=.lst): quiet_modtag := [M]
185
186$(obj-m) : quiet_modtag := [M]
187
188# Default for not multi-part modules
189modname = $(basetarget)
190
191$(multi-objs-m) : modname = $(modname-multi)
192$(multi-objs-m:.o=.i) : modname = $(modname-multi)
193$(multi-objs-m:.o=.s) : modname = $(modname-multi)
194$(multi-objs-m:.o=.lst) : modname = $(modname-multi)
195$(multi-objs-y) : modname = $(modname-multi)
196$(multi-objs-y:.o=.i) : modname = $(modname-multi)
197$(multi-objs-y:.o=.s) : modname = $(modname-multi)
198$(multi-objs-y:.o=.lst) : modname = $(modname-multi)
199
200quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
201cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
202
203$(obj)/%.s: $(src)/%.c FORCE
204 $(call if_changed_dep,cc_s_c)
205
206quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
207cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
208
209$(obj)/%.i: $(src)/%.c FORCE
210 $(call if_changed_dep,cc_i_c)
211
212cmd_gensymtypes = \
213 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
214 $(GENKSYMS) $(if $(1), -T $(2)) -a $(ARCH) \
215 $(if $(KBUILD_PRESERVE),-p) \
216 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
217
218quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
219cmd_cc_symtypes_c = \
220 set -e; \
221 $(call cmd_gensymtypes,true,$@) >/dev/null; \
222 test -s $@ || rm -f $@
223
224$(obj)/%.symtypes : $(src)/%.c FORCE
225 $(call cmd,cc_symtypes_c)
226
227# C (.c) files
228# The C file is compiled and updated dependency information is generated.
229# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
230
231quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
232
233ifndef CONFIG_MODVERSIONS
234cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
235
236else
237# When module versioning is enabled the following steps are executed:
238# o compile a .tmp_<file>.o from <file>.c
239# o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
240# not export symbols, we just rename .tmp_<file>.o to <file>.o and
241# are done.
242# o otherwise, we calculate symbol versions using the good old
243# genksyms on the preprocessed source and postprocess them in a way
244# that they are usable as a linker script
245# o generate <file>.o from .tmp_<file>.o using the linker to
246# replace the unresolved symbols __crc_exported_symbol with
247# the actual value of the checksum generated by genksyms
248
249cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
250cmd_modversions = \
251 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
252 $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
253 > $(@D)/.tmp_$(@F:.o=.ver); \
254 \
255 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
256 -T $(@D)/.tmp_$(@F:.o=.ver); \
257 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
258 else \
259 mv -f $(@D)/.tmp_$(@F) $@; \
260 fi;
261endif
262
263ifdef CONFIG_FTRACE_MCOUNT_RECORD
264ifdef BUILD_C_RECORDMCOUNT
265ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
266 RECORDMCOUNT_FLAGS = -w
267endif
268# Due to recursion, we must skip empty.o.
269# The empty.o file is created in the make process in order to determine
270# the target endianness and word size. It is made before all other C
271# files, including recordmcount.
272sub_cmd_record_mcount = \
273 if [ $(@) != "scripts/mod/empty.o" ]; then \
274 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
275 fi;
276recordmcount_source := $(srctree)/scripts/recordmcount.c \
277 $(srctree)/scripts/recordmcount.h
278else
279sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
280 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
281 "$(if $(CONFIG_64BIT),64,32)" \
282 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CFLAGS)" \
283 "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
284 "$(if $(part-of-module),1,0)" "$(@)";
285recordmcount_source := $(srctree)/scripts/recordmcount.pl
286endif
287cmd_record_mcount = \
288 if [ "$(findstring -pg,$(_c_flags))" = "-pg" ]; then \
289 $(sub_cmd_record_mcount) \
290 fi;
291endif
292
293define rule_cc_o_c
294 $(call echo-cmd,checksrc) $(cmd_checksrc) \
295 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
296 $(cmd_modversions) \
297 $(call echo-cmd,record_mcount) \
298 $(cmd_record_mcount) \
299 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
300 $(dot-target).tmp; \
301 rm -f $(depfile); \
302 mv -f $(dot-target).tmp $(dot-target).cmd
303endef
304
305# Built-in and composite module parts
306$(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
307 $(call cmd,force_checksrc)
308 $(call if_changed_rule,cc_o_c)
309
310# Single-part modules are special since we need to mark them in $(MODVERDIR)
311
312$(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
313 $(call cmd,force_checksrc)
314 $(call if_changed_rule,cc_o_c)
315 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
316
317quiet_cmd_cc_lst_c = MKLST $@
318 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
319 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
320 System.map $(OBJDUMP) > $@
321
322$(obj)/%.lst: $(src)/%.c FORCE
323 $(call if_changed_dep,cc_lst_c)
324
325# Compile assembler sources (.S)
326# ---------------------------------------------------------------------------
327
328modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
329
330$(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
331$(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
332
333quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
334cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
335
336$(obj)/%.s: $(src)/%.S FORCE
337 $(call if_changed_dep,as_s_S)
338
339quiet_cmd_as_o_S = AS $(quiet_modtag) $@
340cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
341
342$(obj)/%.o: $(src)/%.S FORCE
343 $(call if_changed_dep,as_o_S)
344
345targets += $(real-objs-y) $(real-objs-m) $(lib-y)
346targets += $(extra-y) $(MAKECMDGOALS) $(always)
347
348# Linker scripts preprocessor (.lds.S -> .lds)
349# ---------------------------------------------------------------------------
350quiet_cmd_cpp_lds_S = LDS $@
351 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
352 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
353
354$(obj)/%.lds: $(src)/%.lds.S FORCE
355 $(call if_changed_dep,cpp_lds_S)
356
357# Build the compiled-in targets
358# ---------------------------------------------------------------------------
359
360# To build objects in subdirs, we need to descend into the directories
361$(sort $(subdir-obj-y)): $(subdir-ym) ;
362
363#
364# Rule to compile a set of .o files into one .o file
365#
366ifdef builtin-target
367quiet_cmd_link_o_target = LD $@
368# If the list of objects to link is empty, just create an empty built-in.o
369cmd_link_o_target = $(if $(strip $(obj-y)),\
370 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
371 $(cmd_secanalysis),\
372 rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@)
373
374$(builtin-target): $(obj-y) FORCE
375 $(call if_changed,link_o_target)
376
377targets += $(builtin-target)
378endif # builtin-target
379
380#
381# Rule to create modules.order file
382#
383# Create commands to either record .ko file or cat modules.order from
384# a subdirectory
385modorder-cmds = \
386 $(foreach m, $(modorder), \
387 $(if $(filter %/modules.order, $m), \
388 cat $m;, echo kernel/$m;))
389
390$(modorder-target): $(subdir-ym) FORCE
391 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
392
393#
394# Rule to compile a set of .o files into one .a file
395#
396ifdef lib-target
397quiet_cmd_link_l_target = AR $@
398cmd_link_l_target = rm -f $@; $(AR) rcs$(KBUILD_ARFLAGS) $@ $(lib-y)
399
400$(lib-target): $(lib-y) FORCE
401 $(call if_changed,link_l_target)
402
403targets += $(lib-target)
404endif
405
406#
407# Rule to link composite objects
408#
409# Composite objects are specified in kbuild makefile as follows:
410# <composite-object>-objs := <list of .o files>
411# or
412# <composite-object>-y := <list of .o files>
413link_multi_deps = \
414$(filter $(addprefix $(obj)/, \
415$($(subst $(obj)/,,$(@:.o=-objs))) \
416$($(subst $(obj)/,,$(@:.o=-y)))), $^)
417
418quiet_cmd_link_multi-y = LD $@
419cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
420
421quiet_cmd_link_multi-m = LD [M] $@
422cmd_link_multi-m = $(cmd_link_multi-y)
423
424# We would rather have a list of rules like
425# foo.o: $(foo-objs)
426# but that's not so easy, so we rather make all composite objects depend
427# on the set of all their parts
428$(multi-used-y) : %.o: $(multi-objs-y) FORCE
429 $(call if_changed,link_multi-y)
430
431$(multi-used-m) : %.o: $(multi-objs-m) FORCE
432 $(call if_changed,link_multi-m)
433 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
434
435targets += $(multi-used-y) $(multi-used-m)
436
437
438# Descending
439# ---------------------------------------------------------------------------
440
441PHONY += $(subdir-ym)
442$(subdir-ym):
443 $(Q)$(MAKE) $(build)=$@
444
445# Add FORCE to the prequisites of a target to force it to be always rebuilt.
446# ---------------------------------------------------------------------------
447
448PHONY += FORCE
449
450FORCE:
451
452# Read all saved command lines and dependencies for the $(targets) we
453# may be building above, using $(if_changed{,_dep}). As an
454# optimization, we don't need to read them if the target does not
455# exist, we will rebuild anyway in that case.
456
457targets := $(wildcard $(sort $(targets)))
458cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
459
460ifneq ($(cmd_files),)
461 include $(cmd_files)
462endif
463
464# Declare the contents of the .PHONY variable as phony. We keep that
465# information in a variable se we can use it in if_changed and friends.
466
467.PHONY: $(PHONY)
1# SPDX-License-Identifier: GPL-2.0
2# ==========================================================================
3# Building
4# ==========================================================================
5
6src := $(obj)
7
8PHONY := __build
9__build:
10
11# Init all relevant variables used in kbuild files so
12# 1) they have correct type
13# 2) they do not inherit any value from the environment
14obj-y :=
15obj-m :=
16lib-y :=
17lib-m :=
18always-y :=
19always-m :=
20targets :=
21subdir-y :=
22subdir-m :=
23EXTRA_AFLAGS :=
24EXTRA_CFLAGS :=
25EXTRA_CPPFLAGS :=
26EXTRA_LDFLAGS :=
27asflags-y :=
28ccflags-y :=
29cppflags-y :=
30ldflags-y :=
31
32subdir-asflags-y :=
33subdir-ccflags-y :=
34
35# Read auto.conf if it exists, otherwise ignore
36-include include/config/auto.conf
37
38include $(srctree)/scripts/Kbuild.include
39include $(srctree)/scripts/Makefile.compiler
40
41# The filename Kbuild has precedence over Makefile
42kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
43kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
44include $(kbuild-file)
45
46include $(srctree)/scripts/Makefile.lib
47
48# Do not include hostprogs rules unless needed.
49# $(sort ...) is used here to remove duplicated words and excessive spaces.
50hostprogs := $(sort $(hostprogs))
51ifneq ($(hostprogs),)
52include $(srctree)/scripts/Makefile.host
53endif
54
55# Do not include userprogs rules unless needed.
56# $(sort ...) is used here to remove duplicated words and excessive spaces.
57userprogs := $(sort $(userprogs))
58ifneq ($(userprogs),)
59include $(srctree)/scripts/Makefile.userprogs
60endif
61
62ifndef obj
63$(warning kbuild: Makefile.build is included improperly)
64endif
65
66ifeq ($(need-modorder),)
67ifneq ($(obj-m),)
68$(warning $(patsubst %.o,'%.ko',$(obj-m)) will not be built even though obj-m is specified.)
69$(warning You cannot use subdir-y/m to visit a module Makefile. Use obj-y/m instead.)
70endif
71endif
72
73# ===========================================================================
74
75# subdir-builtin and subdir-modorder may contain duplications. Use $(sort ...)
76subdir-builtin := $(sort $(filter %/built-in.a, $(real-obj-y)))
77subdir-modorder := $(sort $(filter %/modules.order, $(obj-m)))
78
79targets-for-builtin := $(extra-y)
80
81ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
82targets-for-builtin += $(obj)/lib.a
83endif
84
85ifdef need-builtin
86targets-for-builtin += $(obj)/built-in.a
87endif
88
89targets-for-modules := $(patsubst %.o, %.mod, $(filter %.o, $(obj-m)))
90
91ifdef need-modorder
92targets-for-modules += $(obj)/modules.order
93endif
94
95targets += $(targets-for-builtin) $(targets-for-modules)
96
97# Linus' kernel sanity checking tool
98ifeq ($(KBUILD_CHECKSRC),1)
99 quiet_cmd_checksrc = CHECK $<
100 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $<
101else ifeq ($(KBUILD_CHECKSRC),2)
102 quiet_cmd_force_checksrc = CHECK $<
103 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $<
104endif
105
106ifneq ($(KBUILD_EXTRA_WARN),)
107 cmd_checkdoc = $(srctree)/scripts/kernel-doc -none $<
108endif
109
110# Compile C sources (.c)
111# ---------------------------------------------------------------------------
112
113quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
114 cmd_cc_s_c = $(CC) $(filter-out $(DEBUG_CFLAGS) $(CC_FLAGS_LTO), $(c_flags)) -fverbose-asm -S -o $@ $<
115
116$(obj)/%.s: $(src)/%.c FORCE
117 $(call if_changed_dep,cc_s_c)
118
119quiet_cmd_cpp_i_c = CPP $(quiet_modtag) $@
120cmd_cpp_i_c = $(CPP) $(c_flags) -o $@ $<
121
122$(obj)/%.i: $(src)/%.c FORCE
123 $(call if_changed_dep,cpp_i_c)
124
125# These mirror gensymtypes_S and co below, keep them in synch.
126cmd_gensymtypes_c = \
127 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
128 scripts/genksyms/genksyms $(if $(1), -T $(2)) \
129 $(patsubst y,-R,$(CONFIG_MODULE_REL_CRCS)) \
130 $(if $(KBUILD_PRESERVE),-p) \
131 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
132
133quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
134cmd_cc_symtypes_c = \
135 $(call cmd_gensymtypes_c,true,$@) >/dev/null; \
136 test -s $@ || rm -f $@
137
138$(obj)/%.symtypes : $(src)/%.c FORCE
139 $(call cmd,cc_symtypes_c)
140
141# LLVM assembly
142# Generate .ll files from .c
143quiet_cmd_cc_ll_c = CC $(quiet_modtag) $@
144 cmd_cc_ll_c = $(CC) $(c_flags) -emit-llvm -S -o $@ $<
145
146$(obj)/%.ll: $(src)/%.c FORCE
147 $(call if_changed_dep,cc_ll_c)
148
149# C (.c) files
150# The C file is compiled and updated dependency information is generated.
151# (See cmd_cc_o_c + relevant part of rule_cc_o_c)
152
153quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
154 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
155
156ifdef CONFIG_MODVERSIONS
157# When module versioning is enabled the following steps are executed:
158# o compile a <file>.o from <file>.c
159# o if <file>.o doesn't contain a __ksymtab version, i.e. does
160# not export symbols, it's done.
161# o otherwise, we calculate symbol versions using the good old
162# genksyms on the preprocessed source and postprocess them in a way
163# that they are usable as a linker script
164# o generate .tmp_<file>.o from <file>.o using the linker to
165# replace the unresolved symbols __crc_exported_symbol with
166# the actual value of the checksum generated by genksyms
167# o remove .tmp_<file>.o to <file>.o
168
169ifdef CONFIG_LTO_CLANG
170# Generate .o.symversions files for each .o with exported symbols, and link these
171# to the kernel and/or modules at the end.
172cmd_modversions_c = \
173 if $(NM) $@ 2>/dev/null | grep -q __ksymtab; then \
174 $(call cmd_gensymtypes_c,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
175 > $@.symversions; \
176 fi;
177else
178cmd_modversions_c = \
179 if $(OBJDUMP) -h $@ | grep -q __ksymtab; then \
180 $(call cmd_gensymtypes_c,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
181 > $(@D)/.tmp_$(@F:.o=.ver); \
182 \
183 $(LD) $(KBUILD_LDFLAGS) -r -o $(@D)/.tmp_$(@F) $@ \
184 -T $(@D)/.tmp_$(@F:.o=.ver); \
185 mv -f $(@D)/.tmp_$(@F) $@; \
186 rm -f $(@D)/.tmp_$(@F:.o=.ver); \
187 fi
188endif
189endif
190
191ifdef CONFIG_FTRACE_MCOUNT_USE_RECORDMCOUNT
192# compiler will not generate __mcount_loc use recordmcount or recordmcount.pl
193ifdef BUILD_C_RECORDMCOUNT
194ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
195 RECORDMCOUNT_FLAGS = -w
196endif
197# Due to recursion, we must skip empty.o.
198# The empty.o file is created in the make process in order to determine
199# the target endianness and word size. It is made before all other C
200# files, including recordmcount.
201sub_cmd_record_mcount = \
202 if [ $(@) != "scripts/mod/empty.o" ]; then \
203 $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
204 fi;
205recordmcount_source := $(srctree)/scripts/recordmcount.c \
206 $(srctree)/scripts/recordmcount.h
207else
208sub_cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
209 "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
210 "$(if $(CONFIG_64BIT),64,32)" \
211 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
212 "$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
213 "$(if $(part-of-module),1,0)" "$(@)";
214recordmcount_source := $(srctree)/scripts/recordmcount.pl
215endif # BUILD_C_RECORDMCOUNT
216cmd_record_mcount = $(if $(findstring $(strip $(CC_FLAGS_FTRACE)),$(_c_flags)), \
217 $(sub_cmd_record_mcount))
218endif # CONFIG_FTRACE_MCOUNT_USE_RECORDMCOUNT
219
220ifdef CONFIG_STACK_VALIDATION
221ifndef CONFIG_LTO_CLANG
222
223__objtool_obj := $(objtree)/tools/objtool/objtool
224
225# 'OBJECT_FILES_NON_STANDARD := y': skip objtool checking for a directory
226# 'OBJECT_FILES_NON_STANDARD_foo.o := 'y': skip objtool checking for a file
227# 'OBJECT_FILES_NON_STANDARD_foo.o := 'n': override directory skip for a file
228cmd_objtool = $(if $(patsubst y%,, \
229 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
230 $(__objtool_obj) $(objtool_args) $@)
231objtool_obj = $(if $(patsubst y%,, \
232 $(OBJECT_FILES_NON_STANDARD_$(basetarget).o)$(OBJECT_FILES_NON_STANDARD)n), \
233 $(__objtool_obj))
234
235endif # CONFIG_LTO_CLANG
236endif # CONFIG_STACK_VALIDATION
237
238# Rebuild all objects when objtool changes, or is enabled/disabled.
239objtool_dep = $(objtool_obj) \
240 $(wildcard include/config/ORC_UNWINDER \
241 include/config/STACK_VALIDATION)
242
243ifdef CONFIG_TRIM_UNUSED_KSYMS
244cmd_gen_ksymdeps = \
245 $(CONFIG_SHELL) $(srctree)/scripts/gen_ksymdeps.sh $@ >> $(dot-target).cmd
246
247# List module undefined symbols
248undefined_syms = $(NM) $< | $(AWK) '$$1 == "U" { printf("%s%s", x++ ? " " : "", $$2) }';
249endif
250
251define rule_cc_o_c
252 $(call cmd_and_fixdep,cc_o_c)
253 $(call cmd,gen_ksymdeps)
254 $(call cmd,checksrc)
255 $(call cmd,checkdoc)
256 $(call cmd,objtool)
257 $(call cmd,modversions_c)
258 $(call cmd,record_mcount)
259endef
260
261define rule_as_o_S
262 $(call cmd_and_fixdep,as_o_S)
263 $(call cmd,gen_ksymdeps)
264 $(call cmd,objtool)
265 $(call cmd,modversions_S)
266endef
267
268# Built-in and composite module parts
269.SECONDEXPANSION:
270$(obj)/%.o: $(src)/%.c $(recordmcount_source) $$(objtool_dep) FORCE
271 $(call if_changed_rule,cc_o_c)
272 $(call cmd,force_checksrc)
273
274cmd_mod = { \
275 echo $(if $($*-objs)$($*-y)$($*-m), $(addprefix $(obj)/, $($*-objs) $($*-y) $($*-m)), $(@:.mod=.o)); \
276 $(undefined_syms) echo; \
277 } > $@
278
279$(obj)/%.mod: $(obj)/%.o FORCE
280 $(call if_changed,mod)
281
282quiet_cmd_cc_lst_c = MKLST $@
283 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
284 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
285 System.map $(OBJDUMP) > $@
286
287$(obj)/%.lst: $(src)/%.c FORCE
288 $(call if_changed_dep,cc_lst_c)
289
290# Compile assembler sources (.S)
291# ---------------------------------------------------------------------------
292
293# .S file exports must have their C prototypes defined in asm/asm-prototypes.h
294# or a file that it includes, in order to get versioned symbols. We build a
295# dummy C file that includes asm-prototypes and the EXPORT_SYMBOL lines from
296# the .S file (with trailing ';'), and run genksyms on that, to extract vers.
297#
298# This is convoluted. The .S file must first be preprocessed to run guards and
299# expand names, then the resulting exports must be constructed into plain
300# EXPORT_SYMBOL(symbol); to build our dummy C file, and that gets preprocessed
301# to make the genksyms input.
302#
303# These mirror gensymtypes_c and co above, keep them in synch.
304cmd_gensymtypes_S = \
305 { echo "\#include <linux/kernel.h>" ; \
306 echo "\#include <asm/asm-prototypes.h>" ; \
307 $(CPP) $(a_flags) $< | \
308 grep "\<___EXPORT_SYMBOL\>" | \
309 sed 's/.*___EXPORT_SYMBOL[[:space:]]*\([a-zA-Z0-9_]*\)[[:space:]]*,.*/EXPORT_SYMBOL(\1);/' ; } | \
310 $(CPP) -D__GENKSYMS__ $(c_flags) -xc - | \
311 scripts/genksyms/genksyms $(if $(1), -T $(2)) \
312 $(patsubst y,-R,$(CONFIG_MODULE_REL_CRCS)) \
313 $(if $(KBUILD_PRESERVE),-p) \
314 -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
315
316quiet_cmd_cc_symtypes_S = SYM $(quiet_modtag) $@
317cmd_cc_symtypes_S = \
318 $(call cmd_gensymtypes_S,true,$@) >/dev/null; \
319 test -s $@ || rm -f $@
320
321$(obj)/%.symtypes : $(src)/%.S FORCE
322 $(call cmd,cc_symtypes_S)
323
324
325quiet_cmd_cpp_s_S = CPP $(quiet_modtag) $@
326cmd_cpp_s_S = $(CPP) $(a_flags) -o $@ $<
327
328$(obj)/%.s: $(src)/%.S FORCE
329 $(call if_changed_dep,cpp_s_S)
330
331quiet_cmd_as_o_S = AS $(quiet_modtag) $@
332 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
333
334ifdef CONFIG_ASM_MODVERSIONS
335
336# versioning matches the C process described above, with difference that
337# we parse asm-prototypes.h C header to get function definitions.
338
339cmd_modversions_S = \
340 if $(OBJDUMP) -h $@ | grep -q __ksymtab; then \
341 $(call cmd_gensymtypes_S,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
342 > $(@D)/.tmp_$(@F:.o=.ver); \
343 \
344 $(LD) $(KBUILD_LDFLAGS) -r -o $(@D)/.tmp_$(@F) $@ \
345 -T $(@D)/.tmp_$(@F:.o=.ver); \
346 mv -f $(@D)/.tmp_$(@F) $@; \
347 rm -f $(@D)/.tmp_$(@F:.o=.ver); \
348 fi
349endif
350
351$(obj)/%.o: $(src)/%.S $$(objtool_dep) FORCE
352 $(call if_changed_rule,as_o_S)
353
354targets += $(filter-out $(subdir-builtin), $(real-obj-y))
355targets += $(filter-out $(subdir-modorder), $(real-obj-m))
356targets += $(real-dtb-y) $(lib-y) $(always-y) $(MAKECMDGOALS)
357
358# Linker scripts preprocessor (.lds.S -> .lds)
359# ---------------------------------------------------------------------------
360quiet_cmd_cpp_lds_S = LDS $@
361 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -U$(ARCH) \
362 -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
363
364$(obj)/%.lds: $(src)/%.lds.S FORCE
365 $(call if_changed_dep,cpp_lds_S)
366
367# ASN.1 grammar
368# ---------------------------------------------------------------------------
369quiet_cmd_asn1_compiler = ASN.1 $(basename $@).[ch]
370 cmd_asn1_compiler = $(objtree)/scripts/asn1_compiler $< \
371 $(basename $@).c $(basename $@).h
372
373$(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/scripts/asn1_compiler
374 $(call cmd,asn1_compiler)
375
376# Build the compiled-in targets
377# ---------------------------------------------------------------------------
378
379# To build objects in subdirs, we need to descend into the directories
380$(subdir-builtin): $(obj)/%/built-in.a: $(obj)/% ;
381$(subdir-modorder): $(obj)/%/modules.order: $(obj)/% ;
382
383# combine symversions for later processing
384quiet_cmd_update_lto_symversions = SYMVER $@
385ifeq ($(CONFIG_LTO_CLANG) $(CONFIG_MODVERSIONS),y y)
386 cmd_update_lto_symversions = \
387 rm -f $@.symversions \
388 $(foreach n, $(filter-out FORCE,$^), \
389 $(if $(shell test -s $(n).symversions && echo y), \
390 ; cat $(n).symversions >> $@.symversions))
391else
392 cmd_update_lto_symversions = echo >/dev/null
393endif
394
395#
396# Rule to compile a set of .o files into one .a file (without symbol table)
397#
398
399quiet_cmd_ar_builtin = AR $@
400 cmd_ar_builtin = rm -f $@; $(AR) cDPrST $@ $(real-prereqs)
401
402quiet_cmd_ar_and_symver = AR $@
403 cmd_ar_and_symver = $(cmd_update_lto_symversions); $(cmd_ar_builtin)
404
405$(obj)/built-in.a: $(real-obj-y) FORCE
406 $(call if_changed,ar_and_symver)
407
408#
409# Rule to create modules.order file
410#
411# Create commands to either record .ko file or cat modules.order from
412# a subdirectory
413# Add $(obj-m) as the prerequisite to avoid updating the timestamp of
414# modules.order unless contained modules are updated.
415
416cmd_modules_order = { $(foreach m, $(real-prereqs), \
417 $(if $(filter %/modules.order, $m), cat $m, echo $(patsubst %.o,%.ko,$m));) :; } \
418 | $(AWK) '!x[$$0]++' - > $@
419
420$(obj)/modules.order: $(obj-m) FORCE
421 $(call if_changed,modules_order)
422
423#
424# Rule to compile a set of .o files into one .a file (with symbol table)
425#
426quiet_cmd_ar_lib = AR $@
427 cmd_ar_lib = $(cmd_update_lto_symversions); $(cmd_ar)
428
429$(obj)/lib.a: $(lib-y) FORCE
430 $(call if_changed,ar_lib)
431
432# NOTE:
433# Do not replace $(filter %.o,^) with $(real-prereqs). When a single object
434# module is turned into a multi object module, $^ will contain header file
435# dependencies recorded in the .*.cmd file.
436ifdef CONFIG_LTO_CLANG
437quiet_cmd_link_multi-m = AR [M] $@
438cmd_link_multi-m = \
439 $(cmd_update_lto_symversions); \
440 rm -f $@; \
441 $(AR) cDPrsT $@ $(filter %.o,$^)
442else
443quiet_cmd_link_multi-m = LD [M] $@
444 cmd_link_multi-m = $(LD) $(ld_flags) -r -o $@ $(filter %.o,$^)
445endif
446
447$(multi-obj-m): FORCE
448 $(call if_changed,link_multi-m)
449$(call multi_depend, $(multi-obj-m), .o, -objs -y -m)
450
451targets += $(multi-obj-m)
452targets := $(filter-out $(PHONY), $(targets))
453
454# Add intermediate targets:
455# When building objects with specific suffix patterns, add intermediate
456# targets that the final targets are derived from.
457intermediate_targets = $(foreach sfx, $(2), \
458 $(patsubst %$(strip $(1)),%$(sfx), \
459 $(filter %$(strip $(1)), $(targets))))
460# %.asn1.o <- %.asn1.[ch] <- %.asn1
461# %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
462# %.lex.o <- %.lex.c <- %.l
463# %.tab.o <- %.tab.[ch] <- %.y
464targets += $(call intermediate_targets, .asn1.o, .asn1.c .asn1.h) \
465 $(call intermediate_targets, .dtb.o, .dtb.S .dtb) \
466 $(call intermediate_targets, .lex.o, .lex.c) \
467 $(call intermediate_targets, .tab.o, .tab.c .tab.h)
468
469# Build
470# ---------------------------------------------------------------------------
471
472ifdef single-build
473
474KBUILD_SINGLE_TARGETS := $(filter $(obj)/%, $(KBUILD_SINGLE_TARGETS))
475
476curdir-single := $(sort $(foreach x, $(KBUILD_SINGLE_TARGETS), \
477 $(if $(filter $(x) $(basename $(x)).o, $(targets)), $(x))))
478
479# Handle single targets without any rule: show "Nothing to be done for ..." or
480# "No rule to make target ..." depending on whether the target exists.
481unknown-single := $(filter-out $(addsuffix /%, $(subdir-ym)), \
482 $(filter-out $(curdir-single), $(KBUILD_SINGLE_TARGETS)))
483
484single-subdirs := $(foreach d, $(subdir-ym), \
485 $(if $(filter $(d)/%, $(KBUILD_SINGLE_TARGETS)), $(d)))
486
487__build: $(curdir-single) $(single-subdirs)
488ifneq ($(unknown-single),)
489 $(Q)$(MAKE) -f /dev/null $(unknown-single)
490endif
491 @:
492
493ifeq ($(curdir-single),)
494# Nothing to do in this directory. Do not include any .*.cmd file for speed-up
495targets :=
496else
497targets += $(curdir-single)
498endif
499
500else
501
502__build: $(if $(KBUILD_BUILTIN), $(targets-for-builtin)) \
503 $(if $(KBUILD_MODULES), $(targets-for-modules)) \
504 $(subdir-ym) $(always-y)
505 @:
506
507endif
508
509# Descending
510# ---------------------------------------------------------------------------
511
512PHONY += $(subdir-ym)
513$(subdir-ym):
514 $(Q)$(MAKE) $(build)=$@ \
515 $(if $(filter $@/, $(KBUILD_SINGLE_TARGETS)),single-build=) \
516 need-builtin=$(if $(filter $@/built-in.a, $(subdir-builtin)),1) \
517 need-modorder=$(if $(filter $@/modules.order, $(subdir-modorder)),1)
518
519# Add FORCE to the prequisites of a target to force it to be always rebuilt.
520# ---------------------------------------------------------------------------
521
522PHONY += FORCE
523
524FORCE:
525
526# Read all saved command lines and dependencies for the $(targets) we
527# may be building above, using $(if_changed{,_dep}). As an
528# optimization, we don't need to read them if the target does not
529# exist, we will rebuild anyway in that case.
530
531existing-targets := $(wildcard $(sort $(targets)))
532
533-include $(foreach f,$(existing-targets),$(dir $(f)).$(notdir $(f)).cmd)
534
535# Create directories for object files if they do not exist
536obj-dirs := $(sort $(patsubst %/,%, $(dir $(targets))))
537# If targets exist, their directories apparently exist. Skip mkdir.
538existing-dirs := $(sort $(patsubst %/,%, $(dir $(existing-targets))))
539obj-dirs := $(strip $(filter-out $(existing-dirs), $(obj-dirs)))
540ifneq ($(obj-dirs),)
541$(shell mkdir -p $(obj-dirs))
542endif
543
544.PHONY: $(PHONY)