1/*
  2 *  AMD CPU Microcode Update Driver for Linux
  3 *  Copyright (C) 2008-2011 Advanced Micro Devices Inc.
  4 *
  5 *  Author: Peter Oruba <peter.oruba@amd.com>
  6 *
  7 *  Based on work by:
  8 *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  9 *
 10 *  Maintainers:
 11 *  Andreas Herrmann <andreas.herrmann3@amd.com>
 12 *  Borislav Petkov <borislav.petkov@amd.com>
 13 *
 14 *  This driver allows to upgrade microcode on F10h AMD
 15 *  CPUs and later.
 16 *
 17 *  Licensed under the terms of the GNU General Public
 18 *  License version 2. See file COPYING for details.
 19 */
 20
 21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 22
 23#include <linux/firmware.h>
 24#include <linux/pci_ids.h>
 25#include <linux/uaccess.h>
 26#include <linux/vmalloc.h>
 27#include <linux/kernel.h>
 28#include <linux/module.h>
 29#include <linux/pci.h>
 30
 31#include <asm/microcode.h>
 32#include <asm/processor.h>
 33#include <asm/msr.h>
 34
 35MODULE_DESCRIPTION("AMD Microcode Update Driver");
 36MODULE_AUTHOR("Peter Oruba");
 37MODULE_LICENSE("GPL v2");
 38
 39#define UCODE_MAGIC                0x00414d44
 40#define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
 41#define UCODE_UCODE_TYPE           0x00000001
 42
 43struct equiv_cpu_entry {
 44	u32	installed_cpu;
 45	u32	fixed_errata_mask;
 46	u32	fixed_errata_compare;
 47	u16	equiv_cpu;
 48	u16	res;
 49} __attribute__((packed));
 50
 51struct microcode_header_amd {
 52	u32	data_code;
 53	u32	patch_id;
 54	u16	mc_patch_data_id;
 55	u8	mc_patch_data_len;
 56	u8	init_flag;
 57	u32	mc_patch_data_checksum;
 58	u32	nb_dev_id;
 59	u32	sb_dev_id;
 60	u16	processor_rev_id;
 61	u8	nb_rev_id;
 62	u8	sb_rev_id;
 63	u8	bios_api_rev;
 64	u8	reserved1[3];
 65	u32	match_reg[8];
 66} __attribute__((packed));
 67
 68struct microcode_amd {
 69	struct microcode_header_amd	hdr;
 70	unsigned int			mpb[0];
 71};
 72
 73#define SECTION_HDR_SIZE	8
 74#define CONTAINER_HDR_SZ	12
 75
 76static struct equiv_cpu_entry *equiv_cpu_table;
 77
 78/* page-sized ucode patch buffer */
 79void *patch;
 80
 81static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
 82{
 83	struct cpuinfo_x86 *c = &cpu_data(cpu);
 84
 85	csig->rev = c->microcode;
 86	pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
 87
 88	return 0;
 89}
 90
 91static unsigned int verify_ucode_size(int cpu, u32 patch_size,
 92				      unsigned int size)
 93{
 94	struct cpuinfo_x86 *c = &cpu_data(cpu);
 95	u32 max_size;
 96
 97#define F1XH_MPB_MAX_SIZE 2048
 98#define F14H_MPB_MAX_SIZE 1824
 99#define F15H_MPB_MAX_SIZE 4096
100
101	switch (c->x86) {
102	case 0x14:
103		max_size = F14H_MPB_MAX_SIZE;
104		break;
105	case 0x15:
106		max_size = F15H_MPB_MAX_SIZE;
107		break;
108	default:
109		max_size = F1XH_MPB_MAX_SIZE;
110		break;
111	}
112
113	if (patch_size > min_t(u32, size, max_size)) {
114		pr_err("patch size mismatch\n");
115		return 0;
116	}
117
118	return patch_size;
119}
120
121static u16 find_equiv_id(void)
122{
123	unsigned int current_cpu_id, i = 0;
124
125	BUG_ON(equiv_cpu_table == NULL);
126
127	current_cpu_id = cpuid_eax(0x00000001);
128
129	while (equiv_cpu_table[i].installed_cpu != 0) {
130		if (current_cpu_id == equiv_cpu_table[i].installed_cpu)
131			return equiv_cpu_table[i].equiv_cpu;
132
133		i++;
134	}
135	return 0;
136}
137
138/*
139 * we signal a good patch is found by returning its size > 0
140 */
141static int get_matching_microcode(int cpu, const u8 *ucode_ptr,
142				  unsigned int leftover_size, int rev,
143				  unsigned int *current_size)
144{
145	struct microcode_header_amd *mc_hdr;
146	unsigned int actual_size, patch_size;
147	u16 equiv_cpu_id;
148
149	/* size of the current patch we're staring at */
150	patch_size = *(u32 *)(ucode_ptr + 4);
151	*current_size = patch_size + SECTION_HDR_SIZE;
152
153	equiv_cpu_id = find_equiv_id();
154	if (!equiv_cpu_id)
155		return 0;
156
157	/*
158	 * let's look at the patch header itself now
159	 */
160	mc_hdr = (struct microcode_header_amd *)(ucode_ptr + SECTION_HDR_SIZE);
161
162	if (mc_hdr->processor_rev_id != equiv_cpu_id)
163		return 0;
164
165	/* ucode might be chipset specific -- currently we don't support this */
166	if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
167		pr_err("CPU%d: chipset specific code not yet supported\n",
168		       cpu);
169		return 0;
170	}
171
172	if (mc_hdr->patch_id <= rev)
173		return 0;
174
175	/*
176	 * now that the header looks sane, verify its size
177	 */
178	actual_size = verify_ucode_size(cpu, patch_size, leftover_size);
179	if (!actual_size)
180		return 0;
181
182	/* clear the patch buffer */
183	memset(patch, 0, PAGE_SIZE);
184
185	/* all looks ok, get the binary patch */
186	get_ucode_data(patch, ucode_ptr + SECTION_HDR_SIZE, actual_size);
187
188	return actual_size;
189}
190
191static int apply_microcode_amd(int cpu)
192{
193	u32 rev, dummy;
194	int cpu_num = raw_smp_processor_id();
195	struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
196	struct microcode_amd *mc_amd = uci->mc;
197	struct cpuinfo_x86 *c = &cpu_data(cpu);
198
199	/* We should bind the task to the CPU */
200	BUG_ON(cpu_num != cpu);
201
202	if (mc_amd == NULL)
203		return 0;
204
205	wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
206	/* get patch id after patching */
207	rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
208
209	/* check current patch id and patch's id for match */
210	if (rev != mc_amd->hdr.patch_id) {
211		pr_err("CPU%d: update failed for patch_level=0x%08x\n",
212		       cpu, mc_amd->hdr.patch_id);
213		return -1;
214	}
215
216	pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
217	uci->cpu_sig.rev = rev;
218	c->microcode = rev;
219
220	return 0;
221}
222
223static int install_equiv_cpu_table(const u8 *buf)
224{
225	unsigned int *ibuf = (unsigned int *)buf;
226	unsigned int type = ibuf[1];
227	unsigned int size = ibuf[2];
228
229	if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
230		pr_err("empty section/"
231		       "invalid type field in container file section header\n");
232		return -EINVAL;
233	}
234
235	equiv_cpu_table = vmalloc(size);
236	if (!equiv_cpu_table) {
237		pr_err("failed to allocate equivalent CPU table\n");
238		return -ENOMEM;
239	}
240
241	get_ucode_data(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
242
243	/* add header length */
244	return size + CONTAINER_HDR_SZ;
245}
246
247static void free_equiv_cpu_table(void)
248{
249	vfree(equiv_cpu_table);
250	equiv_cpu_table = NULL;
251}
252
253static enum ucode_state
254generic_load_microcode(int cpu, const u8 *data, size_t size)
255{
256	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
257	struct microcode_header_amd *mc_hdr = NULL;
258	unsigned int mc_size, leftover, current_size = 0;
259	int offset;
260	const u8 *ucode_ptr = data;
261	void *new_mc = NULL;
262	unsigned int new_rev = uci->cpu_sig.rev;
263	enum ucode_state state = UCODE_ERROR;
264
265	offset = install_equiv_cpu_table(ucode_ptr);
266	if (offset < 0) {
267		pr_err("failed to create equivalent cpu table\n");
268		goto out;
269	}
270	ucode_ptr += offset;
271	leftover = size - offset;
272
273	if (*(u32 *)ucode_ptr != UCODE_UCODE_TYPE) {
274		pr_err("invalid type field in container file section header\n");
275		goto free_table;
276	}
277
278	while (leftover) {
279		mc_size = get_matching_microcode(cpu, ucode_ptr, leftover,
280						 new_rev, &current_size);
281		if (mc_size) {
282			mc_hdr  = patch;
283			new_mc  = patch;
284			new_rev = mc_hdr->patch_id;
285			goto out_ok;
286		}
287
288		ucode_ptr += current_size;
289		leftover  -= current_size;
290	}
291
292	if (!new_mc) {
293		state = UCODE_NFOUND;
294		goto free_table;
295	}
296
297out_ok:
298	uci->mc = new_mc;
299	state = UCODE_OK;
300	pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
301		 cpu, uci->cpu_sig.rev, new_rev);
302
303free_table:
304	free_equiv_cpu_table();
305
306out:
307	return state;
308}
309
310/*
311 * AMD microcode firmware naming convention, up to family 15h they are in
312 * the legacy file:
313 *
314 *    amd-ucode/microcode_amd.bin
315 *
316 * This legacy file is always smaller than 2K in size.
317 *
318 * Starting at family 15h they are in family specific firmware files:
319 *
320 *    amd-ucode/microcode_amd_fam15h.bin
321 *    amd-ucode/microcode_amd_fam16h.bin
322 *    ...
323 *
324 * These might be larger than 2K.
325 */
326static enum ucode_state request_microcode_amd(int cpu, struct device *device)
327{
328	char fw_name[36] = "amd-ucode/microcode_amd.bin";
329	const struct firmware *fw;
330	enum ucode_state ret = UCODE_NFOUND;
331	struct cpuinfo_x86 *c = &cpu_data(cpu);
332
333	if (c->x86 >= 0x15)
334		snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
335
336	if (request_firmware(&fw, (const char *)fw_name, device)) {
337		pr_err("failed to load file %s\n", fw_name);
338		goto out;
339	}
340
341	ret = UCODE_ERROR;
342	if (*(u32 *)fw->data != UCODE_MAGIC) {
343		pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
344		goto fw_release;
345	}
346
347	ret = generic_load_microcode(cpu, fw->data, fw->size);
348
349fw_release:
350	release_firmware(fw);
351
352out:
353	return ret;
354}
355
356static enum ucode_state
357request_microcode_user(int cpu, const void __user *buf, size_t size)
358{
359	return UCODE_ERROR;
360}
361
362static void microcode_fini_cpu_amd(int cpu)
363{
364	struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
365
366	uci->mc = NULL;
367}
368
369static struct microcode_ops microcode_amd_ops = {
370	.request_microcode_user           = request_microcode_user,
371	.request_microcode_fw             = request_microcode_amd,
372	.collect_cpu_info                 = collect_cpu_info_amd,
373	.apply_microcode                  = apply_microcode_amd,
374	.microcode_fini_cpu               = microcode_fini_cpu_amd,
375};
376
377struct microcode_ops * __init init_amd_microcode(void)
378{
379	struct cpuinfo_x86 *c = &cpu_data(0);
380
381	if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
382		pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
383		return NULL;
384	}
385
386	patch = (void *)get_zeroed_page(GFP_KERNEL);
387	if (!patch)
388		return NULL;
389
390	return &microcode_amd_ops;
391}
392
393void __exit exit_amd_microcode(void)
394{
395	free_page((unsigned long)patch);
396}