1/*
   2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
   3 *
   4 *   This program is free software; you can redistribute it and/or
   5 *   modify it under the terms of the GNU General Public License
   6 *   as published by the Free Software Foundation, version 2.
   7 *
   8 *   This program is distributed in the hope that it will be useful, but
   9 *   WITHOUT ANY WARRANTY; without even the implied warranty of
  10 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  11 *   NON INFRINGEMENT.  See the GNU General Public License for
  12 *   more details.
  13 */
  14
  15#include <linux/sched.h>
  16#include <linux/kernel.h>
  17#include <linux/mmzone.h>
  18#include <linux/bootmem.h>
  19#include <linux/module.h>
  20#include <linux/node.h>
  21#include <linux/cpu.h>
  22#include <linux/ioport.h>
  23#include <linux/irq.h>
  24#include <linux/kexec.h>
  25#include <linux/pci.h>
 
  26#include <linux/initrd.h>
  27#include <linux/io.h>
  28#include <linux/highmem.h>
  29#include <linux/smp.h>
  30#include <linux/timex.h>
  31#include <linux/hugetlb.h>
  32#include <linux/start_kernel.h>
 
 
  33#include <asm/setup.h>
  34#include <asm/sections.h>
  35#include <asm/cacheflush.h>
  36#include <asm/pgalloc.h>
  37#include <asm/mmu_context.h>
  38#include <hv/hypervisor.h>
  39#include <arch/interrupts.h>
  40
  41/* <linux/smp.h> doesn't provide this definition. */
  42#ifndef CONFIG_SMP
  43#define setup_max_cpus 1
  44#endif
  45
  46static inline int ABS(int x) { return x >= 0 ? x : -x; }
  47
  48/* Chip information */
  49char chip_model[64] __write_once;
  50
 
 
 
 
  51struct pglist_data node_data[MAX_NUMNODES] __read_mostly;
  52EXPORT_SYMBOL(node_data);
  53
  54/* Information on the NUMA nodes that we compute early */
  55unsigned long __cpuinitdata node_start_pfn[MAX_NUMNODES];
  56unsigned long __cpuinitdata node_end_pfn[MAX_NUMNODES];
  57unsigned long __initdata node_memmap_pfn[MAX_NUMNODES];
  58unsigned long __initdata node_percpu_pfn[MAX_NUMNODES];
  59unsigned long __initdata node_free_pfn[MAX_NUMNODES];
  60
  61static unsigned long __initdata node_percpu[MAX_NUMNODES];
  62
  63/*
  64 * per-CPU stack and boot info.
  65 */
  66DEFINE_PER_CPU(unsigned long, boot_sp) =
  67	(unsigned long)init_stack + THREAD_SIZE;
  68
  69#ifdef CONFIG_SMP
  70DEFINE_PER_CPU(unsigned long, boot_pc) = (unsigned long)start_kernel;
  71#else
  72/*
  73 * The variable must be __initdata since it references __init code.
  74 * With CONFIG_SMP it is per-cpu data, which is exempt from validation.
  75 */
  76unsigned long __initdata boot_pc = (unsigned long)start_kernel;
  77#endif
  78
  79#ifdef CONFIG_HIGHMEM
  80/* Page frame index of end of lowmem on each controller. */
  81unsigned long __cpuinitdata node_lowmem_end_pfn[MAX_NUMNODES];
  82
  83/* Number of pages that can be mapped into lowmem. */
  84static unsigned long __initdata mappable_physpages;
  85#endif
  86
  87/* Data on which physical memory controller corresponds to which NUMA node */
  88int node_controller[MAX_NUMNODES] = { [0 ... MAX_NUMNODES-1] = -1 };
  89
  90#ifdef CONFIG_HIGHMEM
  91/* Map information from VAs to PAs */
  92unsigned long pbase_map[1 << (32 - HPAGE_SHIFT)]
  93  __write_once __attribute__((aligned(L2_CACHE_BYTES)));
  94EXPORT_SYMBOL(pbase_map);
  95
  96/* Map information from PAs to VAs */
  97void *vbase_map[NR_PA_HIGHBIT_VALUES]
  98  __write_once __attribute__((aligned(L2_CACHE_BYTES)));
  99EXPORT_SYMBOL(vbase_map);
 100#endif
 101
 102/* Node number as a function of the high PA bits */
 103int highbits_to_node[NR_PA_HIGHBIT_VALUES] __write_once;
 104EXPORT_SYMBOL(highbits_to_node);
 105
 106static unsigned int __initdata maxmem_pfn = -1U;
 107static unsigned int __initdata maxnodemem_pfn[MAX_NUMNODES] = {
 108	[0 ... MAX_NUMNODES-1] = -1U
 109};
 110static nodemask_t __initdata isolnodes;
 111
 112#ifdef CONFIG_PCI
 113enum { DEFAULT_PCI_RESERVE_MB = 64 };
 114static unsigned int __initdata pci_reserve_mb = DEFAULT_PCI_RESERVE_MB;
 115unsigned long __initdata pci_reserve_start_pfn = -1U;
 116unsigned long __initdata pci_reserve_end_pfn = -1U;
 117#endif
 118
 119static int __init setup_maxmem(char *str)
 120{
 121	unsigned long long maxmem;
 122	if (str == NULL || (maxmem = memparse(str, NULL)) == 0)
 123		return -EINVAL;
 124
 125	maxmem_pfn = (maxmem >> HPAGE_SHIFT) << (HPAGE_SHIFT - PAGE_SHIFT);
 126	pr_info("Forcing RAM used to no more than %dMB\n",
 127	       maxmem_pfn >> (20 - PAGE_SHIFT));
 128	return 0;
 129}
 130early_param("maxmem", setup_maxmem);
 131
 132static int __init setup_maxnodemem(char *str)
 133{
 134	char *endp;
 135	unsigned long long maxnodemem;
 136	long node;
 137
 138	node = str ? simple_strtoul(str, &endp, 0) : INT_MAX;
 139	if (node >= MAX_NUMNODES || *endp != ':')
 140		return -EINVAL;
 141
 142	maxnodemem = memparse(endp+1, NULL);
 143	maxnodemem_pfn[node] = (maxnodemem >> HPAGE_SHIFT) <<
 144		(HPAGE_SHIFT - PAGE_SHIFT);
 145	pr_info("Forcing RAM used on node %ld to no more than %dMB\n",
 146	       node, maxnodemem_pfn[node] >> (20 - PAGE_SHIFT));
 147	return 0;
 148}
 149early_param("maxnodemem", setup_maxnodemem);
 150
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 151static int __init setup_isolnodes(char *str)
 152{
 153	char buf[MAX_NUMNODES * 5];
 154	if (str == NULL || nodelist_parse(str, isolnodes) != 0)
 155		return -EINVAL;
 156
 157	nodelist_scnprintf(buf, sizeof(buf), isolnodes);
 158	pr_info("Set isolnodes value to '%s'\n", buf);
 159	return 0;
 160}
 161early_param("isolnodes", setup_isolnodes);
 162
 163#ifdef CONFIG_PCI
 164static int __init setup_pci_reserve(char* str)
 165{
 166	unsigned long mb;
 167
 168	if (str == NULL || strict_strtoul(str, 0, &mb) != 0 ||
 169	    mb > 3 * 1024)
 170		return -EINVAL;
 171
 172	pci_reserve_mb = mb;
 173	pr_info("Reserving %dMB for PCIE root complex mappings\n",
 174	       pci_reserve_mb);
 175	return 0;
 176}
 177early_param("pci_reserve", setup_pci_reserve);
 178#endif
 179
 180#ifndef __tilegx__
 181/*
 182 * vmalloc=size forces the vmalloc area to be exactly 'size' bytes.
 183 * This can be used to increase (or decrease) the vmalloc area.
 184 */
 185static int __init parse_vmalloc(char *arg)
 186{
 187	if (!arg)
 188		return -EINVAL;
 189
 190	VMALLOC_RESERVE = (memparse(arg, &arg) + PGDIR_SIZE - 1) & PGDIR_MASK;
 191
 192	/* See validate_va() for more on this test. */
 193	if ((long)_VMALLOC_START >= 0)
 194		early_panic("\"vmalloc=%#lx\" value too large: maximum %#lx\n",
 195			    VMALLOC_RESERVE, _VMALLOC_END - 0x80000000UL);
 196
 197	return 0;
 198}
 199early_param("vmalloc", parse_vmalloc);
 200#endif
 201
 202#ifdef CONFIG_HIGHMEM
 203/*
 204 * Determine for each controller where its lowmem is mapped and how much of
 205 * it is mapped there.  On controller zero, the first few megabytes are
 206 * already mapped in as code at MEM_SV_INTRPT, so in principle we could
 207 * start our data mappings higher up, but for now we don't bother, to avoid
 208 * additional confusion.
 209 *
 210 * One question is whether, on systems with more than 768 Mb and
 211 * controllers of different sizes, to map in a proportionate amount of
 212 * each one, or to try to map the same amount from each controller.
 213 * (E.g. if we have three controllers with 256MB, 1GB, and 256MB
 214 * respectively, do we map 256MB from each, or do we map 128 MB, 512
 215 * MB, and 128 MB respectively?)  For now we use a proportionate
 216 * solution like the latter.
 217 *
 218 * The VA/PA mapping demands that we align our decisions at 16 MB
 219 * boundaries so that we can rapidly convert VA to PA.
 220 */
 221static void *__init setup_pa_va_mapping(void)
 222{
 223	unsigned long curr_pages = 0;
 224	unsigned long vaddr = PAGE_OFFSET;
 225	nodemask_t highonlynodes = isolnodes;
 226	int i, j;
 227
 228	memset(pbase_map, -1, sizeof(pbase_map));
 229	memset(vbase_map, -1, sizeof(vbase_map));
 230
 231	/* Node zero cannot be isolated for LOWMEM purposes. */
 232	node_clear(0, highonlynodes);
 233
 234	/* Count up the number of pages on non-highonlynodes controllers. */
 235	mappable_physpages = 0;
 236	for_each_online_node(i) {
 237		if (!node_isset(i, highonlynodes))
 238			mappable_physpages +=
 239				node_end_pfn[i] - node_start_pfn[i];
 240	}
 241
 242	for_each_online_node(i) {
 243		unsigned long start = node_start_pfn[i];
 244		unsigned long end = node_end_pfn[i];
 245		unsigned long size = end - start;
 246		unsigned long vaddr_end;
 247
 248		if (node_isset(i, highonlynodes)) {
 249			/* Mark this controller as having no lowmem. */
 250			node_lowmem_end_pfn[i] = start;
 251			continue;
 252		}
 253
 254		curr_pages += size;
 255		if (mappable_physpages > MAXMEM_PFN) {
 256			vaddr_end = PAGE_OFFSET +
 257				(((u64)curr_pages * MAXMEM_PFN /
 258				  mappable_physpages)
 259				 << PAGE_SHIFT);
 260		} else {
 261			vaddr_end = PAGE_OFFSET + (curr_pages << PAGE_SHIFT);
 262		}
 263		for (j = 0; vaddr < vaddr_end; vaddr += HPAGE_SIZE, ++j) {
 264			unsigned long this_pfn =
 265				start + (j << HUGETLB_PAGE_ORDER);
 266			pbase_map[vaddr >> HPAGE_SHIFT] = this_pfn;
 267			if (vbase_map[__pfn_to_highbits(this_pfn)] ==
 268			    (void *)-1)
 269				vbase_map[__pfn_to_highbits(this_pfn)] =
 270					(void *)(vaddr & HPAGE_MASK);
 271		}
 272		node_lowmem_end_pfn[i] = start + (j << HUGETLB_PAGE_ORDER);
 273		BUG_ON(node_lowmem_end_pfn[i] > end);
 274	}
 275
 276	/* Return highest address of any mapped memory. */
 277	return (void *)vaddr;
 278}
 279#endif /* CONFIG_HIGHMEM */
 280
 281/*
 282 * Register our most important memory mappings with the debug stub.
 283 *
 284 * This is up to 4 mappings for lowmem, one mapping per memory
 285 * controller, plus one for our text segment.
 286 */
 287static void __cpuinit store_permanent_mappings(void)
 288{
 289	int i;
 290
 291	for_each_online_node(i) {
 292		HV_PhysAddr pa = ((HV_PhysAddr)node_start_pfn[i]) << PAGE_SHIFT;
 293#ifdef CONFIG_HIGHMEM
 294		HV_PhysAddr high_mapped_pa = node_lowmem_end_pfn[i];
 295#else
 296		HV_PhysAddr high_mapped_pa = node_end_pfn[i];
 297#endif
 298
 299		unsigned long pages = high_mapped_pa - node_start_pfn[i];
 300		HV_VirtAddr addr = (HV_VirtAddr) __va(pa);
 301		hv_store_mapping(addr, pages << PAGE_SHIFT, pa);
 302	}
 303
 304	hv_store_mapping((HV_VirtAddr)_stext,
 305			 (uint32_t)(_einittext - _stext), 0);
 306}
 307
 308/*
 309 * Use hv_inquire_physical() to populate node_{start,end}_pfn[]
 310 * and node_online_map, doing suitable sanity-checking.
 311 * Also set min_low_pfn, max_low_pfn, and max_pfn.
 312 */
 313static void __init setup_memory(void)
 314{
 315	int i, j;
 316	int highbits_seen[NR_PA_HIGHBIT_VALUES] = { 0 };
 317#ifdef CONFIG_HIGHMEM
 318	long highmem_pages;
 319#endif
 320#ifndef __tilegx__
 321	int cap;
 322#endif
 323#if defined(CONFIG_HIGHMEM) || defined(__tilegx__)
 324	long lowmem_pages;
 325#endif
 
 326
 327	/* We are using a char to hold the cpu_2_node[] mapping */
 328	BUILD_BUG_ON(MAX_NUMNODES > 127);
 329
 330	/* Discover the ranges of memory available to us */
 331	for (i = 0; ; ++i) {
 332		unsigned long start, size, end, highbits;
 333		HV_PhysAddrRange range = hv_inquire_physical(i);
 334		if (range.size == 0)
 335			break;
 336#ifdef CONFIG_FLATMEM
 337		if (i > 0) {
 338			pr_err("Can't use discontiguous PAs: %#llx..%#llx\n",
 339			       range.size, range.start + range.size);
 340			continue;
 341		}
 342#endif
 343#ifndef __tilegx__
 344		if ((unsigned long)range.start) {
 345			pr_err("Range not at 4GB multiple: %#llx..%#llx\n",
 346			       range.start, range.start + range.size);
 347			continue;
 348		}
 349#endif
 350		if ((range.start & (HPAGE_SIZE-1)) != 0 ||
 351		    (range.size & (HPAGE_SIZE-1)) != 0) {
 352			unsigned long long start_pa = range.start;
 353			unsigned long long orig_size = range.size;
 354			range.start = (start_pa + HPAGE_SIZE - 1) & HPAGE_MASK;
 355			range.size -= (range.start - start_pa);
 356			range.size &= HPAGE_MASK;
 357			pr_err("Range not hugepage-aligned: %#llx..%#llx:"
 358			       " now %#llx-%#llx\n",
 359			       start_pa, start_pa + orig_size,
 360			       range.start, range.start + range.size);
 361		}
 362		highbits = __pa_to_highbits(range.start);
 363		if (highbits >= NR_PA_HIGHBIT_VALUES) {
 364			pr_err("PA high bits too high: %#llx..%#llx\n",
 365			       range.start, range.start + range.size);
 366			continue;
 367		}
 368		if (highbits_seen[highbits]) {
 369			pr_err("Range overlaps in high bits: %#llx..%#llx\n",
 370			       range.start, range.start + range.size);
 371			continue;
 372		}
 373		highbits_seen[highbits] = 1;
 374		if (PFN_DOWN(range.size) > maxnodemem_pfn[i]) {
 375			int max_size = maxnodemem_pfn[i];
 376			if (max_size > 0) {
 377				pr_err("Maxnodemem reduced node %d to"
 378				       " %d pages\n", i, max_size);
 379				range.size = PFN_PHYS(max_size);
 380			} else {
 381				pr_err("Maxnodemem disabled node %d\n", i);
 382				continue;
 383			}
 384		}
 385		if (num_physpages + PFN_DOWN(range.size) > maxmem_pfn) {
 386			int max_size = maxmem_pfn - num_physpages;
 387			if (max_size > 0) {
 388				pr_err("Maxmem reduced node %d to %d pages\n",
 389				       i, max_size);
 390				range.size = PFN_PHYS(max_size);
 391			} else {
 392				pr_err("Maxmem disabled node %d\n", i);
 393				continue;
 394			}
 395		}
 396		if (i >= MAX_NUMNODES) {
 397			pr_err("Too many PA nodes (#%d): %#llx...%#llx\n",
 398			       i, range.size, range.size + range.start);
 399			continue;
 400		}
 401
 402		start = range.start >> PAGE_SHIFT;
 403		size = range.size >> PAGE_SHIFT;
 404		end = start + size;
 405
 406#ifndef __tilegx__
 407		if (((HV_PhysAddr)end << PAGE_SHIFT) !=
 408		    (range.start + range.size)) {
 409			pr_err("PAs too high to represent: %#llx..%#llx\n",
 410			       range.start, range.start + range.size);
 411			continue;
 412		}
 413#endif
 414#ifdef CONFIG_PCI
 415		/*
 416		 * Blocks that overlap the pci reserved region must
 417		 * have enough space to hold the maximum percpu data
 418		 * region at the top of the range.  If there isn't
 419		 * enough space above the reserved region, just
 420		 * truncate the node.
 421		 */
 422		if (start <= pci_reserve_start_pfn &&
 423		    end > pci_reserve_start_pfn) {
 424			unsigned int per_cpu_size =
 425				__per_cpu_end - __per_cpu_start;
 426			unsigned int percpu_pages =
 427				NR_CPUS * (PFN_UP(per_cpu_size) >> PAGE_SHIFT);
 428			if (end < pci_reserve_end_pfn + percpu_pages) {
 429				end = pci_reserve_start_pfn;
 430				pr_err("PCI mapping region reduced node %d to"
 431				       " %ld pages\n", i, end - start);
 432			}
 433		}
 434#endif
 435
 436		for (j = __pfn_to_highbits(start);
 437		     j <= __pfn_to_highbits(end - 1); j++)
 438			highbits_to_node[j] = i;
 439
 440		node_start_pfn[i] = start;
 441		node_end_pfn[i] = end;
 442		node_controller[i] = range.controller;
 443		num_physpages += size;
 444		max_pfn = end;
 445
 446		/* Mark node as online */
 447		node_set(i, node_online_map);
 448		node_set(i, node_possible_map);
 449	}
 450
 451#ifndef __tilegx__
 452	/*
 453	 * For 4KB pages, mem_map "struct page" data is 1% of the size
 454	 * of the physical memory, so can be quite big (640 MB for
 455	 * four 16G zones).  These structures must be mapped in
 456	 * lowmem, and since we currently cap out at about 768 MB,
 457	 * it's impractical to try to use this much address space.
 458	 * For now, arbitrarily cap the amount of physical memory
 459	 * we're willing to use at 8 million pages (32GB of 4KB pages).
 460	 */
 461	cap = 8 * 1024 * 1024;  /* 8 million pages */
 462	if (num_physpages > cap) {
 463		int num_nodes = num_online_nodes();
 464		int cap_each = cap / num_nodes;
 465		unsigned long dropped_pages = 0;
 466		for (i = 0; i < num_nodes; ++i) {
 467			int size = node_end_pfn[i] - node_start_pfn[i];
 468			if (size > cap_each) {
 469				dropped_pages += (size - cap_each);
 470				node_end_pfn[i] = node_start_pfn[i] + cap_each;
 471			}
 472		}
 473		num_physpages -= dropped_pages;
 474		pr_warning("Only using %ldMB memory;"
 475		       " ignoring %ldMB.\n",
 476		       num_physpages >> (20 - PAGE_SHIFT),
 477		       dropped_pages >> (20 - PAGE_SHIFT));
 478		pr_warning("Consider using a larger page size.\n");
 479	}
 480#endif
 481
 482	/* Heap starts just above the last loaded address. */
 483	min_low_pfn = PFN_UP((unsigned long)_end - PAGE_OFFSET);
 484
 485#ifdef CONFIG_HIGHMEM
 486	/* Find where we map lowmem from each controller. */
 487	high_memory = setup_pa_va_mapping();
 488
 489	/* Set max_low_pfn based on what node 0 can directly address. */
 490	max_low_pfn = node_lowmem_end_pfn[0];
 491
 492	lowmem_pages = (mappable_physpages > MAXMEM_PFN) ?
 493		MAXMEM_PFN : mappable_physpages;
 494	highmem_pages = (long) (num_physpages - lowmem_pages);
 495
 496	pr_notice("%ldMB HIGHMEM available.\n",
 497	       pages_to_mb(highmem_pages > 0 ? highmem_pages : 0));
 498	pr_notice("%ldMB LOWMEM available.\n",
 499			pages_to_mb(lowmem_pages));
 500#else
 501	/* Set max_low_pfn based on what node 0 can directly address. */
 502	max_low_pfn = node_end_pfn[0];
 503
 504#ifndef __tilegx__
 505	if (node_end_pfn[0] > MAXMEM_PFN) {
 506		pr_warning("Only using %ldMB LOWMEM.\n",
 507		       MAXMEM>>20);
 508		pr_warning("Use a HIGHMEM enabled kernel.\n");
 509		max_low_pfn = MAXMEM_PFN;
 510		max_pfn = MAXMEM_PFN;
 511		num_physpages = MAXMEM_PFN;
 512		node_end_pfn[0] = MAXMEM_PFN;
 513	} else {
 514		pr_notice("%ldMB memory available.\n",
 515		       pages_to_mb(node_end_pfn[0]));
 516	}
 517	for (i = 1; i < MAX_NUMNODES; ++i) {
 518		node_start_pfn[i] = 0;
 519		node_end_pfn[i] = 0;
 520	}
 521	high_memory = __va(node_end_pfn[0]);
 522#else
 523	lowmem_pages = 0;
 524	for (i = 0; i < MAX_NUMNODES; ++i) {
 525		int pages = node_end_pfn[i] - node_start_pfn[i];
 526		lowmem_pages += pages;
 527		if (pages)
 528			high_memory = pfn_to_kaddr(node_end_pfn[i]);
 529	}
 530	pr_notice("%ldMB memory available.\n",
 531	       pages_to_mb(lowmem_pages));
 532#endif
 533#endif
 534}
 535
 536/*
 537 * On 32-bit machines, we only put bootmem on the low controller,
 538 * since PAs > 4GB can't be used in bootmem.  In principle one could
 539 * imagine, e.g., multiple 1 GB controllers all of which could support
 540 * bootmem, but in practice using controllers this small isn't a
 541 * particularly interesting scenario, so we just keep it simple and
 542 * use only the first controller for bootmem on 32-bit machines.
 543 */
 544static inline int node_has_bootmem(int nid)
 545{
 546#ifdef CONFIG_64BIT
 547	return 1;
 548#else
 549	return nid == 0;
 550#endif
 551}
 552
 553static inline unsigned long alloc_bootmem_pfn(int nid,
 554					      unsigned long size,
 555					      unsigned long goal)
 556{
 557	void *kva = __alloc_bootmem_node(NODE_DATA(nid), size,
 558					 PAGE_SIZE, goal);
 559	unsigned long pfn = kaddr_to_pfn(kva);
 560	BUG_ON(goal && PFN_PHYS(pfn) != goal);
 561	return pfn;
 562}
 563
 564static void __init setup_bootmem_allocator_node(int i)
 565{
 566	unsigned long start, end, mapsize, mapstart;
 567
 568	if (node_has_bootmem(i)) {
 569		NODE_DATA(i)->bdata = &bootmem_node_data[i];
 570	} else {
 571		/* Share controller zero's bdata for now. */
 572		NODE_DATA(i)->bdata = &bootmem_node_data[0];
 573		return;
 574	}
 575
 576	/* Skip up to after the bss in node 0. */
 577	start = (i == 0) ? min_low_pfn : node_start_pfn[i];
 578
 579	/* Only lowmem, if we're a HIGHMEM build. */
 580#ifdef CONFIG_HIGHMEM
 581	end = node_lowmem_end_pfn[i];
 582#else
 583	end = node_end_pfn[i];
 584#endif
 585
 586	/* No memory here. */
 587	if (end == start)
 588		return;
 589
 590	/* Figure out where the bootmem bitmap is located. */
 591	mapsize = bootmem_bootmap_pages(end - start);
 592	if (i == 0) {
 593		/* Use some space right before the heap on node 0. */
 594		mapstart = start;
 595		start += mapsize;
 596	} else {
 597		/* Allocate bitmap on node 0 to avoid page table issues. */
 598		mapstart = alloc_bootmem_pfn(0, PFN_PHYS(mapsize), 0);
 599	}
 600
 601	/* Initialize a node. */
 602	init_bootmem_node(NODE_DATA(i), mapstart, start, end);
 603
 604	/* Free all the space back into the allocator. */
 605	free_bootmem(PFN_PHYS(start), PFN_PHYS(end - start));
 606
 607#if defined(CONFIG_PCI)
 608	/*
 609	 * Throw away any memory aliased by the PCI region.  FIXME: this
 610	 * is a temporary hack to work around bug 10502, and needs to be
 611	 * fixed properly.
 612	 */
 613	if (pci_reserve_start_pfn < end && pci_reserve_end_pfn > start)
 614		reserve_bootmem(PFN_PHYS(pci_reserve_start_pfn),
 615				PFN_PHYS(pci_reserve_end_pfn -
 616					 pci_reserve_start_pfn),
 617				BOOTMEM_EXCLUSIVE);
 
 618#endif
 619}
 620
 621static void __init setup_bootmem_allocator(void)
 622{
 623	int i;
 624	for (i = 0; i < MAX_NUMNODES; ++i)
 625		setup_bootmem_allocator_node(i);
 626
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 627#ifdef CONFIG_KEXEC
 628	if (crashk_res.start != crashk_res.end)
 629		reserve_bootmem(crashk_res.start, resource_size(&crashk_res), 0);
 
 630#endif
 631}
 632
 633void *__init alloc_remap(int nid, unsigned long size)
 634{
 635	int pages = node_end_pfn[nid] - node_start_pfn[nid];
 636	void *map = pfn_to_kaddr(node_memmap_pfn[nid]);
 637	BUG_ON(size != pages * sizeof(struct page));
 638	memset(map, 0, size);
 639	return map;
 640}
 641
 642static int __init percpu_size(void)
 643{
 644	int size = __per_cpu_end - __per_cpu_start;
 645	size += PERCPU_MODULE_RESERVE;
 646	size += PERCPU_DYNAMIC_EARLY_SIZE;
 647	if (size < PCPU_MIN_UNIT_SIZE)
 648		size = PCPU_MIN_UNIT_SIZE;
 649	size = roundup(size, PAGE_SIZE);
 650
 651	/* In several places we assume the per-cpu data fits on a huge page. */
 652	BUG_ON(kdata_huge && size > HPAGE_SIZE);
 653	return size;
 654}
 655
 656static void __init zone_sizes_init(void)
 657{
 658	unsigned long zones_size[MAX_NR_ZONES] = { 0 };
 659	int size = percpu_size();
 660	int num_cpus = smp_height * smp_width;
 
 
 661	int i;
 662
 663	for (i = 0; i < num_cpus; ++i)
 664		node_percpu[cpu_to_node(i)] += size;
 665
 666	for_each_online_node(i) {
 667		unsigned long start = node_start_pfn[i];
 668		unsigned long end = node_end_pfn[i];
 669#ifdef CONFIG_HIGHMEM
 670		unsigned long lowmem_end = node_lowmem_end_pfn[i];
 671#else
 672		unsigned long lowmem_end = end;
 673#endif
 674		int memmap_size = (end - start) * sizeof(struct page);
 675		node_free_pfn[i] = start;
 676
 677		/*
 678		 * Set aside pages for per-cpu data and the mem_map array.
 679		 *
 680		 * Since the per-cpu data requires special homecaching,
 681		 * if we are in kdata_huge mode, we put it at the end of
 682		 * the lowmem region.  If we're not in kdata_huge mode,
 683		 * we take the per-cpu pages from the bottom of the
 684		 * controller, since that avoids fragmenting a huge page
 685		 * that users might want.  We always take the memmap
 686		 * from the bottom of the controller, since with
 687		 * kdata_huge that lets it be under a huge TLB entry.
 688		 *
 689		 * If the user has requested isolnodes for a controller,
 690		 * though, there'll be no lowmem, so we just alloc_bootmem
 691		 * the memmap.  There will be no percpu memory either.
 692		 */
 693		if (i != 0 && cpu_isset(i, isolnodes)) {
 694			node_memmap_pfn[i] =
 695				alloc_bootmem_pfn(0, memmap_size, 0);
 696			BUG_ON(node_percpu[i] != 0);
 697		} else if (node_has_bootmem(start)) {
 698			unsigned long goal = 0;
 699			node_memmap_pfn[i] =
 700				alloc_bootmem_pfn(i, memmap_size, 0);
 701			if (kdata_huge)
 702				goal = PFN_PHYS(lowmem_end) - node_percpu[i];
 703			if (node_percpu[i])
 704				node_percpu_pfn[i] =
 705					alloc_bootmem_pfn(i, node_percpu[i],
 706							  goal);
 707		} else {
 708			/* In non-bootmem zones, just reserve some pages. */
 709			node_memmap_pfn[i] = node_free_pfn[i];
 710			node_free_pfn[i] += PFN_UP(memmap_size);
 711			if (!kdata_huge) {
 712				node_percpu_pfn[i] = node_free_pfn[i];
 713				node_free_pfn[i] += PFN_UP(node_percpu[i]);
 714			} else {
 715				node_percpu_pfn[i] =
 716					lowmem_end - PFN_UP(node_percpu[i]);
 717			}
 718		}
 719
 720#ifdef CONFIG_HIGHMEM
 721		if (start > lowmem_end) {
 722			zones_size[ZONE_NORMAL] = 0;
 723			zones_size[ZONE_HIGHMEM] = end - start;
 724		} else {
 725			zones_size[ZONE_NORMAL] = lowmem_end - start;
 726			zones_size[ZONE_HIGHMEM] = end - lowmem_end;
 727		}
 728#else
 729		zones_size[ZONE_NORMAL] = end - start;
 730#endif
 731
 
 
 
 
 
 
 
 
 732		/* Take zone metadata from controller 0 if we're isolnode. */
 733		if (node_isset(i, isolnodes))
 734			NODE_DATA(i)->bdata = &bootmem_node_data[0];
 735
 736		free_area_init_node(i, zones_size, start, NULL);
 737		printk(KERN_DEBUG "  Normal zone: %ld per-cpu pages\n",
 738		       PFN_UP(node_percpu[i]));
 739
 740		/* Track the type of memory on each node */
 741		if (zones_size[ZONE_NORMAL])
 742			node_set_state(i, N_NORMAL_MEMORY);
 743#ifdef CONFIG_HIGHMEM
 744		if (end != start)
 745			node_set_state(i, N_HIGH_MEMORY);
 746#endif
 747
 748		node_set_online(i);
 749	}
 750}
 751
 752#ifdef CONFIG_NUMA
 753
 754/* which logical CPUs are on which nodes */
 755struct cpumask node_2_cpu_mask[MAX_NUMNODES] __write_once;
 756EXPORT_SYMBOL(node_2_cpu_mask);
 757
 758/* which node each logical CPU is on */
 759char cpu_2_node[NR_CPUS] __write_once __attribute__((aligned(L2_CACHE_BYTES)));
 760EXPORT_SYMBOL(cpu_2_node);
 761
 762/* Return cpu_to_node() except for cpus not yet assigned, which return -1 */
 763static int __init cpu_to_bound_node(int cpu, struct cpumask* unbound_cpus)
 764{
 765	if (!cpu_possible(cpu) || cpumask_test_cpu(cpu, unbound_cpus))
 766		return -1;
 767	else
 768		return cpu_to_node(cpu);
 769}
 770
 771/* Return number of immediately-adjacent tiles sharing the same NUMA node. */
 772static int __init node_neighbors(int node, int cpu,
 773				 struct cpumask *unbound_cpus)
 774{
 775	int neighbors = 0;
 776	int w = smp_width;
 777	int h = smp_height;
 778	int x = cpu % w;
 779	int y = cpu / w;
 780	if (x > 0 && cpu_to_bound_node(cpu-1, unbound_cpus) == node)
 781		++neighbors;
 782	if (x < w-1 && cpu_to_bound_node(cpu+1, unbound_cpus) == node)
 783		++neighbors;
 784	if (y > 0 && cpu_to_bound_node(cpu-w, unbound_cpus) == node)
 785		++neighbors;
 786	if (y < h-1 && cpu_to_bound_node(cpu+w, unbound_cpus) == node)
 787		++neighbors;
 788	return neighbors;
 789}
 790
 791static void __init setup_numa_mapping(void)
 792{
 793	int distance[MAX_NUMNODES][NR_CPUS];
 794	HV_Coord coord;
 795	int cpu, node, cpus, i, x, y;
 796	int num_nodes = num_online_nodes();
 797	struct cpumask unbound_cpus;
 798	nodemask_t default_nodes;
 799
 800	cpumask_clear(&unbound_cpus);
 801
 802	/* Get set of nodes we will use for defaults */
 803	nodes_andnot(default_nodes, node_online_map, isolnodes);
 804	if (nodes_empty(default_nodes)) {
 805		BUG_ON(!node_isset(0, node_online_map));
 806		pr_err("Forcing NUMA node zero available as a default node\n");
 807		node_set(0, default_nodes);
 808	}
 809
 810	/* Populate the distance[] array */
 811	memset(distance, -1, sizeof(distance));
 812	cpu = 0;
 813	for (coord.y = 0; coord.y < smp_height; ++coord.y) {
 814		for (coord.x = 0; coord.x < smp_width;
 815		     ++coord.x, ++cpu) {
 816			BUG_ON(cpu >= nr_cpu_ids);
 817			if (!cpu_possible(cpu)) {
 818				cpu_2_node[cpu] = -1;
 819				continue;
 820			}
 821			for_each_node_mask(node, default_nodes) {
 822				HV_MemoryControllerInfo info =
 823					hv_inquire_memory_controller(
 824						coord, node_controller[node]);
 825				distance[node][cpu] =
 826					ABS(info.coord.x) + ABS(info.coord.y);
 827			}
 828			cpumask_set_cpu(cpu, &unbound_cpus);
 829		}
 830	}
 831	cpus = cpu;
 832
 833	/*
 834	 * Round-robin through the NUMA nodes until all the cpus are
 835	 * assigned.  We could be more clever here (e.g. create four
 836	 * sorted linked lists on the same set of cpu nodes, and pull
 837	 * off them in round-robin sequence, removing from all four
 838	 * lists each time) but given the relatively small numbers
 839	 * involved, O(n^2) seem OK for a one-time cost.
 840	 */
 841	node = first_node(default_nodes);
 842	while (!cpumask_empty(&unbound_cpus)) {
 843		int best_cpu = -1;
 844		int best_distance = INT_MAX;
 845		for (cpu = 0; cpu < cpus; ++cpu) {
 846			if (cpumask_test_cpu(cpu, &unbound_cpus)) {
 847				/*
 848				 * Compute metric, which is how much
 849				 * closer the cpu is to this memory
 850				 * controller than the others, shifted
 851				 * up, and then the number of
 852				 * neighbors already in the node as an
 853				 * epsilon adjustment to try to keep
 854				 * the nodes compact.
 855				 */
 856				int d = distance[node][cpu] * num_nodes;
 857				for_each_node_mask(i, default_nodes) {
 858					if (i != node)
 859						d -= distance[i][cpu];
 860				}
 861				d *= 8;  /* allow space for epsilon */
 862				d -= node_neighbors(node, cpu, &unbound_cpus);
 863				if (d < best_distance) {
 864					best_cpu = cpu;
 865					best_distance = d;
 866				}
 867			}
 868		}
 869		BUG_ON(best_cpu < 0);
 870		cpumask_set_cpu(best_cpu, &node_2_cpu_mask[node]);
 871		cpu_2_node[best_cpu] = node;
 872		cpumask_clear_cpu(best_cpu, &unbound_cpus);
 873		node = next_node(node, default_nodes);
 874		if (node == MAX_NUMNODES)
 875			node = first_node(default_nodes);
 876	}
 877
 878	/* Print out node assignments and set defaults for disabled cpus */
 879	cpu = 0;
 880	for (y = 0; y < smp_height; ++y) {
 881		printk(KERN_DEBUG "NUMA cpu-to-node row %d:", y);
 882		for (x = 0; x < smp_width; ++x, ++cpu) {
 883			if (cpu_to_node(cpu) < 0) {
 884				pr_cont(" -");
 885				cpu_2_node[cpu] = first_node(default_nodes);
 886			} else {
 887				pr_cont(" %d", cpu_to_node(cpu));
 888			}
 889		}
 890		pr_cont("\n");
 891	}
 892}
 893
 894static struct cpu cpu_devices[NR_CPUS];
 895
 896static int __init topology_init(void)
 897{
 898	int i;
 899
 900	for_each_online_node(i)
 901		register_one_node(i);
 902
 903	for (i = 0; i < smp_height * smp_width; ++i)
 904		register_cpu(&cpu_devices[i], i);
 905
 906	return 0;
 907}
 908
 909subsys_initcall(topology_init);
 910
 911#else /* !CONFIG_NUMA */
 912
 913#define setup_numa_mapping() do { } while (0)
 914
 915#endif /* CONFIG_NUMA */
 916
 917/*
 918 * Initialize hugepage support on this cpu.  We do this on all cores
 919 * early in boot: before argument parsing for the boot cpu, and after
 920 * argument parsing but before the init functions run on the secondaries.
 921 * So the values we set up here in the hypervisor may be overridden on
 922 * the boot cpu as arguments are parsed.
 923 */
 924static __cpuinit void init_super_pages(void)
 925{
 926#ifdef CONFIG_HUGETLB_SUPER_PAGES
 927	int i;
 928	for (i = 0; i < HUGE_SHIFT_ENTRIES; ++i)
 929		hv_set_pte_super_shift(i, huge_shift[i]);
 930#endif
 931}
 932
 933/**
 934 * setup_cpu() - Do all necessary per-cpu, tile-specific initialization.
 935 * @boot: Is this the boot cpu?
 936 *
 937 * Called from setup_arch() on the boot cpu, or online_secondary().
 938 */
 939void __cpuinit setup_cpu(int boot)
 940{
 941	/* The boot cpu sets up its permanent mappings much earlier. */
 942	if (!boot)
 943		store_permanent_mappings();
 944
 945	/* Allow asynchronous TLB interrupts. */
 946#if CHIP_HAS_TILE_DMA()
 947	arch_local_irq_unmask(INT_DMATLB_MISS);
 948	arch_local_irq_unmask(INT_DMATLB_ACCESS);
 949#endif
 950#if CHIP_HAS_SN_PROC()
 951	arch_local_irq_unmask(INT_SNITLB_MISS);
 952#endif
 953#ifdef __tilegx__
 954	arch_local_irq_unmask(INT_SINGLE_STEP_K);
 955#endif
 956
 957	/*
 958	 * Allow user access to many generic SPRs, like the cycle
 959	 * counter, PASS/FAIL/DONE, INTERRUPT_CRITICAL_SECTION, etc.
 960	 */
 961	__insn_mtspr(SPR_MPL_WORLD_ACCESS_SET_0, 1);
 962
 963#if CHIP_HAS_SN()
 964	/* Static network is not restricted. */
 965	__insn_mtspr(SPR_MPL_SN_ACCESS_SET_0, 1);
 966#endif
 967#if CHIP_HAS_SN_PROC()
 968	__insn_mtspr(SPR_MPL_SN_NOTIFY_SET_0, 1);
 969	__insn_mtspr(SPR_MPL_SN_CPL_SET_0, 1);
 970#endif
 971
 972	/*
 973	 * Set the MPL for interrupt control 0 & 1 to the corresponding
 974	 * values.  This includes access to the SYSTEM_SAVE and EX_CONTEXT
 975	 * SPRs, as well as the interrupt mask.
 976	 */
 977	__insn_mtspr(SPR_MPL_INTCTRL_0_SET_0, 1);
 978	__insn_mtspr(SPR_MPL_INTCTRL_1_SET_1, 1);
 979
 980	/* Initialize IRQ support for this cpu. */
 981	setup_irq_regs();
 982
 983#ifdef CONFIG_HARDWALL
 984	/* Reset the network state on this cpu. */
 985	reset_network_state();
 986#endif
 987
 988	init_super_pages();
 989}
 990
 991#ifdef CONFIG_BLK_DEV_INITRD
 992
 993/*
 994 * Note that the kernel can potentially support other compression
 995 * techniques than gz, though we don't do so by default.  If we ever
 996 * decide to do so we can either look for other filename extensions,
 997 * or just allow a file with this name to be compressed with an
 998 * arbitrary compressor (somewhat counterintuitively).
 999 */
1000static int __initdata set_initramfs_file;
1001static char __initdata initramfs_file[128] = "initramfs.cpio.gz";
1002
1003static int __init setup_initramfs_file(char *str)
1004{
1005	if (str == NULL)
1006		return -EINVAL;
1007	strncpy(initramfs_file, str, sizeof(initramfs_file) - 1);
1008	set_initramfs_file = 1;
1009
1010	return 0;
1011}
1012early_param("initramfs_file", setup_initramfs_file);
1013
1014/*
1015 * We look for an "initramfs.cpio.gz" file in the hvfs.
1016 * If there is one, we allocate some memory for it and it will be
1017 * unpacked to the initramfs.
1018 */
1019static void __init load_hv_initrd(void)
1020{
1021	HV_FS_StatInfo stat;
1022	int fd, rc;
1023	void *initrd;
1024
 
 
 
 
1025	fd = hv_fs_findfile((HV_VirtAddr) initramfs_file);
1026	if (fd == HV_ENOENT) {
1027		if (set_initramfs_file)
1028			pr_warning("No such hvfs initramfs file '%s'\n",
1029				   initramfs_file);
1030		return;
 
 
 
 
 
 
1031	}
1032	BUG_ON(fd < 0);
1033	stat = hv_fs_fstat(fd);
1034	BUG_ON(stat.size < 0);
1035	if (stat.flags & HV_FS_ISDIR) {
1036		pr_warning("Ignoring hvfs file '%s': it's a directory.\n",
1037			   initramfs_file);
1038		return;
1039	}
1040	initrd = alloc_bootmem_pages(stat.size);
1041	rc = hv_fs_pread(fd, (HV_VirtAddr) initrd, stat.size, 0);
1042	if (rc != stat.size) {
1043		pr_err("Error reading %d bytes from hvfs file '%s': %d\n",
1044		       stat.size, initramfs_file, rc);
1045		free_initrd_mem((unsigned long) initrd, stat.size);
1046		return;
1047	}
1048	initrd_start = (unsigned long) initrd;
1049	initrd_end = initrd_start + stat.size;
1050}
1051
1052void __init free_initrd_mem(unsigned long begin, unsigned long end)
1053{
1054	free_bootmem(__pa(begin), end - begin);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1055}
 
1056
1057#else
1058static inline void load_hv_initrd(void) {}
1059#endif /* CONFIG_BLK_DEV_INITRD */
1060
1061static void __init validate_hv(void)
1062{
1063	/*
1064	 * It may already be too late, but let's check our built-in
1065	 * configuration against what the hypervisor is providing.
1066	 */
1067	unsigned long glue_size = hv_sysconf(HV_SYSCONF_GLUE_SIZE);
1068	int hv_page_size = hv_sysconf(HV_SYSCONF_PAGE_SIZE_SMALL);
1069	int hv_hpage_size = hv_sysconf(HV_SYSCONF_PAGE_SIZE_LARGE);
1070	HV_ASIDRange asid_range;
1071
1072#ifndef CONFIG_SMP
1073	HV_Topology topology = hv_inquire_topology();
1074	BUG_ON(topology.coord.x != 0 || topology.coord.y != 0);
1075	if (topology.width != 1 || topology.height != 1) {
1076		pr_warning("Warning: booting UP kernel on %dx%d grid;"
1077			   " will ignore all but first tile.\n",
1078			   topology.width, topology.height);
1079	}
1080#endif
1081
1082	if (PAGE_OFFSET + HV_GLUE_START_CPA + glue_size > (unsigned long)_text)
1083		early_panic("Hypervisor glue size %ld is too big!\n",
1084			    glue_size);
1085	if (hv_page_size != PAGE_SIZE)
1086		early_panic("Hypervisor page size %#x != our %#lx\n",
1087			    hv_page_size, PAGE_SIZE);
1088	if (hv_hpage_size != HPAGE_SIZE)
1089		early_panic("Hypervisor huge page size %#x != our %#lx\n",
1090			    hv_hpage_size, HPAGE_SIZE);
1091
1092#ifdef CONFIG_SMP
1093	/*
1094	 * Some hypervisor APIs take a pointer to a bitmap array
1095	 * whose size is at least the number of cpus on the chip.
1096	 * We use a struct cpumask for this, so it must be big enough.
1097	 */
1098	if ((smp_height * smp_width) > nr_cpu_ids)
1099		early_panic("Hypervisor %d x %d grid too big for Linux"
1100			    " NR_CPUS %d\n", smp_height, smp_width,
1101			    nr_cpu_ids);
1102#endif
1103
1104	/*
1105	 * Check that we're using allowed ASIDs, and initialize the
1106	 * various asid variables to their appropriate initial states.
1107	 */
1108	asid_range = hv_inquire_asid(0);
1109	__get_cpu_var(current_asid) = min_asid = asid_range.start;
 
1110	max_asid = asid_range.start + asid_range.size - 1;
1111
1112	if (hv_confstr(HV_CONFSTR_CHIP_MODEL, (HV_VirtAddr)chip_model,
1113		       sizeof(chip_model)) < 0) {
1114		pr_err("Warning: HV_CONFSTR_CHIP_MODEL not available\n");
1115		strlcpy(chip_model, "unknown", sizeof(chip_model));
1116	}
1117}
1118
1119static void __init validate_va(void)
1120{
1121#ifndef __tilegx__   /* FIXME: GX: probably some validation relevant here */
1122	/*
1123	 * Similarly, make sure we're only using allowed VAs.
1124	 * We assume we can contiguously use MEM_USER_INTRPT .. MEM_HV_INTRPT,
1125	 * and 0 .. KERNEL_HIGH_VADDR.
1126	 * In addition, make sure we CAN'T use the end of memory, since
1127	 * we use the last chunk of each pgd for the pgd_list.
1128	 */
1129	int i, user_kernel_ok = 0;
1130	unsigned long max_va = 0;
1131	unsigned long list_va =
1132		((PGD_LIST_OFFSET / sizeof(pgd_t)) << PGDIR_SHIFT);
1133
1134	for (i = 0; ; ++i) {
1135		HV_VirtAddrRange range = hv_inquire_virtual(i);
1136		if (range.size == 0)
1137			break;
1138		if (range.start <= MEM_USER_INTRPT &&
1139		    range.start + range.size >= MEM_HV_INTRPT)
1140			user_kernel_ok = 1;
1141		if (range.start == 0)
1142			max_va = range.size;
1143		BUG_ON(range.start + range.size > list_va);
1144	}
1145	if (!user_kernel_ok)
1146		early_panic("Hypervisor not configured for user/kernel VAs\n");
1147	if (max_va == 0)
1148		early_panic("Hypervisor not configured for low VAs\n");
1149	if (max_va < KERNEL_HIGH_VADDR)
1150		early_panic("Hypervisor max VA %#lx smaller than %#lx\n",
1151			    max_va, KERNEL_HIGH_VADDR);
1152
1153	/* Kernel PCs must have their high bit set; see intvec.S. */
1154	if ((long)VMALLOC_START >= 0)
1155		early_panic(
1156			"Linux VMALLOC region below the 2GB line (%#lx)!\n"
1157			"Reconfigure the kernel with fewer NR_HUGE_VMAPS\n"
1158			"or smaller VMALLOC_RESERVE.\n",
1159			VMALLOC_START);
1160#endif
1161}
1162
1163/*
1164 * cpu_lotar_map lists all the cpus that are valid for the supervisor
1165 * to cache data on at a page level, i.e. what cpus can be placed in
1166 * the LOTAR field of a PTE.  It is equivalent to the set of possible
1167 * cpus plus any other cpus that are willing to share their cache.
1168 * It is set by hv_inquire_tiles(HV_INQ_TILES_LOTAR).
1169 */
1170struct cpumask __write_once cpu_lotar_map;
1171EXPORT_SYMBOL(cpu_lotar_map);
1172
1173#if CHIP_HAS_CBOX_HOME_MAP()
1174/*
1175 * hash_for_home_map lists all the tiles that hash-for-home data
1176 * will be cached on.  Note that this may includes tiles that are not
1177 * valid for this supervisor to use otherwise (e.g. if a hypervisor
1178 * device is being shared between multiple supervisors).
1179 * It is set by hv_inquire_tiles(HV_INQ_TILES_HFH_CACHE).
1180 */
1181struct cpumask hash_for_home_map;
1182EXPORT_SYMBOL(hash_for_home_map);
1183#endif
1184
1185/*
1186 * cpu_cacheable_map lists all the cpus whose caches the hypervisor can
1187 * flush on our behalf.  It is set to cpu_possible_mask OR'ed with
1188 * hash_for_home_map, and it is what should be passed to
1189 * hv_flush_remote() to flush all caches.  Note that if there are
1190 * dedicated hypervisor driver tiles that have authorized use of their
1191 * cache, those tiles will only appear in cpu_lotar_map, NOT in
1192 * cpu_cacheable_map, as they are a special case.
1193 */
1194struct cpumask __write_once cpu_cacheable_map;
1195EXPORT_SYMBOL(cpu_cacheable_map);
1196
1197static __initdata struct cpumask disabled_map;
1198
1199static int __init disabled_cpus(char *str)
1200{
1201	int boot_cpu = smp_processor_id();
1202
1203	if (str == NULL || cpulist_parse_crop(str, &disabled_map) != 0)
1204		return -EINVAL;
1205	if (cpumask_test_cpu(boot_cpu, &disabled_map)) {
1206		pr_err("disabled_cpus: can't disable boot cpu %d\n", boot_cpu);
1207		cpumask_clear_cpu(boot_cpu, &disabled_map);
1208	}
1209	return 0;
1210}
1211
1212early_param("disabled_cpus", disabled_cpus);
1213
1214void __init print_disabled_cpus(void)
1215{
1216	if (!cpumask_empty(&disabled_map)) {
1217		char buf[100];
1218		cpulist_scnprintf(buf, sizeof(buf), &disabled_map);
1219		pr_info("CPUs not available for Linux: %s\n", buf);
1220	}
1221}
1222
1223static void __init setup_cpu_maps(void)
1224{
1225	struct cpumask hv_disabled_map, cpu_possible_init;
1226	int boot_cpu = smp_processor_id();
1227	int cpus, i, rc;
1228
1229	/* Learn which cpus are allowed by the hypervisor. */
1230	rc = hv_inquire_tiles(HV_INQ_TILES_AVAIL,
1231			      (HV_VirtAddr) cpumask_bits(&cpu_possible_init),
1232			      sizeof(cpu_cacheable_map));
1233	if (rc < 0)
1234		early_panic("hv_inquire_tiles(AVAIL) failed: rc %d\n", rc);
1235	if (!cpumask_test_cpu(boot_cpu, &cpu_possible_init))
1236		early_panic("Boot CPU %d disabled by hypervisor!\n", boot_cpu);
1237
1238	/* Compute the cpus disabled by the hvconfig file. */
1239	cpumask_complement(&hv_disabled_map, &cpu_possible_init);
1240
1241	/* Include them with the cpus disabled by "disabled_cpus". */
1242	cpumask_or(&disabled_map, &disabled_map, &hv_disabled_map);
1243
1244	/*
1245	 * Disable every cpu after "setup_max_cpus".  But don't mark
1246	 * as disabled the cpus that are outside of our initial rectangle,
1247	 * since that turns out to be confusing.
1248	 */
1249	cpus = 1;                          /* this cpu */
1250	cpumask_set_cpu(boot_cpu, &disabled_map);   /* ignore this cpu */
1251	for (i = 0; cpus < setup_max_cpus; ++i)
1252		if (!cpumask_test_cpu(i, &disabled_map))
1253			++cpus;
1254	for (; i < smp_height * smp_width; ++i)
1255		cpumask_set_cpu(i, &disabled_map);
1256	cpumask_clear_cpu(boot_cpu, &disabled_map); /* reset this cpu */
1257	for (i = smp_height * smp_width; i < NR_CPUS; ++i)
1258		cpumask_clear_cpu(i, &disabled_map);
1259
1260	/*
1261	 * Setup cpu_possible map as every cpu allocated to us, minus
1262	 * the results of any "disabled_cpus" settings.
1263	 */
1264	cpumask_andnot(&cpu_possible_init, &cpu_possible_init, &disabled_map);
1265	init_cpu_possible(&cpu_possible_init);
1266
1267	/* Learn which cpus are valid for LOTAR caching. */
1268	rc = hv_inquire_tiles(HV_INQ_TILES_LOTAR,
1269			      (HV_VirtAddr) cpumask_bits(&cpu_lotar_map),
1270			      sizeof(cpu_lotar_map));
1271	if (rc < 0) {
1272		pr_err("warning: no HV_INQ_TILES_LOTAR; using AVAIL\n");
1273		cpu_lotar_map = *cpu_possible_mask;
1274	}
1275
1276#if CHIP_HAS_CBOX_HOME_MAP()
1277	/* Retrieve set of CPUs used for hash-for-home caching */
1278	rc = hv_inquire_tiles(HV_INQ_TILES_HFH_CACHE,
1279			      (HV_VirtAddr) hash_for_home_map.bits,
1280			      sizeof(hash_for_home_map));
1281	if (rc < 0)
1282		early_panic("hv_inquire_tiles(HFH_CACHE) failed: rc %d\n", rc);
1283	cpumask_or(&cpu_cacheable_map, cpu_possible_mask, &hash_for_home_map);
1284#else
1285	cpu_cacheable_map = *cpu_possible_mask;
1286#endif
1287}
1288
1289
1290static int __init dataplane(char *str)
1291{
1292	pr_warning("WARNING: dataplane support disabled in this kernel\n");
1293	return 0;
1294}
1295
1296early_param("dataplane", dataplane);
1297
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1298#ifdef CONFIG_CMDLINE_BOOL
1299static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
1300#endif
1301
1302void __init setup_arch(char **cmdline_p)
1303{
1304	int len;
1305
1306#if defined(CONFIG_CMDLINE_BOOL) && defined(CONFIG_CMDLINE_OVERRIDE)
1307	len = hv_get_command_line((HV_VirtAddr) boot_command_line,
1308				  COMMAND_LINE_SIZE);
1309	if (boot_command_line[0])
1310		pr_warning("WARNING: ignoring dynamic command line \"%s\"\n",
1311			   boot_command_line);
1312	strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE);
1313#else
1314	char *hv_cmdline;
1315#if defined(CONFIG_CMDLINE_BOOL)
1316	if (builtin_cmdline[0]) {
1317		int builtin_len = strlcpy(boot_command_line, builtin_cmdline,
1318					  COMMAND_LINE_SIZE);
1319		if (builtin_len < COMMAND_LINE_SIZE-1)
1320			boot_command_line[builtin_len++] = ' ';
1321		hv_cmdline = &boot_command_line[builtin_len];
1322		len = COMMAND_LINE_SIZE - builtin_len;
1323	} else
1324#endif
1325	{
1326		hv_cmdline = boot_command_line;
1327		len = COMMAND_LINE_SIZE;
1328	}
1329	len = hv_get_command_line((HV_VirtAddr) hv_cmdline, len);
1330	if (len < 0 || len > COMMAND_LINE_SIZE)
1331		early_panic("hv_get_command_line failed: %d\n", len);
1332#endif
1333
1334	*cmdline_p = boot_command_line;
1335
1336	/* Set disabled_map and setup_max_cpus very early */
1337	parse_early_param();
1338
1339	/* Make sure the kernel is compatible with the hypervisor. */
1340	validate_hv();
1341	validate_va();
1342
1343	setup_cpu_maps();
1344
1345
1346#ifdef CONFIG_PCI
1347	/*
1348	 * Initialize the PCI structures.  This is done before memory
1349	 * setup so that we know whether or not a pci_reserve region
1350	 * is necessary.
1351	 */
1352	if (tile_pci_init() == 0)
1353		pci_reserve_mb = 0;
1354
1355	/* PCI systems reserve a region just below 4GB for mapping iomem. */
1356	pci_reserve_end_pfn  = (1 << (32 - PAGE_SHIFT));
1357	pci_reserve_start_pfn = pci_reserve_end_pfn -
1358		(pci_reserve_mb << (20 - PAGE_SHIFT));
1359#endif
1360
1361	init_mm.start_code = (unsigned long) _text;
1362	init_mm.end_code = (unsigned long) _etext;
1363	init_mm.end_data = (unsigned long) _edata;
1364	init_mm.brk = (unsigned long) _end;
1365
1366	setup_memory();
1367	store_permanent_mappings();
1368	setup_bootmem_allocator();
1369
1370	/*
1371	 * NOTE: before this point _nobody_ is allowed to allocate
1372	 * any memory using the bootmem allocator.
1373	 */
1374
 
 
 
 
1375	paging_init();
1376	setup_numa_mapping();
1377	zone_sizes_init();
1378	set_page_homes();
1379	setup_cpu(1);
1380	setup_clock();
1381	load_hv_initrd();
1382}
1383
1384
1385/*
1386 * Set up per-cpu memory.
1387 */
1388
1389unsigned long __per_cpu_offset[NR_CPUS] __write_once;
1390EXPORT_SYMBOL(__per_cpu_offset);
1391
1392static size_t __initdata pfn_offset[MAX_NUMNODES] = { 0 };
1393static unsigned long __initdata percpu_pfn[NR_CPUS] = { 0 };
1394
1395/*
1396 * As the percpu code allocates pages, we return the pages from the
1397 * end of the node for the specified cpu.
1398 */
1399static void *__init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align)
1400{
1401	int nid = cpu_to_node(cpu);
1402	unsigned long pfn = node_percpu_pfn[nid] + pfn_offset[nid];
1403
1404	BUG_ON(size % PAGE_SIZE != 0);
1405	pfn_offset[nid] += size / PAGE_SIZE;
1406	BUG_ON(node_percpu[nid] < size);
1407	node_percpu[nid] -= size;
1408	if (percpu_pfn[cpu] == 0)
1409		percpu_pfn[cpu] = pfn;
1410	return pfn_to_kaddr(pfn);
1411}
1412
1413/*
1414 * Pages reserved for percpu memory are not freeable, and in any case we are
1415 * on a short path to panic() in setup_per_cpu_area() at this point anyway.
1416 */
1417static void __init pcpu_fc_free(void *ptr, size_t size)
1418{
1419}
1420
1421/*
1422 * Set up vmalloc page tables using bootmem for the percpu code.
1423 */
1424static void __init pcpu_fc_populate_pte(unsigned long addr)
1425{
1426	pgd_t *pgd;
1427	pud_t *pud;
1428	pmd_t *pmd;
1429	pte_t *pte;
1430
1431	BUG_ON(pgd_addr_invalid(addr));
1432	if (addr < VMALLOC_START || addr >= VMALLOC_END)
1433		panic("PCPU addr %#lx outside vmalloc range %#lx..%#lx;"
1434		      " try increasing CONFIG_VMALLOC_RESERVE\n",
1435		      addr, VMALLOC_START, VMALLOC_END);
1436
1437	pgd = swapper_pg_dir + pgd_index(addr);
1438	pud = pud_offset(pgd, addr);
1439	BUG_ON(!pud_present(*pud));
1440	pmd = pmd_offset(pud, addr);
1441	if (pmd_present(*pmd)) {
1442		BUG_ON(pmd_huge_page(*pmd));
1443	} else {
1444		pte = __alloc_bootmem(L2_KERNEL_PGTABLE_SIZE,
1445				      HV_PAGE_TABLE_ALIGN, 0);
1446		pmd_populate_kernel(&init_mm, pmd, pte);
1447	}
1448}
1449
1450void __init setup_per_cpu_areas(void)
1451{
1452	struct page *pg;
1453	unsigned long delta, pfn, lowmem_va;
1454	unsigned long size = percpu_size();
1455	char *ptr;
1456	int rc, cpu, i;
1457
1458	rc = pcpu_page_first_chunk(PERCPU_MODULE_RESERVE, pcpu_fc_alloc,
1459				   pcpu_fc_free, pcpu_fc_populate_pte);
1460	if (rc < 0)
1461		panic("Cannot initialize percpu area (err=%d)", rc);
1462
1463	delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start;
1464	for_each_possible_cpu(cpu) {
1465		__per_cpu_offset[cpu] = delta + pcpu_unit_offsets[cpu];
1466
1467		/* finv the copy out of cache so we can change homecache */
1468		ptr = pcpu_base_addr + pcpu_unit_offsets[cpu];
1469		__finv_buffer(ptr, size);
1470		pfn = percpu_pfn[cpu];
1471
1472		/* Rewrite the page tables to cache on that cpu */
1473		pg = pfn_to_page(pfn);
1474		for (i = 0; i < size; i += PAGE_SIZE, ++pfn, ++pg) {
1475
1476			/* Update the vmalloc mapping and page home. */
1477			unsigned long addr = (unsigned long)ptr + i;
1478			pte_t *ptep = virt_to_pte(NULL, addr);
1479			pte_t pte = *ptep;
1480			BUG_ON(pfn != pte_pfn(pte));
1481			pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_TILE_L3);
1482			pte = set_remote_cache_cpu(pte, cpu);
1483			set_pte_at(&init_mm, addr, ptep, pte);
1484
1485			/* Update the lowmem mapping for consistency. */
1486			lowmem_va = (unsigned long)pfn_to_kaddr(pfn);
1487			ptep = virt_to_pte(NULL, lowmem_va);
1488			if (pte_huge(*ptep)) {
1489				printk(KERN_DEBUG "early shatter of huge page"
1490				       " at %#lx\n", lowmem_va);
1491				shatter_pmd((pmd_t *)ptep);
1492				ptep = virt_to_pte(NULL, lowmem_va);
1493				BUG_ON(pte_huge(*ptep));
1494			}
1495			BUG_ON(pfn != pte_pfn(*ptep));
1496			set_pte_at(&init_mm, lowmem_va, ptep, pte);
1497		}
1498	}
1499
1500	/* Set our thread pointer appropriately. */
1501	set_my_cpu_offset(__per_cpu_offset[smp_processor_id()]);
1502
1503	/* Make sure the finv's have completed. */
1504	mb_incoherent();
1505
1506	/* Flush the TLB so we reference it properly from here on out. */
1507	local_flush_tlb_all();
1508}
1509
1510static struct resource data_resource = {
1511	.name	= "Kernel data",
1512	.start	= 0,
1513	.end	= 0,
1514	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM
1515};
1516
1517static struct resource code_resource = {
1518	.name	= "Kernel code",
1519	.start	= 0,
1520	.end	= 0,
1521	.flags	= IORESOURCE_BUSY | IORESOURCE_MEM
1522};
1523
1524/*
1525 * We reserve all resources above 4GB so that PCI won't try to put
1526 * mappings above 4GB; the standard allows that for some devices but
1527 * the probing code trunates values to 32 bits.
1528 */
1529#ifdef CONFIG_PCI
1530static struct resource* __init
1531insert_non_bus_resource(void)
1532{
1533	struct resource *res =
1534		kzalloc(sizeof(struct resource), GFP_ATOMIC);
 
 
1535	res->name = "Non-Bus Physical Address Space";
1536	res->start = (1ULL << 32);
1537	res->end = -1LL;
1538	res->flags = IORESOURCE_BUSY | IORESOURCE_MEM;
1539	if (insert_resource(&iomem_resource, res)) {
1540		kfree(res);
1541		return NULL;
1542	}
1543	return res;
1544}
1545#endif
1546
1547static struct resource* __init
1548insert_ram_resource(u64 start_pfn, u64 end_pfn)
1549{
1550	struct resource *res =
1551		kzalloc(sizeof(struct resource), GFP_ATOMIC);
1552	res->name = "System RAM";
 
1553	res->start = start_pfn << PAGE_SHIFT;
1554	res->end = (end_pfn << PAGE_SHIFT) - 1;
1555	res->flags = IORESOURCE_BUSY | IORESOURCE_MEM;
 
 
 
 
 
 
1556	if (insert_resource(&iomem_resource, res)) {
1557		kfree(res);
1558		return NULL;
1559	}
1560	return res;
1561}
1562
1563/*
1564 * Request address space for all standard resources
1565 *
1566 * If the system includes PCI root complex drivers, we need to create
1567 * a window just below 4GB where PCI BARs can be mapped.
1568 */
1569static int __init request_standard_resources(void)
1570{
1571	int i;
1572	enum { CODE_DELTA = MEM_SV_INTRPT - PAGE_OFFSET };
1573
1574	iomem_resource.end = -1LL;
1575#ifdef CONFIG_PCI
1576	insert_non_bus_resource();
1577#endif
1578
1579	for_each_online_node(i) {
1580		u64 start_pfn = node_start_pfn[i];
1581		u64 end_pfn = node_end_pfn[i];
1582
1583#ifdef CONFIG_PCI
1584		if (start_pfn <= pci_reserve_start_pfn &&
1585		    end_pfn > pci_reserve_start_pfn) {
1586			if (end_pfn > pci_reserve_end_pfn)
1587				insert_ram_resource(pci_reserve_end_pfn,
1588						     end_pfn);
1589			end_pfn = pci_reserve_start_pfn;
1590		}
1591#endif
1592		insert_ram_resource(start_pfn, end_pfn);
1593	}
1594
1595	code_resource.start = __pa(_text - CODE_DELTA);
1596	code_resource.end = __pa(_etext - CODE_DELTA)-1;
1597	data_resource.start = __pa(_sdata);
1598	data_resource.end = __pa(_end)-1;
1599
1600	insert_resource(&iomem_resource, &code_resource);
1601	insert_resource(&iomem_resource, &data_resource);
 
 
 
 
 
 
 
1602
1603#ifdef CONFIG_KEXEC
1604	insert_resource(&iomem_resource, &crashk_res);
1605#endif
1606
1607	return 0;
1608}
1609
1610subsys_initcall(request_standard_resources);