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v3.5.6
  1/*
  2 * ioport.c:  Simple io mapping allocator.
  3 *
  4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
  6 *
  7 * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev.
  8 *
  9 * 2000/01/29
 10 * <rth> zait: as long as pci_alloc_consistent produces something addressable, 
 11 *	things are ok.
 12 * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a
 13 *	pointer into the big page mapping
 14 * <rth> zait: so what?
 15 * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page()))
 16 * <zaitcev> Hmm
 17 * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())).
 18 *	So far so good.
 19 * <zaitcev> Now, driver calls pci_free_consistent(with result of
 20 *	remap_it_my_way()).
 21 * <zaitcev> How do you find the address to pass to free_pages()?
 22 * <rth> zait: walk the page tables?  It's only two or three level after all.
 23 * <rth> zait: you have to walk them anyway to remove the mapping.
 24 * <zaitcev> Hmm
 25 * <zaitcev> Sounds reasonable
 26 */
 27
 28#include <linux/module.h>
 29#include <linux/sched.h>
 30#include <linux/kernel.h>
 31#include <linux/errno.h>
 32#include <linux/types.h>
 33#include <linux/ioport.h>
 34#include <linux/mm.h>
 35#include <linux/slab.h>
 36#include <linux/pci.h>		/* struct pci_dev */
 37#include <linux/proc_fs.h>
 38#include <linux/seq_file.h>
 39#include <linux/scatterlist.h>
 40#include <linux/of_device.h>
 41
 42#include <asm/io.h>
 43#include <asm/vaddrs.h>
 44#include <asm/oplib.h>
 45#include <asm/prom.h>
 46#include <asm/page.h>
 47#include <asm/pgalloc.h>
 48#include <asm/dma.h>
 49#include <asm/iommu.h>
 50#include <asm/io-unit.h>
 51#include <asm/leon.h>
 52
 53const struct sparc32_dma_ops *sparc32_dma_ops;
 54
 55/* This function must make sure that caches and memory are coherent after DMA
 56 * On LEON systems without cache snooping it flushes the entire D-CACHE.
 57 */
 58static inline void dma_make_coherent(unsigned long pa, unsigned long len)
 59{
 60	if (sparc_cpu_model == sparc_leon) {
 61		if (!sparc_leon3_snooping_enabled())
 62			leon_flush_dcache_all();
 63	}
 64}
 65
 66static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
 67static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
 68    unsigned long size, char *name);
 69static void _sparc_free_io(struct resource *res);
 70
 71static void register_proc_sparc_ioport(void);
 72
 73/* This points to the next to use virtual memory for DVMA mappings */
 74static struct resource _sparc_dvma = {
 75	.name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1
 76};
 77/* This points to the start of I/O mappings, cluable from outside. */
 78/*ext*/ struct resource sparc_iomap = {
 79	.name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1
 80};
 81
 82/*
 83 * Our mini-allocator...
 84 * Boy this is gross! We need it because we must map I/O for
 85 * timers and interrupt controller before the kmalloc is available.
 86 */
 87
 88#define XNMLN  15
 89#define XNRES  10	/* SS-10 uses 8 */
 90
 91struct xresource {
 92	struct resource xres;	/* Must be first */
 93	int xflag;		/* 1 == used */
 94	char xname[XNMLN+1];
 95};
 96
 97static struct xresource xresv[XNRES];
 98
 99static struct xresource *xres_alloc(void) {
100	struct xresource *xrp;
101	int n;
102
103	xrp = xresv;
104	for (n = 0; n < XNRES; n++) {
105		if (xrp->xflag == 0) {
106			xrp->xflag = 1;
107			return xrp;
108		}
109		xrp++;
110	}
111	return NULL;
112}
113
114static void xres_free(struct xresource *xrp) {
115	xrp->xflag = 0;
116}
117
118/*
119 * These are typically used in PCI drivers
120 * which are trying to be cross-platform.
121 *
122 * Bus type is always zero on IIep.
123 */
124void __iomem *ioremap(unsigned long offset, unsigned long size)
125{
126	char name[14];
127
128	sprintf(name, "phys_%08x", (u32)offset);
129	return _sparc_alloc_io(0, offset, size, name);
130}
131EXPORT_SYMBOL(ioremap);
132
133/*
134 * Comlimentary to ioremap().
135 */
136void iounmap(volatile void __iomem *virtual)
137{
138	unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
139	struct resource *res;
140
141	/*
142	 * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
143	 * This probably warrants some sort of hashing.
144	*/
145	if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) {
146		printk("free_io/iounmap: cannot free %lx\n", vaddr);
147		return;
148	}
149	_sparc_free_io(res);
150
151	if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) {
152		xres_free((struct xresource *)res);
153	} else {
154		kfree(res);
155	}
156}
157EXPORT_SYMBOL(iounmap);
158
159void __iomem *of_ioremap(struct resource *res, unsigned long offset,
160			 unsigned long size, char *name)
161{
162	return _sparc_alloc_io(res->flags & 0xF,
163			       res->start + offset,
164			       size, name);
165}
166EXPORT_SYMBOL(of_ioremap);
167
168void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
169{
170	iounmap(base);
171}
172EXPORT_SYMBOL(of_iounmap);
173
174/*
175 * Meat of mapping
176 */
177static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
178    unsigned long size, char *name)
179{
180	static int printed_full;
181	struct xresource *xres;
182	struct resource *res;
183	char *tack;
184	int tlen;
185	void __iomem *va;	/* P3 diag */
186
187	if (name == NULL) name = "???";
188
189	if ((xres = xres_alloc()) != 0) {
190		tack = xres->xname;
191		res = &xres->xres;
192	} else {
193		if (!printed_full) {
194			printk("ioremap: done with statics, switching to malloc\n");
195			printed_full = 1;
196		}
197		tlen = strlen(name);
198		tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
199		if (tack == NULL) return NULL;
200		memset(tack, 0, sizeof(struct resource));
201		res = (struct resource *) tack;
202		tack += sizeof (struct resource);
203	}
204
205	strlcpy(tack, name, XNMLN+1);
206	res->name = tack;
207
208	va = _sparc_ioremap(res, busno, phys, size);
209	/* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */
210	return va;
211}
212
213/*
214 */
215static void __iomem *
216_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)
217{
218	unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
219
220	if (allocate_resource(&sparc_iomap, res,
221	    (offset + sz + PAGE_SIZE-1) & PAGE_MASK,
222	    sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) {
223		/* Usually we cannot see printks in this case. */
224		prom_printf("alloc_io_res(%s): cannot occupy\n",
225		    (res->name != NULL)? res->name: "???");
226		prom_halt();
227	}
228
229	pa &= PAGE_MASK;
230	srmmu_mapiorange(bus, pa, res->start, resource_size(res));
231
232	return (void __iomem *)(unsigned long)(res->start + offset);
233}
234
235/*
236 * Comlimentary to _sparc_ioremap().
237 */
238static void _sparc_free_io(struct resource *res)
239{
240	unsigned long plen;
241
242	plen = resource_size(res);
243	BUG_ON((plen & (PAGE_SIZE-1)) != 0);
244	srmmu_unmapiorange(res->start, plen);
245	release_resource(res);
246}
247
248#ifdef CONFIG_SBUS
249
250void sbus_set_sbus64(struct device *dev, int x)
251{
252	printk("sbus_set_sbus64: unsupported\n");
253}
254EXPORT_SYMBOL(sbus_set_sbus64);
255
256/*
257 * Allocate a chunk of memory suitable for DMA.
258 * Typically devices use them for control blocks.
259 * CPU may access them without any explicit flushing.
260 */
261static void *sbus_alloc_coherent(struct device *dev, size_t len,
262				 dma_addr_t *dma_addrp, gfp_t gfp,
263				 struct dma_attrs *attrs)
264{
265	struct platform_device *op = to_platform_device(dev);
266	unsigned long len_total = PAGE_ALIGN(len);
267	unsigned long va;
268	struct resource *res;
269	int order;
270
271	/* XXX why are some lengths signed, others unsigned? */
272	if (len <= 0) {
273		return NULL;
274	}
275	/* XXX So what is maxphys for us and how do drivers know it? */
276	if (len > 256*1024) {			/* __get_free_pages() limit */
277		return NULL;
278	}
279
280	order = get_order(len_total);
281	if ((va = __get_free_pages(GFP_KERNEL|__GFP_COMP, order)) == 0)
 
282		goto err_nopages;
283
284	if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL)
285		goto err_nomem;
286
287	if (allocate_resource(&_sparc_dvma, res, len_total,
288	    _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
289		printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
290		goto err_nova;
291	}
292
293	// XXX The sbus_map_dma_area does this for us below, see comments.
294	// srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
295	/*
296	 * XXX That's where sdev would be used. Currently we load
297	 * all iommu tables with the same translations.
298	 */
299	if (sbus_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
300		goto err_noiommu;
301
302	res->name = op->dev.of_node->name;
303
304	return (void *)(unsigned long)res->start;
305
306err_noiommu:
307	release_resource(res);
308err_nova:
309	kfree(res);
310err_nomem:
311	free_pages(va, order);
312err_nopages:
313	return NULL;
314}
315
316static void sbus_free_coherent(struct device *dev, size_t n, void *p,
317			       dma_addr_t ba, struct dma_attrs *attrs)
318{
319	struct resource *res;
320	struct page *pgv;
321
322	if ((res = lookup_resource(&_sparc_dvma,
323	    (unsigned long)p)) == NULL) {
324		printk("sbus_free_consistent: cannot free %p\n", p);
325		return;
326	}
327
328	if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
329		printk("sbus_free_consistent: unaligned va %p\n", p);
330		return;
331	}
332
333	n = PAGE_ALIGN(n);
334	if (resource_size(res) != n) {
335		printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
336		    (long)resource_size(res), n);
337		return;
338	}
339
340	release_resource(res);
341	kfree(res);
342
343	pgv = virt_to_page(p);
344	sbus_unmap_dma_area(dev, ba, n);
345
346	__free_pages(pgv, get_order(n));
347}
348
349/*
350 * Map a chunk of memory so that devices can see it.
351 * CPU view of this memory may be inconsistent with
352 * a device view and explicit flushing is necessary.
353 */
354static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
355				unsigned long offset, size_t len,
356				enum dma_data_direction dir,
357				struct dma_attrs *attrs)
358{
359	void *va = page_address(page) + offset;
360
361	/* XXX why are some lengths signed, others unsigned? */
362	if (len <= 0) {
363		return 0;
364	}
365	/* XXX So what is maxphys for us and how do drivers know it? */
366	if (len > 256*1024) {			/* __get_free_pages() limit */
367		return 0;
368	}
369	return mmu_get_scsi_one(dev, va, len);
370}
371
372static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
373			    enum dma_data_direction dir, struct dma_attrs *attrs)
374{
375	mmu_release_scsi_one(dev, ba, n);
376}
377
378static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
379		       enum dma_data_direction dir, struct dma_attrs *attrs)
380{
381	mmu_get_scsi_sgl(dev, sg, n);
382	return n;
383}
384
385static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
386			  enum dma_data_direction dir, struct dma_attrs *attrs)
387{
388	mmu_release_scsi_sgl(dev, sg, n);
389}
390
391static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
392				 int n,	enum dma_data_direction dir)
393{
394	BUG();
395}
396
397static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
398				    int n, enum dma_data_direction dir)
399{
400	BUG();
401}
402
403struct dma_map_ops sbus_dma_ops = {
404	.alloc			= sbus_alloc_coherent,
405	.free			= sbus_free_coherent,
406	.map_page		= sbus_map_page,
407	.unmap_page		= sbus_unmap_page,
408	.map_sg			= sbus_map_sg,
409	.unmap_sg		= sbus_unmap_sg,
410	.sync_sg_for_cpu	= sbus_sync_sg_for_cpu,
411	.sync_sg_for_device	= sbus_sync_sg_for_device,
412};
413
414static int __init sparc_register_ioport(void)
415{
416	register_proc_sparc_ioport();
417
418	return 0;
419}
420
421arch_initcall(sparc_register_ioport);
422
423#endif /* CONFIG_SBUS */
424
425
426/* Allocate and map kernel buffer using consistent mode DMA for a device.
427 * hwdev should be valid struct pci_dev pointer for PCI devices.
428 */
429static void *pci32_alloc_coherent(struct device *dev, size_t len,
430				  dma_addr_t *pba, gfp_t gfp,
431				  struct dma_attrs *attrs)
432{
433	unsigned long len_total = PAGE_ALIGN(len);
434	void *va;
435	struct resource *res;
436	int order;
437
438	if (len == 0) {
439		return NULL;
440	}
441	if (len > 256*1024) {			/* __get_free_pages() limit */
442		return NULL;
443	}
444
445	order = get_order(len_total);
446	va = (void *) __get_free_pages(GFP_KERNEL, order);
447	if (va == NULL) {
448		printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
449		goto err_nopages;
450	}
451
452	if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
453		printk("pci_alloc_consistent: no core\n");
454		goto err_nomem;
455	}
456
457	if (allocate_resource(&_sparc_dvma, res, len_total,
458	    _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
459		printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
460		goto err_nova;
461	}
462	srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
463
464	*pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
465	return (void *) res->start;
466
467err_nova:
468	kfree(res);
469err_nomem:
470	free_pages((unsigned long)va, order);
471err_nopages:
472	return NULL;
473}
474
475/* Free and unmap a consistent DMA buffer.
476 * cpu_addr is what was returned from pci_alloc_consistent,
477 * size must be the same as what as passed into pci_alloc_consistent,
478 * and likewise dma_addr must be the same as what *dma_addrp was set to.
479 *
480 * References to the memory and mappings associated with cpu_addr/dma_addr
481 * past this call are illegal.
482 */
483static void pci32_free_coherent(struct device *dev, size_t n, void *p,
484				dma_addr_t ba, struct dma_attrs *attrs)
485{
486	struct resource *res;
487
488	if ((res = lookup_resource(&_sparc_dvma,
489	    (unsigned long)p)) == NULL) {
490		printk("pci_free_consistent: cannot free %p\n", p);
491		return;
492	}
493
494	if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
495		printk("pci_free_consistent: unaligned va %p\n", p);
496		return;
497	}
498
499	n = PAGE_ALIGN(n);
500	if (resource_size(res) != n) {
501		printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
502		    (long)resource_size(res), (long)n);
503		return;
504	}
505
506	dma_make_coherent(ba, n);
507	srmmu_unmapiorange((unsigned long)p, n);
508
509	release_resource(res);
510	kfree(res);
511	free_pages((unsigned long)phys_to_virt(ba), get_order(n));
512}
513
514/*
515 * Same as pci_map_single, but with pages.
516 */
517static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
518				 unsigned long offset, size_t size,
519				 enum dma_data_direction dir,
520				 struct dma_attrs *attrs)
521{
522	/* IIep is write-through, not flushing. */
523	return page_to_phys(page) + offset;
524}
525
526static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size,
527			     enum dma_data_direction dir, struct dma_attrs *attrs)
528{
529	if (dir != PCI_DMA_TODEVICE)
530		dma_make_coherent(ba, PAGE_ALIGN(size));
531}
532
533/* Map a set of buffers described by scatterlist in streaming
534 * mode for DMA.  This is the scather-gather version of the
535 * above pci_map_single interface.  Here the scatter gather list
536 * elements are each tagged with the appropriate dma address
537 * and length.  They are obtained via sg_dma_{address,length}(SG).
538 *
539 * NOTE: An implementation may be able to use a smaller number of
540 *       DMA address/length pairs than there are SG table elements.
541 *       (for example via virtual mapping capabilities)
542 *       The routine returns the number of addr/length pairs actually
543 *       used, at most nents.
544 *
545 * Device ownership issues as mentioned above for pci_map_single are
546 * the same here.
547 */
548static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
549			int nents, enum dma_data_direction dir,
550			struct dma_attrs *attrs)
551{
552	struct scatterlist *sg;
553	int n;
554
555	/* IIep is write-through, not flushing. */
556	for_each_sg(sgl, sg, nents, n) {
557		sg->dma_address = sg_phys(sg);
558		sg->dma_length = sg->length;
559	}
560	return nents;
561}
562
563/* Unmap a set of streaming mode DMA translations.
564 * Again, cpu read rules concerning calls here are the same as for
565 * pci_unmap_single() above.
566 */
567static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
568			   int nents, enum dma_data_direction dir,
569			   struct dma_attrs *attrs)
570{
571	struct scatterlist *sg;
572	int n;
573
574	if (dir != PCI_DMA_TODEVICE) {
575		for_each_sg(sgl, sg, nents, n) {
576			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
577		}
578	}
579}
580
581/* Make physical memory consistent for a single
582 * streaming mode DMA translation before or after a transfer.
583 *
584 * If you perform a pci_map_single() but wish to interrogate the
585 * buffer using the cpu, yet do not wish to teardown the PCI dma
586 * mapping, you must call this function before doing so.  At the
587 * next point you give the PCI dma address back to the card, you
588 * must first perform a pci_dma_sync_for_device, and then the
589 * device again owns the buffer.
590 */
591static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
592				      size_t size, enum dma_data_direction dir)
593{
594	if (dir != PCI_DMA_TODEVICE) {
595		dma_make_coherent(ba, PAGE_ALIGN(size));
596	}
597}
598
599static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
600					 size_t size, enum dma_data_direction dir)
601{
602	if (dir != PCI_DMA_TODEVICE) {
603		dma_make_coherent(ba, PAGE_ALIGN(size));
604	}
605}
606
607/* Make physical memory consistent for a set of streaming
608 * mode DMA translations after a transfer.
609 *
610 * The same as pci_dma_sync_single_* but for a scatter-gather list,
611 * same rules and usage.
612 */
613static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
614				  int nents, enum dma_data_direction dir)
615{
616	struct scatterlist *sg;
617	int n;
618
619	if (dir != PCI_DMA_TODEVICE) {
620		for_each_sg(sgl, sg, nents, n) {
621			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
622		}
623	}
624}
625
626static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
627				     int nents, enum dma_data_direction dir)
628{
629	struct scatterlist *sg;
630	int n;
631
632	if (dir != PCI_DMA_TODEVICE) {
633		for_each_sg(sgl, sg, nents, n) {
634			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
635		}
636	}
637}
638
639struct dma_map_ops pci32_dma_ops = {
640	.alloc			= pci32_alloc_coherent,
641	.free			= pci32_free_coherent,
642	.map_page		= pci32_map_page,
643	.unmap_page		= pci32_unmap_page,
644	.map_sg			= pci32_map_sg,
645	.unmap_sg		= pci32_unmap_sg,
646	.sync_single_for_cpu	= pci32_sync_single_for_cpu,
647	.sync_single_for_device	= pci32_sync_single_for_device,
648	.sync_sg_for_cpu	= pci32_sync_sg_for_cpu,
649	.sync_sg_for_device	= pci32_sync_sg_for_device,
650};
651EXPORT_SYMBOL(pci32_dma_ops);
652
653/* leon re-uses pci32_dma_ops */
654struct dma_map_ops *leon_dma_ops = &pci32_dma_ops;
655EXPORT_SYMBOL(leon_dma_ops);
656
657struct dma_map_ops *dma_ops = &sbus_dma_ops;
658EXPORT_SYMBOL(dma_ops);
659
660
661/*
662 * Return whether the given PCI device DMA address mask can be
663 * supported properly.  For example, if your device can only drive the
664 * low 24-bits during PCI bus mastering, then you would pass
665 * 0x00ffffff as the mask to this function.
666 */
667int dma_supported(struct device *dev, u64 mask)
668{
669#ifdef CONFIG_PCI
670	if (dev->bus == &pci_bus_type)
671		return 1;
672#endif
673	return 0;
674}
675EXPORT_SYMBOL(dma_supported);
676
677#ifdef CONFIG_PROC_FS
678
679static int sparc_io_proc_show(struct seq_file *m, void *v)
680{
681	struct resource *root = m->private, *r;
682	const char *nm;
683
684	for (r = root->child; r != NULL; r = r->sibling) {
685		if ((nm = r->name) == 0) nm = "???";
686		seq_printf(m, "%016llx-%016llx: %s\n",
687				(unsigned long long)r->start,
688				(unsigned long long)r->end, nm);
689	}
690
691	return 0;
692}
693
694static int sparc_io_proc_open(struct inode *inode, struct file *file)
695{
696	return single_open(file, sparc_io_proc_show, PDE(inode)->data);
697}
698
699static const struct file_operations sparc_io_proc_fops = {
700	.owner		= THIS_MODULE,
701	.open		= sparc_io_proc_open,
702	.read		= seq_read,
703	.llseek		= seq_lseek,
704	.release	= single_release,
705};
706#endif /* CONFIG_PROC_FS */
707
708static void register_proc_sparc_ioport(void)
709{
710#ifdef CONFIG_PROC_FS
711	proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap);
712	proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma);
713#endif
714}
v4.6
  1/*
  2 * ioport.c:  Simple io mapping allocator.
  3 *
  4 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
  6 *
  7 * 1996: sparc_free_io, 1999: ioremap()/iounmap() by Pete Zaitcev.
  8 *
  9 * 2000/01/29
 10 * <rth> zait: as long as pci_alloc_consistent produces something addressable, 
 11 *	things are ok.
 12 * <zaitcev> rth: no, it is relevant, because get_free_pages returns you a
 13 *	pointer into the big page mapping
 14 * <rth> zait: so what?
 15 * <rth> zait: remap_it_my_way(virt_to_phys(get_free_page()))
 16 * <zaitcev> Hmm
 17 * <zaitcev> Suppose I did this remap_it_my_way(virt_to_phys(get_free_page())).
 18 *	So far so good.
 19 * <zaitcev> Now, driver calls pci_free_consistent(with result of
 20 *	remap_it_my_way()).
 21 * <zaitcev> How do you find the address to pass to free_pages()?
 22 * <rth> zait: walk the page tables?  It's only two or three level after all.
 23 * <rth> zait: you have to walk them anyway to remove the mapping.
 24 * <zaitcev> Hmm
 25 * <zaitcev> Sounds reasonable
 26 */
 27
 28#include <linux/module.h>
 29#include <linux/sched.h>
 30#include <linux/kernel.h>
 31#include <linux/errno.h>
 32#include <linux/types.h>
 33#include <linux/ioport.h>
 34#include <linux/mm.h>
 35#include <linux/slab.h>
 36#include <linux/pci.h>		/* struct pci_dev */
 37#include <linux/proc_fs.h>
 38#include <linux/seq_file.h>
 39#include <linux/scatterlist.h>
 40#include <linux/of_device.h>
 41
 42#include <asm/io.h>
 43#include <asm/vaddrs.h>
 44#include <asm/oplib.h>
 45#include <asm/prom.h>
 46#include <asm/page.h>
 47#include <asm/pgalloc.h>
 48#include <asm/dma.h>
 49#include <asm/iommu.h>
 50#include <asm/io-unit.h>
 51#include <asm/leon.h>
 52
 53const struct sparc32_dma_ops *sparc32_dma_ops;
 54
 55/* This function must make sure that caches and memory are coherent after DMA
 56 * On LEON systems without cache snooping it flushes the entire D-CACHE.
 57 */
 58static inline void dma_make_coherent(unsigned long pa, unsigned long len)
 59{
 60	if (sparc_cpu_model == sparc_leon) {
 61		if (!sparc_leon3_snooping_enabled())
 62			leon_flush_dcache_all();
 63	}
 64}
 65
 66static void __iomem *_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz);
 67static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
 68    unsigned long size, char *name);
 69static void _sparc_free_io(struct resource *res);
 70
 71static void register_proc_sparc_ioport(void);
 72
 73/* This points to the next to use virtual memory for DVMA mappings */
 74static struct resource _sparc_dvma = {
 75	.name = "sparc_dvma", .start = DVMA_VADDR, .end = DVMA_END - 1
 76};
 77/* This points to the start of I/O mappings, cluable from outside. */
 78/*ext*/ struct resource sparc_iomap = {
 79	.name = "sparc_iomap", .start = IOBASE_VADDR, .end = IOBASE_END - 1
 80};
 81
 82/*
 83 * Our mini-allocator...
 84 * Boy this is gross! We need it because we must map I/O for
 85 * timers and interrupt controller before the kmalloc is available.
 86 */
 87
 88#define XNMLN  15
 89#define XNRES  10	/* SS-10 uses 8 */
 90
 91struct xresource {
 92	struct resource xres;	/* Must be first */
 93	int xflag;		/* 1 == used */
 94	char xname[XNMLN+1];
 95};
 96
 97static struct xresource xresv[XNRES];
 98
 99static struct xresource *xres_alloc(void) {
100	struct xresource *xrp;
101	int n;
102
103	xrp = xresv;
104	for (n = 0; n < XNRES; n++) {
105		if (xrp->xflag == 0) {
106			xrp->xflag = 1;
107			return xrp;
108		}
109		xrp++;
110	}
111	return NULL;
112}
113
114static void xres_free(struct xresource *xrp) {
115	xrp->xflag = 0;
116}
117
118/*
119 * These are typically used in PCI drivers
120 * which are trying to be cross-platform.
121 *
122 * Bus type is always zero on IIep.
123 */
124void __iomem *ioremap(unsigned long offset, unsigned long size)
125{
126	char name[14];
127
128	sprintf(name, "phys_%08x", (u32)offset);
129	return _sparc_alloc_io(0, offset, size, name);
130}
131EXPORT_SYMBOL(ioremap);
132
133/*
134 * Complementary to ioremap().
135 */
136void iounmap(volatile void __iomem *virtual)
137{
138	unsigned long vaddr = (unsigned long) virtual & PAGE_MASK;
139	struct resource *res;
140
141	/*
142	 * XXX Too slow. Can have 8192 DVMA pages on sun4m in the worst case.
143	 * This probably warrants some sort of hashing.
144	*/
145	if ((res = lookup_resource(&sparc_iomap, vaddr)) == NULL) {
146		printk("free_io/iounmap: cannot free %lx\n", vaddr);
147		return;
148	}
149	_sparc_free_io(res);
150
151	if ((char *)res >= (char*)xresv && (char *)res < (char *)&xresv[XNRES]) {
152		xres_free((struct xresource *)res);
153	} else {
154		kfree(res);
155	}
156}
157EXPORT_SYMBOL(iounmap);
158
159void __iomem *of_ioremap(struct resource *res, unsigned long offset,
160			 unsigned long size, char *name)
161{
162	return _sparc_alloc_io(res->flags & 0xF,
163			       res->start + offset,
164			       size, name);
165}
166EXPORT_SYMBOL(of_ioremap);
167
168void of_iounmap(struct resource *res, void __iomem *base, unsigned long size)
169{
170	iounmap(base);
171}
172EXPORT_SYMBOL(of_iounmap);
173
174/*
175 * Meat of mapping
176 */
177static void __iomem *_sparc_alloc_io(unsigned int busno, unsigned long phys,
178    unsigned long size, char *name)
179{
180	static int printed_full;
181	struct xresource *xres;
182	struct resource *res;
183	char *tack;
184	int tlen;
185	void __iomem *va;	/* P3 diag */
186
187	if (name == NULL) name = "???";
188
189	if ((xres = xres_alloc()) != NULL) {
190		tack = xres->xname;
191		res = &xres->xres;
192	} else {
193		if (!printed_full) {
194			printk("ioremap: done with statics, switching to malloc\n");
195			printed_full = 1;
196		}
197		tlen = strlen(name);
198		tack = kmalloc(sizeof (struct resource) + tlen + 1, GFP_KERNEL);
199		if (tack == NULL) return NULL;
200		memset(tack, 0, sizeof(struct resource));
201		res = (struct resource *) tack;
202		tack += sizeof (struct resource);
203	}
204
205	strlcpy(tack, name, XNMLN+1);
206	res->name = tack;
207
208	va = _sparc_ioremap(res, busno, phys, size);
209	/* printk("ioremap(0x%x:%08lx[0x%lx])=%p\n", busno, phys, size, va); */ /* P3 diag */
210	return va;
211}
212
213/*
214 */
215static void __iomem *
216_sparc_ioremap(struct resource *res, u32 bus, u32 pa, int sz)
217{
218	unsigned long offset = ((unsigned long) pa) & (~PAGE_MASK);
219
220	if (allocate_resource(&sparc_iomap, res,
221	    (offset + sz + PAGE_SIZE-1) & PAGE_MASK,
222	    sparc_iomap.start, sparc_iomap.end, PAGE_SIZE, NULL, NULL) != 0) {
223		/* Usually we cannot see printks in this case. */
224		prom_printf("alloc_io_res(%s): cannot occupy\n",
225		    (res->name != NULL)? res->name: "???");
226		prom_halt();
227	}
228
229	pa &= PAGE_MASK;
230	srmmu_mapiorange(bus, pa, res->start, resource_size(res));
231
232	return (void __iomem *)(unsigned long)(res->start + offset);
233}
234
235/*
236 * Complementary to _sparc_ioremap().
237 */
238static void _sparc_free_io(struct resource *res)
239{
240	unsigned long plen;
241
242	plen = resource_size(res);
243	BUG_ON((plen & (PAGE_SIZE-1)) != 0);
244	srmmu_unmapiorange(res->start, plen);
245	release_resource(res);
246}
247
248#ifdef CONFIG_SBUS
249
250void sbus_set_sbus64(struct device *dev, int x)
251{
252	printk("sbus_set_sbus64: unsupported\n");
253}
254EXPORT_SYMBOL(sbus_set_sbus64);
255
256/*
257 * Allocate a chunk of memory suitable for DMA.
258 * Typically devices use them for control blocks.
259 * CPU may access them without any explicit flushing.
260 */
261static void *sbus_alloc_coherent(struct device *dev, size_t len,
262				 dma_addr_t *dma_addrp, gfp_t gfp,
263				 struct dma_attrs *attrs)
264{
265	struct platform_device *op = to_platform_device(dev);
266	unsigned long len_total = PAGE_ALIGN(len);
267	unsigned long va;
268	struct resource *res;
269	int order;
270
271	/* XXX why are some lengths signed, others unsigned? */
272	if (len <= 0) {
273		return NULL;
274	}
275	/* XXX So what is maxphys for us and how do drivers know it? */
276	if (len > 256*1024) {			/* __get_free_pages() limit */
277		return NULL;
278	}
279
280	order = get_order(len_total);
281	va = __get_free_pages(gfp, order);
282	if (va == 0)
283		goto err_nopages;
284
285	if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL)
286		goto err_nomem;
287
288	if (allocate_resource(&_sparc_dvma, res, len_total,
289	    _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
290		printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
291		goto err_nova;
292	}
293
294	// XXX The sbus_map_dma_area does this for us below, see comments.
295	// srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
296	/*
297	 * XXX That's where sdev would be used. Currently we load
298	 * all iommu tables with the same translations.
299	 */
300	if (sbus_map_dma_area(dev, dma_addrp, va, res->start, len_total) != 0)
301		goto err_noiommu;
302
303	res->name = op->dev.of_node->name;
304
305	return (void *)(unsigned long)res->start;
306
307err_noiommu:
308	release_resource(res);
309err_nova:
310	kfree(res);
311err_nomem:
312	free_pages(va, order);
313err_nopages:
314	return NULL;
315}
316
317static void sbus_free_coherent(struct device *dev, size_t n, void *p,
318			       dma_addr_t ba, struct dma_attrs *attrs)
319{
320	struct resource *res;
321	struct page *pgv;
322
323	if ((res = lookup_resource(&_sparc_dvma,
324	    (unsigned long)p)) == NULL) {
325		printk("sbus_free_consistent: cannot free %p\n", p);
326		return;
327	}
328
329	if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
330		printk("sbus_free_consistent: unaligned va %p\n", p);
331		return;
332	}
333
334	n = PAGE_ALIGN(n);
335	if (resource_size(res) != n) {
336		printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
337		    (long)resource_size(res), n);
338		return;
339	}
340
341	release_resource(res);
342	kfree(res);
343
344	pgv = virt_to_page(p);
345	sbus_unmap_dma_area(dev, ba, n);
346
347	__free_pages(pgv, get_order(n));
348}
349
350/*
351 * Map a chunk of memory so that devices can see it.
352 * CPU view of this memory may be inconsistent with
353 * a device view and explicit flushing is necessary.
354 */
355static dma_addr_t sbus_map_page(struct device *dev, struct page *page,
356				unsigned long offset, size_t len,
357				enum dma_data_direction dir,
358				struct dma_attrs *attrs)
359{
360	void *va = page_address(page) + offset;
361
362	/* XXX why are some lengths signed, others unsigned? */
363	if (len <= 0) {
364		return 0;
365	}
366	/* XXX So what is maxphys for us and how do drivers know it? */
367	if (len > 256*1024) {			/* __get_free_pages() limit */
368		return 0;
369	}
370	return mmu_get_scsi_one(dev, va, len);
371}
372
373static void sbus_unmap_page(struct device *dev, dma_addr_t ba, size_t n,
374			    enum dma_data_direction dir, struct dma_attrs *attrs)
375{
376	mmu_release_scsi_one(dev, ba, n);
377}
378
379static int sbus_map_sg(struct device *dev, struct scatterlist *sg, int n,
380		       enum dma_data_direction dir, struct dma_attrs *attrs)
381{
382	mmu_get_scsi_sgl(dev, sg, n);
383	return n;
384}
385
386static void sbus_unmap_sg(struct device *dev, struct scatterlist *sg, int n,
387			  enum dma_data_direction dir, struct dma_attrs *attrs)
388{
389	mmu_release_scsi_sgl(dev, sg, n);
390}
391
392static void sbus_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
393				 int n,	enum dma_data_direction dir)
394{
395	BUG();
396}
397
398static void sbus_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
399				    int n, enum dma_data_direction dir)
400{
401	BUG();
402}
403
404static struct dma_map_ops sbus_dma_ops = {
405	.alloc			= sbus_alloc_coherent,
406	.free			= sbus_free_coherent,
407	.map_page		= sbus_map_page,
408	.unmap_page		= sbus_unmap_page,
409	.map_sg			= sbus_map_sg,
410	.unmap_sg		= sbus_unmap_sg,
411	.sync_sg_for_cpu	= sbus_sync_sg_for_cpu,
412	.sync_sg_for_device	= sbus_sync_sg_for_device,
413};
414
415static int __init sparc_register_ioport(void)
416{
417	register_proc_sparc_ioport();
418
419	return 0;
420}
421
422arch_initcall(sparc_register_ioport);
423
424#endif /* CONFIG_SBUS */
425
426
427/* Allocate and map kernel buffer using consistent mode DMA for a device.
428 * hwdev should be valid struct pci_dev pointer for PCI devices.
429 */
430static void *pci32_alloc_coherent(struct device *dev, size_t len,
431				  dma_addr_t *pba, gfp_t gfp,
432				  struct dma_attrs *attrs)
433{
434	unsigned long len_total = PAGE_ALIGN(len);
435	void *va;
436	struct resource *res;
437	int order;
438
439	if (len == 0) {
440		return NULL;
441	}
442	if (len > 256*1024) {			/* __get_free_pages() limit */
443		return NULL;
444	}
445
446	order = get_order(len_total);
447	va = (void *) __get_free_pages(gfp, order);
448	if (va == NULL) {
449		printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
450		goto err_nopages;
451	}
452
453	if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
454		printk("pci_alloc_consistent: no core\n");
455		goto err_nomem;
456	}
457
458	if (allocate_resource(&_sparc_dvma, res, len_total,
459	    _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
460		printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
461		goto err_nova;
462	}
463	srmmu_mapiorange(0, virt_to_phys(va), res->start, len_total);
464
465	*pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
466	return (void *) res->start;
467
468err_nova:
469	kfree(res);
470err_nomem:
471	free_pages((unsigned long)va, order);
472err_nopages:
473	return NULL;
474}
475
476/* Free and unmap a consistent DMA buffer.
477 * cpu_addr is what was returned from pci_alloc_consistent,
478 * size must be the same as what as passed into pci_alloc_consistent,
479 * and likewise dma_addr must be the same as what *dma_addrp was set to.
480 *
481 * References to the memory and mappings associated with cpu_addr/dma_addr
482 * past this call are illegal.
483 */
484static void pci32_free_coherent(struct device *dev, size_t n, void *p,
485				dma_addr_t ba, struct dma_attrs *attrs)
486{
487	struct resource *res;
488
489	if ((res = lookup_resource(&_sparc_dvma,
490	    (unsigned long)p)) == NULL) {
491		printk("pci_free_consistent: cannot free %p\n", p);
492		return;
493	}
494
495	if (((unsigned long)p & (PAGE_SIZE-1)) != 0) {
496		printk("pci_free_consistent: unaligned va %p\n", p);
497		return;
498	}
499
500	n = PAGE_ALIGN(n);
501	if (resource_size(res) != n) {
502		printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
503		    (long)resource_size(res), (long)n);
504		return;
505	}
506
507	dma_make_coherent(ba, n);
508	srmmu_unmapiorange((unsigned long)p, n);
509
510	release_resource(res);
511	kfree(res);
512	free_pages((unsigned long)phys_to_virt(ba), get_order(n));
513}
514
515/*
516 * Same as pci_map_single, but with pages.
517 */
518static dma_addr_t pci32_map_page(struct device *dev, struct page *page,
519				 unsigned long offset, size_t size,
520				 enum dma_data_direction dir,
521				 struct dma_attrs *attrs)
522{
523	/* IIep is write-through, not flushing. */
524	return page_to_phys(page) + offset;
525}
526
527static void pci32_unmap_page(struct device *dev, dma_addr_t ba, size_t size,
528			     enum dma_data_direction dir, struct dma_attrs *attrs)
529{
530	if (dir != PCI_DMA_TODEVICE)
531		dma_make_coherent(ba, PAGE_ALIGN(size));
532}
533
534/* Map a set of buffers described by scatterlist in streaming
535 * mode for DMA.  This is the scatter-gather version of the
536 * above pci_map_single interface.  Here the scatter gather list
537 * elements are each tagged with the appropriate dma address
538 * and length.  They are obtained via sg_dma_{address,length}(SG).
539 *
540 * NOTE: An implementation may be able to use a smaller number of
541 *       DMA address/length pairs than there are SG table elements.
542 *       (for example via virtual mapping capabilities)
543 *       The routine returns the number of addr/length pairs actually
544 *       used, at most nents.
545 *
546 * Device ownership issues as mentioned above for pci_map_single are
547 * the same here.
548 */
549static int pci32_map_sg(struct device *device, struct scatterlist *sgl,
550			int nents, enum dma_data_direction dir,
551			struct dma_attrs *attrs)
552{
553	struct scatterlist *sg;
554	int n;
555
556	/* IIep is write-through, not flushing. */
557	for_each_sg(sgl, sg, nents, n) {
558		sg->dma_address = sg_phys(sg);
559		sg->dma_length = sg->length;
560	}
561	return nents;
562}
563
564/* Unmap a set of streaming mode DMA translations.
565 * Again, cpu read rules concerning calls here are the same as for
566 * pci_unmap_single() above.
567 */
568static void pci32_unmap_sg(struct device *dev, struct scatterlist *sgl,
569			   int nents, enum dma_data_direction dir,
570			   struct dma_attrs *attrs)
571{
572	struct scatterlist *sg;
573	int n;
574
575	if (dir != PCI_DMA_TODEVICE) {
576		for_each_sg(sgl, sg, nents, n) {
577			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
578		}
579	}
580}
581
582/* Make physical memory consistent for a single
583 * streaming mode DMA translation before or after a transfer.
584 *
585 * If you perform a pci_map_single() but wish to interrogate the
586 * buffer using the cpu, yet do not wish to teardown the PCI dma
587 * mapping, you must call this function before doing so.  At the
588 * next point you give the PCI dma address back to the card, you
589 * must first perform a pci_dma_sync_for_device, and then the
590 * device again owns the buffer.
591 */
592static void pci32_sync_single_for_cpu(struct device *dev, dma_addr_t ba,
593				      size_t size, enum dma_data_direction dir)
594{
595	if (dir != PCI_DMA_TODEVICE) {
596		dma_make_coherent(ba, PAGE_ALIGN(size));
597	}
598}
599
600static void pci32_sync_single_for_device(struct device *dev, dma_addr_t ba,
601					 size_t size, enum dma_data_direction dir)
602{
603	if (dir != PCI_DMA_TODEVICE) {
604		dma_make_coherent(ba, PAGE_ALIGN(size));
605	}
606}
607
608/* Make physical memory consistent for a set of streaming
609 * mode DMA translations after a transfer.
610 *
611 * The same as pci_dma_sync_single_* but for a scatter-gather list,
612 * same rules and usage.
613 */
614static void pci32_sync_sg_for_cpu(struct device *dev, struct scatterlist *sgl,
615				  int nents, enum dma_data_direction dir)
616{
617	struct scatterlist *sg;
618	int n;
619
620	if (dir != PCI_DMA_TODEVICE) {
621		for_each_sg(sgl, sg, nents, n) {
622			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
623		}
624	}
625}
626
627static void pci32_sync_sg_for_device(struct device *device, struct scatterlist *sgl,
628				     int nents, enum dma_data_direction dir)
629{
630	struct scatterlist *sg;
631	int n;
632
633	if (dir != PCI_DMA_TODEVICE) {
634		for_each_sg(sgl, sg, nents, n) {
635			dma_make_coherent(sg_phys(sg), PAGE_ALIGN(sg->length));
636		}
637	}
638}
639
640struct dma_map_ops pci32_dma_ops = {
641	.alloc			= pci32_alloc_coherent,
642	.free			= pci32_free_coherent,
643	.map_page		= pci32_map_page,
644	.unmap_page		= pci32_unmap_page,
645	.map_sg			= pci32_map_sg,
646	.unmap_sg		= pci32_unmap_sg,
647	.sync_single_for_cpu	= pci32_sync_single_for_cpu,
648	.sync_single_for_device	= pci32_sync_single_for_device,
649	.sync_sg_for_cpu	= pci32_sync_sg_for_cpu,
650	.sync_sg_for_device	= pci32_sync_sg_for_device,
651};
652EXPORT_SYMBOL(pci32_dma_ops);
653
654/* leon re-uses pci32_dma_ops */
655struct dma_map_ops *leon_dma_ops = &pci32_dma_ops;
656EXPORT_SYMBOL(leon_dma_ops);
657
658struct dma_map_ops *dma_ops = &sbus_dma_ops;
659EXPORT_SYMBOL(dma_ops);
660
661
662/*
663 * Return whether the given PCI device DMA address mask can be
664 * supported properly.  For example, if your device can only drive the
665 * low 24-bits during PCI bus mastering, then you would pass
666 * 0x00ffffff as the mask to this function.
667 */
668int dma_supported(struct device *dev, u64 mask)
669{
670	if (dev_is_pci(dev))
 
671		return 1;
672
673	return 0;
674}
675EXPORT_SYMBOL(dma_supported);
676
677#ifdef CONFIG_PROC_FS
678
679static int sparc_io_proc_show(struct seq_file *m, void *v)
680{
681	struct resource *root = m->private, *r;
682	const char *nm;
683
684	for (r = root->child; r != NULL; r = r->sibling) {
685		if ((nm = r->name) == NULL) nm = "???";
686		seq_printf(m, "%016llx-%016llx: %s\n",
687				(unsigned long long)r->start,
688				(unsigned long long)r->end, nm);
689	}
690
691	return 0;
692}
693
694static int sparc_io_proc_open(struct inode *inode, struct file *file)
695{
696	return single_open(file, sparc_io_proc_show, PDE_DATA(inode));
697}
698
699static const struct file_operations sparc_io_proc_fops = {
700	.owner		= THIS_MODULE,
701	.open		= sparc_io_proc_open,
702	.read		= seq_read,
703	.llseek		= seq_lseek,
704	.release	= single_release,
705};
706#endif /* CONFIG_PROC_FS */
707
708static void register_proc_sparc_ioport(void)
709{
710#ifdef CONFIG_PROC_FS
711	proc_create_data("io_map", 0, NULL, &sparc_io_proc_fops, &sparc_iomap);
712	proc_create_data("dvma_map", 0, NULL, &sparc_io_proc_fops, &_sparc_dvma);
713#endif
714}