Loading...
1/* *********************************************************************
2 * SB1250 Board Support Package
3 *
4 * Global constants and macros File: sb1250_defs.h
5 *
6 * This file contains macros and definitions used by the other
7 * include files.
8 *
9 * SB1250 specification level: User's manual 1/02/02
10 *
11 *********************************************************************
12 *
13 * Copyright 2000,2001,2002,2003
14 * Broadcom Corporation. All rights reserved.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 ********************************************************************* */
31
32#ifndef _SB1250_DEFS_H
33#define _SB1250_DEFS_H
34
35/*
36 * These headers require ANSI C89 string concatenation, and GCC or other
37 * 'long long' (64-bit integer) support.
38 */
39#if !defined(__STDC__) && !defined(_MSC_VER)
40#error SiByte headers require ANSI C89 support
41#endif
42
43
44/* *********************************************************************
45 * Macros for feature tests, used to enable include file features
46 * for chip features only present in certain chip revisions.
47 *
48 * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
49 * which is to be exposed by the headers. If undefined, it defaults to
50 * "all features."
51 *
52 * Use like:
53 *
54 * #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_112x_PASS1
55 *
56 * Generate defines only for that revision of chip.
57 *
58 * #if SIBYTE_HDR_FEATURE(chip,pass)
59 *
60 * True if header features for that revision or later of
61 * that particular chip type are enabled in SIBYTE_HDR_FEATURES.
62 * (Use this to bracket #defines for features present in a given
63 * revision and later.)
64 *
65 * Note that there is no implied ordering between chip types.
66 *
67 * Note also that 'chip' and 'pass' must textually exactly
68 * match the defines below. So, for example,
69 * SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
70 * SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
71 *
72 * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
73 *
74 * Same as SIBYTE_HDR_FEATURE, but true for the named revision
75 * and earlier revisions of the named chip type.
76 *
77 * #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
78 *
79 * Same as SIBYTE_HDR_FEATURE, but only true for the named
80 * revision of the named chip type. (Note that this CANNOT
81 * be used to verify that you're compiling only for that
82 * particular chip/revision. It will be true any time this
83 * chip/revision is included in SIBYTE_HDR_FEATURES.)
84 *
85 * #if SIBYTE_HDR_FEATURE_CHIP(chip)
86 *
87 * True if header features for (any revision of) that chip type
88 * are enabled in SIBYTE_HDR_FEATURES. (Use this to bracket
89 * #defines for features specific to a given chip type.)
90 *
91 * Mask values currently include room for additional revisions of each
92 * chip type, but can be renumbered at will. Note that they MUST fit
93 * into 31 bits and may not include C type constructs, for safe use in
94 * CPP conditionals. Bit positions within chip types DO indicate
95 * ordering, so be careful when adding support for new minor revs.
96 ********************************************************************* */
97
98#define SIBYTE_HDR_FMASK_1250_ALL 0x000000ff
99#define SIBYTE_HDR_FMASK_1250_PASS1 0x00000001
100#define SIBYTE_HDR_FMASK_1250_PASS2 0x00000002
101#define SIBYTE_HDR_FMASK_1250_PASS3 0x00000004
102
103#define SIBYTE_HDR_FMASK_112x_ALL 0x00000f00
104#define SIBYTE_HDR_FMASK_112x_PASS1 0x00000100
105
106#define SIBYTE_HDR_FMASK_1480_ALL 0x0000f000
107#define SIBYTE_HDR_FMASK_1480_PASS1 0x00001000
108#define SIBYTE_HDR_FMASK_1480_PASS2 0x00002000
109
110/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
111#define SIBYTE_HDR_FMASK(chip, pass) \
112 (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
113#define SIBYTE_HDR_FMASK_ALLREVS(chip) \
114 (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
115
116/* Default constant value for all chips, all revisions */
117#define SIBYTE_HDR_FMASK_ALL \
118 (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL \
119 | SIBYTE_HDR_FMASK_1480_ALL)
120
121/* This one is used for the "original" BCM1250/BCM112x chips. We use this
122 to weed out constants and macros that do not exist on later chips like
123 the BCM1480 */
124#define SIBYTE_HDR_FMASK_1250_112x_ALL \
125 (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
126#define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL
127
128#ifndef SIBYTE_HDR_FEATURES
129#define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL
130#endif
131
132
133/* Bit mask for revisions of chip exclusively before the named revision. */
134#define SIBYTE_HDR_FMASK_BEFORE(chip, pass) \
135 ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
136
137/* Bit mask for revisions of chip exclusively after the named revision. */
138#define SIBYTE_HDR_FMASK_AFTER(chip, pass) \
139 (~(SIBYTE_HDR_FMASK(chip, pass) \
140 | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
141
142
143/* True if header features enabled for (any revision of) that chip type. */
144#define SIBYTE_HDR_FEATURE_CHIP(chip) \
145 (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
146
147/* True for all versions of the BCM1250 and BCM1125, but not true for
148 anything else */
149#define SIBYTE_HDR_FEATURE_1250_112x \
150 (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
151/* (!! (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */
152
153/* True if header features enabled for that rev or later, inclusive. */
154#define SIBYTE_HDR_FEATURE(chip, pass) \
155 (!! ((SIBYTE_HDR_FMASK(chip, pass) \
156 | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
157
158/* True if header features enabled for exactly that rev. */
159#define SIBYTE_HDR_FEATURE_EXACT(chip, pass) \
160 (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
161
162/* True if header features enabled for that rev or before, inclusive. */
163#define SIBYTE_HDR_FEATURE_UP_TO(chip, pass) \
164 (!! ((SIBYTE_HDR_FMASK(chip, pass) \
165 | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
166
167
168/* *********************************************************************
169 * Naming schemes for constants in these files:
170 *
171 * M_xxx MASK constant (identifies bits in a register).
172 * For multi-bit fields, all bits in the field will
173 * be set.
174 *
175 * K_xxx "Code" constant (value for data in a multi-bit
176 * field). The value is right justified.
177 *
178 * V_xxx "Value" constant. This is the same as the
179 * corresponding "K_xxx" constant, except it is
180 * shifted to the correct position in the register.
181 *
182 * S_xxx SHIFT constant. This is the number of bits that
183 * a field value (code) needs to be shifted
184 * (towards the left) to put the value in the right
185 * position for the register.
186 *
187 * A_xxx ADDRESS constant. This will be a physical
188 * address. Use the PHYS_TO_K1 macro to generate
189 * a K1SEG address.
190 *
191 * R_xxx RELATIVE offset constant. This is an offset from
192 * an A_xxx constant (usually the first register in
193 * a group).
194 *
195 * G_xxx(X) GET value. This macro obtains a multi-bit field
196 * from a register, masks it, and shifts it to
197 * the bottom of the register (retrieving a K_xxx
198 * value, for example).
199 *
200 * V_xxx(X) VALUE. This macro computes the value of a
201 * K_xxx constant shifted to the correct position
202 * in the register.
203 ********************************************************************* */
204
205
206
207
208/*
209 * Cast to 64-bit number. Presumably the syntax is different in
210 * assembly language.
211 *
212 * Note: you'll need to define uint32_t and uint64_t in your headers.
213 */
214
215#if !defined(__ASSEMBLY__)
216#define _SB_MAKE64(x) ((uint64_t)(x))
217#define _SB_MAKE32(x) ((uint32_t)(x))
218#else
219#define _SB_MAKE64(x) (x)
220#define _SB_MAKE32(x) (x)
221#endif
222
223
224/*
225 * Make a mask for 1 bit at position 'n'
226 */
227
228#define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
229#define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
230
231/*
232 * Make a mask for 'v' bits at position 'n'
233 */
234
235#define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
236#define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
237
238/*
239 * Make a value at 'v' at bit position 'n'
240 */
241
242#define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n))
243#define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n))
244
245#define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
246#define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
247
248/*
249 * Macros to read/write on-chip registers
250 * XXX should we do the PHYS_TO_K1 here?
251 */
252
253
254#if defined(__mips64) && !defined(__ASSEMBLY__)
255#define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
256#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
257#endif /* __ASSEMBLY__ */
258
259#endif
1/* *********************************************************************
2 * SB1250 Board Support Package
3 *
4 * Global constants and macros File: sb1250_defs.h
5 *
6 * This file contains macros and definitions used by the other
7 * include files.
8 *
9 * SB1250 specification level: User's manual 1/02/02
10 *
11 *********************************************************************
12 *
13 * Copyright 2000,2001,2002,2003
14 * Broadcom Corporation. All rights reserved.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 ********************************************************************* */
31
32#ifndef _SB1250_DEFS_H
33#define _SB1250_DEFS_H
34
35/*
36 * These headers require ANSI C89 string concatenation, and GCC or other
37 * 'long long' (64-bit integer) support.
38 */
39#if !defined(__STDC__) && !defined(_MSC_VER)
40#error SiByte headers require ANSI C89 support
41#endif
42
43
44/* *********************************************************************
45 * Macros for feature tests, used to enable include file features
46 * for chip features only present in certain chip revisions.
47 *
48 * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
49 * which is to be exposed by the headers. If undefined, it defaults to
50 * "all features."
51 *
52 * Use like:
53 *
54 * #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_112x_PASS1
55 *
56 * Generate defines only for that revision of chip.
57 *
58 * #if SIBYTE_HDR_FEATURE(chip,pass)
59 *
60 * True if header features for that revision or later of
61 * that particular chip type are enabled in SIBYTE_HDR_FEATURES.
62 * (Use this to bracket #defines for features present in a given
63 * revision and later.)
64 *
65 * Note that there is no implied ordering between chip types.
66 *
67 * Note also that 'chip' and 'pass' must textually exactly
68 * match the defines below. So, for example,
69 * SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
70 * SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
71 *
72 * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
73 *
74 * Same as SIBYTE_HDR_FEATURE, but true for the named revision
75 * and earlier revisions of the named chip type.
76 *
77 * #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
78 *
79 * Same as SIBYTE_HDR_FEATURE, but only true for the named
80 * revision of the named chip type. (Note that this CANNOT
81 * be used to verify that you're compiling only for that
82 * particular chip/revision. It will be true any time this
83 * chip/revision is included in SIBYTE_HDR_FEATURES.)
84 *
85 * #if SIBYTE_HDR_FEATURE_CHIP(chip)
86 *
87 * True if header features for (any revision of) that chip type
88 * are enabled in SIBYTE_HDR_FEATURES. (Use this to bracket
89 * #defines for features specific to a given chip type.)
90 *
91 * Mask values currently include room for additional revisions of each
92 * chip type, but can be renumbered at will. Note that they MUST fit
93 * into 31 bits and may not include C type constructs, for safe use in
94 * CPP conditionals. Bit positions within chip types DO indicate
95 * ordering, so be careful when adding support for new minor revs.
96 ********************************************************************* */
97
98#define SIBYTE_HDR_FMASK_1250_ALL 0x000000ff
99#define SIBYTE_HDR_FMASK_1250_PASS1 0x00000001
100#define SIBYTE_HDR_FMASK_1250_PASS2 0x00000002
101#define SIBYTE_HDR_FMASK_1250_PASS3 0x00000004
102
103#define SIBYTE_HDR_FMASK_112x_ALL 0x00000f00
104#define SIBYTE_HDR_FMASK_112x_PASS1 0x00000100
105
106#define SIBYTE_HDR_FMASK_1480_ALL 0x0000f000
107#define SIBYTE_HDR_FMASK_1480_PASS1 0x00001000
108#define SIBYTE_HDR_FMASK_1480_PASS2 0x00002000
109
110/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */
111#define SIBYTE_HDR_FMASK(chip, pass) \
112 (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
113#define SIBYTE_HDR_FMASK_ALLREVS(chip) \
114 (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
115
116/* Default constant value for all chips, all revisions */
117#define SIBYTE_HDR_FMASK_ALL \
118 (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL \
119 | SIBYTE_HDR_FMASK_1480_ALL)
120
121/* This one is used for the "original" BCM1250/BCM112x chips. We use this
122 to weed out constants and macros that do not exist on later chips like
123 the BCM1480 */
124#define SIBYTE_HDR_FMASK_1250_112x_ALL \
125 (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
126#define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL
127
128#ifndef SIBYTE_HDR_FEATURES
129#define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL
130#endif
131
132
133/* Bit mask for revisions of chip exclusively before the named revision. */
134#define SIBYTE_HDR_FMASK_BEFORE(chip, pass) \
135 ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
136
137/* Bit mask for revisions of chip exclusively after the named revision. */
138#define SIBYTE_HDR_FMASK_AFTER(chip, pass) \
139 (~(SIBYTE_HDR_FMASK(chip, pass) \
140 | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
141
142
143/* True if header features enabled for (any revision of) that chip type. */
144#define SIBYTE_HDR_FEATURE_CHIP(chip) \
145 (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
146
147/* True for all versions of the BCM1250 and BCM1125, but not true for
148 anything else */
149#define SIBYTE_HDR_FEATURE_1250_112x \
150 (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
151/* (!! (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */
152
153/* True if header features enabled for that rev or later, inclusive. */
154#define SIBYTE_HDR_FEATURE(chip, pass) \
155 (!! ((SIBYTE_HDR_FMASK(chip, pass) \
156 | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
157
158/* True if header features enabled for exactly that rev. */
159#define SIBYTE_HDR_FEATURE_EXACT(chip, pass) \
160 (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
161
162/* True if header features enabled for that rev or before, inclusive. */
163#define SIBYTE_HDR_FEATURE_UP_TO(chip, pass) \
164 (!! ((SIBYTE_HDR_FMASK(chip, pass) \
165 | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
166
167
168/* *********************************************************************
169 * Naming schemes for constants in these files:
170 *
171 * M_xxx MASK constant (identifies bits in a register).
172 * For multi-bit fields, all bits in the field will
173 * be set.
174 *
175 * K_xxx "Code" constant (value for data in a multi-bit
176 * field). The value is right justified.
177 *
178 * V_xxx "Value" constant. This is the same as the
179 * corresponding "K_xxx" constant, except it is
180 * shifted to the correct position in the register.
181 *
182 * S_xxx SHIFT constant. This is the number of bits that
183 * a field value (code) needs to be shifted
184 * (towards the left) to put the value in the right
185 * position for the register.
186 *
187 * A_xxx ADDRESS constant. This will be a physical
188 * address. Use the PHYS_TO_K1 macro to generate
189 * a K1SEG address.
190 *
191 * R_xxx RELATIVE offset constant. This is an offset from
192 * an A_xxx constant (usually the first register in
193 * a group).
194 *
195 * G_xxx(X) GET value. This macro obtains a multi-bit field
196 * from a register, masks it, and shifts it to
197 * the bottom of the register (retrieving a K_xxx
198 * value, for example).
199 *
200 * V_xxx(X) VALUE. This macro computes the value of a
201 * K_xxx constant shifted to the correct position
202 * in the register.
203 ********************************************************************* */
204
205
206
207
208/*
209 * Cast to 64-bit number. Presumably the syntax is different in
210 * assembly language.
211 *
212 * Note: you'll need to define uint32_t and uint64_t in your headers.
213 */
214
215#if !defined(__ASSEMBLY__)
216#define _SB_MAKE64(x) ((uint64_t)(x))
217#define _SB_MAKE32(x) ((uint32_t)(x))
218#else
219#define _SB_MAKE64(x) (x)
220#define _SB_MAKE32(x) (x)
221#endif
222
223
224/*
225 * Make a mask for 1 bit at position 'n'
226 */
227
228#define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
229#define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
230
231/*
232 * Make a mask for 'v' bits at position 'n'
233 */
234
235#define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
236#define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
237
238/*
239 * Make a value at 'v' at bit position 'n'
240 */
241
242#define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n))
243#define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n))
244
245#define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
246#define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
247
248/*
249 * Macros to read/write on-chip registers
250 * XXX should we do the PHYS_TO_K1 here?
251 */
252
253
254#if defined(__mips64) && !defined(__ASSEMBLY__)
255#define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
256#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
257#endif /* __ASSEMBLY__ */
258
259#endif