1/*
  2 * R-Car Generation 2 Power management support
  3 *
  4 * Copyright (C) 2013 - 2015  Renesas Electronics Corporation
  5 * Copyright (C) 2011  Renesas Solutions Corp.
  6 * Copyright (C) 2011  Magnus Damm
  7 *
  8 * This file is subject to the terms and conditions of the GNU General Public
  9 * License.  See the file "COPYING" in the main directory of this archive
 10 * for more details.
 11 */
 12
 13#include <linux/kernel.h>
 14#include <linux/of.h>
 15#include <linux/smp.h>
 16#include <asm/io.h>
 17#include "common.h"
 18#include "pm-rcar.h"
 19#include "rcar-gen2.h"
 20
 21/* RST */
 22#define RST		0xe6160000
 23#define CA15BAR		0x0020
 24#define CA7BAR		0x0030
 25#define CA15RESCNT	0x0040
 26#define CA7RESCNT	0x0044
 27
 28/* On-chip RAM */
 29#define MERAM		0xe8080000
 30#define RAM		0xe6300000
 31
 32/* SYSC */
 33#define SYSCIER 0x0c
 34#define SYSCIMR 0x10
 35
 36#if defined(CONFIG_SMP)
 37
 38static void __init rcar_gen2_sysc_init(u32 syscier)
 39{
 40	void __iomem *base = rcar_sysc_init(0xe6180000);
 41
 42	/* enable all interrupt sources, but do not use interrupt handler */
 43	iowrite32(syscier, base + SYSCIER);
 44	iowrite32(0, base + SYSCIMR);
 45}
 46
 47#else /* CONFIG_SMP */
 48
 49static inline void rcar_gen2_sysc_init(u32 syscier) {}
 50
 51#endif /* CONFIG_SMP */
 52
 53void __init rcar_gen2_pm_init(void)
 54{
 55	void __iomem *p;
 56	u32 bar;
 57	static int once;
 58	struct device_node *np, *cpus;
 59	bool has_a7 = false;
 60	bool has_a15 = false;
 61	phys_addr_t boot_vector_addr = 0;
 62	u32 syscier = 0;
 63
 64	if (once++)
 65		return;
 66
 67	cpus = of_find_node_by_path("/cpus");
 68	if (!cpus)
 69		return;
 70
 71	for_each_child_of_node(cpus, np) {
 72		if (of_device_is_compatible(np, "arm,cortex-a15"))
 73			has_a15 = true;
 74		else if (of_device_is_compatible(np, "arm,cortex-a7"))
 75			has_a7 = true;
 76	}
 77
 78	if (of_machine_is_compatible("renesas,r8a7790")) {
 79		boot_vector_addr = MERAM;
 80		syscier = 0x013111ef;
 81
 82	} else if (of_machine_is_compatible("renesas,r8a7791")) {
 83		boot_vector_addr = RAM;
 84		syscier = 0x00111003;
 85	}
 86
 87	/* RAM for jump stub, because BAR requires 256KB aligned address */
 88	p = ioremap_nocache(boot_vector_addr, shmobile_boot_size);
 89	memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
 90	iounmap(p);
 91
 92	/* setup reset vectors */
 93	p = ioremap_nocache(RST, 0x63);
 94	bar = (boot_vector_addr >> 8) & 0xfffffc00;
 95	if (has_a15) {
 96		writel_relaxed(bar, p + CA15BAR);
 97		writel_relaxed(bar | 0x10, p + CA15BAR);
 98
 99		/* de-assert reset for CA15 CPUs */
100		writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) |
101				0xa5a50000, p + CA15RESCNT);
102	}
103	if (has_a7) {
104		writel_relaxed(bar, p + CA7BAR);
105		writel_relaxed(bar | 0x10, p + CA7BAR);
106
107		/* de-assert reset for CA7 CPUs */
108		writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) |
109				0x5a5a0000, p + CA7RESCNT);
110	}
111	iounmap(p);
112
113	rcar_gen2_sysc_init(syscier);
114	shmobile_smp_apmu_suspend_init();
115}