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1/*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/dmapool.h>
16#include <linux/dma-mapping.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/module.h>
20#include <linux/interrupt.h>
21#include <linux/io.h>
22#include <linux/irq.h>
23#include <linux/kernel.h>
24#include <linux/slab.h>
25#include <linux/pm_runtime.h>
26#include <linux/usb/ch9.h>
27#include <linux/usb/gadget.h>
28#include <linux/usb/otg.h>
29#include <linux/usb/chipidea.h>
30
31#include "ci.h"
32#include "udc.h"
33#include "bits.h"
34#include "debug.h"
35
36/* control endpoint description */
37static const struct usb_endpoint_descriptor
38ctrl_endpt_out_desc = {
39 .bLength = USB_DT_ENDPOINT_SIZE,
40 .bDescriptorType = USB_DT_ENDPOINT,
41
42 .bEndpointAddress = USB_DIR_OUT,
43 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
44 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
45};
46
47static const struct usb_endpoint_descriptor
48ctrl_endpt_in_desc = {
49 .bLength = USB_DT_ENDPOINT_SIZE,
50 .bDescriptorType = USB_DT_ENDPOINT,
51
52 .bEndpointAddress = USB_DIR_IN,
53 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
54 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
55};
56
57/**
58 * hw_ep_bit: calculates the bit number
59 * @num: endpoint number
60 * @dir: endpoint direction
61 *
62 * This function returns bit number
63 */
64static inline int hw_ep_bit(int num, int dir)
65{
66 return num + (dir ? 16 : 0);
67}
68
69static inline int ep_to_bit(struct ci13xxx *udc, int n)
70{
71 int fill = 16 - udc->hw_ep_max / 2;
72
73 if (n >= udc->hw_ep_max / 2)
74 n += fill;
75
76 return n;
77}
78
79/**
80 * hw_device_state: enables/disables interrupts (execute without interruption)
81 * @dma: 0 => disable, !0 => enable and set dma engine
82 *
83 * This function returns an error code
84 */
85static int hw_device_state(struct ci13xxx *udc, u32 dma)
86{
87 if (dma) {
88 hw_write(udc, OP_ENDPTLISTADDR, ~0, dma);
89 /* interrupt, error, port change, reset, sleep/suspend */
90 hw_write(udc, OP_USBINTR, ~0,
91 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
92 hw_write(udc, OP_USBCMD, USBCMD_RS, USBCMD_RS);
93 } else {
94 hw_write(udc, OP_USBINTR, ~0, 0);
95 }
96 return 0;
97}
98
99/**
100 * hw_ep_flush: flush endpoint fifo (execute without interruption)
101 * @num: endpoint number
102 * @dir: endpoint direction
103 *
104 * This function returns an error code
105 */
106static int hw_ep_flush(struct ci13xxx *udc, int num, int dir)
107{
108 int n = hw_ep_bit(num, dir);
109
110 do {
111 /* flush any pending transfer */
112 hw_write(udc, OP_ENDPTFLUSH, BIT(n), BIT(n));
113 while (hw_read(udc, OP_ENDPTFLUSH, BIT(n)))
114 cpu_relax();
115 } while (hw_read(udc, OP_ENDPTSTAT, BIT(n)));
116
117 return 0;
118}
119
120/**
121 * hw_ep_disable: disables endpoint (execute without interruption)
122 * @num: endpoint number
123 * @dir: endpoint direction
124 *
125 * This function returns an error code
126 */
127static int hw_ep_disable(struct ci13xxx *udc, int num, int dir)
128{
129 hw_ep_flush(udc, num, dir);
130 hw_write(udc, OP_ENDPTCTRL + num,
131 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
132 return 0;
133}
134
135/**
136 * hw_ep_enable: enables endpoint (execute without interruption)
137 * @num: endpoint number
138 * @dir: endpoint direction
139 * @type: endpoint type
140 *
141 * This function returns an error code
142 */
143static int hw_ep_enable(struct ci13xxx *udc, int num, int dir, int type)
144{
145 u32 mask, data;
146
147 if (dir) {
148 mask = ENDPTCTRL_TXT; /* type */
149 data = type << ffs_nr(mask);
150
151 mask |= ENDPTCTRL_TXS; /* unstall */
152 mask |= ENDPTCTRL_TXR; /* reset data toggle */
153 data |= ENDPTCTRL_TXR;
154 mask |= ENDPTCTRL_TXE; /* enable */
155 data |= ENDPTCTRL_TXE;
156 } else {
157 mask = ENDPTCTRL_RXT; /* type */
158 data = type << ffs_nr(mask);
159
160 mask |= ENDPTCTRL_RXS; /* unstall */
161 mask |= ENDPTCTRL_RXR; /* reset data toggle */
162 data |= ENDPTCTRL_RXR;
163 mask |= ENDPTCTRL_RXE; /* enable */
164 data |= ENDPTCTRL_RXE;
165 }
166 hw_write(udc, OP_ENDPTCTRL + num, mask, data);
167 return 0;
168}
169
170/**
171 * hw_ep_get_halt: return endpoint halt status
172 * @num: endpoint number
173 * @dir: endpoint direction
174 *
175 * This function returns 1 if endpoint halted
176 */
177static int hw_ep_get_halt(struct ci13xxx *udc, int num, int dir)
178{
179 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
180
181 return hw_read(udc, OP_ENDPTCTRL + num, mask) ? 1 : 0;
182}
183
184/**
185 * hw_test_and_clear_setup_status: test & clear setup status (execute without
186 * interruption)
187 * @n: endpoint number
188 *
189 * This function returns setup status
190 */
191static int hw_test_and_clear_setup_status(struct ci13xxx *udc, int n)
192{
193 n = ep_to_bit(udc, n);
194 return hw_test_and_clear(udc, OP_ENDPTSETUPSTAT, BIT(n));
195}
196
197/**
198 * hw_ep_prime: primes endpoint (execute without interruption)
199 * @num: endpoint number
200 * @dir: endpoint direction
201 * @is_ctrl: true if control endpoint
202 *
203 * This function returns an error code
204 */
205static int hw_ep_prime(struct ci13xxx *udc, int num, int dir, int is_ctrl)
206{
207 int n = hw_ep_bit(num, dir);
208
209 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
210 return -EAGAIN;
211
212 hw_write(udc, OP_ENDPTPRIME, BIT(n), BIT(n));
213
214 while (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
215 cpu_relax();
216 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
217 return -EAGAIN;
218
219 /* status shoult be tested according with manual but it doesn't work */
220 return 0;
221}
222
223/**
224 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
225 * without interruption)
226 * @num: endpoint number
227 * @dir: endpoint direction
228 * @value: true => stall, false => unstall
229 *
230 * This function returns an error code
231 */
232static int hw_ep_set_halt(struct ci13xxx *udc, int num, int dir, int value)
233{
234 if (value != 0 && value != 1)
235 return -EINVAL;
236
237 do {
238 enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
239 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
240 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
241
242 /* data toggle - reserved for EP0 but it's in ESS */
243 hw_write(udc, reg, mask_xs|mask_xr,
244 value ? mask_xs : mask_xr);
245 } while (value != hw_ep_get_halt(udc, num, dir));
246
247 return 0;
248}
249
250/**
251 * hw_is_port_high_speed: test if port is high speed
252 *
253 * This function returns true if high speed port
254 */
255static int hw_port_is_high_speed(struct ci13xxx *udc)
256{
257 return udc->hw_bank.lpm ? hw_read(udc, OP_DEVLC, DEVLC_PSPD) :
258 hw_read(udc, OP_PORTSC, PORTSC_HSP);
259}
260
261/**
262 * hw_read_intr_enable: returns interrupt enable register
263 *
264 * This function returns register data
265 */
266static u32 hw_read_intr_enable(struct ci13xxx *udc)
267{
268 return hw_read(udc, OP_USBINTR, ~0);
269}
270
271/**
272 * hw_read_intr_status: returns interrupt status register
273 *
274 * This function returns register data
275 */
276static u32 hw_read_intr_status(struct ci13xxx *udc)
277{
278 return hw_read(udc, OP_USBSTS, ~0);
279}
280
281/**
282 * hw_test_and_clear_complete: test & clear complete status (execute without
283 * interruption)
284 * @n: endpoint number
285 *
286 * This function returns complete status
287 */
288static int hw_test_and_clear_complete(struct ci13xxx *udc, int n)
289{
290 n = ep_to_bit(udc, n);
291 return hw_test_and_clear(udc, OP_ENDPTCOMPLETE, BIT(n));
292}
293
294/**
295 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
296 * without interruption)
297 *
298 * This function returns active interrutps
299 */
300static u32 hw_test_and_clear_intr_active(struct ci13xxx *udc)
301{
302 u32 reg = hw_read_intr_status(udc) & hw_read_intr_enable(udc);
303
304 hw_write(udc, OP_USBSTS, ~0, reg);
305 return reg;
306}
307
308/**
309 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
310 * interruption)
311 *
312 * This function returns guard value
313 */
314static int hw_test_and_clear_setup_guard(struct ci13xxx *udc)
315{
316 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, 0);
317}
318
319/**
320 * hw_test_and_set_setup_guard: test & set setup guard (execute without
321 * interruption)
322 *
323 * This function returns guard value
324 */
325static int hw_test_and_set_setup_guard(struct ci13xxx *udc)
326{
327 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
328}
329
330/**
331 * hw_usb_set_address: configures USB address (execute without interruption)
332 * @value: new USB address
333 *
334 * This function explicitly sets the address, without the "USBADRA" (advance)
335 * feature, which is not supported by older versions of the controller.
336 */
337static void hw_usb_set_address(struct ci13xxx *udc, u8 value)
338{
339 hw_write(udc, OP_DEVICEADDR, DEVICEADDR_USBADR,
340 value << ffs_nr(DEVICEADDR_USBADR));
341}
342
343/**
344 * hw_usb_reset: restart device after a bus reset (execute without
345 * interruption)
346 *
347 * This function returns an error code
348 */
349static int hw_usb_reset(struct ci13xxx *udc)
350{
351 hw_usb_set_address(udc, 0);
352
353 /* ESS flushes only at end?!? */
354 hw_write(udc, OP_ENDPTFLUSH, ~0, ~0);
355
356 /* clear setup token semaphores */
357 hw_write(udc, OP_ENDPTSETUPSTAT, 0, 0);
358
359 /* clear complete status */
360 hw_write(udc, OP_ENDPTCOMPLETE, 0, 0);
361
362 /* wait until all bits cleared */
363 while (hw_read(udc, OP_ENDPTPRIME, ~0))
364 udelay(10); /* not RTOS friendly */
365
366 /* reset all endpoints ? */
367
368 /* reset internal status and wait for further instructions
369 no need to verify the port reset status (ESS does it) */
370
371 return 0;
372}
373
374/******************************************************************************
375 * UTIL block
376 *****************************************************************************/
377/**
378 * _usb_addr: calculates endpoint address from direction & number
379 * @ep: endpoint
380 */
381static inline u8 _usb_addr(struct ci13xxx_ep *ep)
382{
383 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
384}
385
386/**
387 * _hardware_queue: configures a request at hardware level
388 * @gadget: gadget
389 * @mEp: endpoint
390 *
391 * This function returns an error code
392 */
393static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
394{
395 struct ci13xxx *udc = mEp->udc;
396 unsigned i;
397 int ret = 0;
398 unsigned length = mReq->req.length;
399
400 /* don't queue twice */
401 if (mReq->req.status == -EALREADY)
402 return -EALREADY;
403
404 mReq->req.status = -EALREADY;
405
406 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
407 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
408 &mReq->zdma);
409 if (mReq->zptr == NULL)
410 return -ENOMEM;
411
412 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
413 mReq->zptr->next = TD_TERMINATE;
414 mReq->zptr->token = TD_STATUS_ACTIVE;
415 if (!mReq->req.no_interrupt)
416 mReq->zptr->token |= TD_IOC;
417 }
418 ret = usb_gadget_map_request(&udc->gadget, &mReq->req, mEp->dir);
419 if (ret)
420 return ret;
421
422 /*
423 * TD configuration
424 * TODO - handle requests which spawns into several TDs
425 */
426 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
427 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
428 mReq->ptr->token &= TD_TOTAL_BYTES;
429 mReq->ptr->token |= TD_STATUS_ACTIVE;
430 if (mReq->zptr) {
431 mReq->ptr->next = mReq->zdma;
432 } else {
433 mReq->ptr->next = TD_TERMINATE;
434 if (!mReq->req.no_interrupt)
435 mReq->ptr->token |= TD_IOC;
436 }
437 mReq->ptr->page[0] = mReq->req.dma;
438 for (i = 1; i < 5; i++)
439 mReq->ptr->page[i] =
440 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
441
442 if (!list_empty(&mEp->qh.queue)) {
443 struct ci13xxx_req *mReqPrev;
444 int n = hw_ep_bit(mEp->num, mEp->dir);
445 int tmp_stat;
446
447 mReqPrev = list_entry(mEp->qh.queue.prev,
448 struct ci13xxx_req, queue);
449 if (mReqPrev->zptr)
450 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
451 else
452 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
453 wmb();
454 if (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
455 goto done;
456 do {
457 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
458 tmp_stat = hw_read(udc, OP_ENDPTSTAT, BIT(n));
459 } while (!hw_read(udc, OP_USBCMD, USBCMD_ATDTW));
460 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, 0);
461 if (tmp_stat)
462 goto done;
463 }
464
465 /* QH configuration */
466 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
467 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
468 mEp->qh.ptr->cap |= QH_ZLT;
469
470 wmb(); /* synchronize before ep prime */
471
472 ret = hw_ep_prime(udc, mEp->num, mEp->dir,
473 mEp->type == USB_ENDPOINT_XFER_CONTROL);
474done:
475 return ret;
476}
477
478/**
479 * _hardware_dequeue: handles a request at hardware level
480 * @gadget: gadget
481 * @mEp: endpoint
482 *
483 * This function returns an error code
484 */
485static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
486{
487 if (mReq->req.status != -EALREADY)
488 return -EINVAL;
489
490 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
491 return -EBUSY;
492
493 if (mReq->zptr) {
494 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
495 return -EBUSY;
496 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
497 mReq->zptr = NULL;
498 }
499
500 mReq->req.status = 0;
501
502 usb_gadget_unmap_request(&mEp->udc->gadget, &mReq->req, mEp->dir);
503
504 mReq->req.status = mReq->ptr->token & TD_STATUS;
505 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
506 mReq->req.status = -1;
507 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
508 mReq->req.status = -1;
509 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
510 mReq->req.status = -1;
511
512 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
513 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
514 mReq->req.actual = mReq->req.length - mReq->req.actual;
515 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
516
517 return mReq->req.actual;
518}
519
520/**
521 * _ep_nuke: dequeues all endpoint requests
522 * @mEp: endpoint
523 *
524 * This function returns an error code
525 * Caller must hold lock
526 */
527static int _ep_nuke(struct ci13xxx_ep *mEp)
528__releases(mEp->lock)
529__acquires(mEp->lock)
530{
531 if (mEp == NULL)
532 return -EINVAL;
533
534 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
535
536 while (!list_empty(&mEp->qh.queue)) {
537
538 /* pop oldest request */
539 struct ci13xxx_req *mReq = \
540 list_entry(mEp->qh.queue.next,
541 struct ci13xxx_req, queue);
542 list_del_init(&mReq->queue);
543 mReq->req.status = -ESHUTDOWN;
544
545 if (mReq->req.complete != NULL) {
546 spin_unlock(mEp->lock);
547 mReq->req.complete(&mEp->ep, &mReq->req);
548 spin_lock(mEp->lock);
549 }
550 }
551 return 0;
552}
553
554/**
555 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
556 * @gadget: gadget
557 *
558 * This function returns an error code
559 */
560static int _gadget_stop_activity(struct usb_gadget *gadget)
561{
562 struct usb_ep *ep;
563 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
564 unsigned long flags;
565
566 spin_lock_irqsave(&udc->lock, flags);
567 udc->gadget.speed = USB_SPEED_UNKNOWN;
568 udc->remote_wakeup = 0;
569 udc->suspended = 0;
570 spin_unlock_irqrestore(&udc->lock, flags);
571
572 /* flush all endpoints */
573 gadget_for_each_ep(ep, gadget) {
574 usb_ep_fifo_flush(ep);
575 }
576 usb_ep_fifo_flush(&udc->ep0out->ep);
577 usb_ep_fifo_flush(&udc->ep0in->ep);
578
579 if (udc->driver)
580 udc->driver->disconnect(gadget);
581
582 /* make sure to disable all endpoints */
583 gadget_for_each_ep(ep, gadget) {
584 usb_ep_disable(ep);
585 }
586
587 if (udc->status != NULL) {
588 usb_ep_free_request(&udc->ep0in->ep, udc->status);
589 udc->status = NULL;
590 }
591
592 return 0;
593}
594
595/******************************************************************************
596 * ISR block
597 *****************************************************************************/
598/**
599 * isr_reset_handler: USB reset interrupt handler
600 * @udc: UDC device
601 *
602 * This function resets USB engine after a bus reset occurred
603 */
604static void isr_reset_handler(struct ci13xxx *udc)
605__releases(udc->lock)
606__acquires(udc->lock)
607{
608 int retval;
609
610 dbg_event(0xFF, "BUS RST", 0);
611
612 spin_unlock(&udc->lock);
613 retval = _gadget_stop_activity(&udc->gadget);
614 if (retval)
615 goto done;
616
617 retval = hw_usb_reset(udc);
618 if (retval)
619 goto done;
620
621 udc->status = usb_ep_alloc_request(&udc->ep0in->ep, GFP_ATOMIC);
622 if (udc->status == NULL)
623 retval = -ENOMEM;
624
625done:
626 spin_lock(&udc->lock);
627
628 if (retval)
629 dev_err(udc->dev, "error: %i\n", retval);
630}
631
632/**
633 * isr_get_status_complete: get_status request complete function
634 * @ep: endpoint
635 * @req: request handled
636 *
637 * Caller must release lock
638 */
639static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
640{
641 if (ep == NULL || req == NULL)
642 return;
643
644 kfree(req->buf);
645 usb_ep_free_request(ep, req);
646}
647
648/**
649 * isr_get_status_response: get_status request response
650 * @udc: udc struct
651 * @setup: setup request packet
652 *
653 * This function returns an error code
654 */
655static int isr_get_status_response(struct ci13xxx *udc,
656 struct usb_ctrlrequest *setup)
657__releases(mEp->lock)
658__acquires(mEp->lock)
659{
660 struct ci13xxx_ep *mEp = udc->ep0in;
661 struct usb_request *req = NULL;
662 gfp_t gfp_flags = GFP_ATOMIC;
663 int dir, num, retval;
664
665 if (mEp == NULL || setup == NULL)
666 return -EINVAL;
667
668 spin_unlock(mEp->lock);
669 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
670 spin_lock(mEp->lock);
671 if (req == NULL)
672 return -ENOMEM;
673
674 req->complete = isr_get_status_complete;
675 req->length = 2;
676 req->buf = kzalloc(req->length, gfp_flags);
677 if (req->buf == NULL) {
678 retval = -ENOMEM;
679 goto err_free_req;
680 }
681
682 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
683 /* Assume that device is bus powered for now. */
684 *(u16 *)req->buf = udc->remote_wakeup << 1;
685 retval = 0;
686 } else if ((setup->bRequestType & USB_RECIP_MASK) \
687 == USB_RECIP_ENDPOINT) {
688 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
689 TX : RX;
690 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
691 *(u16 *)req->buf = hw_ep_get_halt(udc, num, dir);
692 }
693 /* else do nothing; reserved for future use */
694
695 spin_unlock(mEp->lock);
696 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
697 spin_lock(mEp->lock);
698 if (retval)
699 goto err_free_buf;
700
701 return 0;
702
703 err_free_buf:
704 kfree(req->buf);
705 err_free_req:
706 spin_unlock(mEp->lock);
707 usb_ep_free_request(&mEp->ep, req);
708 spin_lock(mEp->lock);
709 return retval;
710}
711
712/**
713 * isr_setup_status_complete: setup_status request complete function
714 * @ep: endpoint
715 * @req: request handled
716 *
717 * Caller must release lock. Put the port in test mode if test mode
718 * feature is selected.
719 */
720static void
721isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
722{
723 struct ci13xxx *udc = req->context;
724 unsigned long flags;
725
726 if (udc->setaddr) {
727 hw_usb_set_address(udc, udc->address);
728 udc->setaddr = false;
729 }
730
731 spin_lock_irqsave(&udc->lock, flags);
732 if (udc->test_mode)
733 hw_port_test_set(udc, udc->test_mode);
734 spin_unlock_irqrestore(&udc->lock, flags);
735}
736
737/**
738 * isr_setup_status_phase: queues the status phase of a setup transation
739 * @udc: udc struct
740 *
741 * This function returns an error code
742 */
743static int isr_setup_status_phase(struct ci13xxx *udc)
744__releases(mEp->lock)
745__acquires(mEp->lock)
746{
747 int retval;
748 struct ci13xxx_ep *mEp;
749
750 mEp = (udc->ep0_dir == TX) ? udc->ep0out : udc->ep0in;
751 udc->status->context = udc;
752 udc->status->complete = isr_setup_status_complete;
753
754 spin_unlock(mEp->lock);
755 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
756 spin_lock(mEp->lock);
757
758 return retval;
759}
760
761/**
762 * isr_tr_complete_low: transaction complete low level handler
763 * @mEp: endpoint
764 *
765 * This function returns an error code
766 * Caller must hold lock
767 */
768static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
769__releases(mEp->lock)
770__acquires(mEp->lock)
771{
772 struct ci13xxx_req *mReq, *mReqTemp;
773 struct ci13xxx_ep *mEpTemp = mEp;
774 int retval = 0;
775
776 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
777 queue) {
778 retval = _hardware_dequeue(mEp, mReq);
779 if (retval < 0)
780 break;
781 list_del_init(&mReq->queue);
782 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
783 if (mReq->req.complete != NULL) {
784 spin_unlock(mEp->lock);
785 if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
786 mReq->req.length)
787 mEpTemp = mEp->udc->ep0in;
788 mReq->req.complete(&mEpTemp->ep, &mReq->req);
789 spin_lock(mEp->lock);
790 }
791 }
792
793 if (retval == -EBUSY)
794 retval = 0;
795 if (retval < 0)
796 dbg_event(_usb_addr(mEp), "DONE", retval);
797
798 return retval;
799}
800
801/**
802 * isr_tr_complete_handler: transaction complete interrupt handler
803 * @udc: UDC descriptor
804 *
805 * This function handles traffic events
806 */
807static void isr_tr_complete_handler(struct ci13xxx *udc)
808__releases(udc->lock)
809__acquires(udc->lock)
810{
811 unsigned i;
812 u8 tmode = 0;
813
814 for (i = 0; i < udc->hw_ep_max; i++) {
815 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
816 int type, num, dir, err = -EINVAL;
817 struct usb_ctrlrequest req;
818
819 if (mEp->ep.desc == NULL)
820 continue; /* not configured */
821
822 if (hw_test_and_clear_complete(udc, i)) {
823 err = isr_tr_complete_low(mEp);
824 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
825 if (err > 0) /* needs status phase */
826 err = isr_setup_status_phase(udc);
827 if (err < 0) {
828 dbg_event(_usb_addr(mEp),
829 "ERROR", err);
830 spin_unlock(&udc->lock);
831 if (usb_ep_set_halt(&mEp->ep))
832 dev_err(udc->dev,
833 "error: ep_set_halt\n");
834 spin_lock(&udc->lock);
835 }
836 }
837 }
838
839 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
840 !hw_test_and_clear_setup_status(udc, i))
841 continue;
842
843 if (i != 0) {
844 dev_warn(udc->dev, "ctrl traffic at endpoint %d\n", i);
845 continue;
846 }
847
848 /*
849 * Flush data and handshake transactions of previous
850 * setup packet.
851 */
852 _ep_nuke(udc->ep0out);
853 _ep_nuke(udc->ep0in);
854
855 /* read_setup_packet */
856 do {
857 hw_test_and_set_setup_guard(udc);
858 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
859 } while (!hw_test_and_clear_setup_guard(udc));
860
861 type = req.bRequestType;
862
863 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
864
865 dbg_setup(_usb_addr(mEp), &req);
866
867 switch (req.bRequest) {
868 case USB_REQ_CLEAR_FEATURE:
869 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
870 le16_to_cpu(req.wValue) ==
871 USB_ENDPOINT_HALT) {
872 if (req.wLength != 0)
873 break;
874 num = le16_to_cpu(req.wIndex);
875 dir = num & USB_ENDPOINT_DIR_MASK;
876 num &= USB_ENDPOINT_NUMBER_MASK;
877 if (dir) /* TX */
878 num += udc->hw_ep_max/2;
879 if (!udc->ci13xxx_ep[num].wedge) {
880 spin_unlock(&udc->lock);
881 err = usb_ep_clear_halt(
882 &udc->ci13xxx_ep[num].ep);
883 spin_lock(&udc->lock);
884 if (err)
885 break;
886 }
887 err = isr_setup_status_phase(udc);
888 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
889 le16_to_cpu(req.wValue) ==
890 USB_DEVICE_REMOTE_WAKEUP) {
891 if (req.wLength != 0)
892 break;
893 udc->remote_wakeup = 0;
894 err = isr_setup_status_phase(udc);
895 } else {
896 goto delegate;
897 }
898 break;
899 case USB_REQ_GET_STATUS:
900 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
901 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
902 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
903 goto delegate;
904 if (le16_to_cpu(req.wLength) != 2 ||
905 le16_to_cpu(req.wValue) != 0)
906 break;
907 err = isr_get_status_response(udc, &req);
908 break;
909 case USB_REQ_SET_ADDRESS:
910 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
911 goto delegate;
912 if (le16_to_cpu(req.wLength) != 0 ||
913 le16_to_cpu(req.wIndex) != 0)
914 break;
915 udc->address = (u8)le16_to_cpu(req.wValue);
916 udc->setaddr = true;
917 err = isr_setup_status_phase(udc);
918 break;
919 case USB_REQ_SET_FEATURE:
920 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
921 le16_to_cpu(req.wValue) ==
922 USB_ENDPOINT_HALT) {
923 if (req.wLength != 0)
924 break;
925 num = le16_to_cpu(req.wIndex);
926 dir = num & USB_ENDPOINT_DIR_MASK;
927 num &= USB_ENDPOINT_NUMBER_MASK;
928 if (dir) /* TX */
929 num += udc->hw_ep_max/2;
930
931 spin_unlock(&udc->lock);
932 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
933 spin_lock(&udc->lock);
934 if (!err)
935 isr_setup_status_phase(udc);
936 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
937 if (req.wLength != 0)
938 break;
939 switch (le16_to_cpu(req.wValue)) {
940 case USB_DEVICE_REMOTE_WAKEUP:
941 udc->remote_wakeup = 1;
942 err = isr_setup_status_phase(udc);
943 break;
944 case USB_DEVICE_TEST_MODE:
945 tmode = le16_to_cpu(req.wIndex) >> 8;
946 switch (tmode) {
947 case TEST_J:
948 case TEST_K:
949 case TEST_SE0_NAK:
950 case TEST_PACKET:
951 case TEST_FORCE_EN:
952 udc->test_mode = tmode;
953 err = isr_setup_status_phase(
954 udc);
955 break;
956 default:
957 break;
958 }
959 default:
960 goto delegate;
961 }
962 } else {
963 goto delegate;
964 }
965 break;
966 default:
967delegate:
968 if (req.wLength == 0) /* no data phase */
969 udc->ep0_dir = TX;
970
971 spin_unlock(&udc->lock);
972 err = udc->driver->setup(&udc->gadget, &req);
973 spin_lock(&udc->lock);
974 break;
975 }
976
977 if (err < 0) {
978 dbg_event(_usb_addr(mEp), "ERROR", err);
979
980 spin_unlock(&udc->lock);
981 if (usb_ep_set_halt(&mEp->ep))
982 dev_err(udc->dev, "error: ep_set_halt\n");
983 spin_lock(&udc->lock);
984 }
985 }
986}
987
988/******************************************************************************
989 * ENDPT block
990 *****************************************************************************/
991/**
992 * ep_enable: configure endpoint, making it usable
993 *
994 * Check usb_ep_enable() at "usb_gadget.h" for details
995 */
996static int ep_enable(struct usb_ep *ep,
997 const struct usb_endpoint_descriptor *desc)
998{
999 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1000 int retval = 0;
1001 unsigned long flags;
1002
1003 if (ep == NULL || desc == NULL)
1004 return -EINVAL;
1005
1006 spin_lock_irqsave(mEp->lock, flags);
1007
1008 /* only internal SW should enable ctrl endpts */
1009
1010 mEp->ep.desc = desc;
1011
1012 if (!list_empty(&mEp->qh.queue))
1013 dev_warn(mEp->udc->dev, "enabling a non-empty endpoint!\n");
1014
1015 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1016 mEp->num = usb_endpoint_num(desc);
1017 mEp->type = usb_endpoint_type(desc);
1018
1019 mEp->ep.maxpacket = usb_endpoint_maxp(desc);
1020
1021 dbg_event(_usb_addr(mEp), "ENABLE", 0);
1022
1023 mEp->qh.ptr->cap = 0;
1024
1025 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1026 mEp->qh.ptr->cap |= QH_IOS;
1027 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
1028 mEp->qh.ptr->cap &= ~QH_MULT;
1029 else
1030 mEp->qh.ptr->cap &= ~QH_ZLT;
1031
1032 mEp->qh.ptr->cap |=
1033 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
1034 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
1035
1036 /*
1037 * Enable endpoints in the HW other than ep0 as ep0
1038 * is always enabled
1039 */
1040 if (mEp->num)
1041 retval |= hw_ep_enable(mEp->udc, mEp->num, mEp->dir, mEp->type);
1042
1043 spin_unlock_irqrestore(mEp->lock, flags);
1044 return retval;
1045}
1046
1047/**
1048 * ep_disable: endpoint is no longer usable
1049 *
1050 * Check usb_ep_disable() at "usb_gadget.h" for details
1051 */
1052static int ep_disable(struct usb_ep *ep)
1053{
1054 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1055 int direction, retval = 0;
1056 unsigned long flags;
1057
1058 if (ep == NULL)
1059 return -EINVAL;
1060 else if (mEp->ep.desc == NULL)
1061 return -EBUSY;
1062
1063 spin_lock_irqsave(mEp->lock, flags);
1064
1065 /* only internal SW should disable ctrl endpts */
1066
1067 direction = mEp->dir;
1068 do {
1069 dbg_event(_usb_addr(mEp), "DISABLE", 0);
1070
1071 retval |= _ep_nuke(mEp);
1072 retval |= hw_ep_disable(mEp->udc, mEp->num, mEp->dir);
1073
1074 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1075 mEp->dir = (mEp->dir == TX) ? RX : TX;
1076
1077 } while (mEp->dir != direction);
1078
1079 mEp->ep.desc = NULL;
1080
1081 spin_unlock_irqrestore(mEp->lock, flags);
1082 return retval;
1083}
1084
1085/**
1086 * ep_alloc_request: allocate a request object to use with this endpoint
1087 *
1088 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1089 */
1090static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1091{
1092 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1093 struct ci13xxx_req *mReq = NULL;
1094
1095 if (ep == NULL)
1096 return NULL;
1097
1098 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
1099 if (mReq != NULL) {
1100 INIT_LIST_HEAD(&mReq->queue);
1101
1102 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
1103 &mReq->dma);
1104 if (mReq->ptr == NULL) {
1105 kfree(mReq);
1106 mReq = NULL;
1107 }
1108 }
1109
1110 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
1111
1112 return (mReq == NULL) ? NULL : &mReq->req;
1113}
1114
1115/**
1116 * ep_free_request: frees a request object
1117 *
1118 * Check usb_ep_free_request() at "usb_gadget.h" for details
1119 */
1120static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1121{
1122 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1123 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1124 unsigned long flags;
1125
1126 if (ep == NULL || req == NULL) {
1127 return;
1128 } else if (!list_empty(&mReq->queue)) {
1129 dev_err(mEp->udc->dev, "freeing queued request\n");
1130 return;
1131 }
1132
1133 spin_lock_irqsave(mEp->lock, flags);
1134
1135 if (mReq->ptr)
1136 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
1137 kfree(mReq);
1138
1139 dbg_event(_usb_addr(mEp), "FREE", 0);
1140
1141 spin_unlock_irqrestore(mEp->lock, flags);
1142}
1143
1144/**
1145 * ep_queue: queues (submits) an I/O request to an endpoint
1146 *
1147 * Check usb_ep_queue()* at usb_gadget.h" for details
1148 */
1149static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1150 gfp_t __maybe_unused gfp_flags)
1151{
1152 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1153 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1154 struct ci13xxx *udc = mEp->udc;
1155 int retval = 0;
1156 unsigned long flags;
1157
1158 if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
1159 return -EINVAL;
1160
1161 spin_lock_irqsave(mEp->lock, flags);
1162
1163 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1164 if (req->length)
1165 mEp = (udc->ep0_dir == RX) ?
1166 udc->ep0out : udc->ep0in;
1167 if (!list_empty(&mEp->qh.queue)) {
1168 _ep_nuke(mEp);
1169 retval = -EOVERFLOW;
1170 dev_warn(mEp->udc->dev, "endpoint ctrl %X nuked\n",
1171 _usb_addr(mEp));
1172 }
1173 }
1174
1175 /* first nuke then test link, e.g. previous status has not sent */
1176 if (!list_empty(&mReq->queue)) {
1177 retval = -EBUSY;
1178 dev_err(mEp->udc->dev, "request already in queue\n");
1179 goto done;
1180 }
1181
1182 if (req->length > 4 * CI13XXX_PAGE_SIZE) {
1183 req->length = 4 * CI13XXX_PAGE_SIZE;
1184 retval = -EMSGSIZE;
1185 dev_warn(mEp->udc->dev, "request length truncated\n");
1186 }
1187
1188 dbg_queue(_usb_addr(mEp), req, retval);
1189
1190 /* push request */
1191 mReq->req.status = -EINPROGRESS;
1192 mReq->req.actual = 0;
1193
1194 retval = _hardware_enqueue(mEp, mReq);
1195
1196 if (retval == -EALREADY) {
1197 dbg_event(_usb_addr(mEp), "QUEUE", retval);
1198 retval = 0;
1199 }
1200 if (!retval)
1201 list_add_tail(&mReq->queue, &mEp->qh.queue);
1202
1203 done:
1204 spin_unlock_irqrestore(mEp->lock, flags);
1205 return retval;
1206}
1207
1208/**
1209 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1210 *
1211 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1212 */
1213static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1214{
1215 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1216 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1217 unsigned long flags;
1218
1219 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
1220 mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
1221 list_empty(&mEp->qh.queue))
1222 return -EINVAL;
1223
1224 spin_lock_irqsave(mEp->lock, flags);
1225
1226 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
1227
1228 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1229
1230 /* pop request */
1231 list_del_init(&mReq->queue);
1232
1233 usb_gadget_unmap_request(&mEp->udc->gadget, req, mEp->dir);
1234
1235 req->status = -ECONNRESET;
1236
1237 if (mReq->req.complete != NULL) {
1238 spin_unlock(mEp->lock);
1239 mReq->req.complete(&mEp->ep, &mReq->req);
1240 spin_lock(mEp->lock);
1241 }
1242
1243 spin_unlock_irqrestore(mEp->lock, flags);
1244 return 0;
1245}
1246
1247/**
1248 * ep_set_halt: sets the endpoint halt feature
1249 *
1250 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1251 */
1252static int ep_set_halt(struct usb_ep *ep, int value)
1253{
1254 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1255 int direction, retval = 0;
1256 unsigned long flags;
1257
1258 if (ep == NULL || mEp->ep.desc == NULL)
1259 return -EINVAL;
1260
1261 spin_lock_irqsave(mEp->lock, flags);
1262
1263#ifndef STALL_IN
1264 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
1265 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
1266 !list_empty(&mEp->qh.queue)) {
1267 spin_unlock_irqrestore(mEp->lock, flags);
1268 return -EAGAIN;
1269 }
1270#endif
1271
1272 direction = mEp->dir;
1273 do {
1274 dbg_event(_usb_addr(mEp), "HALT", value);
1275 retval |= hw_ep_set_halt(mEp->udc, mEp->num, mEp->dir, value);
1276
1277 if (!value)
1278 mEp->wedge = 0;
1279
1280 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1281 mEp->dir = (mEp->dir == TX) ? RX : TX;
1282
1283 } while (mEp->dir != direction);
1284
1285 spin_unlock_irqrestore(mEp->lock, flags);
1286 return retval;
1287}
1288
1289/**
1290 * ep_set_wedge: sets the halt feature and ignores clear requests
1291 *
1292 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1293 */
1294static int ep_set_wedge(struct usb_ep *ep)
1295{
1296 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1297 unsigned long flags;
1298
1299 if (ep == NULL || mEp->ep.desc == NULL)
1300 return -EINVAL;
1301
1302 spin_lock_irqsave(mEp->lock, flags);
1303
1304 dbg_event(_usb_addr(mEp), "WEDGE", 0);
1305 mEp->wedge = 1;
1306
1307 spin_unlock_irqrestore(mEp->lock, flags);
1308
1309 return usb_ep_set_halt(ep);
1310}
1311
1312/**
1313 * ep_fifo_flush: flushes contents of a fifo
1314 *
1315 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1316 */
1317static void ep_fifo_flush(struct usb_ep *ep)
1318{
1319 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1320 unsigned long flags;
1321
1322 if (ep == NULL) {
1323 dev_err(mEp->udc->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
1324 return;
1325 }
1326
1327 spin_lock_irqsave(mEp->lock, flags);
1328
1329 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
1330 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1331
1332 spin_unlock_irqrestore(mEp->lock, flags);
1333}
1334
1335/**
1336 * Endpoint-specific part of the API to the USB controller hardware
1337 * Check "usb_gadget.h" for details
1338 */
1339static const struct usb_ep_ops usb_ep_ops = {
1340 .enable = ep_enable,
1341 .disable = ep_disable,
1342 .alloc_request = ep_alloc_request,
1343 .free_request = ep_free_request,
1344 .queue = ep_queue,
1345 .dequeue = ep_dequeue,
1346 .set_halt = ep_set_halt,
1347 .set_wedge = ep_set_wedge,
1348 .fifo_flush = ep_fifo_flush,
1349};
1350
1351/******************************************************************************
1352 * GADGET block
1353 *****************************************************************************/
1354static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
1355{
1356 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1357 unsigned long flags;
1358 int gadget_ready = 0;
1359
1360 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
1361 return -EOPNOTSUPP;
1362
1363 spin_lock_irqsave(&udc->lock, flags);
1364 udc->vbus_active = is_active;
1365 if (udc->driver)
1366 gadget_ready = 1;
1367 spin_unlock_irqrestore(&udc->lock, flags);
1368
1369 if (gadget_ready) {
1370 if (is_active) {
1371 pm_runtime_get_sync(&_gadget->dev);
1372 hw_device_reset(udc, USBMODE_CM_DC);
1373 hw_device_state(udc, udc->ep0out->qh.dma);
1374 } else {
1375 hw_device_state(udc, 0);
1376 if (udc->udc_driver->notify_event)
1377 udc->udc_driver->notify_event(udc,
1378 CI13XXX_CONTROLLER_STOPPED_EVENT);
1379 _gadget_stop_activity(&udc->gadget);
1380 pm_runtime_put_sync(&_gadget->dev);
1381 }
1382 }
1383
1384 return 0;
1385}
1386
1387static int ci13xxx_wakeup(struct usb_gadget *_gadget)
1388{
1389 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1390 unsigned long flags;
1391 int ret = 0;
1392
1393 spin_lock_irqsave(&udc->lock, flags);
1394 if (!udc->remote_wakeup) {
1395 ret = -EOPNOTSUPP;
1396 goto out;
1397 }
1398 if (!hw_read(udc, OP_PORTSC, PORTSC_SUSP)) {
1399 ret = -EINVAL;
1400 goto out;
1401 }
1402 hw_write(udc, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1403out:
1404 spin_unlock_irqrestore(&udc->lock, flags);
1405 return ret;
1406}
1407
1408static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1409{
1410 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1411
1412 if (udc->transceiver)
1413 return usb_phy_set_power(udc->transceiver, mA);
1414 return -ENOTSUPP;
1415}
1416
1417/* Change Data+ pullup status
1418 * this func is used by usb_gadget_connect/disconnet
1419 */
1420static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_on)
1421{
1422 struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
1423
1424 if (is_on)
1425 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1426 else
1427 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1428
1429 return 0;
1430}
1431
1432static int ci13xxx_start(struct usb_gadget *gadget,
1433 struct usb_gadget_driver *driver);
1434static int ci13xxx_stop(struct usb_gadget *gadget,
1435 struct usb_gadget_driver *driver);
1436/**
1437 * Device operations part of the API to the USB controller hardware,
1438 * which don't involve endpoints (or i/o)
1439 * Check "usb_gadget.h" for details
1440 */
1441static const struct usb_gadget_ops usb_gadget_ops = {
1442 .vbus_session = ci13xxx_vbus_session,
1443 .wakeup = ci13xxx_wakeup,
1444 .pullup = ci13xxx_pullup,
1445 .vbus_draw = ci13xxx_vbus_draw,
1446 .udc_start = ci13xxx_start,
1447 .udc_stop = ci13xxx_stop,
1448};
1449
1450static int init_eps(struct ci13xxx *udc)
1451{
1452 int retval = 0, i, j;
1453
1454 for (i = 0; i < udc->hw_ep_max/2; i++)
1455 for (j = RX; j <= TX; j++) {
1456 int k = i + j * udc->hw_ep_max/2;
1457 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
1458
1459 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
1460 (j == TX) ? "in" : "out");
1461
1462 mEp->udc = udc;
1463 mEp->lock = &udc->lock;
1464 mEp->td_pool = udc->td_pool;
1465
1466 mEp->ep.name = mEp->name;
1467 mEp->ep.ops = &usb_ep_ops;
1468 /*
1469 * for ep0: maxP defined in desc, for other
1470 * eps, maxP is set by epautoconfig() called
1471 * by gadget layer
1472 */
1473 mEp->ep.maxpacket = (unsigned short)~0;
1474
1475 INIT_LIST_HEAD(&mEp->qh.queue);
1476 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
1477 &mEp->qh.dma);
1478 if (mEp->qh.ptr == NULL)
1479 retval = -ENOMEM;
1480 else
1481 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
1482
1483 /*
1484 * set up shorthands for ep0 out and in endpoints,
1485 * don't add to gadget's ep_list
1486 */
1487 if (i == 0) {
1488 if (j == RX)
1489 udc->ep0out = mEp;
1490 else
1491 udc->ep0in = mEp;
1492
1493 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
1494 continue;
1495 }
1496
1497 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
1498 }
1499
1500 return retval;
1501}
1502
1503static void destroy_eps(struct ci13xxx *udc)
1504{
1505 int i;
1506
1507 for (i = 0; i < udc->hw_ep_max; i++) {
1508 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1509
1510 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
1511 }
1512}
1513
1514/**
1515 * ci13xxx_start: register a gadget driver
1516 * @gadget: our gadget
1517 * @driver: the driver being registered
1518 *
1519 * Interrupts are enabled here.
1520 */
1521static int ci13xxx_start(struct usb_gadget *gadget,
1522 struct usb_gadget_driver *driver)
1523{
1524 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1525 unsigned long flags;
1526 int retval = -ENOMEM;
1527
1528 if (driver->disconnect == NULL)
1529 return -EINVAL;
1530
1531
1532 udc->ep0out->ep.desc = &ctrl_endpt_out_desc;
1533 retval = usb_ep_enable(&udc->ep0out->ep);
1534 if (retval)
1535 return retval;
1536
1537 udc->ep0in->ep.desc = &ctrl_endpt_in_desc;
1538 retval = usb_ep_enable(&udc->ep0in->ep);
1539 if (retval)
1540 return retval;
1541 spin_lock_irqsave(&udc->lock, flags);
1542
1543 udc->driver = driver;
1544 pm_runtime_get_sync(&udc->gadget.dev);
1545 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
1546 if (udc->vbus_active) {
1547 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
1548 hw_device_reset(udc, USBMODE_CM_DC);
1549 } else {
1550 pm_runtime_put_sync(&udc->gadget.dev);
1551 goto done;
1552 }
1553 }
1554
1555 retval = hw_device_state(udc, udc->ep0out->qh.dma);
1556 if (retval)
1557 pm_runtime_put_sync(&udc->gadget.dev);
1558
1559 done:
1560 spin_unlock_irqrestore(&udc->lock, flags);
1561 return retval;
1562}
1563
1564/**
1565 * ci13xxx_stop: unregister a gadget driver
1566 */
1567static int ci13xxx_stop(struct usb_gadget *gadget,
1568 struct usb_gadget_driver *driver)
1569{
1570 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1571 unsigned long flags;
1572
1573 spin_lock_irqsave(&udc->lock, flags);
1574
1575 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
1576 udc->vbus_active) {
1577 hw_device_state(udc, 0);
1578 if (udc->udc_driver->notify_event)
1579 udc->udc_driver->notify_event(udc,
1580 CI13XXX_CONTROLLER_STOPPED_EVENT);
1581 udc->driver = NULL;
1582 spin_unlock_irqrestore(&udc->lock, flags);
1583 _gadget_stop_activity(&udc->gadget);
1584 spin_lock_irqsave(&udc->lock, flags);
1585 pm_runtime_put(&udc->gadget.dev);
1586 }
1587
1588 spin_unlock_irqrestore(&udc->lock, flags);
1589
1590 return 0;
1591}
1592
1593/******************************************************************************
1594 * BUS block
1595 *****************************************************************************/
1596/**
1597 * udc_irq: udc interrupt handler
1598 *
1599 * This function returns IRQ_HANDLED if the IRQ has been handled
1600 * It locks access to registers
1601 */
1602static irqreturn_t udc_irq(struct ci13xxx *udc)
1603{
1604 irqreturn_t retval;
1605 u32 intr;
1606
1607 if (udc == NULL)
1608 return IRQ_HANDLED;
1609
1610 spin_lock(&udc->lock);
1611
1612 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
1613 if (hw_read(udc, OP_USBMODE, USBMODE_CM) !=
1614 USBMODE_CM_DC) {
1615 spin_unlock(&udc->lock);
1616 return IRQ_NONE;
1617 }
1618 }
1619 intr = hw_test_and_clear_intr_active(udc);
1620 dbg_interrupt(intr);
1621
1622 if (intr) {
1623 /* order defines priority - do NOT change it */
1624 if (USBi_URI & intr)
1625 isr_reset_handler(udc);
1626
1627 if (USBi_PCI & intr) {
1628 udc->gadget.speed = hw_port_is_high_speed(udc) ?
1629 USB_SPEED_HIGH : USB_SPEED_FULL;
1630 if (udc->suspended && udc->driver->resume) {
1631 spin_unlock(&udc->lock);
1632 udc->driver->resume(&udc->gadget);
1633 spin_lock(&udc->lock);
1634 udc->suspended = 0;
1635 }
1636 }
1637
1638 if (USBi_UI & intr)
1639 isr_tr_complete_handler(udc);
1640
1641 if (USBi_SLI & intr) {
1642 if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
1643 udc->driver->suspend) {
1644 udc->suspended = 1;
1645 spin_unlock(&udc->lock);
1646 udc->driver->suspend(&udc->gadget);
1647 spin_lock(&udc->lock);
1648 }
1649 }
1650 retval = IRQ_HANDLED;
1651 } else {
1652 retval = IRQ_NONE;
1653 }
1654 spin_unlock(&udc->lock);
1655
1656 return retval;
1657}
1658
1659/**
1660 * udc_release: driver release function
1661 * @dev: device
1662 *
1663 * Currently does nothing
1664 */
1665static void udc_release(struct device *dev)
1666{
1667}
1668
1669/**
1670 * udc_start: initialize gadget role
1671 * @udc: chipidea controller
1672 */
1673static int udc_start(struct ci13xxx *udc)
1674{
1675 struct device *dev = udc->dev;
1676 int retval = 0;
1677
1678 if (!udc)
1679 return -EINVAL;
1680
1681 spin_lock_init(&udc->lock);
1682
1683 udc->gadget.ops = &usb_gadget_ops;
1684 udc->gadget.speed = USB_SPEED_UNKNOWN;
1685 udc->gadget.max_speed = USB_SPEED_HIGH;
1686 udc->gadget.is_otg = 0;
1687 udc->gadget.name = udc->udc_driver->name;
1688
1689 INIT_LIST_HEAD(&udc->gadget.ep_list);
1690
1691 dev_set_name(&udc->gadget.dev, "gadget");
1692 udc->gadget.dev.dma_mask = dev->dma_mask;
1693 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
1694 udc->gadget.dev.parent = dev;
1695 udc->gadget.dev.release = udc_release;
1696
1697 /* alloc resources */
1698 udc->qh_pool = dma_pool_create("ci13xxx_qh", dev,
1699 sizeof(struct ci13xxx_qh),
1700 64, CI13XXX_PAGE_SIZE);
1701 if (udc->qh_pool == NULL)
1702 return -ENOMEM;
1703
1704 udc->td_pool = dma_pool_create("ci13xxx_td", dev,
1705 sizeof(struct ci13xxx_td),
1706 64, CI13XXX_PAGE_SIZE);
1707 if (udc->td_pool == NULL) {
1708 retval = -ENOMEM;
1709 goto free_qh_pool;
1710 }
1711
1712 retval = init_eps(udc);
1713 if (retval)
1714 goto free_pools;
1715
1716 udc->gadget.ep0 = &udc->ep0in->ep;
1717
1718 udc->transceiver = usb_get_transceiver();
1719
1720 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
1721 if (udc->transceiver == NULL) {
1722 retval = -ENODEV;
1723 goto destroy_eps;
1724 }
1725 }
1726
1727 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
1728 retval = hw_device_reset(udc, USBMODE_CM_DC);
1729 if (retval)
1730 goto put_transceiver;
1731 }
1732
1733 retval = device_register(&udc->gadget.dev);
1734 if (retval) {
1735 put_device(&udc->gadget.dev);
1736 goto put_transceiver;
1737 }
1738
1739 retval = dbg_create_files(&udc->gadget.dev);
1740 if (retval)
1741 goto unreg_device;
1742
1743 if (udc->transceiver) {
1744 retval = otg_set_peripheral(udc->transceiver->otg,
1745 &udc->gadget);
1746 if (retval)
1747 goto remove_dbg;
1748 }
1749
1750 retval = usb_add_gadget_udc(dev, &udc->gadget);
1751 if (retval)
1752 goto remove_trans;
1753
1754 pm_runtime_no_callbacks(&udc->gadget.dev);
1755 pm_runtime_enable(&udc->gadget.dev);
1756
1757 return retval;
1758
1759remove_trans:
1760 if (udc->transceiver) {
1761 otg_set_peripheral(udc->transceiver->otg, NULL);
1762 usb_put_transceiver(udc->transceiver);
1763 }
1764
1765 dev_err(dev, "error = %i\n", retval);
1766remove_dbg:
1767 dbg_remove_files(&udc->gadget.dev);
1768unreg_device:
1769 device_unregister(&udc->gadget.dev);
1770put_transceiver:
1771 if (udc->transceiver)
1772 usb_put_transceiver(udc->transceiver);
1773destroy_eps:
1774 destroy_eps(udc);
1775free_pools:
1776 dma_pool_destroy(udc->td_pool);
1777free_qh_pool:
1778 dma_pool_destroy(udc->qh_pool);
1779 return retval;
1780}
1781
1782/**
1783 * udc_remove: parent remove must call this to remove UDC
1784 *
1785 * No interrupts active, the IRQ has been released
1786 */
1787static void udc_stop(struct ci13xxx *udc)
1788{
1789 if (udc == NULL)
1790 return;
1791
1792 usb_del_gadget_udc(&udc->gadget);
1793
1794 destroy_eps(udc);
1795
1796 dma_pool_destroy(udc->td_pool);
1797 dma_pool_destroy(udc->qh_pool);
1798
1799 if (udc->transceiver) {
1800 otg_set_peripheral(udc->transceiver->otg, NULL);
1801 usb_put_transceiver(udc->transceiver);
1802 }
1803 dbg_remove_files(&udc->gadget.dev);
1804 device_unregister(&udc->gadget.dev);
1805 /* my kobject is dynamic, I swear! */
1806 memset(&udc->gadget, 0, sizeof(udc->gadget));
1807}
1808
1809/**
1810 * ci_hdrc_gadget_init - initialize device related bits
1811 * ci: the controller
1812 *
1813 * This function enables the gadget role, if the device is "device capable".
1814 */
1815int ci_hdrc_gadget_init(struct ci13xxx *ci)
1816{
1817 struct ci_role_driver *rdrv;
1818
1819 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1820 return -ENXIO;
1821
1822 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1823 if (!rdrv)
1824 return -ENOMEM;
1825
1826 rdrv->start = udc_start;
1827 rdrv->stop = udc_stop;
1828 rdrv->irq = udc_irq;
1829 rdrv->name = "gadget";
1830 ci->roles[CI_ROLE_GADGET] = rdrv;
1831
1832 return 0;
1833}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/usb/ch9.h>
19#include <linux/usb/gadget.h>
20#include <linux/usb/otg-fsm.h>
21#include <linux/usb/chipidea.h>
22
23#include "ci.h"
24#include "udc.h"
25#include "bits.h"
26#include "otg.h"
27#include "otg_fsm.h"
28
29/* control endpoint description */
30static const struct usb_endpoint_descriptor
31ctrl_endpt_out_desc = {
32 .bLength = USB_DT_ENDPOINT_SIZE,
33 .bDescriptorType = USB_DT_ENDPOINT,
34
35 .bEndpointAddress = USB_DIR_OUT,
36 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
37 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
38};
39
40static const struct usb_endpoint_descriptor
41ctrl_endpt_in_desc = {
42 .bLength = USB_DT_ENDPOINT_SIZE,
43 .bDescriptorType = USB_DT_ENDPOINT,
44
45 .bEndpointAddress = USB_DIR_IN,
46 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
47 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
48};
49
50/**
51 * hw_ep_bit: calculates the bit number
52 * @num: endpoint number
53 * @dir: endpoint direction
54 *
55 * This function returns bit number
56 */
57static inline int hw_ep_bit(int num, int dir)
58{
59 return num + ((dir == TX) ? 16 : 0);
60}
61
62static inline int ep_to_bit(struct ci_hdrc *ci, int n)
63{
64 int fill = 16 - ci->hw_ep_max / 2;
65
66 if (n >= ci->hw_ep_max / 2)
67 n += fill;
68
69 return n;
70}
71
72/**
73 * hw_device_state: enables/disables interrupts (execute without interruption)
74 * @dma: 0 => disable, !0 => enable and set dma engine
75 *
76 * This function returns an error code
77 */
78static int hw_device_state(struct ci_hdrc *ci, u32 dma)
79{
80 if (dma) {
81 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
82 /* interrupt, error, port change, reset, sleep/suspend */
83 hw_write(ci, OP_USBINTR, ~0,
84 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
85 } else {
86 hw_write(ci, OP_USBINTR, ~0, 0);
87 }
88 return 0;
89}
90
91/**
92 * hw_ep_flush: flush endpoint fifo (execute without interruption)
93 * @num: endpoint number
94 * @dir: endpoint direction
95 *
96 * This function returns an error code
97 */
98static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
99{
100 int n = hw_ep_bit(num, dir);
101
102 do {
103 /* flush any pending transfer */
104 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
105 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
106 cpu_relax();
107 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
108
109 return 0;
110}
111
112/**
113 * hw_ep_disable: disables endpoint (execute without interruption)
114 * @num: endpoint number
115 * @dir: endpoint direction
116 *
117 * This function returns an error code
118 */
119static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
120{
121 hw_write(ci, OP_ENDPTCTRL + num,
122 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
123 return 0;
124}
125
126/**
127 * hw_ep_enable: enables endpoint (execute without interruption)
128 * @num: endpoint number
129 * @dir: endpoint direction
130 * @type: endpoint type
131 *
132 * This function returns an error code
133 */
134static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
135{
136 u32 mask, data;
137
138 if (dir == TX) {
139 mask = ENDPTCTRL_TXT; /* type */
140 data = type << __ffs(mask);
141
142 mask |= ENDPTCTRL_TXS; /* unstall */
143 mask |= ENDPTCTRL_TXR; /* reset data toggle */
144 data |= ENDPTCTRL_TXR;
145 mask |= ENDPTCTRL_TXE; /* enable */
146 data |= ENDPTCTRL_TXE;
147 } else {
148 mask = ENDPTCTRL_RXT; /* type */
149 data = type << __ffs(mask);
150
151 mask |= ENDPTCTRL_RXS; /* unstall */
152 mask |= ENDPTCTRL_RXR; /* reset data toggle */
153 data |= ENDPTCTRL_RXR;
154 mask |= ENDPTCTRL_RXE; /* enable */
155 data |= ENDPTCTRL_RXE;
156 }
157 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
158 return 0;
159}
160
161/**
162 * hw_ep_get_halt: return endpoint halt status
163 * @num: endpoint number
164 * @dir: endpoint direction
165 *
166 * This function returns 1 if endpoint halted
167 */
168static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
169{
170 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
171
172 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
173}
174
175/**
176 * hw_ep_prime: primes endpoint (execute without interruption)
177 * @num: endpoint number
178 * @dir: endpoint direction
179 * @is_ctrl: true if control endpoint
180 *
181 * This function returns an error code
182 */
183static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
184{
185 int n = hw_ep_bit(num, dir);
186
187 /* Synchronize before ep prime */
188 wmb();
189
190 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
191 return -EAGAIN;
192
193 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
194
195 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
196 cpu_relax();
197 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
198 return -EAGAIN;
199
200 /* status shoult be tested according with manual but it doesn't work */
201 return 0;
202}
203
204/**
205 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
206 * without interruption)
207 * @num: endpoint number
208 * @dir: endpoint direction
209 * @value: true => stall, false => unstall
210 *
211 * This function returns an error code
212 */
213static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
214{
215 if (value != 0 && value != 1)
216 return -EINVAL;
217
218 do {
219 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
220 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
221 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
222
223 /* data toggle - reserved for EP0 but it's in ESS */
224 hw_write(ci, reg, mask_xs|mask_xr,
225 value ? mask_xs : mask_xr);
226 } while (value != hw_ep_get_halt(ci, num, dir));
227
228 return 0;
229}
230
231/**
232 * hw_is_port_high_speed: test if port is high speed
233 *
234 * This function returns true if high speed port
235 */
236static int hw_port_is_high_speed(struct ci_hdrc *ci)
237{
238 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
239 hw_read(ci, OP_PORTSC, PORTSC_HSP);
240}
241
242/**
243 * hw_test_and_clear_complete: test & clear complete status (execute without
244 * interruption)
245 * @n: endpoint number
246 *
247 * This function returns complete status
248 */
249static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
250{
251 n = ep_to_bit(ci, n);
252 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
253}
254
255/**
256 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
257 * without interruption)
258 *
259 * This function returns active interrutps
260 */
261static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
262{
263 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
264
265 hw_write(ci, OP_USBSTS, ~0, reg);
266 return reg;
267}
268
269/**
270 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
271 * interruption)
272 *
273 * This function returns guard value
274 */
275static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
276{
277 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
278}
279
280/**
281 * hw_test_and_set_setup_guard: test & set setup guard (execute without
282 * interruption)
283 *
284 * This function returns guard value
285 */
286static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
287{
288 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
289}
290
291/**
292 * hw_usb_set_address: configures USB address (execute without interruption)
293 * @value: new USB address
294 *
295 * This function explicitly sets the address, without the "USBADRA" (advance)
296 * feature, which is not supported by older versions of the controller.
297 */
298static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
299{
300 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
301 value << __ffs(DEVICEADDR_USBADR));
302}
303
304/**
305 * hw_usb_reset: restart device after a bus reset (execute without
306 * interruption)
307 *
308 * This function returns an error code
309 */
310static int hw_usb_reset(struct ci_hdrc *ci)
311{
312 hw_usb_set_address(ci, 0);
313
314 /* ESS flushes only at end?!? */
315 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
316
317 /* clear setup token semaphores */
318 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
319
320 /* clear complete status */
321 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
322
323 /* wait until all bits cleared */
324 while (hw_read(ci, OP_ENDPTPRIME, ~0))
325 udelay(10); /* not RTOS friendly */
326
327 /* reset all endpoints ? */
328
329 /* reset internal status and wait for further instructions
330 no need to verify the port reset status (ESS does it) */
331
332 return 0;
333}
334
335/******************************************************************************
336 * UTIL block
337 *****************************************************************************/
338
339static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
340 unsigned length)
341{
342 int i;
343 u32 temp;
344 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
345 GFP_ATOMIC);
346
347 if (node == NULL)
348 return -ENOMEM;
349
350 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
351 if (node->ptr == NULL) {
352 kfree(node);
353 return -ENOMEM;
354 }
355
356 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
357 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
358 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
359 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
360 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
361
362 if (hwreq->req.length == 0
363 || hwreq->req.length % hwep->ep.maxpacket)
364 mul++;
365 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
366 }
367
368 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
369 if (length) {
370 node->ptr->page[0] = cpu_to_le32(temp);
371 for (i = 1; i < TD_PAGE_COUNT; i++) {
372 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
373 page &= ~TD_RESERVED_MASK;
374 node->ptr->page[i] = cpu_to_le32(page);
375 }
376 }
377
378 hwreq->req.actual += length;
379
380 if (!list_empty(&hwreq->tds)) {
381 /* get the last entry */
382 lastnode = list_entry(hwreq->tds.prev,
383 struct td_node, td);
384 lastnode->ptr->next = cpu_to_le32(node->dma);
385 }
386
387 INIT_LIST_HEAD(&node->td);
388 list_add_tail(&node->td, &hwreq->tds);
389
390 return 0;
391}
392
393/**
394 * _usb_addr: calculates endpoint address from direction & number
395 * @ep: endpoint
396 */
397static inline u8 _usb_addr(struct ci_hw_ep *ep)
398{
399 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
400}
401
402/**
403 * _hardware_enqueue: configures a request at hardware level
404 * @hwep: endpoint
405 * @hwreq: request
406 *
407 * This function returns an error code
408 */
409static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
410{
411 struct ci_hdrc *ci = hwep->ci;
412 int ret = 0;
413 unsigned rest = hwreq->req.length;
414 int pages = TD_PAGE_COUNT;
415 struct td_node *firstnode, *lastnode;
416
417 /* don't queue twice */
418 if (hwreq->req.status == -EALREADY)
419 return -EALREADY;
420
421 hwreq->req.status = -EALREADY;
422
423 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
424 &hwreq->req, hwep->dir);
425 if (ret)
426 return ret;
427
428 /*
429 * The first buffer could be not page aligned.
430 * In that case we have to span into one extra td.
431 */
432 if (hwreq->req.dma % PAGE_SIZE)
433 pages--;
434
435 if (rest == 0) {
436 ret = add_td_to_list(hwep, hwreq, 0);
437 if (ret < 0)
438 goto done;
439 }
440
441 while (rest > 0) {
442 unsigned count = min(hwreq->req.length - hwreq->req.actual,
443 (unsigned)(pages * CI_HDRC_PAGE_SIZE));
444 ret = add_td_to_list(hwep, hwreq, count);
445 if (ret < 0)
446 goto done;
447
448 rest -= count;
449 }
450
451 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
452 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
453 ret = add_td_to_list(hwep, hwreq, 0);
454 if (ret < 0)
455 goto done;
456 }
457
458 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
459
460 lastnode = list_entry(hwreq->tds.prev,
461 struct td_node, td);
462
463 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
464 if (!hwreq->req.no_interrupt)
465 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
466 wmb();
467
468 hwreq->req.actual = 0;
469 if (!list_empty(&hwep->qh.queue)) {
470 struct ci_hw_req *hwreqprev;
471 int n = hw_ep_bit(hwep->num, hwep->dir);
472 int tmp_stat;
473 struct td_node *prevlastnode;
474 u32 next = firstnode->dma & TD_ADDR_MASK;
475
476 hwreqprev = list_entry(hwep->qh.queue.prev,
477 struct ci_hw_req, queue);
478 prevlastnode = list_entry(hwreqprev->tds.prev,
479 struct td_node, td);
480
481 prevlastnode->ptr->next = cpu_to_le32(next);
482 wmb();
483 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
484 goto done;
485 do {
486 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
487 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
488 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
489 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
490 if (tmp_stat)
491 goto done;
492 }
493
494 /* QH configuration */
495 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
496 hwep->qh.ptr->td.token &=
497 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
498
499 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
500 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
501
502 if (hwreq->req.length == 0
503 || hwreq->req.length % hwep->ep.maxpacket)
504 mul++;
505 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
506 }
507
508 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
509 hwep->type == USB_ENDPOINT_XFER_CONTROL);
510done:
511 return ret;
512}
513
514/*
515 * free_pending_td: remove a pending request for the endpoint
516 * @hwep: endpoint
517 */
518static void free_pending_td(struct ci_hw_ep *hwep)
519{
520 struct td_node *pending = hwep->pending_td;
521
522 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
523 hwep->pending_td = NULL;
524 kfree(pending);
525}
526
527static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
528 struct td_node *node)
529{
530 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
531 hwep->qh.ptr->td.token &=
532 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
533
534 return hw_ep_prime(ci, hwep->num, hwep->dir,
535 hwep->type == USB_ENDPOINT_XFER_CONTROL);
536}
537
538/**
539 * _hardware_dequeue: handles a request at hardware level
540 * @gadget: gadget
541 * @hwep: endpoint
542 *
543 * This function returns an error code
544 */
545static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
546{
547 u32 tmptoken;
548 struct td_node *node, *tmpnode;
549 unsigned remaining_length;
550 unsigned actual = hwreq->req.length;
551 struct ci_hdrc *ci = hwep->ci;
552
553 if (hwreq->req.status != -EALREADY)
554 return -EINVAL;
555
556 hwreq->req.status = 0;
557
558 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
559 tmptoken = le32_to_cpu(node->ptr->token);
560 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
561 int n = hw_ep_bit(hwep->num, hwep->dir);
562
563 if (ci->rev == CI_REVISION_24)
564 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
565 reprime_dtd(ci, hwep, node);
566 hwreq->req.status = -EALREADY;
567 return -EBUSY;
568 }
569
570 remaining_length = (tmptoken & TD_TOTAL_BYTES);
571 remaining_length >>= __ffs(TD_TOTAL_BYTES);
572 actual -= remaining_length;
573
574 hwreq->req.status = tmptoken & TD_STATUS;
575 if ((TD_STATUS_HALTED & hwreq->req.status)) {
576 hwreq->req.status = -EPIPE;
577 break;
578 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
579 hwreq->req.status = -EPROTO;
580 break;
581 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
582 hwreq->req.status = -EILSEQ;
583 break;
584 }
585
586 if (remaining_length) {
587 if (hwep->dir == TX) {
588 hwreq->req.status = -EPROTO;
589 break;
590 }
591 }
592 /*
593 * As the hardware could still address the freed td
594 * which will run the udc unusable, the cleanup of the
595 * td has to be delayed by one.
596 */
597 if (hwep->pending_td)
598 free_pending_td(hwep);
599
600 hwep->pending_td = node;
601 list_del_init(&node->td);
602 }
603
604 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
605 &hwreq->req, hwep->dir);
606
607 hwreq->req.actual += actual;
608
609 if (hwreq->req.status)
610 return hwreq->req.status;
611
612 return hwreq->req.actual;
613}
614
615/**
616 * _ep_nuke: dequeues all endpoint requests
617 * @hwep: endpoint
618 *
619 * This function returns an error code
620 * Caller must hold lock
621 */
622static int _ep_nuke(struct ci_hw_ep *hwep)
623__releases(hwep->lock)
624__acquires(hwep->lock)
625{
626 struct td_node *node, *tmpnode;
627 if (hwep == NULL)
628 return -EINVAL;
629
630 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
631
632 while (!list_empty(&hwep->qh.queue)) {
633
634 /* pop oldest request */
635 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
636 struct ci_hw_req, queue);
637
638 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
639 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
640 list_del_init(&node->td);
641 node->ptr = NULL;
642 kfree(node);
643 }
644
645 list_del_init(&hwreq->queue);
646 hwreq->req.status = -ESHUTDOWN;
647
648 if (hwreq->req.complete != NULL) {
649 spin_unlock(hwep->lock);
650 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
651 spin_lock(hwep->lock);
652 }
653 }
654
655 if (hwep->pending_td)
656 free_pending_td(hwep);
657
658 return 0;
659}
660
661static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
662{
663 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
664 int direction, retval = 0;
665 unsigned long flags;
666
667 if (ep == NULL || hwep->ep.desc == NULL)
668 return -EINVAL;
669
670 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
671 return -EOPNOTSUPP;
672
673 spin_lock_irqsave(hwep->lock, flags);
674
675 if (value && hwep->dir == TX && check_transfer &&
676 !list_empty(&hwep->qh.queue) &&
677 !usb_endpoint_xfer_control(hwep->ep.desc)) {
678 spin_unlock_irqrestore(hwep->lock, flags);
679 return -EAGAIN;
680 }
681
682 direction = hwep->dir;
683 do {
684 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
685
686 if (!value)
687 hwep->wedge = 0;
688
689 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
690 hwep->dir = (hwep->dir == TX) ? RX : TX;
691
692 } while (hwep->dir != direction);
693
694 spin_unlock_irqrestore(hwep->lock, flags);
695 return retval;
696}
697
698
699/**
700 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
701 * @gadget: gadget
702 *
703 * This function returns an error code
704 */
705static int _gadget_stop_activity(struct usb_gadget *gadget)
706{
707 struct usb_ep *ep;
708 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
709 unsigned long flags;
710
711 spin_lock_irqsave(&ci->lock, flags);
712 ci->gadget.speed = USB_SPEED_UNKNOWN;
713 ci->remote_wakeup = 0;
714 ci->suspended = 0;
715 spin_unlock_irqrestore(&ci->lock, flags);
716
717 /* flush all endpoints */
718 gadget_for_each_ep(ep, gadget) {
719 usb_ep_fifo_flush(ep);
720 }
721 usb_ep_fifo_flush(&ci->ep0out->ep);
722 usb_ep_fifo_flush(&ci->ep0in->ep);
723
724 /* make sure to disable all endpoints */
725 gadget_for_each_ep(ep, gadget) {
726 usb_ep_disable(ep);
727 }
728
729 if (ci->status != NULL) {
730 usb_ep_free_request(&ci->ep0in->ep, ci->status);
731 ci->status = NULL;
732 }
733
734 return 0;
735}
736
737/******************************************************************************
738 * ISR block
739 *****************************************************************************/
740/**
741 * isr_reset_handler: USB reset interrupt handler
742 * @ci: UDC device
743 *
744 * This function resets USB engine after a bus reset occurred
745 */
746static void isr_reset_handler(struct ci_hdrc *ci)
747__releases(ci->lock)
748__acquires(ci->lock)
749{
750 int retval;
751
752 spin_unlock(&ci->lock);
753 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
754 usb_gadget_udc_reset(&ci->gadget, ci->driver);
755
756 retval = _gadget_stop_activity(&ci->gadget);
757 if (retval)
758 goto done;
759
760 retval = hw_usb_reset(ci);
761 if (retval)
762 goto done;
763
764 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
765 if (ci->status == NULL)
766 retval = -ENOMEM;
767
768done:
769 spin_lock(&ci->lock);
770
771 if (retval)
772 dev_err(ci->dev, "error: %i\n", retval);
773}
774
775/**
776 * isr_get_status_complete: get_status request complete function
777 * @ep: endpoint
778 * @req: request handled
779 *
780 * Caller must release lock
781 */
782static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
783{
784 if (ep == NULL || req == NULL)
785 return;
786
787 kfree(req->buf);
788 usb_ep_free_request(ep, req);
789}
790
791/**
792 * _ep_queue: queues (submits) an I/O request to an endpoint
793 * @ep: endpoint
794 * @req: request
795 * @gfp_flags: GFP flags (not used)
796 *
797 * Caller must hold lock
798 * This function returns an error code
799 */
800static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
801 gfp_t __maybe_unused gfp_flags)
802{
803 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
804 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
805 struct ci_hdrc *ci = hwep->ci;
806 int retval = 0;
807
808 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
809 return -EINVAL;
810
811 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
812 if (req->length)
813 hwep = (ci->ep0_dir == RX) ?
814 ci->ep0out : ci->ep0in;
815 if (!list_empty(&hwep->qh.queue)) {
816 _ep_nuke(hwep);
817 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
818 _usb_addr(hwep));
819 }
820 }
821
822 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
823 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
824 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
825 return -EMSGSIZE;
826 }
827
828 /* first nuke then test link, e.g. previous status has not sent */
829 if (!list_empty(&hwreq->queue)) {
830 dev_err(hwep->ci->dev, "request already in queue\n");
831 return -EBUSY;
832 }
833
834 /* push request */
835 hwreq->req.status = -EINPROGRESS;
836 hwreq->req.actual = 0;
837
838 retval = _hardware_enqueue(hwep, hwreq);
839
840 if (retval == -EALREADY)
841 retval = 0;
842 if (!retval)
843 list_add_tail(&hwreq->queue, &hwep->qh.queue);
844
845 return retval;
846}
847
848/**
849 * isr_get_status_response: get_status request response
850 * @ci: ci struct
851 * @setup: setup request packet
852 *
853 * This function returns an error code
854 */
855static int isr_get_status_response(struct ci_hdrc *ci,
856 struct usb_ctrlrequest *setup)
857__releases(hwep->lock)
858__acquires(hwep->lock)
859{
860 struct ci_hw_ep *hwep = ci->ep0in;
861 struct usb_request *req = NULL;
862 gfp_t gfp_flags = GFP_ATOMIC;
863 int dir, num, retval;
864
865 if (hwep == NULL || setup == NULL)
866 return -EINVAL;
867
868 spin_unlock(hwep->lock);
869 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
870 spin_lock(hwep->lock);
871 if (req == NULL)
872 return -ENOMEM;
873
874 req->complete = isr_get_status_complete;
875 req->length = 2;
876 req->buf = kzalloc(req->length, gfp_flags);
877 if (req->buf == NULL) {
878 retval = -ENOMEM;
879 goto err_free_req;
880 }
881
882 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
883 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
884 ci->gadget.is_selfpowered;
885 } else if ((setup->bRequestType & USB_RECIP_MASK) \
886 == USB_RECIP_ENDPOINT) {
887 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
888 TX : RX;
889 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
890 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
891 }
892 /* else do nothing; reserved for future use */
893
894 retval = _ep_queue(&hwep->ep, req, gfp_flags);
895 if (retval)
896 goto err_free_buf;
897
898 return 0;
899
900 err_free_buf:
901 kfree(req->buf);
902 err_free_req:
903 spin_unlock(hwep->lock);
904 usb_ep_free_request(&hwep->ep, req);
905 spin_lock(hwep->lock);
906 return retval;
907}
908
909/**
910 * isr_setup_status_complete: setup_status request complete function
911 * @ep: endpoint
912 * @req: request handled
913 *
914 * Caller must release lock. Put the port in test mode if test mode
915 * feature is selected.
916 */
917static void
918isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
919{
920 struct ci_hdrc *ci = req->context;
921 unsigned long flags;
922
923 if (ci->setaddr) {
924 hw_usb_set_address(ci, ci->address);
925 ci->setaddr = false;
926 if (ci->address)
927 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
928 }
929
930 spin_lock_irqsave(&ci->lock, flags);
931 if (ci->test_mode)
932 hw_port_test_set(ci, ci->test_mode);
933 spin_unlock_irqrestore(&ci->lock, flags);
934}
935
936/**
937 * isr_setup_status_phase: queues the status phase of a setup transation
938 * @ci: ci struct
939 *
940 * This function returns an error code
941 */
942static int isr_setup_status_phase(struct ci_hdrc *ci)
943{
944 struct ci_hw_ep *hwep;
945
946 /*
947 * Unexpected USB controller behavior, caused by bad signal integrity
948 * or ground reference problems, can lead to isr_setup_status_phase
949 * being called with ci->status equal to NULL.
950 * If this situation occurs, you should review your USB hardware design.
951 */
952 if (WARN_ON_ONCE(!ci->status))
953 return -EPIPE;
954
955 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
956 ci->status->context = ci;
957 ci->status->complete = isr_setup_status_complete;
958
959 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
960}
961
962/**
963 * isr_tr_complete_low: transaction complete low level handler
964 * @hwep: endpoint
965 *
966 * This function returns an error code
967 * Caller must hold lock
968 */
969static int isr_tr_complete_low(struct ci_hw_ep *hwep)
970__releases(hwep->lock)
971__acquires(hwep->lock)
972{
973 struct ci_hw_req *hwreq, *hwreqtemp;
974 struct ci_hw_ep *hweptemp = hwep;
975 int retval = 0;
976
977 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
978 queue) {
979 retval = _hardware_dequeue(hwep, hwreq);
980 if (retval < 0)
981 break;
982 list_del_init(&hwreq->queue);
983 if (hwreq->req.complete != NULL) {
984 spin_unlock(hwep->lock);
985 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
986 hwreq->req.length)
987 hweptemp = hwep->ci->ep0in;
988 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
989 spin_lock(hwep->lock);
990 }
991 }
992
993 if (retval == -EBUSY)
994 retval = 0;
995
996 return retval;
997}
998
999static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1000{
1001 dev_warn(&ci->gadget.dev,
1002 "connect the device to an alternate port if you want HNP\n");
1003 return isr_setup_status_phase(ci);
1004}
1005
1006/**
1007 * isr_setup_packet_handler: setup packet handler
1008 * @ci: UDC descriptor
1009 *
1010 * This function handles setup packet
1011 */
1012static void isr_setup_packet_handler(struct ci_hdrc *ci)
1013__releases(ci->lock)
1014__acquires(ci->lock)
1015{
1016 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1017 struct usb_ctrlrequest req;
1018 int type, num, dir, err = -EINVAL;
1019 u8 tmode = 0;
1020
1021 /*
1022 * Flush data and handshake transactions of previous
1023 * setup packet.
1024 */
1025 _ep_nuke(ci->ep0out);
1026 _ep_nuke(ci->ep0in);
1027
1028 /* read_setup_packet */
1029 do {
1030 hw_test_and_set_setup_guard(ci);
1031 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1032 } while (!hw_test_and_clear_setup_guard(ci));
1033
1034 type = req.bRequestType;
1035
1036 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1037
1038 switch (req.bRequest) {
1039 case USB_REQ_CLEAR_FEATURE:
1040 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1041 le16_to_cpu(req.wValue) ==
1042 USB_ENDPOINT_HALT) {
1043 if (req.wLength != 0)
1044 break;
1045 num = le16_to_cpu(req.wIndex);
1046 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1047 num &= USB_ENDPOINT_NUMBER_MASK;
1048 if (dir == TX)
1049 num += ci->hw_ep_max / 2;
1050 if (!ci->ci_hw_ep[num].wedge) {
1051 spin_unlock(&ci->lock);
1052 err = usb_ep_clear_halt(
1053 &ci->ci_hw_ep[num].ep);
1054 spin_lock(&ci->lock);
1055 if (err)
1056 break;
1057 }
1058 err = isr_setup_status_phase(ci);
1059 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1060 le16_to_cpu(req.wValue) ==
1061 USB_DEVICE_REMOTE_WAKEUP) {
1062 if (req.wLength != 0)
1063 break;
1064 ci->remote_wakeup = 0;
1065 err = isr_setup_status_phase(ci);
1066 } else {
1067 goto delegate;
1068 }
1069 break;
1070 case USB_REQ_GET_STATUS:
1071 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1072 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1073 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1074 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1075 goto delegate;
1076 if (le16_to_cpu(req.wLength) != 2 ||
1077 le16_to_cpu(req.wValue) != 0)
1078 break;
1079 err = isr_get_status_response(ci, &req);
1080 break;
1081 case USB_REQ_SET_ADDRESS:
1082 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1083 goto delegate;
1084 if (le16_to_cpu(req.wLength) != 0 ||
1085 le16_to_cpu(req.wIndex) != 0)
1086 break;
1087 ci->address = (u8)le16_to_cpu(req.wValue);
1088 ci->setaddr = true;
1089 err = isr_setup_status_phase(ci);
1090 break;
1091 case USB_REQ_SET_FEATURE:
1092 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1093 le16_to_cpu(req.wValue) ==
1094 USB_ENDPOINT_HALT) {
1095 if (req.wLength != 0)
1096 break;
1097 num = le16_to_cpu(req.wIndex);
1098 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1099 num &= USB_ENDPOINT_NUMBER_MASK;
1100 if (dir == TX)
1101 num += ci->hw_ep_max / 2;
1102
1103 spin_unlock(&ci->lock);
1104 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1105 spin_lock(&ci->lock);
1106 if (!err)
1107 isr_setup_status_phase(ci);
1108 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1109 if (req.wLength != 0)
1110 break;
1111 switch (le16_to_cpu(req.wValue)) {
1112 case USB_DEVICE_REMOTE_WAKEUP:
1113 ci->remote_wakeup = 1;
1114 err = isr_setup_status_phase(ci);
1115 break;
1116 case USB_DEVICE_TEST_MODE:
1117 tmode = le16_to_cpu(req.wIndex) >> 8;
1118 switch (tmode) {
1119 case TEST_J:
1120 case TEST_K:
1121 case TEST_SE0_NAK:
1122 case TEST_PACKET:
1123 case TEST_FORCE_EN:
1124 ci->test_mode = tmode;
1125 err = isr_setup_status_phase(
1126 ci);
1127 break;
1128 default:
1129 break;
1130 }
1131 break;
1132 case USB_DEVICE_B_HNP_ENABLE:
1133 if (ci_otg_is_fsm_mode(ci)) {
1134 ci->gadget.b_hnp_enable = 1;
1135 err = isr_setup_status_phase(
1136 ci);
1137 }
1138 break;
1139 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1140 if (ci_otg_is_fsm_mode(ci))
1141 err = otg_a_alt_hnp_support(ci);
1142 break;
1143 case USB_DEVICE_A_HNP_SUPPORT:
1144 if (ci_otg_is_fsm_mode(ci)) {
1145 ci->gadget.a_hnp_support = 1;
1146 err = isr_setup_status_phase(
1147 ci);
1148 }
1149 break;
1150 default:
1151 goto delegate;
1152 }
1153 } else {
1154 goto delegate;
1155 }
1156 break;
1157 default:
1158delegate:
1159 if (req.wLength == 0) /* no data phase */
1160 ci->ep0_dir = TX;
1161
1162 spin_unlock(&ci->lock);
1163 err = ci->driver->setup(&ci->gadget, &req);
1164 spin_lock(&ci->lock);
1165 break;
1166 }
1167
1168 if (err < 0) {
1169 spin_unlock(&ci->lock);
1170 if (_ep_set_halt(&hwep->ep, 1, false))
1171 dev_err(ci->dev, "error: _ep_set_halt\n");
1172 spin_lock(&ci->lock);
1173 }
1174}
1175
1176/**
1177 * isr_tr_complete_handler: transaction complete interrupt handler
1178 * @ci: UDC descriptor
1179 *
1180 * This function handles traffic events
1181 */
1182static void isr_tr_complete_handler(struct ci_hdrc *ci)
1183__releases(ci->lock)
1184__acquires(ci->lock)
1185{
1186 unsigned i;
1187 int err;
1188
1189 for (i = 0; i < ci->hw_ep_max; i++) {
1190 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1191
1192 if (hwep->ep.desc == NULL)
1193 continue; /* not configured */
1194
1195 if (hw_test_and_clear_complete(ci, i)) {
1196 err = isr_tr_complete_low(hwep);
1197 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1198 if (err > 0) /* needs status phase */
1199 err = isr_setup_status_phase(ci);
1200 if (err < 0) {
1201 spin_unlock(&ci->lock);
1202 if (_ep_set_halt(&hwep->ep, 1, false))
1203 dev_err(ci->dev,
1204 "error: _ep_set_halt\n");
1205 spin_lock(&ci->lock);
1206 }
1207 }
1208 }
1209
1210 /* Only handle setup packet below */
1211 if (i == 0 &&
1212 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1213 isr_setup_packet_handler(ci);
1214 }
1215}
1216
1217/******************************************************************************
1218 * ENDPT block
1219 *****************************************************************************/
1220/**
1221 * ep_enable: configure endpoint, making it usable
1222 *
1223 * Check usb_ep_enable() at "usb_gadget.h" for details
1224 */
1225static int ep_enable(struct usb_ep *ep,
1226 const struct usb_endpoint_descriptor *desc)
1227{
1228 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1229 int retval = 0;
1230 unsigned long flags;
1231 u32 cap = 0;
1232
1233 if (ep == NULL || desc == NULL)
1234 return -EINVAL;
1235
1236 spin_lock_irqsave(hwep->lock, flags);
1237
1238 /* only internal SW should enable ctrl endpts */
1239
1240 if (!list_empty(&hwep->qh.queue)) {
1241 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1242 spin_unlock_irqrestore(hwep->lock, flags);
1243 return -EBUSY;
1244 }
1245
1246 hwep->ep.desc = desc;
1247
1248 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1249 hwep->num = usb_endpoint_num(desc);
1250 hwep->type = usb_endpoint_type(desc);
1251
1252 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1253 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1254
1255 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1256 cap |= QH_IOS;
1257
1258 cap |= QH_ZLT;
1259 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1260 /*
1261 * For ISO-TX, we set mult at QH as the largest value, and use
1262 * MultO at TD as real mult value.
1263 */
1264 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1265 cap |= 3 << __ffs(QH_MULT);
1266
1267 hwep->qh.ptr->cap = cpu_to_le32(cap);
1268
1269 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1270
1271 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1272 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1273 retval = -EINVAL;
1274 }
1275
1276 /*
1277 * Enable endpoints in the HW other than ep0 as ep0
1278 * is always enabled
1279 */
1280 if (hwep->num)
1281 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1282 hwep->type);
1283
1284 spin_unlock_irqrestore(hwep->lock, flags);
1285 return retval;
1286}
1287
1288/**
1289 * ep_disable: endpoint is no longer usable
1290 *
1291 * Check usb_ep_disable() at "usb_gadget.h" for details
1292 */
1293static int ep_disable(struct usb_ep *ep)
1294{
1295 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1296 int direction, retval = 0;
1297 unsigned long flags;
1298
1299 if (ep == NULL)
1300 return -EINVAL;
1301 else if (hwep->ep.desc == NULL)
1302 return -EBUSY;
1303
1304 spin_lock_irqsave(hwep->lock, flags);
1305
1306 /* only internal SW should disable ctrl endpts */
1307
1308 direction = hwep->dir;
1309 do {
1310 retval |= _ep_nuke(hwep);
1311 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1312
1313 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1314 hwep->dir = (hwep->dir == TX) ? RX : TX;
1315
1316 } while (hwep->dir != direction);
1317
1318 hwep->ep.desc = NULL;
1319
1320 spin_unlock_irqrestore(hwep->lock, flags);
1321 return retval;
1322}
1323
1324/**
1325 * ep_alloc_request: allocate a request object to use with this endpoint
1326 *
1327 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1328 */
1329static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1330{
1331 struct ci_hw_req *hwreq = NULL;
1332
1333 if (ep == NULL)
1334 return NULL;
1335
1336 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1337 if (hwreq != NULL) {
1338 INIT_LIST_HEAD(&hwreq->queue);
1339 INIT_LIST_HEAD(&hwreq->tds);
1340 }
1341
1342 return (hwreq == NULL) ? NULL : &hwreq->req;
1343}
1344
1345/**
1346 * ep_free_request: frees a request object
1347 *
1348 * Check usb_ep_free_request() at "usb_gadget.h" for details
1349 */
1350static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1351{
1352 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1353 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1354 struct td_node *node, *tmpnode;
1355 unsigned long flags;
1356
1357 if (ep == NULL || req == NULL) {
1358 return;
1359 } else if (!list_empty(&hwreq->queue)) {
1360 dev_err(hwep->ci->dev, "freeing queued request\n");
1361 return;
1362 }
1363
1364 spin_lock_irqsave(hwep->lock, flags);
1365
1366 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1367 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1368 list_del_init(&node->td);
1369 node->ptr = NULL;
1370 kfree(node);
1371 }
1372
1373 kfree(hwreq);
1374
1375 spin_unlock_irqrestore(hwep->lock, flags);
1376}
1377
1378/**
1379 * ep_queue: queues (submits) an I/O request to an endpoint
1380 *
1381 * Check usb_ep_queue()* at usb_gadget.h" for details
1382 */
1383static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1384 gfp_t __maybe_unused gfp_flags)
1385{
1386 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1387 int retval = 0;
1388 unsigned long flags;
1389
1390 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1391 return -EINVAL;
1392
1393 spin_lock_irqsave(hwep->lock, flags);
1394 retval = _ep_queue(ep, req, gfp_flags);
1395 spin_unlock_irqrestore(hwep->lock, flags);
1396 return retval;
1397}
1398
1399/**
1400 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1401 *
1402 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1403 */
1404static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1405{
1406 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1407 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1408 unsigned long flags;
1409 struct td_node *node, *tmpnode;
1410
1411 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1412 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1413 list_empty(&hwep->qh.queue))
1414 return -EINVAL;
1415
1416 spin_lock_irqsave(hwep->lock, flags);
1417
1418 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1419
1420 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1421 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1422 list_del(&node->td);
1423 kfree(node);
1424 }
1425
1426 /* pop request */
1427 list_del_init(&hwreq->queue);
1428
1429 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1430
1431 req->status = -ECONNRESET;
1432
1433 if (hwreq->req.complete != NULL) {
1434 spin_unlock(hwep->lock);
1435 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1436 spin_lock(hwep->lock);
1437 }
1438
1439 spin_unlock_irqrestore(hwep->lock, flags);
1440 return 0;
1441}
1442
1443/**
1444 * ep_set_halt: sets the endpoint halt feature
1445 *
1446 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1447 */
1448static int ep_set_halt(struct usb_ep *ep, int value)
1449{
1450 return _ep_set_halt(ep, value, true);
1451}
1452
1453/**
1454 * ep_set_wedge: sets the halt feature and ignores clear requests
1455 *
1456 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1457 */
1458static int ep_set_wedge(struct usb_ep *ep)
1459{
1460 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1461 unsigned long flags;
1462
1463 if (ep == NULL || hwep->ep.desc == NULL)
1464 return -EINVAL;
1465
1466 spin_lock_irqsave(hwep->lock, flags);
1467 hwep->wedge = 1;
1468 spin_unlock_irqrestore(hwep->lock, flags);
1469
1470 return usb_ep_set_halt(ep);
1471}
1472
1473/**
1474 * ep_fifo_flush: flushes contents of a fifo
1475 *
1476 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1477 */
1478static void ep_fifo_flush(struct usb_ep *ep)
1479{
1480 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1481 unsigned long flags;
1482
1483 if (ep == NULL) {
1484 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1485 return;
1486 }
1487
1488 spin_lock_irqsave(hwep->lock, flags);
1489
1490 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1491
1492 spin_unlock_irqrestore(hwep->lock, flags);
1493}
1494
1495/**
1496 * Endpoint-specific part of the API to the USB controller hardware
1497 * Check "usb_gadget.h" for details
1498 */
1499static const struct usb_ep_ops usb_ep_ops = {
1500 .enable = ep_enable,
1501 .disable = ep_disable,
1502 .alloc_request = ep_alloc_request,
1503 .free_request = ep_free_request,
1504 .queue = ep_queue,
1505 .dequeue = ep_dequeue,
1506 .set_halt = ep_set_halt,
1507 .set_wedge = ep_set_wedge,
1508 .fifo_flush = ep_fifo_flush,
1509};
1510
1511/******************************************************************************
1512 * GADGET block
1513 *****************************************************************************/
1514static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1515{
1516 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1517 unsigned long flags;
1518 int gadget_ready = 0;
1519
1520 spin_lock_irqsave(&ci->lock, flags);
1521 ci->vbus_active = is_active;
1522 if (ci->driver)
1523 gadget_ready = 1;
1524 spin_unlock_irqrestore(&ci->lock, flags);
1525
1526 if (ci->usb_phy)
1527 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1528 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1529
1530 if (gadget_ready) {
1531 if (is_active) {
1532 pm_runtime_get_sync(&_gadget->dev);
1533 hw_device_reset(ci);
1534 hw_device_state(ci, ci->ep0out->qh.dma);
1535 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1536 usb_udc_vbus_handler(_gadget, true);
1537 } else {
1538 usb_udc_vbus_handler(_gadget, false);
1539 if (ci->driver)
1540 ci->driver->disconnect(&ci->gadget);
1541 hw_device_state(ci, 0);
1542 if (ci->platdata->notify_event)
1543 ci->platdata->notify_event(ci,
1544 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1545 _gadget_stop_activity(&ci->gadget);
1546 pm_runtime_put_sync(&_gadget->dev);
1547 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1548 }
1549 }
1550
1551 return 0;
1552}
1553
1554static int ci_udc_wakeup(struct usb_gadget *_gadget)
1555{
1556 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1557 unsigned long flags;
1558 int ret = 0;
1559
1560 spin_lock_irqsave(&ci->lock, flags);
1561 if (!ci->remote_wakeup) {
1562 ret = -EOPNOTSUPP;
1563 goto out;
1564 }
1565 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1566 ret = -EINVAL;
1567 goto out;
1568 }
1569 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1570out:
1571 spin_unlock_irqrestore(&ci->lock, flags);
1572 return ret;
1573}
1574
1575static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1576{
1577 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1578
1579 if (ci->usb_phy)
1580 return usb_phy_set_power(ci->usb_phy, ma);
1581 return -ENOTSUPP;
1582}
1583
1584static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1585{
1586 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1587 struct ci_hw_ep *hwep = ci->ep0in;
1588 unsigned long flags;
1589
1590 spin_lock_irqsave(hwep->lock, flags);
1591 _gadget->is_selfpowered = (is_on != 0);
1592 spin_unlock_irqrestore(hwep->lock, flags);
1593
1594 return 0;
1595}
1596
1597/* Change Data+ pullup status
1598 * this func is used by usb_gadget_connect/disconnet
1599 */
1600static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1601{
1602 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1603
1604 /*
1605 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1606 * and don't touch Data+ in host mode for dual role config.
1607 */
1608 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1609 return 0;
1610
1611 pm_runtime_get_sync(&ci->gadget.dev);
1612 if (is_on)
1613 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1614 else
1615 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1616 pm_runtime_put_sync(&ci->gadget.dev);
1617
1618 return 0;
1619}
1620
1621static int ci_udc_start(struct usb_gadget *gadget,
1622 struct usb_gadget_driver *driver);
1623static int ci_udc_stop(struct usb_gadget *gadget);
1624/**
1625 * Device operations part of the API to the USB controller hardware,
1626 * which don't involve endpoints (or i/o)
1627 * Check "usb_gadget.h" for details
1628 */
1629static const struct usb_gadget_ops usb_gadget_ops = {
1630 .vbus_session = ci_udc_vbus_session,
1631 .wakeup = ci_udc_wakeup,
1632 .set_selfpowered = ci_udc_selfpowered,
1633 .pullup = ci_udc_pullup,
1634 .vbus_draw = ci_udc_vbus_draw,
1635 .udc_start = ci_udc_start,
1636 .udc_stop = ci_udc_stop,
1637};
1638
1639static int init_eps(struct ci_hdrc *ci)
1640{
1641 int retval = 0, i, j;
1642
1643 for (i = 0; i < ci->hw_ep_max/2; i++)
1644 for (j = RX; j <= TX; j++) {
1645 int k = i + j * ci->hw_ep_max/2;
1646 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1647
1648 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1649 (j == TX) ? "in" : "out");
1650
1651 hwep->ci = ci;
1652 hwep->lock = &ci->lock;
1653 hwep->td_pool = ci->td_pool;
1654
1655 hwep->ep.name = hwep->name;
1656 hwep->ep.ops = &usb_ep_ops;
1657
1658 if (i == 0) {
1659 hwep->ep.caps.type_control = true;
1660 } else {
1661 hwep->ep.caps.type_iso = true;
1662 hwep->ep.caps.type_bulk = true;
1663 hwep->ep.caps.type_int = true;
1664 }
1665
1666 if (j == TX)
1667 hwep->ep.caps.dir_in = true;
1668 else
1669 hwep->ep.caps.dir_out = true;
1670
1671 /*
1672 * for ep0: maxP defined in desc, for other
1673 * eps, maxP is set by epautoconfig() called
1674 * by gadget layer
1675 */
1676 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1677
1678 INIT_LIST_HEAD(&hwep->qh.queue);
1679 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1680 &hwep->qh.dma);
1681 if (hwep->qh.ptr == NULL)
1682 retval = -ENOMEM;
1683
1684 /*
1685 * set up shorthands for ep0 out and in endpoints,
1686 * don't add to gadget's ep_list
1687 */
1688 if (i == 0) {
1689 if (j == RX)
1690 ci->ep0out = hwep;
1691 else
1692 ci->ep0in = hwep;
1693
1694 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1695 continue;
1696 }
1697
1698 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1699 }
1700
1701 return retval;
1702}
1703
1704static void destroy_eps(struct ci_hdrc *ci)
1705{
1706 int i;
1707
1708 for (i = 0; i < ci->hw_ep_max; i++) {
1709 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1710
1711 if (hwep->pending_td)
1712 free_pending_td(hwep);
1713 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1714 }
1715}
1716
1717/**
1718 * ci_udc_start: register a gadget driver
1719 * @gadget: our gadget
1720 * @driver: the driver being registered
1721 *
1722 * Interrupts are enabled here.
1723 */
1724static int ci_udc_start(struct usb_gadget *gadget,
1725 struct usb_gadget_driver *driver)
1726{
1727 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1728 int retval = -ENOMEM;
1729
1730 if (driver->disconnect == NULL)
1731 return -EINVAL;
1732
1733
1734 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1735 retval = usb_ep_enable(&ci->ep0out->ep);
1736 if (retval)
1737 return retval;
1738
1739 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1740 retval = usb_ep_enable(&ci->ep0in->ep);
1741 if (retval)
1742 return retval;
1743
1744 ci->driver = driver;
1745
1746 /* Start otg fsm for B-device */
1747 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1748 ci_hdrc_otg_fsm_start(ci);
1749 return retval;
1750 }
1751
1752 pm_runtime_get_sync(&ci->gadget.dev);
1753 if (ci->vbus_active) {
1754 hw_device_reset(ci);
1755 } else {
1756 usb_udc_vbus_handler(&ci->gadget, false);
1757 pm_runtime_put_sync(&ci->gadget.dev);
1758 return retval;
1759 }
1760
1761 retval = hw_device_state(ci, ci->ep0out->qh.dma);
1762 if (retval)
1763 pm_runtime_put_sync(&ci->gadget.dev);
1764
1765 return retval;
1766}
1767
1768static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1769{
1770 if (!ci_otg_is_fsm_mode(ci))
1771 return;
1772
1773 mutex_lock(&ci->fsm.lock);
1774 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1775 ci->fsm.a_bidl_adis_tmout = 1;
1776 ci_hdrc_otg_fsm_start(ci);
1777 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1778 ci->fsm.protocol = PROTO_UNDEF;
1779 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1780 }
1781 mutex_unlock(&ci->fsm.lock);
1782}
1783
1784/**
1785 * ci_udc_stop: unregister a gadget driver
1786 */
1787static int ci_udc_stop(struct usb_gadget *gadget)
1788{
1789 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1790 unsigned long flags;
1791
1792 spin_lock_irqsave(&ci->lock, flags);
1793
1794 if (ci->vbus_active) {
1795 hw_device_state(ci, 0);
1796 spin_unlock_irqrestore(&ci->lock, flags);
1797 if (ci->platdata->notify_event)
1798 ci->platdata->notify_event(ci,
1799 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1800 _gadget_stop_activity(&ci->gadget);
1801 spin_lock_irqsave(&ci->lock, flags);
1802 pm_runtime_put(&ci->gadget.dev);
1803 }
1804
1805 ci->driver = NULL;
1806 spin_unlock_irqrestore(&ci->lock, flags);
1807
1808 ci_udc_stop_for_otg_fsm(ci);
1809 return 0;
1810}
1811
1812/******************************************************************************
1813 * BUS block
1814 *****************************************************************************/
1815/**
1816 * udc_irq: ci interrupt handler
1817 *
1818 * This function returns IRQ_HANDLED if the IRQ has been handled
1819 * It locks access to registers
1820 */
1821static irqreturn_t udc_irq(struct ci_hdrc *ci)
1822{
1823 irqreturn_t retval;
1824 u32 intr;
1825
1826 if (ci == NULL)
1827 return IRQ_HANDLED;
1828
1829 spin_lock(&ci->lock);
1830
1831 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
1832 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
1833 USBMODE_CM_DC) {
1834 spin_unlock(&ci->lock);
1835 return IRQ_NONE;
1836 }
1837 }
1838 intr = hw_test_and_clear_intr_active(ci);
1839
1840 if (intr) {
1841 /* order defines priority - do NOT change it */
1842 if (USBi_URI & intr)
1843 isr_reset_handler(ci);
1844
1845 if (USBi_PCI & intr) {
1846 ci->gadget.speed = hw_port_is_high_speed(ci) ?
1847 USB_SPEED_HIGH : USB_SPEED_FULL;
1848 if (ci->suspended) {
1849 if (ci->driver->resume) {
1850 spin_unlock(&ci->lock);
1851 ci->driver->resume(&ci->gadget);
1852 spin_lock(&ci->lock);
1853 }
1854 ci->suspended = 0;
1855 usb_gadget_set_state(&ci->gadget,
1856 ci->resume_state);
1857 }
1858 }
1859
1860 if (USBi_UI & intr)
1861 isr_tr_complete_handler(ci);
1862
1863 if ((USBi_SLI & intr) && !(ci->suspended)) {
1864 ci->suspended = 1;
1865 ci->resume_state = ci->gadget.state;
1866 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
1867 ci->driver->suspend) {
1868 spin_unlock(&ci->lock);
1869 ci->driver->suspend(&ci->gadget);
1870 spin_lock(&ci->lock);
1871 }
1872 usb_gadget_set_state(&ci->gadget,
1873 USB_STATE_SUSPENDED);
1874 }
1875 retval = IRQ_HANDLED;
1876 } else {
1877 retval = IRQ_NONE;
1878 }
1879 spin_unlock(&ci->lock);
1880
1881 return retval;
1882}
1883
1884/**
1885 * udc_start: initialize gadget role
1886 * @ci: chipidea controller
1887 */
1888static int udc_start(struct ci_hdrc *ci)
1889{
1890 struct device *dev = ci->dev;
1891 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
1892 int retval = 0;
1893
1894 ci->gadget.ops = &usb_gadget_ops;
1895 ci->gadget.speed = USB_SPEED_UNKNOWN;
1896 ci->gadget.max_speed = USB_SPEED_HIGH;
1897 ci->gadget.name = ci->platdata->name;
1898 ci->gadget.otg_caps = otg_caps;
1899
1900 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
1901 ci->gadget.quirk_avoids_skb_reserve = 1;
1902
1903 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
1904 otg_caps->adp_support))
1905 ci->gadget.is_otg = 1;
1906
1907 INIT_LIST_HEAD(&ci->gadget.ep_list);
1908
1909 /* alloc resources */
1910 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
1911 sizeof(struct ci_hw_qh),
1912 64, CI_HDRC_PAGE_SIZE);
1913 if (ci->qh_pool == NULL)
1914 return -ENOMEM;
1915
1916 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
1917 sizeof(struct ci_hw_td),
1918 64, CI_HDRC_PAGE_SIZE);
1919 if (ci->td_pool == NULL) {
1920 retval = -ENOMEM;
1921 goto free_qh_pool;
1922 }
1923
1924 retval = init_eps(ci);
1925 if (retval)
1926 goto free_pools;
1927
1928 ci->gadget.ep0 = &ci->ep0in->ep;
1929
1930 retval = usb_add_gadget_udc(dev, &ci->gadget);
1931 if (retval)
1932 goto destroy_eps;
1933
1934 pm_runtime_no_callbacks(&ci->gadget.dev);
1935 pm_runtime_enable(&ci->gadget.dev);
1936
1937 return retval;
1938
1939destroy_eps:
1940 destroy_eps(ci);
1941free_pools:
1942 dma_pool_destroy(ci->td_pool);
1943free_qh_pool:
1944 dma_pool_destroy(ci->qh_pool);
1945 return retval;
1946}
1947
1948/**
1949 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
1950 *
1951 * No interrupts active, the IRQ has been released
1952 */
1953void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
1954{
1955 if (!ci->roles[CI_ROLE_GADGET])
1956 return;
1957
1958 usb_del_gadget_udc(&ci->gadget);
1959
1960 destroy_eps(ci);
1961
1962 dma_pool_destroy(ci->td_pool);
1963 dma_pool_destroy(ci->qh_pool);
1964}
1965
1966static int udc_id_switch_for_device(struct ci_hdrc *ci)
1967{
1968 if (ci->is_otg)
1969 /* Clear and enable BSV irq */
1970 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
1971 OTGSC_BSVIS | OTGSC_BSVIE);
1972
1973 return 0;
1974}
1975
1976static void udc_id_switch_for_host(struct ci_hdrc *ci)
1977{
1978 /*
1979 * host doesn't care B_SESSION_VALID event
1980 * so clear and disbale BSV irq
1981 */
1982 if (ci->is_otg)
1983 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
1984
1985 ci->vbus_active = 0;
1986}
1987
1988/**
1989 * ci_hdrc_gadget_init - initialize device related bits
1990 * ci: the controller
1991 *
1992 * This function initializes the gadget, if the device is "device capable".
1993 */
1994int ci_hdrc_gadget_init(struct ci_hdrc *ci)
1995{
1996 struct ci_role_driver *rdrv;
1997 int ret;
1998
1999 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2000 return -ENXIO;
2001
2002 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2003 if (!rdrv)
2004 return -ENOMEM;
2005
2006 rdrv->start = udc_id_switch_for_device;
2007 rdrv->stop = udc_id_switch_for_host;
2008 rdrv->irq = udc_irq;
2009 rdrv->name = "gadget";
2010
2011 ret = udc_start(ci);
2012 if (!ret)
2013 ci->roles[CI_ROLE_GADGET] = rdrv;
2014
2015 return ret;
2016}