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1// SPDX-License-Identifier: GPL-2.0
2/*******************************************************************************
3 *
4 * Intel Ethernet Controller XL710 Family Linux Driver
5 * Copyright(c) 2013 - 2016 Intel Corporation.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program. If not, see <http://www.gnu.org/licenses/>.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28/* ethtool support for i40e */
29
30#include "i40e.h"
31#include "i40e_diag.h"
32
33struct i40e_stats {
34 char stat_string[ETH_GSTRING_LEN];
35 int sizeof_stat;
36 int stat_offset;
37};
38
39#define I40E_STAT(_type, _name, _stat) { \
40 .stat_string = _name, \
41 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \
42 .stat_offset = offsetof(_type, _stat) \
43}
44
45#define I40E_NETDEV_STAT(_net_stat) \
46 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
47#define I40E_PF_STAT(_name, _stat) \
48 I40E_STAT(struct i40e_pf, _name, _stat)
49#define I40E_VSI_STAT(_name, _stat) \
50 I40E_STAT(struct i40e_vsi, _name, _stat)
51#define I40E_VEB_STAT(_name, _stat) \
52 I40E_STAT(struct i40e_veb, _name, _stat)
53
54static const struct i40e_stats i40e_gstrings_net_stats[] = {
55 I40E_NETDEV_STAT(rx_packets),
56 I40E_NETDEV_STAT(tx_packets),
57 I40E_NETDEV_STAT(rx_bytes),
58 I40E_NETDEV_STAT(tx_bytes),
59 I40E_NETDEV_STAT(rx_errors),
60 I40E_NETDEV_STAT(tx_errors),
61 I40E_NETDEV_STAT(rx_dropped),
62 I40E_NETDEV_STAT(tx_dropped),
63 I40E_NETDEV_STAT(collisions),
64 I40E_NETDEV_STAT(rx_length_errors),
65 I40E_NETDEV_STAT(rx_crc_errors),
66};
67
68static const struct i40e_stats i40e_gstrings_veb_stats[] = {
69 I40E_VEB_STAT("rx_bytes", stats.rx_bytes),
70 I40E_VEB_STAT("tx_bytes", stats.tx_bytes),
71 I40E_VEB_STAT("rx_unicast", stats.rx_unicast),
72 I40E_VEB_STAT("tx_unicast", stats.tx_unicast),
73 I40E_VEB_STAT("rx_multicast", stats.rx_multicast),
74 I40E_VEB_STAT("tx_multicast", stats.tx_multicast),
75 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast),
76 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast),
77 I40E_VEB_STAT("rx_discards", stats.rx_discards),
78 I40E_VEB_STAT("tx_discards", stats.tx_discards),
79 I40E_VEB_STAT("tx_errors", stats.tx_errors),
80 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol),
81};
82
83static const struct i40e_stats i40e_gstrings_misc_stats[] = {
84 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
85 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
86 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
87 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
88 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
89 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
90 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
91 I40E_VSI_STAT("tx_linearize", tx_linearize),
92 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
93 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
94 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
95};
96
97/* These PF_STATs might look like duplicates of some NETDEV_STATs,
98 * but they are separate. This device supports Virtualization, and
99 * as such might have several netdevs supporting VMDq and FCoE going
100 * through a single port. The NETDEV_STATs are for individual netdevs
101 * seen at the top of the stack, and the PF_STATs are for the physical
102 * function at the bottom of the stack hosting those netdevs.
103 *
104 * The PF_STATs are appended to the netdev stats only when ethtool -S
105 * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
106 */
107static const struct i40e_stats i40e_gstrings_stats[] = {
108 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
109 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
110 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast),
111 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast),
112 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast),
113 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast),
114 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast),
115 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast),
116 I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
117 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
118 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down),
119 I40E_PF_STAT("rx_crc_errors", stats.crc_errors),
120 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes),
121 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults),
122 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults),
123 I40E_PF_STAT("tx_timeout", tx_timeout_count),
124 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error),
125 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors),
126 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx),
127 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx),
128 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx),
129 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx),
130 I40E_PF_STAT("priority_xon_rx", stats.priority_xon_rx),
131 I40E_PF_STAT("priority_xoff_rx", stats.priority_xoff_rx),
132 I40E_PF_STAT("priority_xon_tx", stats.priority_xon_tx),
133 I40E_PF_STAT("priority_xoff_tx", stats.priority_xoff_tx),
134 I40E_PF_STAT("rx_size_64", stats.rx_size_64),
135 I40E_PF_STAT("rx_size_127", stats.rx_size_127),
136 I40E_PF_STAT("rx_size_255", stats.rx_size_255),
137 I40E_PF_STAT("rx_size_511", stats.rx_size_511),
138 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023),
139 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522),
140 I40E_PF_STAT("rx_size_big", stats.rx_size_big),
141 I40E_PF_STAT("tx_size_64", stats.tx_size_64),
142 I40E_PF_STAT("tx_size_127", stats.tx_size_127),
143 I40E_PF_STAT("tx_size_255", stats.tx_size_255),
144 I40E_PF_STAT("tx_size_511", stats.tx_size_511),
145 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023),
146 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522),
147 I40E_PF_STAT("tx_size_big", stats.tx_size_big),
148 I40E_PF_STAT("rx_undersize", stats.rx_undersize),
149 I40E_PF_STAT("rx_fragments", stats.rx_fragments),
150 I40E_PF_STAT("rx_oversize", stats.rx_oversize),
151 I40E_PF_STAT("rx_jabber", stats.rx_jabber),
152 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests),
153 I40E_PF_STAT("arq_overflows", arq_overflows),
154 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
155 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
156 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt),
157 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match),
158 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
159 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status),
160 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match),
161 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status),
162
163 /* LPI stats */
164 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status),
165 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status),
166 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count),
167 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count),
168};
169
170#define I40E_QUEUE_STATS_LEN(n) \
171 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \
172 * 2 /* Tx and Rx together */ \
173 * (sizeof(struct i40e_queue_stats) / sizeof(u64)))
174#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
175#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
176#define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
177#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
178 I40E_MISC_STATS_LEN + \
179 I40E_QUEUE_STATS_LEN((n)))
180#define I40E_PFC_STATS_LEN ( \
181 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \
182 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \
183 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \
184 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \
185 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \
186 / sizeof(u64))
187#define I40E_VEB_TC_STATS_LEN ( \
188 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \
189 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \
190 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \
191 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \
192 / sizeof(u64))
193#define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats)
194#define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN)
195#define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
196 I40E_PFC_STATS_LEN + \
197 I40E_VSI_STATS_LEN((n)))
198
199enum i40e_ethtool_test_id {
200 I40E_ETH_TEST_REG = 0,
201 I40E_ETH_TEST_EEPROM,
202 I40E_ETH_TEST_INTR,
203 I40E_ETH_TEST_LINK,
204};
205
206static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
207 "Register test (offline)",
208 "Eeprom test (offline)",
209 "Interrupt test (offline)",
210 "Link test (on/offline)"
211};
212
213#define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
214
215struct i40e_priv_flags {
216 char flag_string[ETH_GSTRING_LEN];
217 u64 flag;
218 bool read_only;
219};
220
221#define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
222 .flag_string = _name, \
223 .flag = _flag, \
224 .read_only = _read_only, \
225}
226
227static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
228 /* NOTE: MFP setting cannot be changed */
229 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
230 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
231 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
232 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
233 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
234 I40E_PRIV_FLAG("link-down-on-close",
235 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED, 0),
236 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
237 I40E_PRIV_FLAG("disable-source-pruning",
238 I40E_FLAG_SOURCE_PRUNING_DISABLED, 0),
239 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_DISABLE_FW_LLDP, 0),
240};
241
242#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
243
244/* Private flags with a global effect, restricted to PF 0 */
245static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
246 I40E_PRIV_FLAG("vf-true-promisc-support",
247 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
248};
249
250#define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
251
252/**
253 * i40e_partition_setting_complaint - generic complaint for MFP restriction
254 * @pf: the PF struct
255 **/
256static void i40e_partition_setting_complaint(struct i40e_pf *pf)
257{
258 dev_info(&pf->pdev->dev,
259 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
260}
261
262/**
263 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
264 * @pf: PF struct with phy_types
265 * @ks: ethtool link ksettings struct to fill out
266 *
267 **/
268static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
269 struct ethtool_link_ksettings *ks)
270{
271 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
272 u64 phy_types = pf->hw.phy.phy_types;
273
274 ethtool_link_ksettings_zero_link_mode(ks, supported);
275 ethtool_link_ksettings_zero_link_mode(ks, advertising);
276
277 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
278 ethtool_link_ksettings_add_link_mode(ks, supported,
279 1000baseT_Full);
280 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
281 ethtool_link_ksettings_add_link_mode(ks, advertising,
282 1000baseT_Full);
283 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
284 ethtool_link_ksettings_add_link_mode(ks, supported,
285 100baseT_Full);
286 ethtool_link_ksettings_add_link_mode(ks, advertising,
287 100baseT_Full);
288 }
289 }
290 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
291 phy_types & I40E_CAP_PHY_TYPE_XFI ||
292 phy_types & I40E_CAP_PHY_TYPE_SFI ||
293 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
294 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
295 ethtool_link_ksettings_add_link_mode(ks, supported,
296 10000baseT_Full);
297 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
298 ethtool_link_ksettings_add_link_mode(ks, advertising,
299 10000baseT_Full);
300 }
301 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
302 ethtool_link_ksettings_add_link_mode(ks, supported,
303 10000baseT_Full);
304 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
305 ethtool_link_ksettings_add_link_mode(ks, advertising,
306 10000baseT_Full);
307 }
308 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
309 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
310 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
311 ethtool_link_ksettings_add_link_mode(ks, supported,
312 40000baseCR4_Full);
313 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
314 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
315 ethtool_link_ksettings_add_link_mode(ks, supported,
316 40000baseCR4_Full);
317 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
318 ethtool_link_ksettings_add_link_mode(ks, advertising,
319 40000baseCR4_Full);
320 }
321 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
322 ethtool_link_ksettings_add_link_mode(ks, supported,
323 100baseT_Full);
324 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
325 ethtool_link_ksettings_add_link_mode(ks, advertising,
326 100baseT_Full);
327 }
328 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
329 ethtool_link_ksettings_add_link_mode(ks, supported,
330 1000baseT_Full);
331 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
332 ethtool_link_ksettings_add_link_mode(ks, advertising,
333 1000baseT_Full);
334 }
335 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4)
336 ethtool_link_ksettings_add_link_mode(ks, supported,
337 40000baseSR4_Full);
338 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4)
339 ethtool_link_ksettings_add_link_mode(ks, supported,
340 40000baseLR4_Full);
341 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
342 ethtool_link_ksettings_add_link_mode(ks, supported,
343 40000baseLR4_Full);
344 ethtool_link_ksettings_add_link_mode(ks, advertising,
345 40000baseLR4_Full);
346 }
347 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
348 ethtool_link_ksettings_add_link_mode(ks, supported,
349 20000baseKR2_Full);
350 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
351 ethtool_link_ksettings_add_link_mode(ks, advertising,
352 20000baseKR2_Full);
353 }
354 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
355 ethtool_link_ksettings_add_link_mode(ks, supported,
356 10000baseKX4_Full);
357 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
358 ethtool_link_ksettings_add_link_mode(ks, advertising,
359 10000baseKX4_Full);
360 }
361 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
362 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
363 ethtool_link_ksettings_add_link_mode(ks, supported,
364 10000baseKR_Full);
365 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
366 ethtool_link_ksettings_add_link_mode(ks, advertising,
367 10000baseKR_Full);
368 }
369 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
370 !(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER)) {
371 ethtool_link_ksettings_add_link_mode(ks, supported,
372 1000baseKX_Full);
373 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
374 ethtool_link_ksettings_add_link_mode(ks, advertising,
375 1000baseKX_Full);
376 }
377 /* need to add 25G PHY types */
378 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
379 ethtool_link_ksettings_add_link_mode(ks, supported,
380 25000baseKR_Full);
381 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
382 ethtool_link_ksettings_add_link_mode(ks, advertising,
383 25000baseKR_Full);
384 }
385 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
386 ethtool_link_ksettings_add_link_mode(ks, supported,
387 25000baseCR_Full);
388 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
389 ethtool_link_ksettings_add_link_mode(ks, advertising,
390 25000baseCR_Full);
391 }
392 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
393 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
394 ethtool_link_ksettings_add_link_mode(ks, supported,
395 25000baseSR_Full);
396 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
397 ethtool_link_ksettings_add_link_mode(ks, advertising,
398 25000baseSR_Full);
399 }
400 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
401 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
402 ethtool_link_ksettings_add_link_mode(ks, supported,
403 25000baseCR_Full);
404 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
405 ethtool_link_ksettings_add_link_mode(ks, advertising,
406 25000baseCR_Full);
407 }
408 /* need to add new 10G PHY types */
409 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
410 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
411 ethtool_link_ksettings_add_link_mode(ks, supported,
412 10000baseCR_Full);
413 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
414 ethtool_link_ksettings_add_link_mode(ks, advertising,
415 10000baseCR_Full);
416 }
417 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
418 ethtool_link_ksettings_add_link_mode(ks, supported,
419 10000baseSR_Full);
420 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
421 ethtool_link_ksettings_add_link_mode(ks, advertising,
422 10000baseSR_Full);
423 }
424 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
425 ethtool_link_ksettings_add_link_mode(ks, supported,
426 10000baseLR_Full);
427 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
428 ethtool_link_ksettings_add_link_mode(ks, advertising,
429 10000baseLR_Full);
430 }
431 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
432 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
433 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
434 ethtool_link_ksettings_add_link_mode(ks, supported,
435 1000baseX_Full);
436 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
437 ethtool_link_ksettings_add_link_mode(ks, advertising,
438 1000baseX_Full);
439 }
440 /* Autoneg PHY types */
441 if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
442 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
443 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
444 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
445 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
446 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
447 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
448 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
449 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
450 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
451 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
452 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
453 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
454 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
455 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
456 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
457 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
458 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
459 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
460 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
461 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
462 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
463 ethtool_link_ksettings_add_link_mode(ks, supported,
464 Autoneg);
465 ethtool_link_ksettings_add_link_mode(ks, advertising,
466 Autoneg);
467 }
468}
469
470/**
471 * i40e_get_settings_link_up - Get the Link settings for when link is up
472 * @hw: hw structure
473 * @ks: ethtool ksettings to fill in
474 * @netdev: network interface device structure
475 * @pf: pointer to physical function struct
476 **/
477static void i40e_get_settings_link_up(struct i40e_hw *hw,
478 struct ethtool_link_ksettings *ks,
479 struct net_device *netdev,
480 struct i40e_pf *pf)
481{
482 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
483 struct ethtool_link_ksettings cap_ksettings;
484 u32 link_speed = hw_link_info->link_speed;
485
486 /* Initialize supported and advertised settings based on phy settings */
487 switch (hw_link_info->phy_type) {
488 case I40E_PHY_TYPE_40GBASE_CR4:
489 case I40E_PHY_TYPE_40GBASE_CR4_CU:
490 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
491 ethtool_link_ksettings_add_link_mode(ks, supported,
492 40000baseCR4_Full);
493 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
494 ethtool_link_ksettings_add_link_mode(ks, advertising,
495 40000baseCR4_Full);
496 break;
497 case I40E_PHY_TYPE_XLAUI:
498 case I40E_PHY_TYPE_XLPPI:
499 case I40E_PHY_TYPE_40GBASE_AOC:
500 ethtool_link_ksettings_add_link_mode(ks, supported,
501 40000baseCR4_Full);
502 break;
503 case I40E_PHY_TYPE_40GBASE_SR4:
504 ethtool_link_ksettings_add_link_mode(ks, supported,
505 40000baseSR4_Full);
506 break;
507 case I40E_PHY_TYPE_40GBASE_LR4:
508 ethtool_link_ksettings_add_link_mode(ks, supported,
509 40000baseLR4_Full);
510 break;
511 case I40E_PHY_TYPE_25GBASE_SR:
512 case I40E_PHY_TYPE_25GBASE_LR:
513 case I40E_PHY_TYPE_10GBASE_SR:
514 case I40E_PHY_TYPE_10GBASE_LR:
515 case I40E_PHY_TYPE_1000BASE_SX:
516 case I40E_PHY_TYPE_1000BASE_LX:
517 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
518 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
519 ethtool_link_ksettings_add_link_mode(ks, supported,
520 25000baseSR_Full);
521 ethtool_link_ksettings_add_link_mode(ks, advertising,
522 25000baseSR_Full);
523 ethtool_link_ksettings_add_link_mode(ks, supported,
524 10000baseSR_Full);
525 ethtool_link_ksettings_add_link_mode(ks, advertising,
526 10000baseSR_Full);
527 ethtool_link_ksettings_add_link_mode(ks, supported,
528 10000baseLR_Full);
529 ethtool_link_ksettings_add_link_mode(ks, advertising,
530 10000baseLR_Full);
531 ethtool_link_ksettings_add_link_mode(ks, supported,
532 1000baseX_Full);
533 ethtool_link_ksettings_add_link_mode(ks, advertising,
534 1000baseX_Full);
535 ethtool_link_ksettings_add_link_mode(ks, supported,
536 10000baseT_Full);
537 if (hw_link_info->module_type[2] &
538 I40E_MODULE_TYPE_1000BASE_SX ||
539 hw_link_info->module_type[2] &
540 I40E_MODULE_TYPE_1000BASE_LX) {
541 ethtool_link_ksettings_add_link_mode(ks, supported,
542 1000baseT_Full);
543 if (hw_link_info->requested_speeds &
544 I40E_LINK_SPEED_1GB)
545 ethtool_link_ksettings_add_link_mode(
546 ks, advertising, 1000baseT_Full);
547 }
548 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
549 ethtool_link_ksettings_add_link_mode(ks, advertising,
550 10000baseT_Full);
551 break;
552 case I40E_PHY_TYPE_10GBASE_T:
553 case I40E_PHY_TYPE_1000BASE_T:
554 case I40E_PHY_TYPE_100BASE_TX:
555 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
556 ethtool_link_ksettings_add_link_mode(ks, supported,
557 10000baseT_Full);
558 ethtool_link_ksettings_add_link_mode(ks, supported,
559 1000baseT_Full);
560 ethtool_link_ksettings_add_link_mode(ks, supported,
561 100baseT_Full);
562 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
563 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
564 ethtool_link_ksettings_add_link_mode(ks, advertising,
565 10000baseT_Full);
566 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
567 ethtool_link_ksettings_add_link_mode(ks, advertising,
568 1000baseT_Full);
569 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
570 ethtool_link_ksettings_add_link_mode(ks, advertising,
571 100baseT_Full);
572 break;
573 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
574 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
575 ethtool_link_ksettings_add_link_mode(ks, supported,
576 1000baseT_Full);
577 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
578 ethtool_link_ksettings_add_link_mode(ks, advertising,
579 1000baseT_Full);
580 break;
581 case I40E_PHY_TYPE_10GBASE_CR1_CU:
582 case I40E_PHY_TYPE_10GBASE_CR1:
583 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
584 ethtool_link_ksettings_add_link_mode(ks, supported,
585 10000baseT_Full);
586 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
587 ethtool_link_ksettings_add_link_mode(ks, advertising,
588 10000baseT_Full);
589 break;
590 case I40E_PHY_TYPE_XAUI:
591 case I40E_PHY_TYPE_XFI:
592 case I40E_PHY_TYPE_SFI:
593 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
594 case I40E_PHY_TYPE_10GBASE_AOC:
595 ethtool_link_ksettings_add_link_mode(ks, supported,
596 10000baseT_Full);
597 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
598 ethtool_link_ksettings_add_link_mode(ks, advertising,
599 10000baseT_Full);
600 break;
601 case I40E_PHY_TYPE_SGMII:
602 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
603 ethtool_link_ksettings_add_link_mode(ks, supported,
604 1000baseT_Full);
605 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
606 ethtool_link_ksettings_add_link_mode(ks, advertising,
607 1000baseT_Full);
608 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
609 ethtool_link_ksettings_add_link_mode(ks, supported,
610 100baseT_Full);
611 if (hw_link_info->requested_speeds &
612 I40E_LINK_SPEED_100MB)
613 ethtool_link_ksettings_add_link_mode(
614 ks, advertising, 100baseT_Full);
615 }
616 break;
617 case I40E_PHY_TYPE_40GBASE_KR4:
618 case I40E_PHY_TYPE_25GBASE_KR:
619 case I40E_PHY_TYPE_20GBASE_KR2:
620 case I40E_PHY_TYPE_10GBASE_KR:
621 case I40E_PHY_TYPE_10GBASE_KX4:
622 case I40E_PHY_TYPE_1000BASE_KX:
623 ethtool_link_ksettings_add_link_mode(ks, supported,
624 40000baseKR4_Full);
625 ethtool_link_ksettings_add_link_mode(ks, supported,
626 25000baseKR_Full);
627 ethtool_link_ksettings_add_link_mode(ks, supported,
628 20000baseKR2_Full);
629 ethtool_link_ksettings_add_link_mode(ks, supported,
630 10000baseKR_Full);
631 ethtool_link_ksettings_add_link_mode(ks, supported,
632 10000baseKX4_Full);
633 ethtool_link_ksettings_add_link_mode(ks, supported,
634 1000baseKX_Full);
635 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
636 ethtool_link_ksettings_add_link_mode(ks, advertising,
637 40000baseKR4_Full);
638 ethtool_link_ksettings_add_link_mode(ks, advertising,
639 25000baseKR_Full);
640 ethtool_link_ksettings_add_link_mode(ks, advertising,
641 20000baseKR2_Full);
642 ethtool_link_ksettings_add_link_mode(ks, advertising,
643 10000baseKR_Full);
644 ethtool_link_ksettings_add_link_mode(ks, advertising,
645 10000baseKX4_Full);
646 ethtool_link_ksettings_add_link_mode(ks, advertising,
647 1000baseKX_Full);
648 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
649 break;
650 case I40E_PHY_TYPE_25GBASE_CR:
651 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
652 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
653 ethtool_link_ksettings_add_link_mode(ks, supported,
654 25000baseCR_Full);
655 ethtool_link_ksettings_add_link_mode(ks, advertising,
656 25000baseCR_Full);
657 break;
658 case I40E_PHY_TYPE_25GBASE_AOC:
659 case I40E_PHY_TYPE_25GBASE_ACC:
660 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
661 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
662 ethtool_link_ksettings_add_link_mode(ks, supported,
663 25000baseCR_Full);
664
665 ethtool_link_ksettings_add_link_mode(ks, advertising,
666 25000baseCR_Full);
667 ethtool_link_ksettings_add_link_mode(ks, supported,
668 10000baseCR_Full);
669 ethtool_link_ksettings_add_link_mode(ks, advertising,
670 10000baseCR_Full);
671 break;
672 default:
673 /* if we got here and link is up something bad is afoot */
674 netdev_info(netdev,
675 "WARNING: Link is up but PHY type 0x%x is not recognized.\n",
676 hw_link_info->phy_type);
677 }
678
679 /* Now that we've worked out everything that could be supported by the
680 * current PHY type, get what is supported by the NVM and intersect
681 * them to get what is truly supported
682 */
683 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
684 i40e_phy_type_to_ethtool(pf, &cap_ksettings);
685 ethtool_intersect_link_masks(ks, &cap_ksettings);
686
687 /* Set speed and duplex */
688 switch (link_speed) {
689 case I40E_LINK_SPEED_40GB:
690 ks->base.speed = SPEED_40000;
691 break;
692 case I40E_LINK_SPEED_25GB:
693 ks->base.speed = SPEED_25000;
694 break;
695 case I40E_LINK_SPEED_20GB:
696 ks->base.speed = SPEED_20000;
697 break;
698 case I40E_LINK_SPEED_10GB:
699 ks->base.speed = SPEED_10000;
700 break;
701 case I40E_LINK_SPEED_1GB:
702 ks->base.speed = SPEED_1000;
703 break;
704 case I40E_LINK_SPEED_100MB:
705 ks->base.speed = SPEED_100;
706 break;
707 default:
708 break;
709 }
710 ks->base.duplex = DUPLEX_FULL;
711}
712
713/**
714 * i40e_get_settings_link_down - Get the Link settings for when link is down
715 * @hw: hw structure
716 * @ks: ethtool ksettings to fill in
717 * @pf: pointer to physical function struct
718 *
719 * Reports link settings that can be determined when link is down
720 **/
721static void i40e_get_settings_link_down(struct i40e_hw *hw,
722 struct ethtool_link_ksettings *ks,
723 struct i40e_pf *pf)
724{
725 /* link is down and the driver needs to fall back on
726 * supported phy types to figure out what info to display
727 */
728 i40e_phy_type_to_ethtool(pf, ks);
729
730 /* With no link speed and duplex are unknown */
731 ks->base.speed = SPEED_UNKNOWN;
732 ks->base.duplex = DUPLEX_UNKNOWN;
733}
734
735/**
736 * i40e_get_link_ksettings - Get Link Speed and Duplex settings
737 * @netdev: network interface device structure
738 * @ks: ethtool ksettings
739 *
740 * Reports speed/duplex settings based on media_type
741 **/
742static int i40e_get_link_ksettings(struct net_device *netdev,
743 struct ethtool_link_ksettings *ks)
744{
745 struct i40e_netdev_priv *np = netdev_priv(netdev);
746 struct i40e_pf *pf = np->vsi->back;
747 struct i40e_hw *hw = &pf->hw;
748 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
749 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
750
751 ethtool_link_ksettings_zero_link_mode(ks, supported);
752 ethtool_link_ksettings_zero_link_mode(ks, advertising);
753
754 if (link_up)
755 i40e_get_settings_link_up(hw, ks, netdev, pf);
756 else
757 i40e_get_settings_link_down(hw, ks, pf);
758
759 /* Now set the settings that don't rely on link being up/down */
760 /* Set autoneg settings */
761 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
762 AUTONEG_ENABLE : AUTONEG_DISABLE);
763
764 /* Set media type settings */
765 switch (hw->phy.media_type) {
766 case I40E_MEDIA_TYPE_BACKPLANE:
767 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
768 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
769 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
770 ethtool_link_ksettings_add_link_mode(ks, advertising,
771 Backplane);
772 ks->base.port = PORT_NONE;
773 break;
774 case I40E_MEDIA_TYPE_BASET:
775 ethtool_link_ksettings_add_link_mode(ks, supported, TP);
776 ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
777 ks->base.port = PORT_TP;
778 break;
779 case I40E_MEDIA_TYPE_DA:
780 case I40E_MEDIA_TYPE_CX4:
781 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
782 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
783 ks->base.port = PORT_DA;
784 break;
785 case I40E_MEDIA_TYPE_FIBER:
786 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
787 ks->base.port = PORT_FIBRE;
788 break;
789 case I40E_MEDIA_TYPE_UNKNOWN:
790 default:
791 ks->base.port = PORT_OTHER;
792 break;
793 }
794
795 /* Set flow control settings */
796 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
797
798 switch (hw->fc.requested_mode) {
799 case I40E_FC_FULL:
800 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
801 break;
802 case I40E_FC_TX_PAUSE:
803 ethtool_link_ksettings_add_link_mode(ks, advertising,
804 Asym_Pause);
805 break;
806 case I40E_FC_RX_PAUSE:
807 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
808 ethtool_link_ksettings_add_link_mode(ks, advertising,
809 Asym_Pause);
810 break;
811 default:
812 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
813 ethtool_link_ksettings_del_link_mode(ks, advertising,
814 Asym_Pause);
815 break;
816 }
817
818 return 0;
819}
820
821/**
822 * i40e_set_link_ksettings - Set Speed and Duplex
823 * @netdev: network interface device structure
824 * @ks: ethtool ksettings
825 *
826 * Set speed/duplex per media_types advertised/forced
827 **/
828static int i40e_set_link_ksettings(struct net_device *netdev,
829 const struct ethtool_link_ksettings *ks)
830{
831 struct i40e_netdev_priv *np = netdev_priv(netdev);
832 struct i40e_aq_get_phy_abilities_resp abilities;
833 struct ethtool_link_ksettings safe_ks;
834 struct ethtool_link_ksettings copy_ks;
835 struct i40e_aq_set_phy_config config;
836 struct i40e_pf *pf = np->vsi->back;
837 struct i40e_vsi *vsi = np->vsi;
838 struct i40e_hw *hw = &pf->hw;
839 bool autoneg_changed = false;
840 i40e_status status = 0;
841 int timeout = 50;
842 int err = 0;
843 u8 autoneg;
844
845 /* Changing port settings is not supported if this isn't the
846 * port's controlling PF
847 */
848 if (hw->partition_id != 1) {
849 i40e_partition_setting_complaint(pf);
850 return -EOPNOTSUPP;
851 }
852 if (vsi != pf->vsi[pf->lan_vsi])
853 return -EOPNOTSUPP;
854 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
855 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
856 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
857 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
858 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
859 return -EOPNOTSUPP;
860 if (hw->device_id == I40E_DEV_ID_KX_B ||
861 hw->device_id == I40E_DEV_ID_KX_C ||
862 hw->device_id == I40E_DEV_ID_20G_KR2 ||
863 hw->device_id == I40E_DEV_ID_20G_KR2_A ||
864 hw->device_id == I40E_DEV_ID_25G_B ||
865 hw->device_id == I40E_DEV_ID_KX_X722) {
866 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
867 return -EOPNOTSUPP;
868 }
869
870 /* copy the ksettings to copy_ks to avoid modifying the origin */
871 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings));
872
873 /* save autoneg out of ksettings */
874 autoneg = copy_ks.base.autoneg;
875
876 /* get our own copy of the bits to check against */
877 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
878 safe_ks.base.cmd = copy_ks.base.cmd;
879 safe_ks.base.link_mode_masks_nwords =
880 copy_ks.base.link_mode_masks_nwords;
881 i40e_get_link_ksettings(netdev, &safe_ks);
882
883 /* Get link modes supported by hardware and check against modes
884 * requested by the user. Return an error if unsupported mode was set.
885 */
886 if (!bitmap_subset(copy_ks.link_modes.advertising,
887 safe_ks.link_modes.supported,
888 __ETHTOOL_LINK_MODE_MASK_NBITS))
889 return -EINVAL;
890
891 /* set autoneg back to what it currently is */
892 copy_ks.base.autoneg = safe_ks.base.autoneg;
893
894 /* If copy_ks.base and safe_ks.base are not the same now, then they are
895 * trying to set something that we do not support.
896 */
897 if (memcmp(©_ks.base, &safe_ks.base,
898 sizeof(struct ethtool_link_settings)))
899 return -EOPNOTSUPP;
900
901 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
902 timeout--;
903 if (!timeout)
904 return -EBUSY;
905 usleep_range(1000, 2000);
906 }
907
908 /* Get the current phy config */
909 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
910 NULL);
911 if (status) {
912 err = -EAGAIN;
913 goto done;
914 }
915
916 /* Copy abilities to config in case autoneg is not
917 * set below
918 */
919 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
920 config.abilities = abilities.abilities;
921
922 /* Check autoneg */
923 if (autoneg == AUTONEG_ENABLE) {
924 /* If autoneg was not already enabled */
925 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
926 /* If autoneg is not supported, return error */
927 if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
928 supported,
929 Autoneg)) {
930 netdev_info(netdev, "Autoneg not supported on this phy\n");
931 err = -EINVAL;
932 goto done;
933 }
934 /* Autoneg is allowed to change */
935 config.abilities = abilities.abilities |
936 I40E_AQ_PHY_ENABLE_AN;
937 autoneg_changed = true;
938 }
939 } else {
940 /* If autoneg is currently enabled */
941 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
942 /* If autoneg is supported 10GBASE_T is the only PHY
943 * that can disable it, so otherwise return error
944 */
945 if (ethtool_link_ksettings_test_link_mode(&safe_ks,
946 supported,
947 Autoneg) &&
948 hw->phy.link_info.phy_type !=
949 I40E_PHY_TYPE_10GBASE_T) {
950 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
951 err = -EINVAL;
952 goto done;
953 }
954 /* Autoneg is allowed to change */
955 config.abilities = abilities.abilities &
956 ~I40E_AQ_PHY_ENABLE_AN;
957 autoneg_changed = true;
958 }
959 }
960
961 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
962 100baseT_Full))
963 config.link_speed |= I40E_LINK_SPEED_100MB;
964 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
965 1000baseT_Full) ||
966 ethtool_link_ksettings_test_link_mode(ks, advertising,
967 1000baseX_Full) ||
968 ethtool_link_ksettings_test_link_mode(ks, advertising,
969 1000baseKX_Full))
970 config.link_speed |= I40E_LINK_SPEED_1GB;
971 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
972 10000baseT_Full) ||
973 ethtool_link_ksettings_test_link_mode(ks, advertising,
974 10000baseKX4_Full) ||
975 ethtool_link_ksettings_test_link_mode(ks, advertising,
976 10000baseKR_Full) ||
977 ethtool_link_ksettings_test_link_mode(ks, advertising,
978 10000baseCR_Full) ||
979 ethtool_link_ksettings_test_link_mode(ks, advertising,
980 10000baseSR_Full))
981 config.link_speed |= I40E_LINK_SPEED_10GB;
982 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
983 20000baseKR2_Full))
984 config.link_speed |= I40E_LINK_SPEED_20GB;
985 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
986 25000baseCR_Full) ||
987 ethtool_link_ksettings_test_link_mode(ks, advertising,
988 25000baseKR_Full) ||
989 ethtool_link_ksettings_test_link_mode(ks, advertising,
990 25000baseSR_Full))
991 config.link_speed |= I40E_LINK_SPEED_25GB;
992 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
993 40000baseKR4_Full) ||
994 ethtool_link_ksettings_test_link_mode(ks, advertising,
995 40000baseCR4_Full) ||
996 ethtool_link_ksettings_test_link_mode(ks, advertising,
997 40000baseSR4_Full) ||
998 ethtool_link_ksettings_test_link_mode(ks, advertising,
999 40000baseLR4_Full))
1000 config.link_speed |= I40E_LINK_SPEED_40GB;
1001
1002 /* If speed didn't get set, set it to what it currently is.
1003 * This is needed because if advertise is 0 (as it is when autoneg
1004 * is disabled) then speed won't get set.
1005 */
1006 if (!config.link_speed)
1007 config.link_speed = abilities.link_speed;
1008 if (autoneg_changed || abilities.link_speed != config.link_speed) {
1009 /* copy over the rest of the abilities */
1010 config.phy_type = abilities.phy_type;
1011 config.phy_type_ext = abilities.phy_type_ext;
1012 config.eee_capability = abilities.eee_capability;
1013 config.eeer = abilities.eeer_val;
1014 config.low_power_ctrl = abilities.d3_lpan;
1015 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
1016 I40E_AQ_PHY_FEC_CONFIG_MASK;
1017
1018 /* save the requested speeds */
1019 hw->phy.link_info.requested_speeds = config.link_speed;
1020 /* set link and auto negotiation so changes take effect */
1021 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1022 /* If link is up put link down */
1023 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
1024 /* Tell the OS link is going down, the link will go
1025 * back up when fw says it is ready asynchronously
1026 */
1027 i40e_print_link_message(vsi, false);
1028 netif_carrier_off(netdev);
1029 netif_tx_stop_all_queues(netdev);
1030 }
1031
1032 /* make the aq call */
1033 status = i40e_aq_set_phy_config(hw, &config, NULL);
1034 if (status) {
1035 netdev_info(netdev,
1036 "Set phy config failed, err %s aq_err %s\n",
1037 i40e_stat_str(hw, status),
1038 i40e_aq_str(hw, hw->aq.asq_last_status));
1039 err = -EAGAIN;
1040 goto done;
1041 }
1042
1043 status = i40e_update_link_info(hw);
1044 if (status)
1045 netdev_dbg(netdev,
1046 "Updating link info failed with err %s aq_err %s\n",
1047 i40e_stat_str(hw, status),
1048 i40e_aq_str(hw, hw->aq.asq_last_status));
1049
1050 } else {
1051 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
1052 }
1053
1054done:
1055 clear_bit(__I40E_CONFIG_BUSY, pf->state);
1056
1057 return err;
1058}
1059
1060static int i40e_nway_reset(struct net_device *netdev)
1061{
1062 /* restart autonegotiation */
1063 struct i40e_netdev_priv *np = netdev_priv(netdev);
1064 struct i40e_pf *pf = np->vsi->back;
1065 struct i40e_hw *hw = &pf->hw;
1066 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
1067 i40e_status ret = 0;
1068
1069 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
1070 if (ret) {
1071 netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
1072 i40e_stat_str(hw, ret),
1073 i40e_aq_str(hw, hw->aq.asq_last_status));
1074 return -EIO;
1075 }
1076
1077 return 0;
1078}
1079
1080/**
1081 * i40e_get_pauseparam - Get Flow Control status
1082 * Return tx/rx-pause status
1083 **/
1084static void i40e_get_pauseparam(struct net_device *netdev,
1085 struct ethtool_pauseparam *pause)
1086{
1087 struct i40e_netdev_priv *np = netdev_priv(netdev);
1088 struct i40e_pf *pf = np->vsi->back;
1089 struct i40e_hw *hw = &pf->hw;
1090 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1091 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1092
1093 pause->autoneg =
1094 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1095 AUTONEG_ENABLE : AUTONEG_DISABLE);
1096
1097 /* PFC enabled so report LFC as off */
1098 if (dcbx_cfg->pfc.pfcenable) {
1099 pause->rx_pause = 0;
1100 pause->tx_pause = 0;
1101 return;
1102 }
1103
1104 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
1105 pause->rx_pause = 1;
1106 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
1107 pause->tx_pause = 1;
1108 } else if (hw->fc.current_mode == I40E_FC_FULL) {
1109 pause->rx_pause = 1;
1110 pause->tx_pause = 1;
1111 }
1112}
1113
1114/**
1115 * i40e_set_pauseparam - Set Flow Control parameter
1116 * @netdev: network interface device structure
1117 * @pause: return tx/rx flow control status
1118 **/
1119static int i40e_set_pauseparam(struct net_device *netdev,
1120 struct ethtool_pauseparam *pause)
1121{
1122 struct i40e_netdev_priv *np = netdev_priv(netdev);
1123 struct i40e_pf *pf = np->vsi->back;
1124 struct i40e_vsi *vsi = np->vsi;
1125 struct i40e_hw *hw = &pf->hw;
1126 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1127 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1128 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1129 i40e_status status;
1130 u8 aq_failures;
1131 int err = 0;
1132
1133 /* Changing the port's flow control is not supported if this isn't the
1134 * port's controlling PF
1135 */
1136 if (hw->partition_id != 1) {
1137 i40e_partition_setting_complaint(pf);
1138 return -EOPNOTSUPP;
1139 }
1140
1141 if (vsi != pf->vsi[pf->lan_vsi])
1142 return -EOPNOTSUPP;
1143
1144 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1145 AUTONEG_ENABLE : AUTONEG_DISABLE)) {
1146 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
1147 return -EOPNOTSUPP;
1148 }
1149
1150 /* If we have link and don't have autoneg */
1151 if (!test_bit(__I40E_DOWN, pf->state) &&
1152 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) {
1153 /* Send message that it might not necessarily work*/
1154 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
1155 }
1156
1157 if (dcbx_cfg->pfc.pfcenable) {
1158 netdev_info(netdev,
1159 "Priority flow control enabled. Cannot set link flow control.\n");
1160 return -EOPNOTSUPP;
1161 }
1162
1163 if (pause->rx_pause && pause->tx_pause)
1164 hw->fc.requested_mode = I40E_FC_FULL;
1165 else if (pause->rx_pause && !pause->tx_pause)
1166 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1167 else if (!pause->rx_pause && pause->tx_pause)
1168 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1169 else if (!pause->rx_pause && !pause->tx_pause)
1170 hw->fc.requested_mode = I40E_FC_NONE;
1171 else
1172 return -EINVAL;
1173
1174 /* Tell the OS link is going down, the link will go back up when fw
1175 * says it is ready asynchronously
1176 */
1177 i40e_print_link_message(vsi, false);
1178 netif_carrier_off(netdev);
1179 netif_tx_stop_all_queues(netdev);
1180
1181 /* Set the fc mode and only restart an if link is up*/
1182 status = i40e_set_fc(hw, &aq_failures, link_up);
1183
1184 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
1185 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
1186 i40e_stat_str(hw, status),
1187 i40e_aq_str(hw, hw->aq.asq_last_status));
1188 err = -EAGAIN;
1189 }
1190 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
1191 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
1192 i40e_stat_str(hw, status),
1193 i40e_aq_str(hw, hw->aq.asq_last_status));
1194 err = -EAGAIN;
1195 }
1196 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
1197 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
1198 i40e_stat_str(hw, status),
1199 i40e_aq_str(hw, hw->aq.asq_last_status));
1200 err = -EAGAIN;
1201 }
1202
1203 if (!test_bit(__I40E_DOWN, pf->state)) {
1204 /* Give it a little more time to try to come back */
1205 msleep(75);
1206 if (!test_bit(__I40E_DOWN, pf->state))
1207 return i40e_nway_reset(netdev);
1208 }
1209
1210 return err;
1211}
1212
1213static u32 i40e_get_msglevel(struct net_device *netdev)
1214{
1215 struct i40e_netdev_priv *np = netdev_priv(netdev);
1216 struct i40e_pf *pf = np->vsi->back;
1217 u32 debug_mask = pf->hw.debug_mask;
1218
1219 if (debug_mask)
1220 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1221
1222 return pf->msg_enable;
1223}
1224
1225static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1226{
1227 struct i40e_netdev_priv *np = netdev_priv(netdev);
1228 struct i40e_pf *pf = np->vsi->back;
1229
1230 if (I40E_DEBUG_USER & data)
1231 pf->hw.debug_mask = data;
1232 else
1233 pf->msg_enable = data;
1234}
1235
1236static int i40e_get_regs_len(struct net_device *netdev)
1237{
1238 int reg_count = 0;
1239 int i;
1240
1241 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1242 reg_count += i40e_reg_list[i].elements;
1243
1244 return reg_count * sizeof(u32);
1245}
1246
1247static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1248 void *p)
1249{
1250 struct i40e_netdev_priv *np = netdev_priv(netdev);
1251 struct i40e_pf *pf = np->vsi->back;
1252 struct i40e_hw *hw = &pf->hw;
1253 u32 *reg_buf = p;
1254 unsigned int i, j, ri;
1255 u32 reg;
1256
1257 /* Tell ethtool which driver-version-specific regs output we have.
1258 *
1259 * At some point, if we have ethtool doing special formatting of
1260 * this data, it will rely on this version number to know how to
1261 * interpret things. Hence, this needs to be updated if/when the
1262 * diags register table is changed.
1263 */
1264 regs->version = 1;
1265
1266 /* loop through the diags reg table for what to print */
1267 ri = 0;
1268 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1269 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1270 reg = i40e_reg_list[i].offset
1271 + (j * i40e_reg_list[i].stride);
1272 reg_buf[ri++] = rd32(hw, reg);
1273 }
1274 }
1275
1276}
1277
1278static int i40e_get_eeprom(struct net_device *netdev,
1279 struct ethtool_eeprom *eeprom, u8 *bytes)
1280{
1281 struct i40e_netdev_priv *np = netdev_priv(netdev);
1282 struct i40e_hw *hw = &np->vsi->back->hw;
1283 struct i40e_pf *pf = np->vsi->back;
1284 int ret_val = 0, len, offset;
1285 u8 *eeprom_buff;
1286 u16 i, sectors;
1287 bool last;
1288 u32 magic;
1289
1290#define I40E_NVM_SECTOR_SIZE 4096
1291 if (eeprom->len == 0)
1292 return -EINVAL;
1293
1294 /* check for NVMUpdate access method */
1295 magic = hw->vendor_id | (hw->device_id << 16);
1296 if (eeprom->magic && eeprom->magic != magic) {
1297 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1298 int errno = 0;
1299
1300 /* make sure it is the right magic for NVMUpdate */
1301 if ((eeprom->magic >> 16) != hw->device_id)
1302 errno = -EINVAL;
1303 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1304 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1305 errno = -EBUSY;
1306 else
1307 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1308
1309 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1310 dev_info(&pf->pdev->dev,
1311 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1312 ret_val, hw->aq.asq_last_status, errno,
1313 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1314 cmd->offset, cmd->data_size);
1315
1316 return errno;
1317 }
1318
1319 /* normal ethtool get_eeprom support */
1320 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1321
1322 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1323 if (!eeprom_buff)
1324 return -ENOMEM;
1325
1326 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1327 if (ret_val) {
1328 dev_info(&pf->pdev->dev,
1329 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1330 ret_val, hw->aq.asq_last_status);
1331 goto free_buff;
1332 }
1333
1334 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1335 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1336 len = I40E_NVM_SECTOR_SIZE;
1337 last = false;
1338 for (i = 0; i < sectors; i++) {
1339 if (i == (sectors - 1)) {
1340 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1341 last = true;
1342 }
1343 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1344 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1345 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1346 last, NULL);
1347 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1348 dev_info(&pf->pdev->dev,
1349 "read NVM failed, invalid offset 0x%x\n",
1350 offset);
1351 break;
1352 } else if (ret_val &&
1353 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1354 dev_info(&pf->pdev->dev,
1355 "read NVM failed, access, offset 0x%x\n",
1356 offset);
1357 break;
1358 } else if (ret_val) {
1359 dev_info(&pf->pdev->dev,
1360 "read NVM failed offset %d err=%d status=0x%x\n",
1361 offset, ret_val, hw->aq.asq_last_status);
1362 break;
1363 }
1364 }
1365
1366 i40e_release_nvm(hw);
1367 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1368free_buff:
1369 kfree(eeprom_buff);
1370 return ret_val;
1371}
1372
1373static int i40e_get_eeprom_len(struct net_device *netdev)
1374{
1375 struct i40e_netdev_priv *np = netdev_priv(netdev);
1376 struct i40e_hw *hw = &np->vsi->back->hw;
1377 u32 val;
1378
1379#define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1380 if (hw->mac.type == I40E_MAC_X722) {
1381 val = X722_EEPROM_SCOPE_LIMIT + 1;
1382 return val;
1383 }
1384 val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1385 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1386 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1387 /* register returns value in power of 2, 64Kbyte chunks. */
1388 val = (64 * 1024) * BIT(val);
1389 return val;
1390}
1391
1392static int i40e_set_eeprom(struct net_device *netdev,
1393 struct ethtool_eeprom *eeprom, u8 *bytes)
1394{
1395 struct i40e_netdev_priv *np = netdev_priv(netdev);
1396 struct i40e_hw *hw = &np->vsi->back->hw;
1397 struct i40e_pf *pf = np->vsi->back;
1398 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1399 int ret_val = 0;
1400 int errno = 0;
1401 u32 magic;
1402
1403 /* normal ethtool set_eeprom is not supported */
1404 magic = hw->vendor_id | (hw->device_id << 16);
1405 if (eeprom->magic == magic)
1406 errno = -EOPNOTSUPP;
1407 /* check for NVMUpdate access method */
1408 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1409 errno = -EINVAL;
1410 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1411 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1412 errno = -EBUSY;
1413 else
1414 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1415
1416 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1417 dev_info(&pf->pdev->dev,
1418 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1419 ret_val, hw->aq.asq_last_status, errno,
1420 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1421 cmd->offset, cmd->data_size);
1422
1423 return errno;
1424}
1425
1426static void i40e_get_drvinfo(struct net_device *netdev,
1427 struct ethtool_drvinfo *drvinfo)
1428{
1429 struct i40e_netdev_priv *np = netdev_priv(netdev);
1430 struct i40e_vsi *vsi = np->vsi;
1431 struct i40e_pf *pf = vsi->back;
1432
1433 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1434 strlcpy(drvinfo->version, i40e_driver_version_str,
1435 sizeof(drvinfo->version));
1436 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
1437 sizeof(drvinfo->fw_version));
1438 strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1439 sizeof(drvinfo->bus_info));
1440 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
1441 if (pf->hw.pf_id == 0)
1442 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
1443}
1444
1445static void i40e_get_ringparam(struct net_device *netdev,
1446 struct ethtool_ringparam *ring)
1447{
1448 struct i40e_netdev_priv *np = netdev_priv(netdev);
1449 struct i40e_pf *pf = np->vsi->back;
1450 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1451
1452 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1453 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1454 ring->rx_mini_max_pending = 0;
1455 ring->rx_jumbo_max_pending = 0;
1456 ring->rx_pending = vsi->rx_rings[0]->count;
1457 ring->tx_pending = vsi->tx_rings[0]->count;
1458 ring->rx_mini_pending = 0;
1459 ring->rx_jumbo_pending = 0;
1460}
1461
1462static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
1463{
1464 if (i40e_enabled_xdp_vsi(vsi)) {
1465 return index < vsi->num_queue_pairs ||
1466 (index >= vsi->alloc_queue_pairs &&
1467 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
1468 }
1469
1470 return index < vsi->num_queue_pairs;
1471}
1472
1473static int i40e_set_ringparam(struct net_device *netdev,
1474 struct ethtool_ringparam *ring)
1475{
1476 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1477 struct i40e_netdev_priv *np = netdev_priv(netdev);
1478 struct i40e_hw *hw = &np->vsi->back->hw;
1479 struct i40e_vsi *vsi = np->vsi;
1480 struct i40e_pf *pf = vsi->back;
1481 u32 new_rx_count, new_tx_count;
1482 u16 tx_alloc_queue_pairs;
1483 int timeout = 50;
1484 int i, err = 0;
1485
1486 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1487 return -EINVAL;
1488
1489 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1490 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1491 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1492 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1493 netdev_info(netdev,
1494 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1495 ring->tx_pending, ring->rx_pending,
1496 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1497 return -EINVAL;
1498 }
1499
1500 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1501 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1502
1503 /* if nothing to do return success */
1504 if ((new_tx_count == vsi->tx_rings[0]->count) &&
1505 (new_rx_count == vsi->rx_rings[0]->count))
1506 return 0;
1507
1508 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1509 timeout--;
1510 if (!timeout)
1511 return -EBUSY;
1512 usleep_range(1000, 2000);
1513 }
1514
1515 if (!netif_running(vsi->netdev)) {
1516 /* simple case - set for the next time the netdev is started */
1517 for (i = 0; i < vsi->num_queue_pairs; i++) {
1518 vsi->tx_rings[i]->count = new_tx_count;
1519 vsi->rx_rings[i]->count = new_rx_count;
1520 if (i40e_enabled_xdp_vsi(vsi))
1521 vsi->xdp_rings[i]->count = new_tx_count;
1522 }
1523 goto done;
1524 }
1525
1526 /* We can't just free everything and then setup again,
1527 * because the ISRs in MSI-X mode get passed pointers
1528 * to the Tx and Rx ring structs.
1529 */
1530
1531 /* alloc updated Tx and XDP Tx resources */
1532 tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
1533 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
1534 if (new_tx_count != vsi->tx_rings[0]->count) {
1535 netdev_info(netdev,
1536 "Changing Tx descriptor count from %d to %d.\n",
1537 vsi->tx_rings[0]->count, new_tx_count);
1538 tx_rings = kcalloc(tx_alloc_queue_pairs,
1539 sizeof(struct i40e_ring), GFP_KERNEL);
1540 if (!tx_rings) {
1541 err = -ENOMEM;
1542 goto done;
1543 }
1544
1545 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1546 if (!i40e_active_tx_ring_index(vsi, i))
1547 continue;
1548
1549 tx_rings[i] = *vsi->tx_rings[i];
1550 tx_rings[i].count = new_tx_count;
1551 /* the desc and bi pointers will be reallocated in the
1552 * setup call
1553 */
1554 tx_rings[i].desc = NULL;
1555 tx_rings[i].rx_bi = NULL;
1556 err = i40e_setup_tx_descriptors(&tx_rings[i]);
1557 if (err) {
1558 while (i) {
1559 i--;
1560 if (!i40e_active_tx_ring_index(vsi, i))
1561 continue;
1562 i40e_free_tx_resources(&tx_rings[i]);
1563 }
1564 kfree(tx_rings);
1565 tx_rings = NULL;
1566
1567 goto done;
1568 }
1569 }
1570 }
1571
1572 /* alloc updated Rx resources */
1573 if (new_rx_count != vsi->rx_rings[0]->count) {
1574 netdev_info(netdev,
1575 "Changing Rx descriptor count from %d to %d\n",
1576 vsi->rx_rings[0]->count, new_rx_count);
1577 rx_rings = kcalloc(vsi->alloc_queue_pairs,
1578 sizeof(struct i40e_ring), GFP_KERNEL);
1579 if (!rx_rings) {
1580 err = -ENOMEM;
1581 goto free_tx;
1582 }
1583
1584 for (i = 0; i < vsi->num_queue_pairs; i++) {
1585 struct i40e_ring *ring;
1586 u16 unused;
1587
1588 /* clone ring and setup updated count */
1589 rx_rings[i] = *vsi->rx_rings[i];
1590 rx_rings[i].count = new_rx_count;
1591 /* the desc and bi pointers will be reallocated in the
1592 * setup call
1593 */
1594 rx_rings[i].desc = NULL;
1595 rx_rings[i].rx_bi = NULL;
1596 /* Clear cloned XDP RX-queue info before setup call */
1597 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
1598 /* this is to allow wr32 to have something to write to
1599 * during early allocation of Rx buffers
1600 */
1601 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
1602 err = i40e_setup_rx_descriptors(&rx_rings[i]);
1603 if (err)
1604 goto rx_unwind;
1605
1606 /* now allocate the Rx buffers to make sure the OS
1607 * has enough memory, any failure here means abort
1608 */
1609 ring = &rx_rings[i];
1610 unused = I40E_DESC_UNUSED(ring);
1611 err = i40e_alloc_rx_buffers(ring, unused);
1612rx_unwind:
1613 if (err) {
1614 do {
1615 i40e_free_rx_resources(&rx_rings[i]);
1616 } while (i--);
1617 kfree(rx_rings);
1618 rx_rings = NULL;
1619
1620 goto free_tx;
1621 }
1622 }
1623 }
1624
1625 /* Bring interface down, copy in the new ring info,
1626 * then restore the interface
1627 */
1628 i40e_down(vsi);
1629
1630 if (tx_rings) {
1631 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1632 if (i40e_active_tx_ring_index(vsi, i)) {
1633 i40e_free_tx_resources(vsi->tx_rings[i]);
1634 *vsi->tx_rings[i] = tx_rings[i];
1635 }
1636 }
1637 kfree(tx_rings);
1638 tx_rings = NULL;
1639 }
1640
1641 if (rx_rings) {
1642 for (i = 0; i < vsi->num_queue_pairs; i++) {
1643 i40e_free_rx_resources(vsi->rx_rings[i]);
1644 /* get the real tail offset */
1645 rx_rings[i].tail = vsi->rx_rings[i]->tail;
1646 /* this is to fake out the allocation routine
1647 * into thinking it has to realloc everything
1648 * but the recycling logic will let us re-use
1649 * the buffers allocated above
1650 */
1651 rx_rings[i].next_to_use = 0;
1652 rx_rings[i].next_to_clean = 0;
1653 rx_rings[i].next_to_alloc = 0;
1654 /* do a struct copy */
1655 *vsi->rx_rings[i] = rx_rings[i];
1656 }
1657 kfree(rx_rings);
1658 rx_rings = NULL;
1659 }
1660
1661 i40e_up(vsi);
1662
1663free_tx:
1664 /* error cleanup if the Rx allocations failed after getting Tx */
1665 if (tx_rings) {
1666 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1667 if (i40e_active_tx_ring_index(vsi, i))
1668 i40e_free_tx_resources(vsi->tx_rings[i]);
1669 }
1670 kfree(tx_rings);
1671 tx_rings = NULL;
1672 }
1673
1674done:
1675 clear_bit(__I40E_CONFIG_BUSY, pf->state);
1676
1677 return err;
1678}
1679
1680static int i40e_get_sset_count(struct net_device *netdev, int sset)
1681{
1682 struct i40e_netdev_priv *np = netdev_priv(netdev);
1683 struct i40e_vsi *vsi = np->vsi;
1684 struct i40e_pf *pf = vsi->back;
1685
1686 switch (sset) {
1687 case ETH_SS_TEST:
1688 return I40E_TEST_LEN;
1689 case ETH_SS_STATS:
1690 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) {
1691 int len = I40E_PF_STATS_LEN(netdev);
1692
1693 if ((pf->lan_veb != I40E_NO_VEB) &&
1694 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED))
1695 len += I40E_VEB_STATS_TOTAL;
1696 return len;
1697 } else {
1698 return I40E_VSI_STATS_LEN(netdev);
1699 }
1700 case ETH_SS_PRIV_FLAGS:
1701 return I40E_PRIV_FLAGS_STR_LEN +
1702 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
1703 default:
1704 return -EOPNOTSUPP;
1705 }
1706}
1707
1708static void i40e_get_ethtool_stats(struct net_device *netdev,
1709 struct ethtool_stats *stats, u64 *data)
1710{
1711 struct i40e_netdev_priv *np = netdev_priv(netdev);
1712 struct i40e_ring *tx_ring, *rx_ring;
1713 struct i40e_vsi *vsi = np->vsi;
1714 struct i40e_pf *pf = vsi->back;
1715 unsigned int j;
1716 int i = 0;
1717 char *p;
1718 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi);
1719 unsigned int start;
1720
1721 i40e_update_stats(vsi);
1722
1723 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) {
1724 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset;
1725 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat ==
1726 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1727 }
1728 for (j = 0; j < I40E_MISC_STATS_LEN; j++) {
1729 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset;
1730 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat ==
1731 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1732 }
1733 rcu_read_lock();
1734 for (j = 0; j < vsi->num_queue_pairs; j++) {
1735 tx_ring = READ_ONCE(vsi->tx_rings[j]);
1736
1737 if (!tx_ring)
1738 continue;
1739
1740 /* process Tx ring statistics */
1741 do {
1742 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
1743 data[i] = tx_ring->stats.packets;
1744 data[i + 1] = tx_ring->stats.bytes;
1745 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
1746 i += 2;
1747
1748 /* Rx ring is the 2nd half of the queue pair */
1749 rx_ring = &tx_ring[1];
1750 do {
1751 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
1752 data[i] = rx_ring->stats.packets;
1753 data[i + 1] = rx_ring->stats.bytes;
1754 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
1755 i += 2;
1756 }
1757 rcu_read_unlock();
1758 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1759 return;
1760
1761 if ((pf->lan_veb != I40E_NO_VEB) &&
1762 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1763 struct i40e_veb *veb = pf->veb[pf->lan_veb];
1764
1765 for (j = 0; j < I40E_VEB_STATS_LEN; j++) {
1766 p = (char *)veb;
1767 p += i40e_gstrings_veb_stats[j].stat_offset;
1768 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat ==
1769 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1770 }
1771 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) {
1772 data[i++] = veb->tc_stats.tc_tx_packets[j];
1773 data[i++] = veb->tc_stats.tc_tx_bytes[j];
1774 data[i++] = veb->tc_stats.tc_rx_packets[j];
1775 data[i++] = veb->tc_stats.tc_rx_bytes[j];
1776 }
1777 }
1778 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
1779 p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
1780 data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
1781 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1782 }
1783 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1784 data[i++] = pf->stats.priority_xon_tx[j];
1785 data[i++] = pf->stats.priority_xoff_tx[j];
1786 }
1787 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1788 data[i++] = pf->stats.priority_xon_rx[j];
1789 data[i++] = pf->stats.priority_xoff_rx[j];
1790 }
1791 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
1792 data[i++] = pf->stats.priority_xon_2_xoff[j];
1793}
1794
1795static void i40e_get_strings(struct net_device *netdev, u32 stringset,
1796 u8 *data)
1797{
1798 struct i40e_netdev_priv *np = netdev_priv(netdev);
1799 struct i40e_vsi *vsi = np->vsi;
1800 struct i40e_pf *pf = vsi->back;
1801 char *p = (char *)data;
1802 unsigned int i;
1803
1804 switch (stringset) {
1805 case ETH_SS_TEST:
1806 memcpy(data, i40e_gstrings_test,
1807 I40E_TEST_LEN * ETH_GSTRING_LEN);
1808 break;
1809 case ETH_SS_STATS:
1810 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) {
1811 snprintf(p, ETH_GSTRING_LEN, "%s",
1812 i40e_gstrings_net_stats[i].stat_string);
1813 p += ETH_GSTRING_LEN;
1814 }
1815 for (i = 0; i < I40E_MISC_STATS_LEN; i++) {
1816 snprintf(p, ETH_GSTRING_LEN, "%s",
1817 i40e_gstrings_misc_stats[i].stat_string);
1818 p += ETH_GSTRING_LEN;
1819 }
1820 for (i = 0; i < vsi->num_queue_pairs; i++) {
1821 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i);
1822 p += ETH_GSTRING_LEN;
1823 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i);
1824 p += ETH_GSTRING_LEN;
1825 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i);
1826 p += ETH_GSTRING_LEN;
1827 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i);
1828 p += ETH_GSTRING_LEN;
1829 }
1830 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1831 return;
1832
1833 if ((pf->lan_veb != I40E_NO_VEB) &&
1834 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1835 for (i = 0; i < I40E_VEB_STATS_LEN; i++) {
1836 snprintf(p, ETH_GSTRING_LEN, "veb.%s",
1837 i40e_gstrings_veb_stats[i].stat_string);
1838 p += ETH_GSTRING_LEN;
1839 }
1840 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1841 snprintf(p, ETH_GSTRING_LEN,
1842 "veb.tc_%d_tx_packets", i);
1843 p += ETH_GSTRING_LEN;
1844 snprintf(p, ETH_GSTRING_LEN,
1845 "veb.tc_%d_tx_bytes", i);
1846 p += ETH_GSTRING_LEN;
1847 snprintf(p, ETH_GSTRING_LEN,
1848 "veb.tc_%d_rx_packets", i);
1849 p += ETH_GSTRING_LEN;
1850 snprintf(p, ETH_GSTRING_LEN,
1851 "veb.tc_%d_rx_bytes", i);
1852 p += ETH_GSTRING_LEN;
1853 }
1854 }
1855 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
1856 snprintf(p, ETH_GSTRING_LEN, "port.%s",
1857 i40e_gstrings_stats[i].stat_string);
1858 p += ETH_GSTRING_LEN;
1859 }
1860 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1861 snprintf(p, ETH_GSTRING_LEN,
1862 "port.tx_priority_%d_xon", i);
1863 p += ETH_GSTRING_LEN;
1864 snprintf(p, ETH_GSTRING_LEN,
1865 "port.tx_priority_%d_xoff", i);
1866 p += ETH_GSTRING_LEN;
1867 }
1868 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1869 snprintf(p, ETH_GSTRING_LEN,
1870 "port.rx_priority_%d_xon", i);
1871 p += ETH_GSTRING_LEN;
1872 snprintf(p, ETH_GSTRING_LEN,
1873 "port.rx_priority_%d_xoff", i);
1874 p += ETH_GSTRING_LEN;
1875 }
1876 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1877 snprintf(p, ETH_GSTRING_LEN,
1878 "port.rx_priority_%d_xon_2_xoff", i);
1879 p += ETH_GSTRING_LEN;
1880 }
1881 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */
1882 break;
1883 case ETH_SS_PRIV_FLAGS:
1884 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
1885 snprintf(p, ETH_GSTRING_LEN, "%s",
1886 i40e_gstrings_priv_flags[i].flag_string);
1887 p += ETH_GSTRING_LEN;
1888 }
1889 if (pf->hw.pf_id != 0)
1890 break;
1891 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) {
1892 snprintf(p, ETH_GSTRING_LEN, "%s",
1893 i40e_gl_gstrings_priv_flags[i].flag_string);
1894 p += ETH_GSTRING_LEN;
1895 }
1896 break;
1897 default:
1898 break;
1899 }
1900}
1901
1902static int i40e_get_ts_info(struct net_device *dev,
1903 struct ethtool_ts_info *info)
1904{
1905 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
1906
1907 /* only report HW timestamping if PTP is enabled */
1908 if (!(pf->flags & I40E_FLAG_PTP))
1909 return ethtool_op_get_ts_info(dev, info);
1910
1911 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1912 SOF_TIMESTAMPING_RX_SOFTWARE |
1913 SOF_TIMESTAMPING_SOFTWARE |
1914 SOF_TIMESTAMPING_TX_HARDWARE |
1915 SOF_TIMESTAMPING_RX_HARDWARE |
1916 SOF_TIMESTAMPING_RAW_HARDWARE;
1917
1918 if (pf->ptp_clock)
1919 info->phc_index = ptp_clock_index(pf->ptp_clock);
1920 else
1921 info->phc_index = -1;
1922
1923 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
1924
1925 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1926 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
1927 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
1928 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1929
1930 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
1931 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1932 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1933 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
1934 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1935 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
1936 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1937 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1938 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1939
1940 return 0;
1941}
1942
1943static int i40e_link_test(struct net_device *netdev, u64 *data)
1944{
1945 struct i40e_netdev_priv *np = netdev_priv(netdev);
1946 struct i40e_pf *pf = np->vsi->back;
1947 i40e_status status;
1948 bool link_up = false;
1949
1950 netif_info(pf, hw, netdev, "link test\n");
1951 status = i40e_get_link_status(&pf->hw, &link_up);
1952 if (status) {
1953 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
1954 *data = 1;
1955 return *data;
1956 }
1957
1958 if (link_up)
1959 *data = 0;
1960 else
1961 *data = 1;
1962
1963 return *data;
1964}
1965
1966static int i40e_reg_test(struct net_device *netdev, u64 *data)
1967{
1968 struct i40e_netdev_priv *np = netdev_priv(netdev);
1969 struct i40e_pf *pf = np->vsi->back;
1970
1971 netif_info(pf, hw, netdev, "register test\n");
1972 *data = i40e_diag_reg_test(&pf->hw);
1973
1974 return *data;
1975}
1976
1977static int i40e_eeprom_test(struct net_device *netdev, u64 *data)
1978{
1979 struct i40e_netdev_priv *np = netdev_priv(netdev);
1980 struct i40e_pf *pf = np->vsi->back;
1981
1982 netif_info(pf, hw, netdev, "eeprom test\n");
1983 *data = i40e_diag_eeprom_test(&pf->hw);
1984
1985 /* forcebly clear the NVM Update state machine */
1986 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
1987
1988 return *data;
1989}
1990
1991static int i40e_intr_test(struct net_device *netdev, u64 *data)
1992{
1993 struct i40e_netdev_priv *np = netdev_priv(netdev);
1994 struct i40e_pf *pf = np->vsi->back;
1995 u16 swc_old = pf->sw_int_count;
1996
1997 netif_info(pf, hw, netdev, "interrupt test\n");
1998 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
1999 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
2000 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
2001 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
2002 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
2003 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
2004 usleep_range(1000, 2000);
2005 *data = (swc_old == pf->sw_int_count);
2006
2007 return *data;
2008}
2009
2010static inline bool i40e_active_vfs(struct i40e_pf *pf)
2011{
2012 struct i40e_vf *vfs = pf->vf;
2013 int i;
2014
2015 for (i = 0; i < pf->num_alloc_vfs; i++)
2016 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
2017 return true;
2018 return false;
2019}
2020
2021static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
2022{
2023 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
2024}
2025
2026static void i40e_diag_test(struct net_device *netdev,
2027 struct ethtool_test *eth_test, u64 *data)
2028{
2029 struct i40e_netdev_priv *np = netdev_priv(netdev);
2030 bool if_running = netif_running(netdev);
2031 struct i40e_pf *pf = np->vsi->back;
2032
2033 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2034 /* Offline tests */
2035 netif_info(pf, drv, netdev, "offline testing starting\n");
2036
2037 set_bit(__I40E_TESTING, pf->state);
2038
2039 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
2040 dev_warn(&pf->pdev->dev,
2041 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
2042 data[I40E_ETH_TEST_REG] = 1;
2043 data[I40E_ETH_TEST_EEPROM] = 1;
2044 data[I40E_ETH_TEST_INTR] = 1;
2045 data[I40E_ETH_TEST_LINK] = 1;
2046 eth_test->flags |= ETH_TEST_FL_FAILED;
2047 clear_bit(__I40E_TESTING, pf->state);
2048 goto skip_ol_tests;
2049 }
2050
2051 /* If the device is online then take it offline */
2052 if (if_running)
2053 /* indicate we're in test mode */
2054 i40e_close(netdev);
2055 else
2056 /* This reset does not affect link - if it is
2057 * changed to a type of reset that does affect
2058 * link then the following link test would have
2059 * to be moved to before the reset
2060 */
2061 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2062
2063 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2064 eth_test->flags |= ETH_TEST_FL_FAILED;
2065
2066 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
2067 eth_test->flags |= ETH_TEST_FL_FAILED;
2068
2069 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
2070 eth_test->flags |= ETH_TEST_FL_FAILED;
2071
2072 /* run reg test last, a reset is required after it */
2073 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
2074 eth_test->flags |= ETH_TEST_FL_FAILED;
2075
2076 clear_bit(__I40E_TESTING, pf->state);
2077 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2078
2079 if (if_running)
2080 i40e_open(netdev);
2081 } else {
2082 /* Online tests */
2083 netif_info(pf, drv, netdev, "online testing starting\n");
2084
2085 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2086 eth_test->flags |= ETH_TEST_FL_FAILED;
2087
2088 /* Offline only tests, not run in online; pass by default */
2089 data[I40E_ETH_TEST_REG] = 0;
2090 data[I40E_ETH_TEST_EEPROM] = 0;
2091 data[I40E_ETH_TEST_INTR] = 0;
2092 }
2093
2094skip_ol_tests:
2095
2096 netif_info(pf, drv, netdev, "testing finished\n");
2097}
2098
2099static void i40e_get_wol(struct net_device *netdev,
2100 struct ethtool_wolinfo *wol)
2101{
2102 struct i40e_netdev_priv *np = netdev_priv(netdev);
2103 struct i40e_pf *pf = np->vsi->back;
2104 struct i40e_hw *hw = &pf->hw;
2105 u16 wol_nvm_bits;
2106
2107 /* NVM bit on means WoL disabled for the port */
2108 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2109 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
2110 wol->supported = 0;
2111 wol->wolopts = 0;
2112 } else {
2113 wol->supported = WAKE_MAGIC;
2114 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
2115 }
2116}
2117
2118/**
2119 * i40e_set_wol - set the WakeOnLAN configuration
2120 * @netdev: the netdev in question
2121 * @wol: the ethtool WoL setting data
2122 **/
2123static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2124{
2125 struct i40e_netdev_priv *np = netdev_priv(netdev);
2126 struct i40e_pf *pf = np->vsi->back;
2127 struct i40e_vsi *vsi = np->vsi;
2128 struct i40e_hw *hw = &pf->hw;
2129 u16 wol_nvm_bits;
2130
2131 /* WoL not supported if this isn't the controlling PF on the port */
2132 if (hw->partition_id != 1) {
2133 i40e_partition_setting_complaint(pf);
2134 return -EOPNOTSUPP;
2135 }
2136
2137 if (vsi != pf->vsi[pf->lan_vsi])
2138 return -EOPNOTSUPP;
2139
2140 /* NVM bit on means WoL disabled for the port */
2141 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2142 if (BIT(hw->port) & wol_nvm_bits)
2143 return -EOPNOTSUPP;
2144
2145 /* only magic packet is supported */
2146 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC))
2147 return -EOPNOTSUPP;
2148
2149 /* is this a new value? */
2150 if (pf->wol_en != !!wol->wolopts) {
2151 pf->wol_en = !!wol->wolopts;
2152 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2153 }
2154
2155 return 0;
2156}
2157
2158static int i40e_set_phys_id(struct net_device *netdev,
2159 enum ethtool_phys_id_state state)
2160{
2161 struct i40e_netdev_priv *np = netdev_priv(netdev);
2162 i40e_status ret = 0;
2163 struct i40e_pf *pf = np->vsi->back;
2164 struct i40e_hw *hw = &pf->hw;
2165 int blink_freq = 2;
2166 u16 temp_status;
2167
2168 switch (state) {
2169 case ETHTOOL_ID_ACTIVE:
2170 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2171 pf->led_status = i40e_led_get(hw);
2172 } else {
2173 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2174 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
2175 NULL);
2176 ret = i40e_led_get_phy(hw, &temp_status,
2177 &pf->phy_led_val);
2178 pf->led_status = temp_status;
2179 }
2180 return blink_freq;
2181 case ETHTOOL_ID_ON:
2182 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2183 i40e_led_set(hw, 0xf, false);
2184 else
2185 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
2186 break;
2187 case ETHTOOL_ID_OFF:
2188 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2189 i40e_led_set(hw, 0x0, false);
2190 else
2191 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
2192 break;
2193 case ETHTOOL_ID_INACTIVE:
2194 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2195 i40e_led_set(hw, pf->led_status, false);
2196 } else {
2197 ret = i40e_led_set_phy(hw, false, pf->led_status,
2198 (pf->phy_led_val |
2199 I40E_PHY_LED_MODE_ORIG));
2200 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE))
2201 i40e_aq_set_phy_debug(hw, 0, NULL);
2202 }
2203 break;
2204 default:
2205 break;
2206 }
2207 if (ret)
2208 return -ENOENT;
2209 else
2210 return 0;
2211}
2212
2213/* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2214 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2215 * 125us (8000 interrupts per second) == ITR(62)
2216 */
2217
2218/**
2219 * __i40e_get_coalesce - get per-queue coalesce settings
2220 * @netdev: the netdev to check
2221 * @ec: ethtool coalesce data structure
2222 * @queue: which queue to pick
2223 *
2224 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2225 * are per queue. If queue is <0 then we default to queue 0 as the
2226 * representative value.
2227 **/
2228static int __i40e_get_coalesce(struct net_device *netdev,
2229 struct ethtool_coalesce *ec,
2230 int queue)
2231{
2232 struct i40e_netdev_priv *np = netdev_priv(netdev);
2233 struct i40e_ring *rx_ring, *tx_ring;
2234 struct i40e_vsi *vsi = np->vsi;
2235
2236 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2237 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2238
2239 /* rx and tx usecs has per queue value. If user doesn't specify the
2240 * queue, return queue 0's value to represent.
2241 */
2242 if (queue < 0)
2243 queue = 0;
2244 else if (queue >= vsi->num_queue_pairs)
2245 return -EINVAL;
2246
2247 rx_ring = vsi->rx_rings[queue];
2248 tx_ring = vsi->tx_rings[queue];
2249
2250 if (ITR_IS_DYNAMIC(rx_ring->itr_setting))
2251 ec->use_adaptive_rx_coalesce = 1;
2252
2253 if (ITR_IS_DYNAMIC(tx_ring->itr_setting))
2254 ec->use_adaptive_tx_coalesce = 1;
2255
2256 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2257 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2258
2259 /* we use the _usecs_high to store/set the interrupt rate limit
2260 * that the hardware supports, that almost but not quite
2261 * fits the original intent of the ethtool variable,
2262 * the rx_coalesce_usecs_high limits total interrupts
2263 * per second from both tx/rx sources.
2264 */
2265 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2266 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2267
2268 return 0;
2269}
2270
2271/**
2272 * i40e_get_coalesce - get a netdev's coalesce settings
2273 * @netdev: the netdev to check
2274 * @ec: ethtool coalesce data structure
2275 *
2276 * Gets the coalesce settings for a particular netdev. Note that if user has
2277 * modified per-queue settings, this only guarantees to represent queue 0. See
2278 * __i40e_get_coalesce for more details.
2279 **/
2280static int i40e_get_coalesce(struct net_device *netdev,
2281 struct ethtool_coalesce *ec)
2282{
2283 return __i40e_get_coalesce(netdev, ec, -1);
2284}
2285
2286/**
2287 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2288 * @netdev: netdev structure
2289 * @ec: ethtool's coalesce settings
2290 * @queue: the particular queue to read
2291 *
2292 * Will read a specific queue's coalesce settings
2293 **/
2294static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2295 struct ethtool_coalesce *ec)
2296{
2297 return __i40e_get_coalesce(netdev, ec, queue);
2298}
2299
2300/**
2301 * i40e_set_itr_per_queue - set ITR values for specific queue
2302 * @vsi: the VSI to set values for
2303 * @ec: coalesce settings from ethtool
2304 * @queue: the queue to modify
2305 *
2306 * Change the ITR settings for a specific queue.
2307 **/
2308static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2309 struct ethtool_coalesce *ec,
2310 int queue)
2311{
2312 struct i40e_ring *rx_ring = vsi->rx_rings[queue];
2313 struct i40e_ring *tx_ring = vsi->tx_rings[queue];
2314 struct i40e_pf *pf = vsi->back;
2315 struct i40e_hw *hw = &pf->hw;
2316 struct i40e_q_vector *q_vector;
2317 u16 intrl;
2318
2319 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
2320
2321 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
2322 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
2323
2324 if (ec->use_adaptive_rx_coalesce)
2325 rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2326 else
2327 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2328
2329 if (ec->use_adaptive_tx_coalesce)
2330 tx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2331 else
2332 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2333
2334 q_vector = rx_ring->q_vector;
2335 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);
2336
2337 q_vector = tx_ring->q_vector;
2338 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);
2339
2340 /* The interrupt handler itself will take care of programming
2341 * the Tx and Rx ITR values based on the values we have entered
2342 * into the q_vector, no need to write the values now.
2343 */
2344
2345 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);
2346 i40e_flush(hw);
2347}
2348
2349/**
2350 * __i40e_set_coalesce - set coalesce settings for particular queue
2351 * @netdev: the netdev to change
2352 * @ec: ethtool coalesce settings
2353 * @queue: the queue to change
2354 *
2355 * Sets the coalesce settings for a particular queue.
2356 **/
2357static int __i40e_set_coalesce(struct net_device *netdev,
2358 struct ethtool_coalesce *ec,
2359 int queue)
2360{
2361 struct i40e_netdev_priv *np = netdev_priv(netdev);
2362 u16 intrl_reg, cur_rx_itr, cur_tx_itr;
2363 struct i40e_vsi *vsi = np->vsi;
2364 struct i40e_pf *pf = vsi->back;
2365 int i;
2366
2367 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2368 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2369
2370 if (queue < 0) {
2371 cur_rx_itr = vsi->rx_rings[0]->itr_setting;
2372 cur_tx_itr = vsi->tx_rings[0]->itr_setting;
2373 } else if (queue < vsi->num_queue_pairs) {
2374 cur_rx_itr = vsi->rx_rings[queue]->itr_setting;
2375 cur_tx_itr = vsi->tx_rings[queue]->itr_setting;
2376 } else {
2377 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2378 vsi->num_queue_pairs - 1);
2379 return -EINVAL;
2380 }
2381
2382 cur_tx_itr &= ~I40E_ITR_DYNAMIC;
2383 cur_rx_itr &= ~I40E_ITR_DYNAMIC;
2384
2385 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
2386 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2387 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2388 return -EINVAL;
2389 }
2390
2391 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2392 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
2393 INTRL_REG_TO_USEC(I40E_MAX_INTRL));
2394 return -EINVAL;
2395 }
2396
2397 if (ec->rx_coalesce_usecs != cur_rx_itr &&
2398 ec->use_adaptive_rx_coalesce) {
2399 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
2400 return -EINVAL;
2401 }
2402
2403 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
2404 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2405 return -EINVAL;
2406 }
2407
2408 if (ec->tx_coalesce_usecs != cur_tx_itr &&
2409 ec->use_adaptive_tx_coalesce) {
2410 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
2411 return -EINVAL;
2412 }
2413
2414 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
2415 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2416 return -EINVAL;
2417 }
2418
2419 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
2420 ec->rx_coalesce_usecs = I40E_MIN_ITR;
2421
2422 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
2423 ec->tx_coalesce_usecs = I40E_MIN_ITR;
2424
2425 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
2426 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
2427 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
2428 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
2429 vsi->int_rate_limit);
2430 }
2431
2432 /* rx and tx usecs has per queue value. If user doesn't specify the
2433 * queue, apply to all queues.
2434 */
2435 if (queue < 0) {
2436 for (i = 0; i < vsi->num_queue_pairs; i++)
2437 i40e_set_itr_per_queue(vsi, ec, i);
2438 } else {
2439 i40e_set_itr_per_queue(vsi, ec, queue);
2440 }
2441
2442 return 0;
2443}
2444
2445/**
2446 * i40e_set_coalesce - set coalesce settings for every queue on the netdev
2447 * @netdev: the netdev to change
2448 * @ec: ethtool coalesce settings
2449 *
2450 * This will set each queue to the same coalesce settings.
2451 **/
2452static int i40e_set_coalesce(struct net_device *netdev,
2453 struct ethtool_coalesce *ec)
2454{
2455 return __i40e_set_coalesce(netdev, ec, -1);
2456}
2457
2458/**
2459 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
2460 * @netdev: the netdev to change
2461 * @ec: ethtool's coalesce settings
2462 * @queue: the queue to change
2463 *
2464 * Sets the specified queue's coalesce settings.
2465 **/
2466static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
2467 struct ethtool_coalesce *ec)
2468{
2469 return __i40e_set_coalesce(netdev, ec, queue);
2470}
2471
2472/**
2473 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
2474 * @pf: pointer to the physical function struct
2475 * @cmd: ethtool rxnfc command
2476 *
2477 * Returns Success if the flow is supported, else Invalid Input.
2478 **/
2479static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
2480{
2481 struct i40e_hw *hw = &pf->hw;
2482 u8 flow_pctype = 0;
2483 u64 i_set = 0;
2484
2485 cmd->data = 0;
2486
2487 switch (cmd->flow_type) {
2488 case TCP_V4_FLOW:
2489 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2490 break;
2491 case UDP_V4_FLOW:
2492 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2493 break;
2494 case TCP_V6_FLOW:
2495 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2496 break;
2497 case UDP_V6_FLOW:
2498 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2499 break;
2500 case SCTP_V4_FLOW:
2501 case AH_ESP_V4_FLOW:
2502 case AH_V4_FLOW:
2503 case ESP_V4_FLOW:
2504 case IPV4_FLOW:
2505 case SCTP_V6_FLOW:
2506 case AH_ESP_V6_FLOW:
2507 case AH_V6_FLOW:
2508 case ESP_V6_FLOW:
2509 case IPV6_FLOW:
2510 /* Default is src/dest for IP, no matter the L4 hashing */
2511 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2512 break;
2513 default:
2514 return -EINVAL;
2515 }
2516
2517 /* Read flow based hash input set register */
2518 if (flow_pctype) {
2519 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2520 flow_pctype)) |
2521 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2522 flow_pctype)) << 32);
2523 }
2524
2525 /* Process bits of hash input set */
2526 if (i_set) {
2527 if (i_set & I40E_L4_SRC_MASK)
2528 cmd->data |= RXH_L4_B_0_1;
2529 if (i_set & I40E_L4_DST_MASK)
2530 cmd->data |= RXH_L4_B_2_3;
2531
2532 if (cmd->flow_type == TCP_V4_FLOW ||
2533 cmd->flow_type == UDP_V4_FLOW) {
2534 if (i_set & I40E_L3_SRC_MASK)
2535 cmd->data |= RXH_IP_SRC;
2536 if (i_set & I40E_L3_DST_MASK)
2537 cmd->data |= RXH_IP_DST;
2538 } else if (cmd->flow_type == TCP_V6_FLOW ||
2539 cmd->flow_type == UDP_V6_FLOW) {
2540 if (i_set & I40E_L3_V6_SRC_MASK)
2541 cmd->data |= RXH_IP_SRC;
2542 if (i_set & I40E_L3_V6_DST_MASK)
2543 cmd->data |= RXH_IP_DST;
2544 }
2545 }
2546
2547 return 0;
2548}
2549
2550/**
2551 * i40e_check_mask - Check whether a mask field is set
2552 * @mask: the full mask value
2553 * @field; mask of the field to check
2554 *
2555 * If the given mask is fully set, return positive value. If the mask for the
2556 * field is fully unset, return zero. Otherwise return a negative error code.
2557 **/
2558static int i40e_check_mask(u64 mask, u64 field)
2559{
2560 u64 value = mask & field;
2561
2562 if (value == field)
2563 return 1;
2564 else if (!value)
2565 return 0;
2566 else
2567 return -1;
2568}
2569
2570/**
2571 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
2572 * @fsp: pointer to rx flow specification
2573 * @data: pointer to userdef data structure for storage
2574 *
2575 * Read the user-defined data and deconstruct the value into a structure. No
2576 * other code should read the user-defined data, so as to ensure that every
2577 * place consistently reads the value correctly.
2578 *
2579 * The user-defined field is a 64bit Big Endian format value, which we
2580 * deconstruct by reading bits or bit fields from it. Single bit flags shall
2581 * be defined starting from the highest bits, while small bit field values
2582 * shall be defined starting from the lowest bits.
2583 *
2584 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
2585 * and the filter should be rejected. The data structure will always be
2586 * modified even if FLOW_EXT is not set.
2587 *
2588 **/
2589static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2590 struct i40e_rx_flow_userdef *data)
2591{
2592 u64 value, mask;
2593 int valid;
2594
2595 /* Zero memory first so it's always consistent. */
2596 memset(data, 0, sizeof(*data));
2597
2598 if (!(fsp->flow_type & FLOW_EXT))
2599 return 0;
2600
2601 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
2602 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
2603
2604#define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
2605#define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
2606#define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
2607
2608 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
2609 if (valid < 0) {
2610 return -EINVAL;
2611 } else if (valid) {
2612 data->flex_word = value & I40E_USERDEF_FLEX_WORD;
2613 data->flex_offset =
2614 (value & I40E_USERDEF_FLEX_OFFSET) >> 16;
2615 data->flex_filter = true;
2616 }
2617
2618 return 0;
2619}
2620
2621/**
2622 * i40e_fill_rx_flow_user_data - Fill in user-defined data field
2623 * @fsp: pointer to rx_flow specification
2624 *
2625 * Reads the userdef data structure and properly fills in the user defined
2626 * fields of the rx_flow_spec.
2627 **/
2628static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2629 struct i40e_rx_flow_userdef *data)
2630{
2631 u64 value = 0, mask = 0;
2632
2633 if (data->flex_filter) {
2634 value |= data->flex_word;
2635 value |= (u64)data->flex_offset << 16;
2636 mask |= I40E_USERDEF_FLEX_FILTER;
2637 }
2638
2639 if (value || mask)
2640 fsp->flow_type |= FLOW_EXT;
2641
2642 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
2643 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
2644}
2645
2646/**
2647 * i40e_get_ethtool_fdir_all - Populates the rule count of a command
2648 * @pf: Pointer to the physical function struct
2649 * @cmd: The command to get or set Rx flow classification rules
2650 * @rule_locs: Array of used rule locations
2651 *
2652 * This function populates both the total and actual rule count of
2653 * the ethtool flow classification command
2654 *
2655 * Returns 0 on success or -EMSGSIZE if entry not found
2656 **/
2657static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
2658 struct ethtool_rxnfc *cmd,
2659 u32 *rule_locs)
2660{
2661 struct i40e_fdir_filter *rule;
2662 struct hlist_node *node2;
2663 int cnt = 0;
2664
2665 /* report total rule count */
2666 cmd->data = i40e_get_fd_cnt_all(pf);
2667
2668 hlist_for_each_entry_safe(rule, node2,
2669 &pf->fdir_filter_list, fdir_node) {
2670 if (cnt == cmd->rule_cnt)
2671 return -EMSGSIZE;
2672
2673 rule_locs[cnt] = rule->fd_id;
2674 cnt++;
2675 }
2676
2677 cmd->rule_cnt = cnt;
2678
2679 return 0;
2680}
2681
2682/**
2683 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
2684 * @pf: Pointer to the physical function struct
2685 * @cmd: The command to get or set Rx flow classification rules
2686 *
2687 * This function looks up a filter based on the Rx flow classification
2688 * command and fills the flow spec info for it if found
2689 *
2690 * Returns 0 on success or -EINVAL if filter not found
2691 **/
2692static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
2693 struct ethtool_rxnfc *cmd)
2694{
2695 struct ethtool_rx_flow_spec *fsp =
2696 (struct ethtool_rx_flow_spec *)&cmd->fs;
2697 struct i40e_rx_flow_userdef userdef = {0};
2698 struct i40e_fdir_filter *rule = NULL;
2699 struct hlist_node *node2;
2700 u64 input_set;
2701 u16 index;
2702
2703 hlist_for_each_entry_safe(rule, node2,
2704 &pf->fdir_filter_list, fdir_node) {
2705 if (fsp->location <= rule->fd_id)
2706 break;
2707 }
2708
2709 if (!rule || fsp->location != rule->fd_id)
2710 return -EINVAL;
2711
2712 fsp->flow_type = rule->flow_type;
2713 if (fsp->flow_type == IP_USER_FLOW) {
2714 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2715 fsp->h_u.usr_ip4_spec.proto = 0;
2716 fsp->m_u.usr_ip4_spec.proto = 0;
2717 }
2718
2719 /* Reverse the src and dest notion, since the HW views them from
2720 * Tx perspective where as the user expects it from Rx filter view.
2721 */
2722 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
2723 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
2724 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
2725 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
2726
2727 switch (rule->flow_type) {
2728 case SCTP_V4_FLOW:
2729 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
2730 break;
2731 case TCP_V4_FLOW:
2732 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2733 break;
2734 case UDP_V4_FLOW:
2735 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2736 break;
2737 case IP_USER_FLOW:
2738 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
2739 break;
2740 default:
2741 /* If we have stored a filter with a flow type not listed here
2742 * it is almost certainly a driver bug. WARN(), and then
2743 * assign the input_set as if all fields are enabled to avoid
2744 * reading unassigned memory.
2745 */
2746 WARN(1, "Missing input set index for flow_type %d\n",
2747 rule->flow_type);
2748 input_set = 0xFFFFFFFFFFFFFFFFULL;
2749 goto no_input_set;
2750 }
2751
2752 input_set = i40e_read_fd_input_set(pf, index);
2753
2754no_input_set:
2755 if (input_set & I40E_L3_SRC_MASK)
2756 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
2757
2758 if (input_set & I40E_L3_DST_MASK)
2759 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
2760
2761 if (input_set & I40E_L4_SRC_MASK)
2762 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
2763
2764 if (input_set & I40E_L4_DST_MASK)
2765 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
2766
2767 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
2768 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2769 else
2770 fsp->ring_cookie = rule->q_index;
2771
2772 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
2773 struct i40e_vsi *vsi;
2774
2775 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
2776 if (vsi && vsi->type == I40E_VSI_SRIOV) {
2777 /* VFs are zero-indexed by the driver, but ethtool
2778 * expects them to be one-indexed, so add one here
2779 */
2780 u64 ring_vf = vsi->vf_id + 1;
2781
2782 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
2783 fsp->ring_cookie |= ring_vf;
2784 }
2785 }
2786
2787 if (rule->flex_filter) {
2788 userdef.flex_filter = true;
2789 userdef.flex_word = be16_to_cpu(rule->flex_word);
2790 userdef.flex_offset = rule->flex_offset;
2791 }
2792
2793 i40e_fill_rx_flow_user_data(fsp, &userdef);
2794
2795 return 0;
2796}
2797
2798/**
2799 * i40e_get_rxnfc - command to get RX flow classification rules
2800 * @netdev: network interface device structure
2801 * @cmd: ethtool rxnfc command
2802 *
2803 * Returns Success if the command is supported.
2804 **/
2805static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
2806 u32 *rule_locs)
2807{
2808 struct i40e_netdev_priv *np = netdev_priv(netdev);
2809 struct i40e_vsi *vsi = np->vsi;
2810 struct i40e_pf *pf = vsi->back;
2811 int ret = -EOPNOTSUPP;
2812
2813 switch (cmd->cmd) {
2814 case ETHTOOL_GRXRINGS:
2815 cmd->data = vsi->rss_size;
2816 ret = 0;
2817 break;
2818 case ETHTOOL_GRXFH:
2819 ret = i40e_get_rss_hash_opts(pf, cmd);
2820 break;
2821 case ETHTOOL_GRXCLSRLCNT:
2822 cmd->rule_cnt = pf->fdir_pf_active_filters;
2823 /* report total rule count */
2824 cmd->data = i40e_get_fd_cnt_all(pf);
2825 ret = 0;
2826 break;
2827 case ETHTOOL_GRXCLSRULE:
2828 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
2829 break;
2830 case ETHTOOL_GRXCLSRLALL:
2831 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
2832 break;
2833 default:
2834 break;
2835 }
2836
2837 return ret;
2838}
2839
2840/**
2841 * i40e_get_rss_hash_bits - Read RSS Hash bits from register
2842 * @nfc: pointer to user request
2843 * @i_setc bits currently set
2844 *
2845 * Returns value of bits to be set per user request
2846 **/
2847static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
2848{
2849 u64 i_set = i_setc;
2850 u64 src_l3 = 0, dst_l3 = 0;
2851
2852 if (nfc->data & RXH_L4_B_0_1)
2853 i_set |= I40E_L4_SRC_MASK;
2854 else
2855 i_set &= ~I40E_L4_SRC_MASK;
2856 if (nfc->data & RXH_L4_B_2_3)
2857 i_set |= I40E_L4_DST_MASK;
2858 else
2859 i_set &= ~I40E_L4_DST_MASK;
2860
2861 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
2862 src_l3 = I40E_L3_V6_SRC_MASK;
2863 dst_l3 = I40E_L3_V6_DST_MASK;
2864 } else if (nfc->flow_type == TCP_V4_FLOW ||
2865 nfc->flow_type == UDP_V4_FLOW) {
2866 src_l3 = I40E_L3_SRC_MASK;
2867 dst_l3 = I40E_L3_DST_MASK;
2868 } else {
2869 /* Any other flow type are not supported here */
2870 return i_set;
2871 }
2872
2873 if (nfc->data & RXH_IP_SRC)
2874 i_set |= src_l3;
2875 else
2876 i_set &= ~src_l3;
2877 if (nfc->data & RXH_IP_DST)
2878 i_set |= dst_l3;
2879 else
2880 i_set &= ~dst_l3;
2881
2882 return i_set;
2883}
2884
2885/**
2886 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
2887 * @pf: pointer to the physical function struct
2888 * @cmd: ethtool rxnfc command
2889 *
2890 * Returns Success if the flow input set is supported.
2891 **/
2892static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2893{
2894 struct i40e_hw *hw = &pf->hw;
2895 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
2896 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
2897 u8 flow_pctype = 0;
2898 u64 i_set, i_setc;
2899
2900 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
2901 dev_err(&pf->pdev->dev,
2902 "Change of RSS hash input set is not supported when MFP mode is enabled\n");
2903 return -EOPNOTSUPP;
2904 }
2905
2906 /* RSS does not support anything other than hashing
2907 * to queues on src and dst IPs and ports
2908 */
2909 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2910 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2911 return -EINVAL;
2912
2913 switch (nfc->flow_type) {
2914 case TCP_V4_FLOW:
2915 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2916 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2917 hena |=
2918 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2919 break;
2920 case TCP_V6_FLOW:
2921 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2922 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2923 hena |=
2924 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2925 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2926 hena |=
2927 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
2928 break;
2929 case UDP_V4_FLOW:
2930 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2931 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2932 hena |=
2933 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
2934 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
2935
2936 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2937 break;
2938 case UDP_V6_FLOW:
2939 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2940 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2941 hena |=
2942 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
2943 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
2944
2945 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2946 break;
2947 case AH_ESP_V4_FLOW:
2948 case AH_V4_FLOW:
2949 case ESP_V4_FLOW:
2950 case SCTP_V4_FLOW:
2951 if ((nfc->data & RXH_L4_B_0_1) ||
2952 (nfc->data & RXH_L4_B_2_3))
2953 return -EINVAL;
2954 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
2955 break;
2956 case AH_ESP_V6_FLOW:
2957 case AH_V6_FLOW:
2958 case ESP_V6_FLOW:
2959 case SCTP_V6_FLOW:
2960 if ((nfc->data & RXH_L4_B_0_1) ||
2961 (nfc->data & RXH_L4_B_2_3))
2962 return -EINVAL;
2963 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
2964 break;
2965 case IPV4_FLOW:
2966 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
2967 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2968 break;
2969 case IPV6_FLOW:
2970 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
2971 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2972 break;
2973 default:
2974 return -EINVAL;
2975 }
2976
2977 if (flow_pctype) {
2978 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2979 flow_pctype)) |
2980 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2981 flow_pctype)) << 32);
2982 i_set = i40e_get_rss_hash_bits(nfc, i_setc);
2983 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
2984 (u32)i_set);
2985 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
2986 (u32)(i_set >> 32));
2987 hena |= BIT_ULL(flow_pctype);
2988 }
2989
2990 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
2991 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
2992 i40e_flush(hw);
2993
2994 return 0;
2995}
2996
2997/**
2998 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
2999 * @vsi: Pointer to the targeted VSI
3000 * @input: The filter to update or NULL to indicate deletion
3001 * @sw_idx: Software index to the filter
3002 * @cmd: The command to get or set Rx flow classification rules
3003 *
3004 * This function updates (or deletes) a Flow Director entry from
3005 * the hlist of the corresponding PF
3006 *
3007 * Returns 0 on success
3008 **/
3009static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
3010 struct i40e_fdir_filter *input,
3011 u16 sw_idx,
3012 struct ethtool_rxnfc *cmd)
3013{
3014 struct i40e_fdir_filter *rule, *parent;
3015 struct i40e_pf *pf = vsi->back;
3016 struct hlist_node *node2;
3017 int err = -EINVAL;
3018
3019 parent = NULL;
3020 rule = NULL;
3021
3022 hlist_for_each_entry_safe(rule, node2,
3023 &pf->fdir_filter_list, fdir_node) {
3024 /* hash found, or no matching entry */
3025 if (rule->fd_id >= sw_idx)
3026 break;
3027 parent = rule;
3028 }
3029
3030 /* if there is an old rule occupying our place remove it */
3031 if (rule && (rule->fd_id == sw_idx)) {
3032 /* Remove this rule, since we're either deleting it, or
3033 * replacing it.
3034 */
3035 err = i40e_add_del_fdir(vsi, rule, false);
3036 hlist_del(&rule->fdir_node);
3037 kfree(rule);
3038 pf->fdir_pf_active_filters--;
3039 }
3040
3041 /* If we weren't given an input, this is a delete, so just return the
3042 * error code indicating if there was an entry at the requested slot
3043 */
3044 if (!input)
3045 return err;
3046
3047 /* Otherwise, install the new rule as requested */
3048 INIT_HLIST_NODE(&input->fdir_node);
3049
3050 /* add filter to the list */
3051 if (parent)
3052 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
3053 else
3054 hlist_add_head(&input->fdir_node,
3055 &pf->fdir_filter_list);
3056
3057 /* update counts */
3058 pf->fdir_pf_active_filters++;
3059
3060 return 0;
3061}
3062
3063/**
3064 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
3065 * @pf: pointer to PF structure
3066 *
3067 * This function searches the list of filters and determines which FLX_PIT
3068 * entries are still required. It will prune any entries which are no longer
3069 * in use after the deletion.
3070 **/
3071static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
3072{
3073 struct i40e_flex_pit *entry, *tmp;
3074 struct i40e_fdir_filter *rule;
3075
3076 /* First, we'll check the l3 table */
3077 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
3078 bool found = false;
3079
3080 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3081 if (rule->flow_type != IP_USER_FLOW)
3082 continue;
3083 if (rule->flex_filter &&
3084 rule->flex_offset == entry->src_offset) {
3085 found = true;
3086 break;
3087 }
3088 }
3089
3090 /* If we didn't find the filter, then we can prune this entry
3091 * from the list.
3092 */
3093 if (!found) {
3094 list_del(&entry->list);
3095 kfree(entry);
3096 }
3097 }
3098
3099 /* Followed by the L4 table */
3100 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
3101 bool found = false;
3102
3103 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3104 /* Skip this filter if it's L3, since we already
3105 * checked those in the above loop
3106 */
3107 if (rule->flow_type == IP_USER_FLOW)
3108 continue;
3109 if (rule->flex_filter &&
3110 rule->flex_offset == entry->src_offset) {
3111 found = true;
3112 break;
3113 }
3114 }
3115
3116 /* If we didn't find the filter, then we can prune this entry
3117 * from the list.
3118 */
3119 if (!found) {
3120 list_del(&entry->list);
3121 kfree(entry);
3122 }
3123 }
3124}
3125
3126/**
3127 * i40e_del_fdir_entry - Deletes a Flow Director filter entry
3128 * @vsi: Pointer to the targeted VSI
3129 * @cmd: The command to get or set Rx flow classification rules
3130 *
3131 * The function removes a Flow Director filter entry from the
3132 * hlist of the corresponding PF
3133 *
3134 * Returns 0 on success
3135 */
3136static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3137 struct ethtool_rxnfc *cmd)
3138{
3139 struct ethtool_rx_flow_spec *fsp =
3140 (struct ethtool_rx_flow_spec *)&cmd->fs;
3141 struct i40e_pf *pf = vsi->back;
3142 int ret = 0;
3143
3144 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3145 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3146 return -EBUSY;
3147
3148 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3149 return -EBUSY;
3150
3151 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
3152
3153 i40e_prune_flex_pit_list(pf);
3154
3155 i40e_fdir_check_and_reenable(pf);
3156 return ret;
3157}
3158
3159/**
3160 * i40e_unused_pit_index - Find an unused PIT index for given list
3161 * @pf: the PF data structure
3162 *
3163 * Find the first unused flexible PIT index entry. We search both the L3 and
3164 * L4 flexible PIT lists so that the returned index is unique and unused by
3165 * either currently programmed L3 or L4 filters. We use a bit field as storage
3166 * to track which indexes are already used.
3167 **/
3168static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3169{
3170 unsigned long available_index = 0xFF;
3171 struct i40e_flex_pit *entry;
3172
3173 /* We need to make sure that the new index isn't in use by either L3
3174 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3175 * L4 to use the same index.
3176 */
3177
3178 list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3179 clear_bit(entry->pit_index, &available_index);
3180
3181 list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3182 clear_bit(entry->pit_index, &available_index);
3183
3184 return find_first_bit(&available_index, 8);
3185}
3186
3187/**
3188 * i40e_find_flex_offset - Find an existing flex src_offset
3189 * @flex_pit_list: L3 or L4 flex PIT list
3190 * @src_offset: new src_offset to find
3191 *
3192 * Searches the flex_pit_list for an existing offset. If no offset is
3193 * currently programmed, then this will return an ERR_PTR if there is no space
3194 * to add a new offset, otherwise it returns NULL.
3195 **/
3196static
3197struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3198 u16 src_offset)
3199{
3200 struct i40e_flex_pit *entry;
3201 int size = 0;
3202
3203 /* Search for the src_offset first. If we find a matching entry
3204 * already programmed, we can simply re-use it.
3205 */
3206 list_for_each_entry(entry, flex_pit_list, list) {
3207 size++;
3208 if (entry->src_offset == src_offset)
3209 return entry;
3210 }
3211
3212 /* If we haven't found an entry yet, then the provided src offset has
3213 * not yet been programmed. We will program the src offset later on,
3214 * but we need to indicate whether there is enough space to do so
3215 * here. We'll make use of ERR_PTR for this purpose.
3216 */
3217 if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3218 return ERR_PTR(-ENOSPC);
3219
3220 return NULL;
3221}
3222
3223/**
3224 * i40e_add_flex_offset - Add src_offset to flex PIT table list
3225 * @flex_pit_list: L3 or L4 flex PIT list
3226 * @src_offset: new src_offset to add
3227 * @pit_index: the PIT index to program
3228 *
3229 * This function programs the new src_offset to the list. It is expected that
3230 * i40e_find_flex_offset has already been tried and returned NULL, indicating
3231 * that this offset is not programmed, and that the list has enough space to
3232 * store another offset.
3233 *
3234 * Returns 0 on success, and negative value on error.
3235 **/
3236static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3237 u16 src_offset,
3238 u8 pit_index)
3239{
3240 struct i40e_flex_pit *new_pit, *entry;
3241
3242 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3243 if (!new_pit)
3244 return -ENOMEM;
3245
3246 new_pit->src_offset = src_offset;
3247 new_pit->pit_index = pit_index;
3248
3249 /* We need to insert this item such that the list is sorted by
3250 * src_offset in ascending order.
3251 */
3252 list_for_each_entry(entry, flex_pit_list, list) {
3253 if (new_pit->src_offset < entry->src_offset) {
3254 list_add_tail(&new_pit->list, &entry->list);
3255 return 0;
3256 }
3257
3258 /* If we found an entry with our offset already programmed we
3259 * can simply return here, after freeing the memory. However,
3260 * if the pit_index does not match we need to report an error.
3261 */
3262 if (new_pit->src_offset == entry->src_offset) {
3263 int err = 0;
3264
3265 /* If the PIT index is not the same we can't re-use
3266 * the entry, so we must report an error.
3267 */
3268 if (new_pit->pit_index != entry->pit_index)
3269 err = -EINVAL;
3270
3271 kfree(new_pit);
3272 return err;
3273 }
3274 }
3275
3276 /* If we reached here, then we haven't yet added the item. This means
3277 * that we should add the item at the end of the list.
3278 */
3279 list_add_tail(&new_pit->list, flex_pit_list);
3280 return 0;
3281}
3282
3283/**
3284 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
3285 * @pf: Pointer to the PF structure
3286 * @flex_pit_list: list of flexible src offsets in use
3287 * #flex_pit_start: index to first entry for this section of the table
3288 *
3289 * In order to handle flexible data, the hardware uses a table of values
3290 * called the FLX_PIT table. This table is used to indicate which sections of
3291 * the input correspond to what PIT index values. Unfortunately, hardware is
3292 * very restrictive about programming this table. Entries must be ordered by
3293 * src_offset in ascending order, without duplicates. Additionally, unused
3294 * entries must be set to the unused index value, and must have valid size and
3295 * length according to the src_offset ordering.
3296 *
3297 * This function will reprogram the FLX_PIT register from a book-keeping
3298 * structure that we guarantee is already ordered correctly, and has no more
3299 * than 3 entries.
3300 *
3301 * To make things easier, we only support flexible values of one word length,
3302 * rather than allowing variable length flexible values.
3303 **/
3304static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
3305 struct list_head *flex_pit_list,
3306 int flex_pit_start)
3307{
3308 struct i40e_flex_pit *entry = NULL;
3309 u16 last_offset = 0;
3310 int i = 0, j = 0;
3311
3312 /* First, loop over the list of flex PIT entries, and reprogram the
3313 * registers.
3314 */
3315 list_for_each_entry(entry, flex_pit_list, list) {
3316 /* We have to be careful when programming values for the
3317 * largest SRC_OFFSET value. It is possible that adding
3318 * additional empty values at the end would overflow the space
3319 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
3320 * we check here and add the empty values prior to adding the
3321 * largest value.
3322 *
3323 * To determine this, we will use a loop from i+1 to 3, which
3324 * will determine whether the unused entries would have valid
3325 * SRC_OFFSET. Note that there cannot be extra entries past
3326 * this value, because the only valid values would have been
3327 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
3328 * have been added to the list in the first place.
3329 */
3330 for (j = i + 1; j < 3; j++) {
3331 u16 offset = entry->src_offset + j;
3332 int index = flex_pit_start + i;
3333 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3334 1,
3335 offset - 3);
3336
3337 if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
3338 i40e_write_rx_ctl(&pf->hw,
3339 I40E_PRTQF_FLX_PIT(index),
3340 value);
3341 i++;
3342 }
3343 }
3344
3345 /* Now, we can program the actual value into the table */
3346 i40e_write_rx_ctl(&pf->hw,
3347 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3348 I40E_FLEX_PREP_VAL(entry->pit_index + 50,
3349 1,
3350 entry->src_offset));
3351 i++;
3352 }
3353
3354 /* In order to program the last entries in the table, we need to
3355 * determine the valid offset. If the list is empty, we'll just start
3356 * with 0. Otherwise, we'll start with the last item offset and add 1.
3357 * This ensures that all entries have valid sizes. If we don't do this
3358 * correctly, the hardware will disable flexible field parsing.
3359 */
3360 if (!list_empty(flex_pit_list))
3361 last_offset = list_prev_entry(entry, list)->src_offset + 1;
3362
3363 for (; i < 3; i++, last_offset++) {
3364 i40e_write_rx_ctl(&pf->hw,
3365 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3366 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3367 1,
3368 last_offset));
3369 }
3370}
3371
3372/**
3373 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
3374 * @pf: pointer to the PF structure
3375 *
3376 * This function reprograms both the L3 and L4 FLX_PIT tables. See the
3377 * internal helper function for implementation details.
3378 **/
3379static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
3380{
3381 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
3382 I40E_FLEX_PIT_IDX_START_L3);
3383
3384 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
3385 I40E_FLEX_PIT_IDX_START_L4);
3386
3387 /* We also need to program the L3 and L4 GLQF ORT register */
3388 i40e_write_rx_ctl(&pf->hw,
3389 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
3390 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
3391 3, 1));
3392
3393 i40e_write_rx_ctl(&pf->hw,
3394 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
3395 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
3396 3, 1));
3397}
3398
3399/**
3400 * i40e_flow_str - Converts a flow_type into a human readable string
3401 * @flow_type: the flow type from a flow specification
3402 *
3403 * Currently only flow types we support are included here, and the string
3404 * value attempts to match what ethtool would use to configure this flow type.
3405 **/
3406static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
3407{
3408 switch (fsp->flow_type & ~FLOW_EXT) {
3409 case TCP_V4_FLOW:
3410 return "tcp4";
3411 case UDP_V4_FLOW:
3412 return "udp4";
3413 case SCTP_V4_FLOW:
3414 return "sctp4";
3415 case IP_USER_FLOW:
3416 return "ip4";
3417 default:
3418 return "unknown";
3419 }
3420}
3421
3422/**
3423 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
3424 * @pit_index: PIT index to convert
3425 *
3426 * Returns the mask for a given PIT index. Will return 0 if the pit_index is
3427 * of range.
3428 **/
3429static u64 i40e_pit_index_to_mask(int pit_index)
3430{
3431 switch (pit_index) {
3432 case 0:
3433 return I40E_FLEX_50_MASK;
3434 case 1:
3435 return I40E_FLEX_51_MASK;
3436 case 2:
3437 return I40E_FLEX_52_MASK;
3438 case 3:
3439 return I40E_FLEX_53_MASK;
3440 case 4:
3441 return I40E_FLEX_54_MASK;
3442 case 5:
3443 return I40E_FLEX_55_MASK;
3444 case 6:
3445 return I40E_FLEX_56_MASK;
3446 case 7:
3447 return I40E_FLEX_57_MASK;
3448 default:
3449 return 0;
3450 }
3451}
3452
3453/**
3454 * i40e_print_input_set - Show changes between two input sets
3455 * @vsi: the vsi being configured
3456 * @old: the old input set
3457 * @new: the new input set
3458 *
3459 * Print the difference between old and new input sets by showing which series
3460 * of words are toggled on or off. Only displays the bits we actually support
3461 * changing.
3462 **/
3463static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
3464{
3465 struct i40e_pf *pf = vsi->back;
3466 bool old_value, new_value;
3467 int i;
3468
3469 old_value = !!(old & I40E_L3_SRC_MASK);
3470 new_value = !!(new & I40E_L3_SRC_MASK);
3471 if (old_value != new_value)
3472 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
3473 old_value ? "ON" : "OFF",
3474 new_value ? "ON" : "OFF");
3475
3476 old_value = !!(old & I40E_L3_DST_MASK);
3477 new_value = !!(new & I40E_L3_DST_MASK);
3478 if (old_value != new_value)
3479 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
3480 old_value ? "ON" : "OFF",
3481 new_value ? "ON" : "OFF");
3482
3483 old_value = !!(old & I40E_L4_SRC_MASK);
3484 new_value = !!(new & I40E_L4_SRC_MASK);
3485 if (old_value != new_value)
3486 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
3487 old_value ? "ON" : "OFF",
3488 new_value ? "ON" : "OFF");
3489
3490 old_value = !!(old & I40E_L4_DST_MASK);
3491 new_value = !!(new & I40E_L4_DST_MASK);
3492 if (old_value != new_value)
3493 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
3494 old_value ? "ON" : "OFF",
3495 new_value ? "ON" : "OFF");
3496
3497 old_value = !!(old & I40E_VERIFY_TAG_MASK);
3498 new_value = !!(new & I40E_VERIFY_TAG_MASK);
3499 if (old_value != new_value)
3500 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
3501 old_value ? "ON" : "OFF",
3502 new_value ? "ON" : "OFF");
3503
3504 /* Show change of flexible filter entries */
3505 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
3506 u64 flex_mask = i40e_pit_index_to_mask(i);
3507
3508 old_value = !!(old & flex_mask);
3509 new_value = !!(new & flex_mask);
3510 if (old_value != new_value)
3511 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
3512 i,
3513 old_value ? "ON" : "OFF",
3514 new_value ? "ON" : "OFF");
3515 }
3516
3517 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
3518 old);
3519 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
3520 new);
3521}
3522
3523/**
3524 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
3525 * @vsi: pointer to the targeted VSI
3526 * @fsp: pointer to Rx flow specification
3527 * @userdef: userdefined data from flow specification
3528 *
3529 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
3530 * for partial matches exists with a few limitations. First, hardware only
3531 * supports masking by word boundary (2 bytes) and not per individual bit.
3532 * Second, hardware is limited to using one mask for a flow type and cannot
3533 * use a separate mask for each filter.
3534 *
3535 * To support these limitations, if we already have a configured filter for
3536 * the specified type, this function enforces that new filters of the type
3537 * match the configured input set. Otherwise, if we do not have a filter of
3538 * the specified type, we allow the input set to be updated to match the
3539 * desired filter.
3540 *
3541 * To help ensure that administrators understand why filters weren't displayed
3542 * as supported, we print a diagnostic message displaying how the input set
3543 * would change and warning to delete the preexisting filters if required.
3544 *
3545 * Returns 0 on successful input set match, and a negative return code on
3546 * failure.
3547 **/
3548static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
3549 struct ethtool_rx_flow_spec *fsp,
3550 struct i40e_rx_flow_userdef *userdef)
3551{
3552 struct i40e_pf *pf = vsi->back;
3553 struct ethtool_tcpip4_spec *tcp_ip4_spec;
3554 struct ethtool_usrip4_spec *usr_ip4_spec;
3555 u64 current_mask, new_mask;
3556 bool new_flex_offset = false;
3557 bool flex_l3 = false;
3558 u16 *fdir_filter_count;
3559 u16 index, src_offset = 0;
3560 u8 pit_index = 0;
3561 int err;
3562
3563 switch (fsp->flow_type & ~FLOW_EXT) {
3564 case SCTP_V4_FLOW:
3565 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3566 fdir_filter_count = &pf->fd_sctp4_filter_cnt;
3567 break;
3568 case TCP_V4_FLOW:
3569 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3570 fdir_filter_count = &pf->fd_tcp4_filter_cnt;
3571 break;
3572 case UDP_V4_FLOW:
3573 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3574 fdir_filter_count = &pf->fd_udp4_filter_cnt;
3575 break;
3576 case IP_USER_FLOW:
3577 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
3578 fdir_filter_count = &pf->fd_ip4_filter_cnt;
3579 flex_l3 = true;
3580 break;
3581 default:
3582 return -EOPNOTSUPP;
3583 }
3584
3585 /* Read the current input set from register memory. */
3586 current_mask = i40e_read_fd_input_set(pf, index);
3587 new_mask = current_mask;
3588
3589 /* Determine, if any, the required changes to the input set in order
3590 * to support the provided mask.
3591 *
3592 * Hardware only supports masking at word (2 byte) granularity and does
3593 * not support full bitwise masking. This implementation simplifies
3594 * even further and only supports fully enabled or fully disabled
3595 * masks for each field, even though we could split the ip4src and
3596 * ip4dst fields.
3597 */
3598 switch (fsp->flow_type & ~FLOW_EXT) {
3599 case SCTP_V4_FLOW:
3600 new_mask &= ~I40E_VERIFY_TAG_MASK;
3601 /* Fall through */
3602 case TCP_V4_FLOW:
3603 case UDP_V4_FLOW:
3604 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
3605
3606 /* IPv4 source address */
3607 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3608 new_mask |= I40E_L3_SRC_MASK;
3609 else if (!tcp_ip4_spec->ip4src)
3610 new_mask &= ~I40E_L3_SRC_MASK;
3611 else
3612 return -EOPNOTSUPP;
3613
3614 /* IPv4 destination address */
3615 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3616 new_mask |= I40E_L3_DST_MASK;
3617 else if (!tcp_ip4_spec->ip4dst)
3618 new_mask &= ~I40E_L3_DST_MASK;
3619 else
3620 return -EOPNOTSUPP;
3621
3622 /* L4 source port */
3623 if (tcp_ip4_spec->psrc == htons(0xFFFF))
3624 new_mask |= I40E_L4_SRC_MASK;
3625 else if (!tcp_ip4_spec->psrc)
3626 new_mask &= ~I40E_L4_SRC_MASK;
3627 else
3628 return -EOPNOTSUPP;
3629
3630 /* L4 destination port */
3631 if (tcp_ip4_spec->pdst == htons(0xFFFF))
3632 new_mask |= I40E_L4_DST_MASK;
3633 else if (!tcp_ip4_spec->pdst)
3634 new_mask &= ~I40E_L4_DST_MASK;
3635 else
3636 return -EOPNOTSUPP;
3637
3638 /* Filtering on Type of Service is not supported. */
3639 if (tcp_ip4_spec->tos)
3640 return -EOPNOTSUPP;
3641
3642 break;
3643 case IP_USER_FLOW:
3644 usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
3645
3646 /* IPv4 source address */
3647 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3648 new_mask |= I40E_L3_SRC_MASK;
3649 else if (!usr_ip4_spec->ip4src)
3650 new_mask &= ~I40E_L3_SRC_MASK;
3651 else
3652 return -EOPNOTSUPP;
3653
3654 /* IPv4 destination address */
3655 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3656 new_mask |= I40E_L3_DST_MASK;
3657 else if (!usr_ip4_spec->ip4dst)
3658 new_mask &= ~I40E_L3_DST_MASK;
3659 else
3660 return -EOPNOTSUPP;
3661
3662 /* First 4 bytes of L4 header */
3663 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF))
3664 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK;
3665 else if (!usr_ip4_spec->l4_4_bytes)
3666 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
3667 else
3668 return -EOPNOTSUPP;
3669
3670 /* Filtering on Type of Service is not supported. */
3671 if (usr_ip4_spec->tos)
3672 return -EOPNOTSUPP;
3673
3674 /* Filtering on IP version is not supported */
3675 if (usr_ip4_spec->ip_ver)
3676 return -EINVAL;
3677
3678 /* Filtering on L4 protocol is not supported */
3679 if (usr_ip4_spec->proto)
3680 return -EINVAL;
3681
3682 break;
3683 default:
3684 return -EOPNOTSUPP;
3685 }
3686
3687 /* First, clear all flexible filter entries */
3688 new_mask &= ~I40E_FLEX_INPUT_MASK;
3689
3690 /* If we have a flexible filter, try to add this offset to the correct
3691 * flexible filter PIT list. Once finished, we can update the mask.
3692 * If the src_offset changed, we will get a new mask value which will
3693 * trigger an input set change.
3694 */
3695 if (userdef->flex_filter) {
3696 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
3697
3698 /* Flexible offset must be even, since the flexible payload
3699 * must be aligned on 2-byte boundary.
3700 */
3701 if (userdef->flex_offset & 0x1) {
3702 dev_warn(&pf->pdev->dev,
3703 "Flexible data offset must be 2-byte aligned\n");
3704 return -EINVAL;
3705 }
3706
3707 src_offset = userdef->flex_offset >> 1;
3708
3709 /* FLX_PIT source offset value is only so large */
3710 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
3711 dev_warn(&pf->pdev->dev,
3712 "Flexible data must reside within first 64 bytes of the packet payload\n");
3713 return -EINVAL;
3714 }
3715
3716 /* See if this offset has already been programmed. If we get
3717 * an ERR_PTR, then the filter is not safe to add. Otherwise,
3718 * if we get a NULL pointer, this means we will need to add
3719 * the offset.
3720 */
3721 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
3722 src_offset);
3723 if (IS_ERR(flex_pit))
3724 return PTR_ERR(flex_pit);
3725
3726 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
3727 * packet types, and thus we need to program both L3 and L4
3728 * flexible values. These must have identical flexible index,
3729 * as otherwise we can't correctly program the input set. So
3730 * we'll find both an L3 and L4 index and make sure they are
3731 * the same.
3732 */
3733 if (flex_l3) {
3734 l3_flex_pit =
3735 i40e_find_flex_offset(&pf->l3_flex_pit_list,
3736 src_offset);
3737 if (IS_ERR(l3_flex_pit))
3738 return PTR_ERR(l3_flex_pit);
3739
3740 if (flex_pit) {
3741 /* If we already had a matching L4 entry, we
3742 * need to make sure that the L3 entry we
3743 * obtained uses the same index.
3744 */
3745 if (l3_flex_pit) {
3746 if (l3_flex_pit->pit_index !=
3747 flex_pit->pit_index) {
3748 return -EINVAL;
3749 }
3750 } else {
3751 new_flex_offset = true;
3752 }
3753 } else {
3754 flex_pit = l3_flex_pit;
3755 }
3756 }
3757
3758 /* If we didn't find an existing flex offset, we need to
3759 * program a new one. However, we don't immediately program it
3760 * here because we will wait to program until after we check
3761 * that it is safe to change the input set.
3762 */
3763 if (!flex_pit) {
3764 new_flex_offset = true;
3765 pit_index = i40e_unused_pit_index(pf);
3766 } else {
3767 pit_index = flex_pit->pit_index;
3768 }
3769
3770 /* Update the mask with the new offset */
3771 new_mask |= i40e_pit_index_to_mask(pit_index);
3772 }
3773
3774 /* If the mask and flexible filter offsets for this filter match the
3775 * currently programmed values we don't need any input set change, so
3776 * this filter is safe to install.
3777 */
3778 if (new_mask == current_mask && !new_flex_offset)
3779 return 0;
3780
3781 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
3782 i40e_flow_str(fsp));
3783 i40e_print_input_set(vsi, current_mask, new_mask);
3784 if (new_flex_offset) {
3785 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
3786 pit_index, src_offset);
3787 }
3788
3789 /* Hardware input sets are global across multiple ports, so even the
3790 * main port cannot change them when in MFP mode as this would impact
3791 * any filters on the other ports.
3792 */
3793 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3794 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
3795 return -EOPNOTSUPP;
3796 }
3797
3798 /* This filter requires us to update the input set. However, hardware
3799 * only supports one input set per flow type, and does not support
3800 * separate masks for each filter. This means that we can only support
3801 * a single mask for all filters of a specific type.
3802 *
3803 * If we have preexisting filters, they obviously depend on the
3804 * current programmed input set. Display a diagnostic message in this
3805 * case explaining why the filter could not be accepted.
3806 */
3807 if (*fdir_filter_count) {
3808 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
3809 i40e_flow_str(fsp),
3810 *fdir_filter_count);
3811 return -EOPNOTSUPP;
3812 }
3813
3814 i40e_write_fd_input_set(pf, index, new_mask);
3815
3816 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
3817 * frames. If we're programming the input set for IPv4/Other, we also
3818 * need to program the IPv4/Fragmented input set. Since we don't have
3819 * separate support, we'll always assume and enforce that the two flow
3820 * types must have matching input sets.
3821 */
3822 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
3823 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
3824 new_mask);
3825
3826 /* Add the new offset and update table, if necessary */
3827 if (new_flex_offset) {
3828 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
3829 pit_index);
3830 if (err)
3831 return err;
3832
3833 if (flex_l3) {
3834 err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
3835 src_offset,
3836 pit_index);
3837 if (err)
3838 return err;
3839 }
3840
3841 i40e_reprogram_flex_pit(pf);
3842 }
3843
3844 return 0;
3845}
3846
3847/**
3848 * i40e_match_fdir_filter - Return true of two filters match
3849 * @a: pointer to filter struct
3850 * @b: pointer to filter struct
3851 *
3852 * Returns true if the two filters match exactly the same criteria. I.e. they
3853 * match the same flow type and have the same parameters. We don't need to
3854 * check any input-set since all filters of the same flow type must use the
3855 * same input set.
3856 **/
3857static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a,
3858 struct i40e_fdir_filter *b)
3859{
3860 /* The filters do not much if any of these criteria differ. */
3861 if (a->dst_ip != b->dst_ip ||
3862 a->src_ip != b->src_ip ||
3863 a->dst_port != b->dst_port ||
3864 a->src_port != b->src_port ||
3865 a->flow_type != b->flow_type ||
3866 a->ip4_proto != b->ip4_proto)
3867 return false;
3868
3869 return true;
3870}
3871
3872/**
3873 * i40e_disallow_matching_filters - Check that new filters differ
3874 * @vsi: pointer to the targeted VSI
3875 * @input: new filter to check
3876 *
3877 * Due to hardware limitations, it is not possible for two filters that match
3878 * similar criteria to be programmed at the same time. This is true for a few
3879 * reasons:
3880 *
3881 * (a) all filters matching a particular flow type must use the same input
3882 * set, that is they must match the same criteria.
3883 * (b) different flow types will never match the same packet, as the flow type
3884 * is decided by hardware before checking which rules apply.
3885 * (c) hardware has no way to distinguish which order filters apply in.
3886 *
3887 * Due to this, we can't really support using the location data to order
3888 * filters in the hardware parsing. It is technically possible for the user to
3889 * request two filters matching the same criteria but which select different
3890 * queues. In this case, rather than keep both filters in the list, we reject
3891 * the 2nd filter when the user requests adding it.
3892 *
3893 * This avoids needing to track location for programming the filter to
3894 * hardware, and ensures that we avoid some strange scenarios involving
3895 * deleting filters which match the same criteria.
3896 **/
3897static int i40e_disallow_matching_filters(struct i40e_vsi *vsi,
3898 struct i40e_fdir_filter *input)
3899{
3900 struct i40e_pf *pf = vsi->back;
3901 struct i40e_fdir_filter *rule;
3902 struct hlist_node *node2;
3903
3904 /* Loop through every filter, and check that it doesn't match */
3905 hlist_for_each_entry_safe(rule, node2,
3906 &pf->fdir_filter_list, fdir_node) {
3907 /* Don't check the filters match if they share the same fd_id,
3908 * since the new filter is actually just updating the target
3909 * of the old filter.
3910 */
3911 if (rule->fd_id == input->fd_id)
3912 continue;
3913
3914 /* If any filters match, then print a warning message to the
3915 * kernel message buffer and bail out.
3916 */
3917 if (i40e_match_fdir_filter(rule, input)) {
3918 dev_warn(&pf->pdev->dev,
3919 "Existing user defined filter %d already matches this flow.\n",
3920 rule->fd_id);
3921 return -EINVAL;
3922 }
3923 }
3924
3925 return 0;
3926}
3927
3928/**
3929 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
3930 * @vsi: pointer to the targeted VSI
3931 * @cmd: command to get or set RX flow classification rules
3932 *
3933 * Add Flow Director filters for a specific flow spec based on their
3934 * protocol. Returns 0 if the filters were successfully added.
3935 **/
3936static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
3937 struct ethtool_rxnfc *cmd)
3938{
3939 struct i40e_rx_flow_userdef userdef;
3940 struct ethtool_rx_flow_spec *fsp;
3941 struct i40e_fdir_filter *input;
3942 u16 dest_vsi = 0, q_index = 0;
3943 struct i40e_pf *pf;
3944 int ret = -EINVAL;
3945 u8 dest_ctl;
3946
3947 if (!vsi)
3948 return -EINVAL;
3949 pf = vsi->back;
3950
3951 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3952 return -EOPNOTSUPP;
3953
3954 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
3955 return -ENOSPC;
3956
3957 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3958 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3959 return -EBUSY;
3960
3961 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3962 return -EBUSY;
3963
3964 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
3965
3966 /* Parse the user-defined field */
3967 if (i40e_parse_rx_flow_user_data(fsp, &userdef))
3968 return -EINVAL;
3969
3970 /* Extended MAC field is not supported */
3971 if (fsp->flow_type & FLOW_MAC_EXT)
3972 return -EINVAL;
3973
3974 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
3975 if (ret)
3976 return ret;
3977
3978 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
3979 pf->hw.func_caps.fd_filters_guaranteed)) {
3980 return -EINVAL;
3981 }
3982
3983 /* ring_cookie is either the drop index, or is a mask of the queue
3984 * index and VF id we wish to target.
3985 */
3986 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
3987 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
3988 } else {
3989 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
3990 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
3991
3992 if (!vf) {
3993 if (ring >= vsi->num_queue_pairs)
3994 return -EINVAL;
3995 dest_vsi = vsi->id;
3996 } else {
3997 /* VFs are zero-indexed, so we subtract one here */
3998 vf--;
3999
4000 if (vf >= pf->num_alloc_vfs)
4001 return -EINVAL;
4002 if (ring >= pf->vf[vf].num_queue_pairs)
4003 return -EINVAL;
4004 dest_vsi = pf->vf[vf].lan_vsi_id;
4005 }
4006 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
4007 q_index = ring;
4008 }
4009
4010 input = kzalloc(sizeof(*input), GFP_KERNEL);
4011
4012 if (!input)
4013 return -ENOMEM;
4014
4015 input->fd_id = fsp->location;
4016 input->q_index = q_index;
4017 input->dest_vsi = dest_vsi;
4018 input->dest_ctl = dest_ctl;
4019 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
4020 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
4021 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4022 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4023 input->flow_type = fsp->flow_type & ~FLOW_EXT;
4024 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
4025
4026 /* Reverse the src and dest notion, since the HW expects them to be from
4027 * Tx perspective where as the input from user is from Rx filter view.
4028 */
4029 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
4030 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
4031 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4032 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4033
4034 if (userdef.flex_filter) {
4035 input->flex_filter = true;
4036 input->flex_word = cpu_to_be16(userdef.flex_word);
4037 input->flex_offset = userdef.flex_offset;
4038 }
4039
4040 /* Avoid programming two filters with identical match criteria. */
4041 ret = i40e_disallow_matching_filters(vsi, input);
4042 if (ret)
4043 goto free_filter_memory;
4044
4045 /* Add the input filter to the fdir_input_list, possibly replacing
4046 * a previous filter. Do not free the input structure after adding it
4047 * to the list as this would cause a use-after-free bug.
4048 */
4049 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
4050 ret = i40e_add_del_fdir(vsi, input, true);
4051 if (ret)
4052 goto remove_sw_rule;
4053 return 0;
4054
4055remove_sw_rule:
4056 hlist_del(&input->fdir_node);
4057 pf->fdir_pf_active_filters--;
4058free_filter_memory:
4059 kfree(input);
4060 return ret;
4061}
4062
4063/**
4064 * i40e_set_rxnfc - command to set RX flow classification rules
4065 * @netdev: network interface device structure
4066 * @cmd: ethtool rxnfc command
4067 *
4068 * Returns Success if the command is supported.
4069 **/
4070static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
4071{
4072 struct i40e_netdev_priv *np = netdev_priv(netdev);
4073 struct i40e_vsi *vsi = np->vsi;
4074 struct i40e_pf *pf = vsi->back;
4075 int ret = -EOPNOTSUPP;
4076
4077 switch (cmd->cmd) {
4078 case ETHTOOL_SRXFH:
4079 ret = i40e_set_rss_hash_opt(pf, cmd);
4080 break;
4081 case ETHTOOL_SRXCLSRLINS:
4082 ret = i40e_add_fdir_ethtool(vsi, cmd);
4083 break;
4084 case ETHTOOL_SRXCLSRLDEL:
4085 ret = i40e_del_fdir_entry(vsi, cmd);
4086 break;
4087 default:
4088 break;
4089 }
4090
4091 return ret;
4092}
4093
4094/**
4095 * i40e_max_channels - get Max number of combined channels supported
4096 * @vsi: vsi pointer
4097 **/
4098static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
4099{
4100 /* TODO: This code assumes DCB and FD is disabled for now. */
4101 return vsi->alloc_queue_pairs;
4102}
4103
4104/**
4105 * i40e_get_channels - Get the current channels enabled and max supported etc.
4106 * @netdev: network interface device structure
4107 * @ch: ethtool channels structure
4108 *
4109 * We don't support separate tx and rx queues as channels. The other count
4110 * represents how many queues are being used for control. max_combined counts
4111 * how many queue pairs we can support. They may not be mapped 1 to 1 with
4112 * q_vectors since we support a lot more queue pairs than q_vectors.
4113 **/
4114static void i40e_get_channels(struct net_device *dev,
4115 struct ethtool_channels *ch)
4116{
4117 struct i40e_netdev_priv *np = netdev_priv(dev);
4118 struct i40e_vsi *vsi = np->vsi;
4119 struct i40e_pf *pf = vsi->back;
4120
4121 /* report maximum channels */
4122 ch->max_combined = i40e_max_channels(vsi);
4123
4124 /* report info for other vector */
4125 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
4126 ch->max_other = ch->other_count;
4127
4128 /* Note: This code assumes DCB is disabled for now. */
4129 ch->combined_count = vsi->num_queue_pairs;
4130}
4131
4132/**
4133 * i40e_set_channels - Set the new channels count.
4134 * @netdev: network interface device structure
4135 * @ch: ethtool channels structure
4136 *
4137 * The new channels count may not be the same as requested by the user
4138 * since it gets rounded down to a power of 2 value.
4139 **/
4140static int i40e_set_channels(struct net_device *dev,
4141 struct ethtool_channels *ch)
4142{
4143 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4144 struct i40e_netdev_priv *np = netdev_priv(dev);
4145 unsigned int count = ch->combined_count;
4146 struct i40e_vsi *vsi = np->vsi;
4147 struct i40e_pf *pf = vsi->back;
4148 struct i40e_fdir_filter *rule;
4149 struct hlist_node *node2;
4150 int new_count;
4151 int err = 0;
4152
4153 /* We do not support setting channels for any other VSI at present */
4154 if (vsi->type != I40E_VSI_MAIN)
4155 return -EINVAL;
4156
4157 /* We do not support setting channels via ethtool when TCs are
4158 * configured through mqprio
4159 */
4160 if (pf->flags & I40E_FLAG_TC_MQPRIO)
4161 return -EINVAL;
4162
4163 /* verify they are not requesting separate vectors */
4164 if (!count || ch->rx_count || ch->tx_count)
4165 return -EINVAL;
4166
4167 /* verify other_count has not changed */
4168 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
4169 return -EINVAL;
4170
4171 /* verify the number of channels does not exceed hardware limits */
4172 if (count > i40e_max_channels(vsi))
4173 return -EINVAL;
4174
4175 /* verify that the number of channels does not invalidate any current
4176 * flow director rules
4177 */
4178 hlist_for_each_entry_safe(rule, node2,
4179 &pf->fdir_filter_list, fdir_node) {
4180 if (rule->dest_ctl != drop && count <= rule->q_index) {
4181 dev_warn(&pf->pdev->dev,
4182 "Existing user defined filter %d assigns flow to queue %d\n",
4183 rule->fd_id, rule->q_index);
4184 err = -EINVAL;
4185 }
4186 }
4187
4188 if (err) {
4189 dev_err(&pf->pdev->dev,
4190 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
4191 count);
4192 return err;
4193 }
4194
4195 /* update feature limits from largest to smallest supported values */
4196 /* TODO: Flow director limit, DCB etc */
4197
4198 /* use rss_reconfig to rebuild with new queue count and update traffic
4199 * class queue mapping
4200 */
4201 new_count = i40e_reconfig_rss_queues(pf, count);
4202 if (new_count > 0)
4203 return 0;
4204 else
4205 return -EINVAL;
4206}
4207
4208/**
4209 * i40e_get_rxfh_key_size - get the RSS hash key size
4210 * @netdev: network interface device structure
4211 *
4212 * Returns the table size.
4213 **/
4214static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
4215{
4216 return I40E_HKEY_ARRAY_SIZE;
4217}
4218
4219/**
4220 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
4221 * @netdev: network interface device structure
4222 *
4223 * Returns the table size.
4224 **/
4225static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
4226{
4227 return I40E_HLUT_ARRAY_SIZE;
4228}
4229
4230/**
4231 * i40e_get_rxfh - get the rx flow hash indirection table
4232 * @netdev: network interface device structure
4233 * @indir: indirection table
4234 * @key: hash key
4235 * @hfunc: hash function
4236 *
4237 * Reads the indirection table directly from the hardware. Returns 0 on
4238 * success.
4239 **/
4240static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
4241 u8 *hfunc)
4242{
4243 struct i40e_netdev_priv *np = netdev_priv(netdev);
4244 struct i40e_vsi *vsi = np->vsi;
4245 u8 *lut, *seed = NULL;
4246 int ret;
4247 u16 i;
4248
4249 if (hfunc)
4250 *hfunc = ETH_RSS_HASH_TOP;
4251
4252 if (!indir)
4253 return 0;
4254
4255 seed = key;
4256 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4257 if (!lut)
4258 return -ENOMEM;
4259 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
4260 if (ret)
4261 goto out;
4262 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4263 indir[i] = (u32)(lut[i]);
4264
4265out:
4266 kfree(lut);
4267
4268 return ret;
4269}
4270
4271/**
4272 * i40e_set_rxfh - set the rx flow hash indirection table
4273 * @netdev: network interface device structure
4274 * @indir: indirection table
4275 * @key: hash key
4276 *
4277 * Returns -EINVAL if the table specifies an invalid queue id, otherwise
4278 * returns 0 after programming the table.
4279 **/
4280static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
4281 const u8 *key, const u8 hfunc)
4282{
4283 struct i40e_netdev_priv *np = netdev_priv(netdev);
4284 struct i40e_vsi *vsi = np->vsi;
4285 struct i40e_pf *pf = vsi->back;
4286 u8 *seed = NULL;
4287 u16 i;
4288
4289 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
4290 return -EOPNOTSUPP;
4291
4292 if (key) {
4293 if (!vsi->rss_hkey_user) {
4294 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
4295 GFP_KERNEL);
4296 if (!vsi->rss_hkey_user)
4297 return -ENOMEM;
4298 }
4299 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
4300 seed = vsi->rss_hkey_user;
4301 }
4302 if (!vsi->rss_lut_user) {
4303 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4304 if (!vsi->rss_lut_user)
4305 return -ENOMEM;
4306 }
4307
4308 /* Each 32 bits pointed by 'indir' is stored with a lut entry */
4309 if (indir)
4310 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4311 vsi->rss_lut_user[i] = (u8)(indir[i]);
4312 else
4313 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
4314 vsi->rss_size);
4315
4316 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
4317 I40E_HLUT_ARRAY_SIZE);
4318}
4319
4320/**
4321 * i40e_get_priv_flags - report device private flags
4322 * @dev: network interface device structure
4323 *
4324 * The get string set count and the string set should be matched for each
4325 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
4326 * array.
4327 *
4328 * Returns a u32 bitmap of flags.
4329 **/
4330static u32 i40e_get_priv_flags(struct net_device *dev)
4331{
4332 struct i40e_netdev_priv *np = netdev_priv(dev);
4333 struct i40e_vsi *vsi = np->vsi;
4334 struct i40e_pf *pf = vsi->back;
4335 u32 i, j, ret_flags = 0;
4336
4337 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4338 const struct i40e_priv_flags *priv_flags;
4339
4340 priv_flags = &i40e_gstrings_priv_flags[i];
4341
4342 if (priv_flags->flag & pf->flags)
4343 ret_flags |= BIT(i);
4344 }
4345
4346 if (pf->hw.pf_id != 0)
4347 return ret_flags;
4348
4349 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4350 const struct i40e_priv_flags *priv_flags;
4351
4352 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4353
4354 if (priv_flags->flag & pf->flags)
4355 ret_flags |= BIT(i + j);
4356 }
4357
4358 return ret_flags;
4359}
4360
4361/**
4362 * i40e_set_priv_flags - set private flags
4363 * @dev: network interface device structure
4364 * @flags: bit flags to be set
4365 **/
4366static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
4367{
4368 struct i40e_netdev_priv *np = netdev_priv(dev);
4369 struct i40e_vsi *vsi = np->vsi;
4370 struct i40e_pf *pf = vsi->back;
4371 u64 orig_flags, new_flags, changed_flags;
4372 u32 i, j;
4373
4374 orig_flags = READ_ONCE(pf->flags);
4375 new_flags = orig_flags;
4376
4377 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4378 const struct i40e_priv_flags *priv_flags;
4379
4380 priv_flags = &i40e_gstrings_priv_flags[i];
4381
4382 if (flags & BIT(i))
4383 new_flags |= priv_flags->flag;
4384 else
4385 new_flags &= ~(priv_flags->flag);
4386
4387 /* If this is a read-only flag, it can't be changed */
4388 if (priv_flags->read_only &&
4389 ((orig_flags ^ new_flags) & ~BIT(i)))
4390 return -EOPNOTSUPP;
4391 }
4392
4393 if (pf->hw.pf_id != 0)
4394 goto flags_complete;
4395
4396 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4397 const struct i40e_priv_flags *priv_flags;
4398
4399 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4400
4401 if (flags & BIT(i + j))
4402 new_flags |= priv_flags->flag;
4403 else
4404 new_flags &= ~(priv_flags->flag);
4405
4406 /* If this is a read-only flag, it can't be changed */
4407 if (priv_flags->read_only &&
4408 ((orig_flags ^ new_flags) & ~BIT(i)))
4409 return -EOPNOTSUPP;
4410 }
4411
4412flags_complete:
4413 changed_flags = orig_flags ^ new_flags;
4414
4415 /* Before we finalize any flag changes, we need to perform some
4416 * checks to ensure that the changes are supported and safe.
4417 */
4418
4419 /* ATR eviction is not supported on all devices */
4420 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
4421 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
4422 return -EOPNOTSUPP;
4423
4424 /* If the driver detected FW LLDP was disabled on init, this flag could
4425 * be set, however we do not support _changing_ the flag if NPAR is
4426 * enabled or FW API version < 1.7. There are situations where older
4427 * FW versions/NPAR enabled PFs could disable LLDP, however we _must_
4428 * not allow the user to enable/disable LLDP with this flag on
4429 * unsupported FW versions.
4430 */
4431 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
4432 if (!(pf->hw_features & I40E_HW_STOPPABLE_FW_LLDP)) {
4433 dev_warn(&pf->pdev->dev,
4434 "Device does not support changing FW LLDP\n");
4435 return -EOPNOTSUPP;
4436 }
4437 }
4438
4439 /* Now that we've checked to ensure that the new flags are valid, load
4440 * them into place. Since we only modify flags either (a) during
4441 * initialization or (b) while holding the RTNL lock, we don't need
4442 * anything fancy here.
4443 */
4444 pf->flags = new_flags;
4445
4446 /* Process any additional changes needed as a result of flag changes.
4447 * The changed_flags value reflects the list of bits that were
4448 * changed in the code above.
4449 */
4450
4451 /* Flush current ATR settings if ATR was disabled */
4452 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
4453 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) {
4454 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
4455 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
4456 }
4457
4458 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
4459 u16 sw_flags = 0, valid_flags = 0;
4460 int ret;
4461
4462 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
4463 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4464 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4465 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
4466 0, NULL);
4467 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
4468 dev_info(&pf->pdev->dev,
4469 "couldn't set switch config bits, err %s aq_err %s\n",
4470 i40e_stat_str(&pf->hw, ret),
4471 i40e_aq_str(&pf->hw,
4472 pf->hw.aq.asq_last_status));
4473 /* not a fatal problem, just keep going */
4474 }
4475 }
4476
4477 if ((changed_flags & pf->flags &
4478 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED) &&
4479 (pf->flags & I40E_FLAG_MFP_ENABLED))
4480 dev_warn(&pf->pdev->dev,
4481 "Turning on link-down-on-close flag may affect other partitions\n");
4482
4483 if (changed_flags & I40E_FLAG_DISABLE_FW_LLDP) {
4484 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
4485 struct i40e_dcbx_config *dcbcfg;
4486 int i;
4487
4488 i40e_aq_stop_lldp(&pf->hw, true, NULL);
4489 i40e_aq_set_dcb_parameters(&pf->hw, true, NULL);
4490 /* reset local_dcbx_config to default */
4491 dcbcfg = &pf->hw.local_dcbx_config;
4492 dcbcfg->etscfg.willing = 1;
4493 dcbcfg->etscfg.maxtcs = 0;
4494 dcbcfg->etscfg.tcbwtable[0] = 100;
4495 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++)
4496 dcbcfg->etscfg.tcbwtable[i] = 0;
4497 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4498 dcbcfg->etscfg.prioritytable[i] = 0;
4499 dcbcfg->etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
4500 dcbcfg->pfc.willing = 1;
4501 dcbcfg->pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
4502 } else {
4503 i40e_aq_start_lldp(&pf->hw, NULL);
4504 }
4505 }
4506
4507 /* Issue reset to cause things to take effect, as additional bits
4508 * are added we will need to create a mask of bits requiring reset
4509 */
4510 if (changed_flags & (I40E_FLAG_VEB_STATS_ENABLED |
4511 I40E_FLAG_LEGACY_RX |
4512 I40E_FLAG_SOURCE_PRUNING_DISABLED |
4513 I40E_FLAG_DISABLE_FW_LLDP))
4514 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
4515
4516 return 0;
4517}
4518
4519/**
4520 * i40e_get_module_info - get (Q)SFP+ module type info
4521 * @netdev: network interface device structure
4522 * @modinfo: module EEPROM size and layout information structure
4523 **/
4524static int i40e_get_module_info(struct net_device *netdev,
4525 struct ethtool_modinfo *modinfo)
4526{
4527 struct i40e_netdev_priv *np = netdev_priv(netdev);
4528 struct i40e_vsi *vsi = np->vsi;
4529 struct i40e_pf *pf = vsi->back;
4530 struct i40e_hw *hw = &pf->hw;
4531 u32 sff8472_comp = 0;
4532 u32 sff8472_swap = 0;
4533 u32 sff8636_rev = 0;
4534 i40e_status status;
4535 u32 type = 0;
4536
4537 /* Check if firmware supports reading module EEPROM. */
4538 if (!(hw->flags & I40E_HW_FLAG_AQ_PHY_ACCESS_CAPABLE)) {
4539 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
4540 return -EINVAL;
4541 }
4542
4543 status = i40e_update_link_info(hw);
4544 if (status)
4545 return -EIO;
4546
4547 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
4548 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
4549 return -EINVAL;
4550 }
4551
4552 type = hw->phy.link_info.module_type[0];
4553
4554 switch (type) {
4555 case I40E_MODULE_TYPE_SFP:
4556 status = i40e_aq_get_phy_register(hw,
4557 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4558 I40E_I2C_EEPROM_DEV_ADDR,
4559 I40E_MODULE_SFF_8472_COMP,
4560 &sff8472_comp, NULL);
4561 if (status)
4562 return -EIO;
4563
4564 status = i40e_aq_get_phy_register(hw,
4565 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4566 I40E_I2C_EEPROM_DEV_ADDR,
4567 I40E_MODULE_SFF_8472_SWAP,
4568 &sff8472_swap, NULL);
4569 if (status)
4570 return -EIO;
4571
4572 /* Check if the module requires address swap to access
4573 * the other EEPROM memory page.
4574 */
4575 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
4576 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
4577 modinfo->type = ETH_MODULE_SFF_8079;
4578 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
4579 } else if (sff8472_comp == 0x00) {
4580 /* Module is not SFF-8472 compliant */
4581 modinfo->type = ETH_MODULE_SFF_8079;
4582 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
4583 } else {
4584 modinfo->type = ETH_MODULE_SFF_8472;
4585 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
4586 }
4587 break;
4588 case I40E_MODULE_TYPE_QSFP_PLUS:
4589 /* Read from memory page 0. */
4590 status = i40e_aq_get_phy_register(hw,
4591 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4592 0,
4593 I40E_MODULE_REVISION_ADDR,
4594 &sff8636_rev, NULL);
4595 if (status)
4596 return -EIO;
4597 /* Determine revision compliance byte */
4598 if (sff8636_rev > 0x02) {
4599 /* Module is SFF-8636 compliant */
4600 modinfo->type = ETH_MODULE_SFF_8636;
4601 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4602 } else {
4603 modinfo->type = ETH_MODULE_SFF_8436;
4604 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4605 }
4606 break;
4607 case I40E_MODULE_TYPE_QSFP28:
4608 modinfo->type = ETH_MODULE_SFF_8636;
4609 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
4610 break;
4611 default:
4612 netdev_err(vsi->netdev, "Module type unrecognized\n");
4613 return -EINVAL;
4614 }
4615 return 0;
4616}
4617
4618/**
4619 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
4620 * @netdev: network interface device structure
4621 * @ee: EEPROM dump request structure
4622 * @data: buffer to be filled with EEPROM contents
4623 **/
4624static int i40e_get_module_eeprom(struct net_device *netdev,
4625 struct ethtool_eeprom *ee,
4626 u8 *data)
4627{
4628 struct i40e_netdev_priv *np = netdev_priv(netdev);
4629 struct i40e_vsi *vsi = np->vsi;
4630 struct i40e_pf *pf = vsi->back;
4631 struct i40e_hw *hw = &pf->hw;
4632 bool is_sfp = false;
4633 i40e_status status;
4634 u32 value = 0;
4635 int i;
4636
4637 if (!ee || !ee->len || !data)
4638 return -EINVAL;
4639
4640 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
4641 is_sfp = true;
4642
4643 for (i = 0; i < ee->len; i++) {
4644 u32 offset = i + ee->offset;
4645 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
4646
4647 /* Check if we need to access the other memory page */
4648 if (is_sfp) {
4649 if (offset >= ETH_MODULE_SFF_8079_LEN) {
4650 offset -= ETH_MODULE_SFF_8079_LEN;
4651 addr = I40E_I2C_EEPROM_DEV_ADDR2;
4652 }
4653 } else {
4654 while (offset >= ETH_MODULE_SFF_8436_LEN) {
4655 /* Compute memory page number and offset. */
4656 offset -= ETH_MODULE_SFF_8436_LEN / 2;
4657 addr++;
4658 }
4659 }
4660
4661 status = i40e_aq_get_phy_register(hw,
4662 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
4663 addr, offset, &value, NULL);
4664 if (status)
4665 return -EIO;
4666 data[i] = value;
4667 }
4668 return 0;
4669}
4670
4671static const struct ethtool_ops i40e_ethtool_ops = {
4672 .get_drvinfo = i40e_get_drvinfo,
4673 .get_regs_len = i40e_get_regs_len,
4674 .get_regs = i40e_get_regs,
4675 .nway_reset = i40e_nway_reset,
4676 .get_link = ethtool_op_get_link,
4677 .get_wol = i40e_get_wol,
4678 .set_wol = i40e_set_wol,
4679 .set_eeprom = i40e_set_eeprom,
4680 .get_eeprom_len = i40e_get_eeprom_len,
4681 .get_eeprom = i40e_get_eeprom,
4682 .get_ringparam = i40e_get_ringparam,
4683 .set_ringparam = i40e_set_ringparam,
4684 .get_pauseparam = i40e_get_pauseparam,
4685 .set_pauseparam = i40e_set_pauseparam,
4686 .get_msglevel = i40e_get_msglevel,
4687 .set_msglevel = i40e_set_msglevel,
4688 .get_rxnfc = i40e_get_rxnfc,
4689 .set_rxnfc = i40e_set_rxnfc,
4690 .self_test = i40e_diag_test,
4691 .get_strings = i40e_get_strings,
4692 .set_phys_id = i40e_set_phys_id,
4693 .get_sset_count = i40e_get_sset_count,
4694 .get_ethtool_stats = i40e_get_ethtool_stats,
4695 .get_coalesce = i40e_get_coalesce,
4696 .set_coalesce = i40e_set_coalesce,
4697 .get_rxfh_key_size = i40e_get_rxfh_key_size,
4698 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
4699 .get_rxfh = i40e_get_rxfh,
4700 .set_rxfh = i40e_set_rxfh,
4701 .get_channels = i40e_get_channels,
4702 .set_channels = i40e_set_channels,
4703 .get_module_info = i40e_get_module_info,
4704 .get_module_eeprom = i40e_get_module_eeprom,
4705 .get_ts_info = i40e_get_ts_info,
4706 .get_priv_flags = i40e_get_priv_flags,
4707 .set_priv_flags = i40e_set_priv_flags,
4708 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
4709 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
4710 .get_link_ksettings = i40e_get_link_ksettings,
4711 .set_link_ksettings = i40e_set_link_ksettings,
4712};
4713
4714void i40e_set_ethtool_ops(struct net_device *netdev)
4715{
4716 netdev->ethtool_ops = &i40e_ethtool_ops;
4717}