1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * Clock driver for TI Davinci PSC controllers
  4 *
  5 * Copyright (C) 2018 David Lechner <david@lechnology.com>
  6 */
  7
  8#ifndef __CLK_DAVINCI_PSC_H__
  9#define __CLK_DAVINCI_PSC_H__
 10
 11#include <linux/clk-provider.h>
 12#include <linux/types.h>
 13
 14/* PSC quirk flags */
 15#define LPSC_ALWAYS_ENABLED	BIT(0) /* never disable this clock */
 16#define LPSC_SET_RATE_PARENT	BIT(1) /* propagate set_rate to parent clock */
 17#define LPSC_FORCE		BIT(2) /* requires MDCTL FORCE bit */
 18#define LPSC_LOCAL_RESET	BIT(3) /* acts as reset provider */
 19
 20struct davinci_lpsc_clkdev_info {
 21	const char *con_id;
 22	const char *dev_id;
 23};
 24
 25#define LPSC_CLKDEV(c, d) {	\
 26	.con_id = (c),		\
 27	.dev_id = (d)		\
 28}
 29
 30#define LPSC_CLKDEV1(n, c, d) \
 31static const struct davinci_lpsc_clkdev_info n[] __initconst = {	\
 32	LPSC_CLKDEV((c), (d)),						\
 33	{ }								\
 34}
 35
 36#define LPSC_CLKDEV2(n, c1, d1, c2, d2) \
 37static const struct davinci_lpsc_clkdev_info n[] __initconst = {	\
 38	LPSC_CLKDEV((c1), (d1)),					\
 39	LPSC_CLKDEV((c2), (d2)),					\
 40	{ }								\
 41}
 42
 43#define LPSC_CLKDEV3(n, c1, d1, c2, d2, c3, d3) \
 44static const struct davinci_lpsc_clkdev_info n[] __initconst = {	\
 45	LPSC_CLKDEV((c1), (d1)),					\
 46	LPSC_CLKDEV((c2), (d2)),					\
 47	LPSC_CLKDEV((c3), (d3)),					\
 48	{ }								\
 49}
 50
 51/**
 52 * davinci_lpsc_clk_info - LPSC module-specific clock information
 53 * @name: the clock name
 54 * @parent: the parent clock name
 55 * @cdevs: optional array of clkdev lookup table info
 56 * @md: the local module domain (LPSC id)
 57 * @pd: the power domain id
 58 * @flags: bitmask of LPSC_* flags
 59 */
 60struct davinci_lpsc_clk_info {
 61	const char *name;
 62	const char *parent;
 63	const struct davinci_lpsc_clkdev_info *cdevs;
 64	u32 md;
 65	u32 pd;
 66	unsigned long flags;
 67};
 68
 69#define LPSC(m, d, n, p, c, f)	\
 70{				\
 71	.name	= #n,		\
 72	.parent	= #p,		\
 73	.cdevs	= (c),		\
 74	.md	= (m),		\
 75	.pd	= (d),		\
 76	.flags	= (f),		\
 77}
 78
 79int davinci_psc_register_clocks(struct device *dev,
 80				const struct davinci_lpsc_clk_info *info,
 81				u8 num_clks,
 82				void __iomem *base);
 83
 84int of_davinci_psc_clk_init(struct device *dev,
 85			    const struct davinci_lpsc_clk_info *info,
 86			    u8 num_clks,
 87			    void __iomem *base);
 88
 89/* Device-specific data */
 90
 91struct davinci_psc_init_data {
 92	struct clk_bulk_data *parent_clks;
 93	int num_parent_clks;
 94	int (*psc_init)(struct device *dev, void __iomem *base);
 95};
 96
 97extern const struct davinci_psc_init_data da830_psc0_init_data;
 98extern const struct davinci_psc_init_data da830_psc1_init_data;
 99extern const struct davinci_psc_init_data da850_psc0_init_data;
100extern const struct davinci_psc_init_data da850_psc1_init_data;
101extern const struct davinci_psc_init_data of_da850_psc0_init_data;
102extern const struct davinci_psc_init_data of_da850_psc1_init_data;
103extern const struct davinci_psc_init_data dm355_psc_init_data;
104extern const struct davinci_psc_init_data dm365_psc_init_data;
105extern const struct davinci_psc_init_data dm644x_psc_init_data;
106extern const struct davinci_psc_init_data dm646x_psc_init_data;
107
108#endif /* __CLK_DAVINCI_PSC_H__ */