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1#include <linux/io.h>
2#include <linux/memblock.h>
3
4#include <asm/cacheflush.h>
5#include <asm/pgtable.h>
6#include <asm/realmode.h>
7
8struct real_mode_header *real_mode_header;
9u32 *trampoline_cr4_features;
10
11void __init setup_real_mode(void)
12{
13 phys_addr_t mem;
14 u16 real_mode_seg;
15 u32 *rel;
16 u32 count;
17 u32 *ptr;
18 u16 *seg;
19 int i;
20 unsigned char *base;
21 struct trampoline_header *trampoline_header;
22 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
23#ifdef CONFIG_X86_64
24 u64 *trampoline_pgd;
25 u64 efer;
26#endif
27
28 /* Has to be in very low memory so we can execute real-mode AP code. */
29 mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE);
30 if (!mem)
31 panic("Cannot allocate trampoline\n");
32
33 base = __va(mem);
34 memblock_reserve(mem, size);
35 real_mode_header = (struct real_mode_header *) base;
36 printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n",
37 base, (unsigned long long)mem, size);
38
39 memcpy(base, real_mode_blob, size);
40
41 real_mode_seg = __pa(base) >> 4;
42 rel = (u32 *) real_mode_relocs;
43
44 /* 16-bit segment relocations. */
45 count = rel[0];
46 rel = &rel[1];
47 for (i = 0; i < count; i++) {
48 seg = (u16 *) (base + rel[i]);
49 *seg = real_mode_seg;
50 }
51
52 /* 32-bit linear relocations. */
53 count = rel[i];
54 rel = &rel[i + 1];
55 for (i = 0; i < count; i++) {
56 ptr = (u32 *) (base + rel[i]);
57 *ptr += __pa(base);
58 }
59
60 /* Must be perfomed *after* relocation. */
61 trampoline_header = (struct trampoline_header *)
62 __va(real_mode_header->trampoline_header);
63
64#ifdef CONFIG_X86_32
65 trampoline_header->start = __pa(startup_32_smp);
66 trampoline_header->gdt_limit = __BOOT_DS + 7;
67 trampoline_header->gdt_base = __pa(boot_gdt);
68#else
69 /*
70 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
71 * so we need to mask it out.
72 */
73 rdmsrl(MSR_EFER, efer);
74 trampoline_header->efer = efer & ~EFER_LMA;
75
76 trampoline_header->start = (u64) secondary_startup_64;
77 trampoline_cr4_features = &trampoline_header->cr4;
78 *trampoline_cr4_features = read_cr4();
79
80 trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
81 trampoline_pgd[0] = __pa(level3_ident_pgt) + _KERNPG_TABLE;
82 trampoline_pgd[511] = __pa(level3_kernel_pgt) + _KERNPG_TABLE;
83#endif
84}
85
86/*
87 * set_real_mode_permissions() gets called very early, to guarantee the
88 * availability of low memory. This is before the proper kernel page
89 * tables are set up, so we cannot set page permissions in that
90 * function. Thus, we use an arch_initcall instead.
91 */
92static int __init set_real_mode_permissions(void)
93{
94 unsigned char *base = (unsigned char *) real_mode_header;
95 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
96
97 size_t ro_size =
98 PAGE_ALIGN(real_mode_header->ro_end) -
99 __pa(base);
100
101 size_t text_size =
102 PAGE_ALIGN(real_mode_header->ro_end) -
103 real_mode_header->text_start;
104
105 unsigned long text_start =
106 (unsigned long) __va(real_mode_header->text_start);
107
108 set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
109 set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
110 set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
111
112 return 0;
113}
114
115arch_initcall(set_real_mode_permissions);
1// SPDX-License-Identifier: GPL-2.0
2#include <linux/io.h>
3#include <linux/slab.h>
4#include <linux/memblock.h>
5#include <linux/mem_encrypt.h>
6
7#include <asm/set_memory.h>
8#include <asm/pgtable.h>
9#include <asm/realmode.h>
10#include <asm/tlbflush.h>
11
12struct real_mode_header *real_mode_header;
13u32 *trampoline_cr4_features;
14
15/* Hold the pgd entry used on booting additional CPUs */
16pgd_t trampoline_pgd_entry;
17
18void __init set_real_mode_mem(phys_addr_t mem, size_t size)
19{
20 void *base = __va(mem);
21
22 real_mode_header = (struct real_mode_header *) base;
23 printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n",
24 base, (unsigned long long)mem, size);
25}
26
27void __init reserve_real_mode(void)
28{
29 phys_addr_t mem;
30 size_t size = real_mode_size_needed();
31
32 if (!size)
33 return;
34
35 WARN_ON(slab_is_available());
36
37 /* Has to be under 1M so we can execute real-mode AP code. */
38 mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE);
39 if (!mem) {
40 pr_info("No sub-1M memory is available for the trampoline\n");
41 return;
42 }
43
44 memblock_reserve(mem, size);
45 set_real_mode_mem(mem, size);
46}
47
48static void __init setup_real_mode(void)
49{
50 u16 real_mode_seg;
51 const u32 *rel;
52 u32 count;
53 unsigned char *base;
54 unsigned long phys_base;
55 struct trampoline_header *trampoline_header;
56 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
57#ifdef CONFIG_X86_64
58 u64 *trampoline_pgd;
59 u64 efer;
60#endif
61
62 base = (unsigned char *)real_mode_header;
63
64 /*
65 * If SME is active, the trampoline area will need to be in
66 * decrypted memory in order to bring up other processors
67 * successfully. This is not needed for SEV.
68 */
69 if (sme_active())
70 set_memory_decrypted((unsigned long)base, size >> PAGE_SHIFT);
71
72 memcpy(base, real_mode_blob, size);
73
74 phys_base = __pa(base);
75 real_mode_seg = phys_base >> 4;
76
77 rel = (u32 *) real_mode_relocs;
78
79 /* 16-bit segment relocations. */
80 count = *rel++;
81 while (count--) {
82 u16 *seg = (u16 *) (base + *rel++);
83 *seg = real_mode_seg;
84 }
85
86 /* 32-bit linear relocations. */
87 count = *rel++;
88 while (count--) {
89 u32 *ptr = (u32 *) (base + *rel++);
90 *ptr += phys_base;
91 }
92
93 /* Must be perfomed *after* relocation. */
94 trampoline_header = (struct trampoline_header *)
95 __va(real_mode_header->trampoline_header);
96
97#ifdef CONFIG_X86_32
98 trampoline_header->start = __pa_symbol(startup_32_smp);
99 trampoline_header->gdt_limit = __BOOT_DS + 7;
100 trampoline_header->gdt_base = __pa_symbol(boot_gdt);
101#else
102 /*
103 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
104 * so we need to mask it out.
105 */
106 rdmsrl(MSR_EFER, efer);
107 trampoline_header->efer = efer & ~EFER_LMA;
108
109 trampoline_header->start = (u64) secondary_startup_64;
110 trampoline_cr4_features = &trampoline_header->cr4;
111 *trampoline_cr4_features = mmu_cr4_features;
112
113 trampoline_header->flags = 0;
114 if (sme_active())
115 trampoline_header->flags |= TH_FLAGS_SME_ACTIVE;
116
117 trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
118 trampoline_pgd[0] = trampoline_pgd_entry.pgd;
119 trampoline_pgd[511] = init_top_pgt[511].pgd;
120#endif
121}
122
123/*
124 * reserve_real_mode() gets called very early, to guarantee the
125 * availability of low memory. This is before the proper kernel page
126 * tables are set up, so we cannot set page permissions in that
127 * function. Also trampoline code will be executed by APs so we
128 * need to mark it executable at do_pre_smp_initcalls() at least,
129 * thus run it as a early_initcall().
130 */
131static void __init set_real_mode_permissions(void)
132{
133 unsigned char *base = (unsigned char *) real_mode_header;
134 size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
135
136 size_t ro_size =
137 PAGE_ALIGN(real_mode_header->ro_end) -
138 __pa(base);
139
140 size_t text_size =
141 PAGE_ALIGN(real_mode_header->ro_end) -
142 real_mode_header->text_start;
143
144 unsigned long text_start =
145 (unsigned long) __va(real_mode_header->text_start);
146
147 set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
148 set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
149 set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
150}
151
152static int __init init_real_mode(void)
153{
154 if (!real_mode_header)
155 panic("Real mode trampoline was not allocated");
156
157 setup_real_mode();
158 set_real_mode_permissions();
159
160 return 0;
161}
162early_initcall(init_real_mode);