1#ifndef _SPARC_CACHEFLUSH_H
 2#define _SPARC_CACHEFLUSH_H
 3
 4#include <asm/cachetlb_32.h>
 5
 6#define flush_cache_all() \
 7	sparc32_cachetlb_ops->cache_all()
 8#define flush_cache_mm(mm) \
 9	sparc32_cachetlb_ops->cache_mm(mm)
10#define flush_cache_dup_mm(mm) \
11	sparc32_cachetlb_ops->cache_mm(mm)
12#define flush_cache_range(vma,start,end) \
13	sparc32_cachetlb_ops->cache_range(vma, start, end)
14#define flush_cache_page(vma,addr,pfn) \
15	sparc32_cachetlb_ops->cache_page(vma, addr)
16#define flush_icache_range(start, end)		do { } while (0)
17#define flush_icache_page(vma, pg)		do { } while (0)
18
19#define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
20
21#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
22	do {							\
23		flush_cache_page(vma, vaddr, page_to_pfn(page));\
24		memcpy(dst, src, len);				\
25	} while (0)
26#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
27	do {							\
28		flush_cache_page(vma, vaddr, page_to_pfn(page));\
29		memcpy(dst, src, len);				\
30	} while (0)
31
32#define __flush_page_to_ram(addr) \
33	sparc32_cachetlb_ops->page_to_ram(addr)
34#define flush_sig_insns(mm,insn_addr) \
35	sparc32_cachetlb_ops->sig_insns(mm, insn_addr)
36#define flush_page_for_dma(addr) \
37	sparc32_cachetlb_ops->page_for_dma(addr)
38
39extern void sparc_flush_page_to_ram(struct page *page);
40
41#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
42#define flush_dcache_page(page)			sparc_flush_page_to_ram(page)
43#define flush_dcache_mmap_lock(mapping)		do { } while (0)
44#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
45
46#define flush_cache_vmap(start, end)		flush_cache_all()
47#define flush_cache_vunmap(start, end)		flush_cache_all()
48
49/* When a context switch happens we must flush all user windows so that
50 * the windows of the current process are flushed onto its stack. This
51 * way the windows are all clean for the next process and the stack
52 * frames are up to date.
53 */
54extern void flush_user_windows(void);
55extern void kill_user_windows(void);
56extern void flushw_all(void);
57
58#endif /* _SPARC_CACHEFLUSH_H */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2#ifndef _SPARC_CACHEFLUSH_H
 3#define _SPARC_CACHEFLUSH_H
 4
 5#include <asm/cachetlb_32.h>
 6
 7#define flush_cache_all() \
 8	sparc32_cachetlb_ops->cache_all()
 9#define flush_cache_mm(mm) \
10	sparc32_cachetlb_ops->cache_mm(mm)
11#define flush_cache_dup_mm(mm) \
12	sparc32_cachetlb_ops->cache_mm(mm)
13#define flush_cache_range(vma,start,end) \
14	sparc32_cachetlb_ops->cache_range(vma, start, end)
15#define flush_cache_page(vma,addr,pfn) \
16	sparc32_cachetlb_ops->cache_page(vma, addr)
17#define flush_icache_range(start, end)		do { } while (0)
18#define flush_icache_page(vma, pg)		do { } while (0)
19
20#define flush_icache_user_range(vma,pg,adr,len)	do { } while (0)
21
22#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
23	do {							\
24		flush_cache_page(vma, vaddr, page_to_pfn(page));\
25		memcpy(dst, src, len);				\
26	} while (0)
27#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
28	do {							\
29		flush_cache_page(vma, vaddr, page_to_pfn(page));\
30		memcpy(dst, src, len);				\
31	} while (0)
32
33#define __flush_page_to_ram(addr) \
34	sparc32_cachetlb_ops->page_to_ram(addr)
35#define flush_sig_insns(mm,insn_addr) \
36	sparc32_cachetlb_ops->sig_insns(mm, insn_addr)
37#define flush_page_for_dma(addr) \
38	sparc32_cachetlb_ops->page_for_dma(addr)
39
40void sparc_flush_page_to_ram(struct page *page);
41
42#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
43#define flush_dcache_page(page)			sparc_flush_page_to_ram(page)
44#define flush_dcache_mmap_lock(mapping)		do { } while (0)
45#define flush_dcache_mmap_unlock(mapping)	do { } while (0)
46
47#define flush_cache_vmap(start, end)		flush_cache_all()
48#define flush_cache_vunmap(start, end)		flush_cache_all()
49
50/* When a context switch happens we must flush all user windows so that
51 * the windows of the current process are flushed onto its stack. This
52 * way the windows are all clean for the next process and the stack
53 * frames are up to date.
54 */
55void flush_user_windows(void);
56void kill_user_windows(void);
57void flushw_all(void);
58
59#endif /* _SPARC_CACHEFLUSH_H */