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1/*
2 * OMAP2+ common Clock Management (CM) IP block functions
3 *
4 * Copyright (C) 2012 Texas Instruments, Inc.
5 * Paul Walmsley
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * XXX This code should eventually be moved to a CM driver.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/bug.h>
18#include <linux/of.h>
19#include <linux/of_address.h>
20
21#include "cm2xxx.h"
22#include "cm3xxx.h"
23#include "cm33xx.h"
24#include "cm44xx.h"
25#include "clock.h"
26
27/*
28 * cm_ll_data: function pointers to SoC-specific implementations of
29 * common CM functions
30 */
31static struct cm_ll_data null_cm_ll_data;
32static const struct cm_ll_data *cm_ll_data = &null_cm_ll_data;
33
34/* cm_base: base virtual address of the CM IP block */
35struct omap_domain_base cm_base;
36
37/* cm2_base: base virtual address of the CM2 IP block (OMAP44xx only) */
38struct omap_domain_base cm2_base;
39
40#define CM_NO_CLOCKS 0x1
41#define CM_SINGLE_INSTANCE 0x2
42
43/**
44 * omap2_set_globals_cm - set the CM/CM2 base addresses (for early use)
45 * @cm: CM base virtual address
46 * @cm2: CM2 base virtual address (if present on the booted SoC)
47 *
48 * XXX Will be replaced when the PRM/CM drivers are completed.
49 */
50void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
51{
52 cm_base.va = cm;
53 cm2_base.va = cm2;
54}
55
56/**
57 * cm_split_idlest_reg - split CM_IDLEST reg addr into its components
58 * @idlest_reg: CM_IDLEST* virtual address
59 * @prcm_inst: pointer to an s16 to return the PRCM instance offset
60 * @idlest_reg_id: pointer to a u8 to return the CM_IDLESTx register ID
61 *
62 * Given an absolute CM_IDLEST register address @idlest_reg, passes
63 * the PRCM instance offset and IDLEST register ID back to the caller
64 * via the @prcm_inst and @idlest_reg_id. Returns -EINVAL upon error,
65 * or 0 upon success. XXX This function is only needed until absolute
66 * register addresses are removed from the OMAP struct clk records.
67 */
68int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
69 u8 *idlest_reg_id)
70{
71 int ret;
72 if (!cm_ll_data->split_idlest_reg) {
73 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
74 __func__);
75 return -EINVAL;
76 }
77
78 ret = cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
79 idlest_reg_id);
80 *prcm_inst -= cm_base.offset;
81 return ret;
82}
83
84/**
85 * omap_cm_wait_module_ready - wait for a module to leave idle or standby
86 * @part: PRCM partition
87 * @prcm_mod: PRCM module offset
88 * @idlest_reg: CM_IDLESTx register
89 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
90 *
91 * Wait for the PRCM to indicate that the module identified by
92 * (@prcm_mod, @idlest_id, @idlest_shift) is clocked. Return 0 upon
93 * success, -EBUSY if the module doesn't enable in time, or -EINVAL if
94 * no per-SoC wait_module_ready() function pointer has been registered
95 * or if the idlest register is unknown on the SoC.
96 */
97int omap_cm_wait_module_ready(u8 part, s16 prcm_mod, u16 idlest_reg,
98 u8 idlest_shift)
99{
100 if (!cm_ll_data->wait_module_ready) {
101 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
102 __func__);
103 return -EINVAL;
104 }
105
106 return cm_ll_data->wait_module_ready(part, prcm_mod, idlest_reg,
107 idlest_shift);
108}
109
110/**
111 * omap_cm_wait_module_idle - wait for a module to enter idle or standby
112 * @part: PRCM partition
113 * @prcm_mod: PRCM module offset
114 * @idlest_reg: CM_IDLESTx register
115 * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
116 *
117 * Wait for the PRCM to indicate that the module identified by
118 * (@prcm_mod, @idlest_id, @idlest_shift) is no longer clocked. Return
119 * 0 upon success, -EBUSY if the module doesn't enable in time, or
120 * -EINVAL if no per-SoC wait_module_idle() function pointer has been
121 * registered or if the idlest register is unknown on the SoC.
122 */
123int omap_cm_wait_module_idle(u8 part, s16 prcm_mod, u16 idlest_reg,
124 u8 idlest_shift)
125{
126 if (!cm_ll_data->wait_module_idle) {
127 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
128 __func__);
129 return -EINVAL;
130 }
131
132 return cm_ll_data->wait_module_idle(part, prcm_mod, idlest_reg,
133 idlest_shift);
134}
135
136/**
137 * omap_cm_module_enable - enable a module
138 * @mode: target mode for the module
139 * @part: PRCM partition
140 * @inst: PRCM instance
141 * @clkctrl_offs: CM_CLKCTRL register offset for the module
142 *
143 * Enables clocks for a module identified by (@part, @inst, @clkctrl_offs)
144 * making its IO space accessible. Return 0 upon success, -EINVAL if no
145 * per-SoC module_enable() function pointer has been registered.
146 */
147int omap_cm_module_enable(u8 mode, u8 part, u16 inst, u16 clkctrl_offs)
148{
149 if (!cm_ll_data->module_enable) {
150 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
151 __func__);
152 return -EINVAL;
153 }
154
155 cm_ll_data->module_enable(mode, part, inst, clkctrl_offs);
156 return 0;
157}
158
159/**
160 * omap_cm_module_disable - disable a module
161 * @part: PRCM partition
162 * @inst: PRCM instance
163 * @clkctrl_offs: CM_CLKCTRL register offset for the module
164 *
165 * Disables clocks for a module identified by (@part, @inst, @clkctrl_offs)
166 * makings its IO space inaccessible. Return 0 upon success, -EINVAL if
167 * no per-SoC module_disable() function pointer has been registered.
168 */
169int omap_cm_module_disable(u8 part, u16 inst, u16 clkctrl_offs)
170{
171 if (!cm_ll_data->module_disable) {
172 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
173 __func__);
174 return -EINVAL;
175 }
176
177 cm_ll_data->module_disable(part, inst, clkctrl_offs);
178 return 0;
179}
180
181u32 omap_cm_xlate_clkctrl(u8 part, u16 inst, u16 clkctrl_offs)
182{
183 if (!cm_ll_data->xlate_clkctrl) {
184 WARN_ONCE(1, "cm: %s: no low-level function defined\n",
185 __func__);
186 return 0;
187 }
188 return cm_ll_data->xlate_clkctrl(part, inst, clkctrl_offs);
189}
190
191/**
192 * cm_register - register per-SoC low-level data with the CM
193 * @cld: low-level per-SoC OMAP CM data & function pointers to register
194 *
195 * Register per-SoC low-level OMAP CM data and function pointers with
196 * the OMAP CM common interface. The caller must keep the data
197 * pointed to by @cld valid until it calls cm_unregister() and
198 * it returns successfully. Returns 0 upon success, -EINVAL if @cld
199 * is NULL, or -EEXIST if cm_register() has already been called
200 * without an intervening cm_unregister().
201 */
202int cm_register(const struct cm_ll_data *cld)
203{
204 if (!cld)
205 return -EINVAL;
206
207 if (cm_ll_data != &null_cm_ll_data)
208 return -EEXIST;
209
210 cm_ll_data = cld;
211
212 return 0;
213}
214
215/**
216 * cm_unregister - unregister per-SoC low-level data & function pointers
217 * @cld: low-level per-SoC OMAP CM data & function pointers to unregister
218 *
219 * Unregister per-SoC low-level OMAP CM data and function pointers
220 * that were previously registered with cm_register(). The
221 * caller may not destroy any of the data pointed to by @cld until
222 * this function returns successfully. Returns 0 upon success, or
223 * -EINVAL if @cld is NULL or if @cld does not match the struct
224 * cm_ll_data * previously registered by cm_register().
225 */
226int cm_unregister(const struct cm_ll_data *cld)
227{
228 if (!cld || cm_ll_data != cld)
229 return -EINVAL;
230
231 cm_ll_data = &null_cm_ll_data;
232
233 return 0;
234}
235
236#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
237 defined(CONFIG_SOC_DRA7XX)
238static struct omap_prcm_init_data cm_data __initdata = {
239 .index = TI_CLKM_CM,
240 .init = omap4_cm_init,
241};
242
243static struct omap_prcm_init_data cm2_data __initdata = {
244 .index = TI_CLKM_CM2,
245 .init = omap4_cm_init,
246};
247#endif
248
249#ifdef CONFIG_ARCH_OMAP2
250static struct omap_prcm_init_data omap2_prcm_data __initdata = {
251 .index = TI_CLKM_CM,
252 .init = omap2xxx_cm_init,
253 .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
254};
255#endif
256
257#ifdef CONFIG_ARCH_OMAP3
258static struct omap_prcm_init_data omap3_cm_data __initdata = {
259 .index = TI_CLKM_CM,
260 .init = omap3xxx_cm_init,
261 .flags = CM_SINGLE_INSTANCE,
262
263 /*
264 * IVA2 offset is a negative value, must offset the cm_base address
265 * by this to get it to positive side on the iomap
266 */
267 .offset = -OMAP3430_IVA2_MOD,
268};
269#endif
270
271#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_TI81XX)
272static struct omap_prcm_init_data am3_prcm_data __initdata = {
273 .index = TI_CLKM_CM,
274 .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
275 .init = am33xx_cm_init,
276};
277#endif
278
279#ifdef CONFIG_SOC_AM43XX
280static struct omap_prcm_init_data am4_prcm_data __initdata = {
281 .index = TI_CLKM_CM,
282 .flags = CM_NO_CLOCKS | CM_SINGLE_INSTANCE,
283 .init = omap4_cm_init,
284};
285#endif
286
287static const struct of_device_id omap_cm_dt_match_table[] __initconst = {
288#ifdef CONFIG_ARCH_OMAP2
289 { .compatible = "ti,omap2-prcm", .data = &omap2_prcm_data },
290#endif
291#ifdef CONFIG_ARCH_OMAP3
292 { .compatible = "ti,omap3-cm", .data = &omap3_cm_data },
293#endif
294#ifdef CONFIG_ARCH_OMAP4
295 { .compatible = "ti,omap4-cm1", .data = &cm_data },
296 { .compatible = "ti,omap4-cm2", .data = &cm2_data },
297#endif
298#ifdef CONFIG_SOC_OMAP5
299 { .compatible = "ti,omap5-cm-core-aon", .data = &cm_data },
300 { .compatible = "ti,omap5-cm-core", .data = &cm2_data },
301#endif
302#ifdef CONFIG_SOC_DRA7XX
303 { .compatible = "ti,dra7-cm-core-aon", .data = &cm_data },
304 { .compatible = "ti,dra7-cm-core", .data = &cm2_data },
305#endif
306#ifdef CONFIG_SOC_AM33XX
307 { .compatible = "ti,am3-prcm", .data = &am3_prcm_data },
308#endif
309#ifdef CONFIG_SOC_AM43XX
310 { .compatible = "ti,am4-prcm", .data = &am4_prcm_data },
311#endif
312#ifdef CONFIG_SOC_TI81XX
313 { .compatible = "ti,dm814-prcm", .data = &am3_prcm_data },
314 { .compatible = "ti,dm816-prcm", .data = &am3_prcm_data },
315#endif
316 { }
317};
318
319/**
320 * omap2_cm_base_init - initialize iomappings for the CM drivers
321 *
322 * Detects and initializes the iomappings for the CM driver, based
323 * on the DT data. Returns 0 in success, negative error value
324 * otherwise.
325 */
326int __init omap2_cm_base_init(void)
327{
328 struct device_node *np;
329 const struct of_device_id *match;
330 struct omap_prcm_init_data *data;
331 struct resource res;
332 int ret;
333 struct omap_domain_base *mem = NULL;
334
335 for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
336 data = (struct omap_prcm_init_data *)match->data;
337
338 ret = of_address_to_resource(np, 0, &res);
339 if (ret)
340 return ret;
341
342 if (data->index == TI_CLKM_CM)
343 mem = &cm_base;
344
345 if (data->index == TI_CLKM_CM2)
346 mem = &cm2_base;
347
348 data->mem = ioremap(res.start, resource_size(&res));
349
350 if (mem) {
351 mem->pa = res.start + data->offset;
352 mem->va = data->mem + data->offset;
353 mem->offset = data->offset;
354 }
355
356 data->np = np;
357
358 if (data->init && (data->flags & CM_SINGLE_INSTANCE ||
359 (cm_base.va && cm2_base.va)))
360 data->init(data);
361 }
362
363 return 0;
364}
365
366/**
367 * omap_cm_init - low level init for the CM drivers
368 *
369 * Initializes the low level clock infrastructure for CM drivers.
370 * Returns 0 in success, negative error value in failure.
371 */
372int __init omap_cm_init(void)
373{
374 struct device_node *np;
375 const struct of_device_id *match;
376 const struct omap_prcm_init_data *data;
377 int ret;
378
379 for_each_matching_node_and_match(np, omap_cm_dt_match_table, &match) {
380 data = match->data;
381
382 if (data->flags & CM_NO_CLOCKS)
383 continue;
384
385 ret = omap2_clk_provider_init(np, data->index, NULL, data->mem);
386 if (ret)
387 return ret;
388 }
389
390 return 0;
391}