Loading...
Note: File does not exist in v4.10.11.
1/*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/clk.h>
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/platform_device.h>
26#include <linux/delay.h>
27#include <linux/mfd/tmio.h>
28#include <linux/mmc/host.h>
29#include <linux/mmc/sh_mobile_sdhi.h>
30#include <linux/mtd/mtd.h>
31#include <linux/mtd/partitions.h>
32#include <linux/mtd/physmap.h>
33#include <linux/mmc/sh_mmcif.h>
34#include <linux/i2c.h>
35#include <linux/i2c/tsc2007.h>
36#include <linux/io.h>
37#include <linux/smsc911x.h>
38#include <linux/sh_intc.h>
39#include <linux/sh_clk.h>
40#include <linux/gpio.h>
41#include <linux/input.h>
42#include <linux/leds.h>
43#include <linux/input/sh_keysc.h>
44#include <linux/usb/r8a66597.h>
45#include <linux/pm_clock.h>
46#include <linux/dma-mapping.h>
47
48#include <media/sh_mobile_ceu.h>
49#include <media/sh_mobile_csi2.h>
50#include <media/soc_camera.h>
51
52#include <sound/sh_fsi.h>
53#include <sound/simple_card.h>
54
55#include <video/sh_mobile_hdmi.h>
56#include <video/sh_mobile_lcdc.h>
57#include <video/sh_mipi_dsi.h>
58
59#include <mach/common.h>
60#include <mach/irqs.h>
61#include <mach/sh7372.h>
62
63#include <asm/mach-types.h>
64#include <asm/mach/arch.h>
65#include <asm/setup.h>
66
67/*
68 * Address Interface BusWidth note
69 * ------------------------------------------------------------------
70 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
71 * 0x0800_0000 user area -
72 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
73 * 0x1400_0000 Ether (LAN9220) 16bit
74 * 0x1600_0000 user area - cannot use with NAND
75 * 0x1800_0000 user area -
76 * 0x1A00_0000 -
77 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
78 */
79
80/*
81 * NOR Flash ROM
82 *
83 * SW1 | SW2 | SW7 | NOR Flash ROM
84 * bit1 | bit1 bit2 | bit1 | Memory allocation
85 * ------+------------+------+------------------
86 * OFF | ON OFF | ON | Area 0
87 * OFF | ON OFF | OFF | Area 4
88 */
89
90/*
91 * NAND Flash ROM
92 *
93 * SW1 | SW2 | SW7 | NAND Flash ROM
94 * bit1 | bit1 bit2 | bit2 | Memory allocation
95 * ------+------------+------+------------------
96 * OFF | ON OFF | ON | FCE 0
97 * OFF | ON OFF | OFF | FCE 1
98 */
99
100/*
101 * SMSC 9220
102 *
103 * SW1 SMSC 9220
104 * -----------------------
105 * ON access disable
106 * OFF access enable
107 */
108
109/*
110 * LCD / IRQ / KEYSC / IrDA
111 *
112 * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
113 * LCD = 2nd LCDC (WVGA)
114 *
115 * | SW43 |
116 * SW3 | ON | OFF |
117 * -------------+-----------------------+---------------+
118 * ON | KEY / IrDA | LCD |
119 * OFF | KEY / IrDA / IRQ | IRQ |
120 *
121 *
122 * QHD / WVGA display
123 *
124 * You can choice display type on menuconfig.
125 * Then, check above dip-switch.
126 */
127
128/*
129 * USB
130 *
131 * J7 : 1-2 MAX3355E VBUS
132 * 2-3 DC 5.0V
133 *
134 * S39: bit2: off
135 */
136
137/*
138 * FSI/FSMI
139 *
140 * SW41 : ON : SH-Mobile AP4 Audio Mode
141 * : OFF : Bluetooth Audio Mode
142 */
143
144/*
145 * MMC0/SDHI1 (CN7)
146 *
147 * J22 : select card voltage
148 * 1-2 pin : 1.8v
149 * 2-3 pin : 3.3v
150 *
151 * SW1 | SW33
152 * | bit1 | bit2 | bit3 | bit4
153 * ------------+------+------+------+-------
154 * MMC0 OFF | OFF | ON | ON | X
155 * SDHI1 OFF | ON | X | OFF | ON
156 *
157 * voltage lebel
158 * CN7 : 1.8v
159 * CN12: 3.3v
160 */
161
162/* MTD */
163static struct mtd_partition nor_flash_partitions[] = {
164 {
165 .name = "loader",
166 .offset = 0x00000000,
167 .size = 512 * 1024,
168 .mask_flags = MTD_WRITEABLE,
169 },
170 {
171 .name = "bootenv",
172 .offset = MTDPART_OFS_APPEND,
173 .size = 512 * 1024,
174 .mask_flags = MTD_WRITEABLE,
175 },
176 {
177 .name = "kernel_ro",
178 .offset = MTDPART_OFS_APPEND,
179 .size = 8 * 1024 * 1024,
180 .mask_flags = MTD_WRITEABLE,
181 },
182 {
183 .name = "kernel",
184 .offset = MTDPART_OFS_APPEND,
185 .size = 8 * 1024 * 1024,
186 },
187 {
188 .name = "data",
189 .offset = MTDPART_OFS_APPEND,
190 .size = MTDPART_SIZ_FULL,
191 },
192};
193
194static struct physmap_flash_data nor_flash_data = {
195 .width = 2,
196 .parts = nor_flash_partitions,
197 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
198};
199
200static struct resource nor_flash_resources[] = {
201 [0] = {
202 .start = 0x20000000, /* CS0 shadow instead of regular CS0 */
203 .end = 0x28000000 - 1, /* needed by USB MASK ROM boot */
204 .flags = IORESOURCE_MEM,
205 }
206};
207
208static struct platform_device nor_flash_device = {
209 .name = "physmap-flash",
210 .dev = {
211 .platform_data = &nor_flash_data,
212 },
213 .num_resources = ARRAY_SIZE(nor_flash_resources),
214 .resource = nor_flash_resources,
215};
216
217/* SMSC 9220 */
218static struct resource smc911x_resources[] = {
219 {
220 .start = 0x14000000,
221 .end = 0x16000000 - 1,
222 .flags = IORESOURCE_MEM,
223 }, {
224 .start = evt2irq(0x02c0) /* IRQ6A */,
225 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
226 },
227};
228
229static struct smsc911x_platform_config smsc911x_info = {
230 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
231 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
232 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
233};
234
235static struct platform_device smc911x_device = {
236 .name = "smsc911x",
237 .id = -1,
238 .num_resources = ARRAY_SIZE(smc911x_resources),
239 .resource = smc911x_resources,
240 .dev = {
241 .platform_data = &smsc911x_info,
242 },
243};
244
245/*
246 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
247 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
248 */
249static int slot_cn7_get_cd(struct platform_device *pdev)
250{
251 return !gpio_get_value(GPIO_PORT41);
252}
253/* MERAM */
254static struct sh_mobile_meram_info meram_info = {
255 .addr_mode = SH_MOBILE_MERAM_MODE1,
256};
257
258static struct resource meram_resources[] = {
259 [0] = {
260 .name = "regs",
261 .start = 0xe8000000,
262 .end = 0xe807ffff,
263 .flags = IORESOURCE_MEM,
264 },
265 [1] = {
266 .name = "meram",
267 .start = 0xe8080000,
268 .end = 0xe81fffff,
269 .flags = IORESOURCE_MEM,
270 },
271};
272
273static struct platform_device meram_device = {
274 .name = "sh_mobile_meram",
275 .id = 0,
276 .num_resources = ARRAY_SIZE(meram_resources),
277 .resource = meram_resources,
278 .dev = {
279 .platform_data = &meram_info,
280 },
281};
282
283/* SH_MMCIF */
284static struct resource sh_mmcif_resources[] = {
285 [0] = {
286 .name = "MMCIF",
287 .start = 0xE6BD0000,
288 .end = 0xE6BD00FF,
289 .flags = IORESOURCE_MEM,
290 },
291 [1] = {
292 /* MMC ERR */
293 .start = evt2irq(0x1ac0),
294 .flags = IORESOURCE_IRQ,
295 },
296 [2] = {
297 /* MMC NOR */
298 .start = evt2irq(0x1ae0),
299 .flags = IORESOURCE_IRQ,
300 },
301};
302
303static struct sh_mmcif_plat_data sh_mmcif_plat = {
304 .sup_pclk = 0,
305 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
306 .caps = MMC_CAP_4_BIT_DATA |
307 MMC_CAP_8_BIT_DATA |
308 MMC_CAP_NEEDS_POLL,
309 .get_cd = slot_cn7_get_cd,
310 .slave_id_tx = SHDMA_SLAVE_MMCIF_TX,
311 .slave_id_rx = SHDMA_SLAVE_MMCIF_RX,
312};
313
314static struct platform_device sh_mmcif_device = {
315 .name = "sh_mmcif",
316 .id = 0,
317 .dev = {
318 .dma_mask = NULL,
319 .coherent_dma_mask = 0xffffffff,
320 .platform_data = &sh_mmcif_plat,
321 },
322 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
323 .resource = sh_mmcif_resources,
324};
325
326/* SDHI0 */
327static struct sh_mobile_sdhi_info sdhi0_info = {
328 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
329 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
330 .tmio_caps = MMC_CAP_SDIO_IRQ,
331};
332
333static struct resource sdhi0_resources[] = {
334 [0] = {
335 .name = "SDHI0",
336 .start = 0xe6850000,
337 .end = 0xe68500ff,
338 .flags = IORESOURCE_MEM,
339 },
340 [1] = {
341 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
342 .flags = IORESOURCE_IRQ,
343 },
344 [2] = {
345 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
346 .flags = IORESOURCE_IRQ,
347 },
348 [3] = {
349 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
350 .flags = IORESOURCE_IRQ,
351 },
352};
353
354static struct platform_device sdhi0_device = {
355 .name = "sh_mobile_sdhi",
356 .num_resources = ARRAY_SIZE(sdhi0_resources),
357 .resource = sdhi0_resources,
358 .id = 0,
359 .dev = {
360 .platform_data = &sdhi0_info,
361 },
362};
363
364/* SDHI1 */
365static struct sh_mobile_sdhi_info sdhi1_info = {
366 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
367 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
368 .tmio_ocr_mask = MMC_VDD_165_195,
369 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
370 .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
371 .get_cd = slot_cn7_get_cd,
372};
373
374static struct resource sdhi1_resources[] = {
375 [0] = {
376 .name = "SDHI1",
377 .start = 0xe6860000,
378 .end = 0xe68600ff,
379 .flags = IORESOURCE_MEM,
380 },
381 [1] = {
382 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
383 .flags = IORESOURCE_IRQ,
384 },
385 [2] = {
386 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
387 .flags = IORESOURCE_IRQ,
388 },
389 [3] = {
390 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
391 .flags = IORESOURCE_IRQ,
392 },
393};
394
395static struct platform_device sdhi1_device = {
396 .name = "sh_mobile_sdhi",
397 .num_resources = ARRAY_SIZE(sdhi1_resources),
398 .resource = sdhi1_resources,
399 .id = 1,
400 .dev = {
401 .platform_data = &sdhi1_info,
402 },
403};
404
405/* USB1 */
406static void usb1_host_port_power(int port, int power)
407{
408 if (!power) /* only power-on supported for now */
409 return;
410
411 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
412 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
413}
414
415static struct r8a66597_platdata usb1_host_data = {
416 .on_chip = 1,
417 .port_power = usb1_host_port_power,
418};
419
420static struct resource usb1_host_resources[] = {
421 [0] = {
422 .name = "USBHS",
423 .start = 0xE68B0000,
424 .end = 0xE68B00E6 - 1,
425 .flags = IORESOURCE_MEM,
426 },
427 [1] = {
428 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
429 .flags = IORESOURCE_IRQ,
430 },
431};
432
433static struct platform_device usb1_host_device = {
434 .name = "r8a66597_hcd",
435 .id = 1,
436 .dev = {
437 .dma_mask = NULL, /* not use dma */
438 .coherent_dma_mask = 0xffffffff,
439 .platform_data = &usb1_host_data,
440 },
441 .num_resources = ARRAY_SIZE(usb1_host_resources),
442 .resource = usb1_host_resources,
443};
444
445/*
446 * QHD display
447 */
448#ifdef CONFIG_AP4EVB_QHD
449
450/* KEYSC (Needs SW43 set to ON) */
451static struct sh_keysc_info keysc_info = {
452 .mode = SH_KEYSC_MODE_1,
453 .scan_timing = 3,
454 .delay = 2500,
455 .keycodes = {
456 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
457 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
458 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
459 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
460 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
461 },
462};
463
464static struct resource keysc_resources[] = {
465 [0] = {
466 .name = "KEYSC",
467 .start = 0xe61b0000,
468 .end = 0xe61b0063,
469 .flags = IORESOURCE_MEM,
470 },
471 [1] = {
472 .start = evt2irq(0x0be0), /* KEYSC_KEY */
473 .flags = IORESOURCE_IRQ,
474 },
475};
476
477static struct platform_device keysc_device = {
478 .name = "sh_keysc",
479 .id = 0, /* "keysc0" clock */
480 .num_resources = ARRAY_SIZE(keysc_resources),
481 .resource = keysc_resources,
482 .dev = {
483 .platform_data = &keysc_info,
484 },
485};
486
487/* MIPI-DSI */
488static int sh_mipi_set_dot_clock(struct platform_device *pdev,
489 void __iomem *base,
490 int enable)
491{
492 struct clk *pck = clk_get(&pdev->dev, "dsip_clk");
493
494 if (IS_ERR(pck))
495 return PTR_ERR(pck);
496
497 if (enable) {
498 /*
499 * DSIPCLK = 24MHz
500 * D-PHY = DSIPCLK * ((0x6*2)+1) = 312MHz (see .phyctrl)
501 * HsByteCLK = D-PHY/8 = 39MHz
502 *
503 * X * Y * FPS =
504 * (544+72+600+16) * (961+8+8+2) * 30 = 36.1MHz
505 */
506 clk_set_rate(pck, clk_round_rate(pck, 24000000));
507 clk_enable(pck);
508 } else {
509 clk_disable(pck);
510 }
511
512 clk_put(pck);
513
514 return 0;
515}
516
517static struct resource mipidsi0_resources[] = {
518 [0] = {
519 .start = 0xffc60000,
520 .end = 0xffc63073,
521 .flags = IORESOURCE_MEM,
522 },
523 [1] = {
524 .start = 0xffc68000,
525 .end = 0xffc680ef,
526 .flags = IORESOURCE_MEM,
527 },
528};
529
530static struct sh_mobile_lcdc_info lcdc_info;
531
532static struct sh_mipi_dsi_info mipidsi0_info = {
533 .data_format = MIPI_RGB888,
534 .lcd_chan = &lcdc_info.ch[0],
535 .lane = 2,
536 .vsynw_offset = 17,
537 .phyctrl = 0x6 << 8,
538 .flags = SH_MIPI_DSI_SYNC_PULSES_MODE |
539 SH_MIPI_DSI_HSbyteCLK,
540 .set_dot_clock = sh_mipi_set_dot_clock,
541};
542
543static struct platform_device mipidsi0_device = {
544 .name = "sh-mipi-dsi",
545 .num_resources = ARRAY_SIZE(mipidsi0_resources),
546 .resource = mipidsi0_resources,
547 .id = 0,
548 .dev = {
549 .platform_data = &mipidsi0_info,
550 },
551};
552
553static struct platform_device *qhd_devices[] __initdata = {
554 &mipidsi0_device,
555 &keysc_device,
556};
557#endif /* CONFIG_AP4EVB_QHD */
558
559/* LCDC0 */
560static const struct fb_videomode ap4evb_lcdc_modes[] = {
561 {
562#ifdef CONFIG_AP4EVB_QHD
563 .name = "R63302(QHD)",
564 .xres = 544,
565 .yres = 961,
566 .left_margin = 72,
567 .right_margin = 600,
568 .hsync_len = 16,
569 .upper_margin = 8,
570 .lower_margin = 8,
571 .vsync_len = 2,
572 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
573#else
574 .name = "WVGA Panel",
575 .xres = 800,
576 .yres = 480,
577 .left_margin = 220,
578 .right_margin = 110,
579 .hsync_len = 70,
580 .upper_margin = 20,
581 .lower_margin = 5,
582 .vsync_len = 5,
583 .sync = 0,
584#endif
585 },
586};
587
588static const struct sh_mobile_meram_cfg lcd_meram_cfg = {
589 .icb[0] = {
590 .meram_size = 0x40,
591 },
592 .icb[1] = {
593 .meram_size = 0x40,
594 },
595};
596
597static struct sh_mobile_lcdc_info lcdc_info = {
598 .meram_dev = &meram_info,
599 .ch[0] = {
600 .chan = LCDC_CHAN_MAINLCD,
601 .fourcc = V4L2_PIX_FMT_RGB565,
602 .lcd_modes = ap4evb_lcdc_modes,
603 .num_modes = ARRAY_SIZE(ap4evb_lcdc_modes),
604 .meram_cfg = &lcd_meram_cfg,
605#ifdef CONFIG_AP4EVB_QHD
606 .tx_dev = &mipidsi0_device,
607#endif
608 }
609};
610
611static struct resource lcdc_resources[] = {
612 [0] = {
613 .name = "LCDC",
614 .start = 0xfe940000, /* P4-only space */
615 .end = 0xfe943fff,
616 .flags = IORESOURCE_MEM,
617 },
618 [1] = {
619 .start = intcs_evt2irq(0x580),
620 .flags = IORESOURCE_IRQ,
621 },
622};
623
624static struct platform_device lcdc_device = {
625 .name = "sh_mobile_lcdc_fb",
626 .num_resources = ARRAY_SIZE(lcdc_resources),
627 .resource = lcdc_resources,
628 .dev = {
629 .platform_data = &lcdc_info,
630 .coherent_dma_mask = ~0,
631 },
632};
633
634/* FSI */
635#define IRQ_FSI evt2irq(0x1840)
636static int __fsi_set_rate(struct clk *clk, long rate, int enable)
637{
638 int ret = 0;
639
640 if (rate <= 0)
641 return ret;
642
643 if (enable) {
644 ret = clk_set_rate(clk, rate);
645 if (0 == ret)
646 ret = clk_enable(clk);
647 } else {
648 clk_disable(clk);
649 }
650
651 return ret;
652}
653
654static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
655{
656 return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
657}
658
659static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
660{
661 struct clk *fsia_ick;
662 struct clk *fsiack;
663 int ret = -EIO;
664
665 fsia_ick = clk_get(dev, "icka");
666 if (IS_ERR(fsia_ick))
667 return PTR_ERR(fsia_ick);
668
669 /*
670 * FSIACK is connected to AK4642,
671 * and use external clock pin from it.
672 * it is parent of fsia_ick now.
673 */
674 fsiack = clk_get_parent(fsia_ick);
675 if (!fsiack)
676 goto fsia_ick_out;
677
678 /*
679 * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
680 *
681 ** FIXME **
682 * Because the freq_table of external clk (fsiack) are all 0,
683 * the return value of clk_round_rate became 0.
684 * So, it use __fsi_set_rate here.
685 */
686 ret = __fsi_set_rate(fsiack, rate, enable);
687 if (ret < 0)
688 goto fsiack_out;
689
690 ret = __fsi_set_round_rate(fsia_ick, rate, enable);
691 if ((ret < 0) && enable)
692 __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
693
694fsiack_out:
695 clk_put(fsiack);
696
697fsia_ick_out:
698 clk_put(fsia_ick);
699
700 return 0;
701}
702
703static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
704{
705 struct clk *fsib_clk;
706 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
707 long fsib_rate = 0;
708 long fdiv_rate = 0;
709 int ackmd_bpfmd;
710 int ret;
711
712 switch (rate) {
713 case 44100:
714 fsib_rate = rate * 256;
715 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
716 break;
717 case 48000:
718 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
719 fdiv_rate = rate * 256;
720 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
721 break;
722 default:
723 pr_err("unsupported rate in FSI2 port B\n");
724 return -EINVAL;
725 }
726
727 /* FSI B setting */
728 fsib_clk = clk_get(dev, "ickb");
729 if (IS_ERR(fsib_clk))
730 return -EIO;
731
732 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
733 if (ret < 0)
734 goto fsi_set_rate_end;
735
736 /* FSI DIV setting */
737 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
738 if (ret < 0) {
739 /* disable FSI B */
740 if (enable)
741 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
742 goto fsi_set_rate_end;
743 }
744
745 ret = ackmd_bpfmd;
746
747fsi_set_rate_end:
748 clk_put(fsib_clk);
749 return ret;
750}
751
752static struct sh_fsi_platform_info fsi_info = {
753 .port_a = {
754 .flags = SH_FSI_BRS_INV,
755 .set_rate = fsi_ak4642_set_rate,
756 },
757 .port_b = {
758 .flags = SH_FSI_BRS_INV |
759 SH_FSI_BRM_INV |
760 SH_FSI_LRS_INV |
761 SH_FSI_FMT_SPDIF,
762 .set_rate = fsi_hdmi_set_rate,
763 },
764};
765
766static struct resource fsi_resources[] = {
767 [0] = {
768 .name = "FSI",
769 .start = 0xFE3C0000,
770 .end = 0xFE3C0400 - 1,
771 .flags = IORESOURCE_MEM,
772 },
773 [1] = {
774 .start = IRQ_FSI,
775 .flags = IORESOURCE_IRQ,
776 },
777};
778
779static struct platform_device fsi_device = {
780 .name = "sh_fsi2",
781 .id = -1,
782 .num_resources = ARRAY_SIZE(fsi_resources),
783 .resource = fsi_resources,
784 .dev = {
785 .platform_data = &fsi_info,
786 },
787};
788
789static struct asoc_simple_dai_init_info fsi2_ak4643_init_info = {
790 .fmt = SND_SOC_DAIFMT_LEFT_J,
791 .codec_daifmt = SND_SOC_DAIFMT_CBM_CFM,
792 .cpu_daifmt = SND_SOC_DAIFMT_CBS_CFS,
793 .sysclk = 11289600,
794};
795
796static struct asoc_simple_card_info fsi2_ak4643_info = {
797 .name = "AK4643",
798 .card = "FSI2A-AK4643",
799 .cpu_dai = "fsia-dai",
800 .codec = "ak4642-codec.0-0013",
801 .platform = "sh_fsi2",
802 .codec_dai = "ak4642-hifi",
803 .init = &fsi2_ak4643_init_info,
804};
805
806static struct platform_device fsi_ak4643_device = {
807 .name = "asoc-simple-card",
808 .dev = {
809 .platform_data = &fsi2_ak4643_info,
810 },
811};
812
813/* LCDC1 */
814static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
815 unsigned long *parent_freq);
816
817static struct sh_mobile_hdmi_info hdmi_info = {
818 .flags = HDMI_SND_SRC_SPDIF,
819 .clk_optimize_parent = ap4evb_clk_optimize,
820};
821
822static struct resource hdmi_resources[] = {
823 [0] = {
824 .name = "HDMI",
825 .start = 0xe6be0000,
826 .end = 0xe6be00ff,
827 .flags = IORESOURCE_MEM,
828 },
829 [1] = {
830 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
831 .start = evt2irq(0x17e0),
832 .flags = IORESOURCE_IRQ,
833 },
834};
835
836static struct platform_device hdmi_device = {
837 .name = "sh-mobile-hdmi",
838 .num_resources = ARRAY_SIZE(hdmi_resources),
839 .resource = hdmi_resources,
840 .id = -1,
841 .dev = {
842 .platform_data = &hdmi_info,
843 },
844};
845
846static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
847 unsigned long *parent_freq)
848{
849 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
850 long error;
851
852 if (IS_ERR(hdmi_ick)) {
853 int ret = PTR_ERR(hdmi_ick);
854 pr_err("Cannot get HDMI ICK: %d\n", ret);
855 return ret;
856 }
857
858 error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
859
860 clk_put(hdmi_ick);
861
862 return error;
863}
864
865static const struct sh_mobile_meram_cfg hdmi_meram_cfg = {
866 .icb[0] = {
867 .meram_size = 0x100,
868 },
869 .icb[1] = {
870 .meram_size = 0x100,
871 },
872};
873
874static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
875 .clock_source = LCDC_CLK_EXTERNAL,
876 .meram_dev = &meram_info,
877 .ch[0] = {
878 .chan = LCDC_CHAN_MAINLCD,
879 .fourcc = V4L2_PIX_FMT_RGB565,
880 .interface_type = RGB24,
881 .clock_divider = 1,
882 .flags = LCDC_FLAGS_DWPOL,
883 .meram_cfg = &hdmi_meram_cfg,
884 .tx_dev = &hdmi_device,
885 }
886};
887
888static struct resource lcdc1_resources[] = {
889 [0] = {
890 .name = "LCDC1",
891 .start = 0xfe944000,
892 .end = 0xfe947fff,
893 .flags = IORESOURCE_MEM,
894 },
895 [1] = {
896 .start = intcs_evt2irq(0x1780),
897 .flags = IORESOURCE_IRQ,
898 },
899};
900
901static struct platform_device lcdc1_device = {
902 .name = "sh_mobile_lcdc_fb",
903 .num_resources = ARRAY_SIZE(lcdc1_resources),
904 .resource = lcdc1_resources,
905 .id = 1,
906 .dev = {
907 .platform_data = &sh_mobile_lcdc1_info,
908 .coherent_dma_mask = ~0,
909 },
910};
911
912static struct asoc_simple_dai_init_info fsi2_hdmi_init_info = {
913 .cpu_daifmt = SND_SOC_DAIFMT_CBM_CFM,
914};
915
916static struct asoc_simple_card_info fsi2_hdmi_info = {
917 .name = "HDMI",
918 .card = "FSI2B-HDMI",
919 .cpu_dai = "fsib-dai",
920 .codec = "sh-mobile-hdmi",
921 .platform = "sh_fsi2",
922 .codec_dai = "sh_mobile_hdmi-hifi",
923 .init = &fsi2_hdmi_init_info,
924};
925
926static struct platform_device fsi_hdmi_device = {
927 .name = "asoc-simple-card",
928 .id = 1,
929 .dev = {
930 .platform_data = &fsi2_hdmi_info,
931 },
932};
933
934static struct gpio_led ap4evb_leds[] = {
935 {
936 .name = "led4",
937 .gpio = GPIO_PORT185,
938 .default_state = LEDS_GPIO_DEFSTATE_ON,
939 },
940 {
941 .name = "led2",
942 .gpio = GPIO_PORT186,
943 .default_state = LEDS_GPIO_DEFSTATE_ON,
944 },
945 {
946 .name = "led3",
947 .gpio = GPIO_PORT187,
948 .default_state = LEDS_GPIO_DEFSTATE_ON,
949 },
950 {
951 .name = "led1",
952 .gpio = GPIO_PORT188,
953 .default_state = LEDS_GPIO_DEFSTATE_ON,
954 }
955};
956
957static struct gpio_led_platform_data ap4evb_leds_pdata = {
958 .num_leds = ARRAY_SIZE(ap4evb_leds),
959 .leds = ap4evb_leds,
960};
961
962static struct platform_device leds_device = {
963 .name = "leds-gpio",
964 .id = 0,
965 .dev = {
966 .platform_data = &ap4evb_leds_pdata,
967 },
968};
969
970static struct i2c_board_info imx074_info = {
971 I2C_BOARD_INFO("imx074", 0x1a),
972};
973
974static struct soc_camera_link imx074_link = {
975 .bus_id = 0,
976 .board_info = &imx074_info,
977 .i2c_adapter_id = 0,
978 .module_name = "imx074",
979};
980
981static struct platform_device ap4evb_camera = {
982 .name = "soc-camera-pdrv",
983 .id = 0,
984 .dev = {
985 .platform_data = &imx074_link,
986 },
987};
988
989static struct sh_csi2_client_config csi2_clients[] = {
990 {
991 .phy = SH_CSI2_PHY_MAIN,
992 .lanes = 0, /* default: 2 lanes */
993 .channel = 0,
994 .pdev = &ap4evb_camera,
995 },
996};
997
998static struct sh_csi2_pdata csi2_info = {
999 .type = SH_CSI2C,
1000 .clients = csi2_clients,
1001 .num_clients = ARRAY_SIZE(csi2_clients),
1002 .flags = SH_CSI2_ECC | SH_CSI2_CRC,
1003};
1004
1005static struct resource csi2_resources[] = {
1006 [0] = {
1007 .name = "CSI2",
1008 .start = 0xffc90000,
1009 .end = 0xffc90fff,
1010 .flags = IORESOURCE_MEM,
1011 },
1012 [1] = {
1013 .start = intcs_evt2irq(0x17a0),
1014 .flags = IORESOURCE_IRQ,
1015 },
1016};
1017
1018static struct sh_mobile_ceu_companion csi2 = {
1019 .id = 0,
1020 .num_resources = ARRAY_SIZE(csi2_resources),
1021 .resource = csi2_resources,
1022 .platform_data = &csi2_info,
1023};
1024
1025static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
1026 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
1027 .max_width = 8188,
1028 .max_height = 8188,
1029 .csi2 = &csi2,
1030};
1031
1032static struct resource ceu_resources[] = {
1033 [0] = {
1034 .name = "CEU",
1035 .start = 0xfe910000,
1036 .end = 0xfe91009f,
1037 .flags = IORESOURCE_MEM,
1038 },
1039 [1] = {
1040 .start = intcs_evt2irq(0x880),
1041 .flags = IORESOURCE_IRQ,
1042 },
1043 [2] = {
1044 /* place holder for contiguous memory */
1045 },
1046};
1047
1048static struct platform_device ceu_device = {
1049 .name = "sh_mobile_ceu",
1050 .id = 0, /* "ceu0" clock */
1051 .num_resources = ARRAY_SIZE(ceu_resources),
1052 .resource = ceu_resources,
1053 .dev = {
1054 .platform_data = &sh_mobile_ceu_info,
1055 .coherent_dma_mask = 0xffffffff,
1056 },
1057};
1058
1059static struct platform_device *ap4evb_devices[] __initdata = {
1060 &leds_device,
1061 &nor_flash_device,
1062 &smc911x_device,
1063 &sdhi0_device,
1064 &sdhi1_device,
1065 &usb1_host_device,
1066 &fsi_device,
1067 &fsi_ak4643_device,
1068 &fsi_hdmi_device,
1069 &sh_mmcif_device,
1070 &hdmi_device,
1071 &lcdc_device,
1072 &lcdc1_device,
1073 &ceu_device,
1074 &ap4evb_camera,
1075 &meram_device,
1076};
1077
1078static void __init hdmi_init_pm_clock(void)
1079{
1080 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
1081 int ret;
1082 long rate;
1083
1084 if (IS_ERR(hdmi_ick)) {
1085 ret = PTR_ERR(hdmi_ick);
1086 pr_err("Cannot get HDMI ICK: %d\n", ret);
1087 goto out;
1088 }
1089
1090 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
1091 if (ret < 0) {
1092 pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
1093 goto out;
1094 }
1095
1096 pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
1097
1098 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
1099 if (rate < 0) {
1100 pr_err("Cannot get suitable rate: %ld\n", rate);
1101 ret = rate;
1102 goto out;
1103 }
1104
1105 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
1106 if (ret < 0) {
1107 pr_err("Cannot set rate %ld: %d\n", rate, ret);
1108 goto out;
1109 }
1110
1111 pr_debug("PLLC2 set frequency %lu\n", rate);
1112
1113 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
1114 if (ret < 0)
1115 pr_err("Cannot set HDMI parent: %d\n", ret);
1116
1117out:
1118 if (!IS_ERR(hdmi_ick))
1119 clk_put(hdmi_ick);
1120}
1121
1122static void __init fsi_init_pm_clock(void)
1123{
1124 struct clk *fsia_ick;
1125 int ret;
1126
1127 fsia_ick = clk_get(&fsi_device.dev, "icka");
1128 if (IS_ERR(fsia_ick)) {
1129 ret = PTR_ERR(fsia_ick);
1130 pr_err("Cannot get FSI ICK: %d\n", ret);
1131 return;
1132 }
1133
1134 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
1135 if (ret < 0)
1136 pr_err("Cannot set FSI-A parent: %d\n", ret);
1137
1138 clk_put(fsia_ick);
1139}
1140
1141/*
1142 * FIXME !!
1143 *
1144 * gpio_no_direction
1145 * are quick_hack.
1146 *
1147 * current gpio frame work doesn't have
1148 * the method to control only pull up/down/free.
1149 * this function should be replaced by correct gpio function
1150 */
1151static void __init gpio_no_direction(u32 addr)
1152{
1153 __raw_writeb(0x00, addr);
1154}
1155
1156/* TouchScreen */
1157#ifdef CONFIG_AP4EVB_QHD
1158# define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
1159# define GPIO_TSC_PORT GPIO_PORT123
1160#else /* WVGA */
1161# define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
1162# define GPIO_TSC_PORT GPIO_PORT40
1163#endif
1164
1165#define IRQ28 evt2irq(0x3380) /* IRQ28A */
1166#define IRQ7 evt2irq(0x02e0) /* IRQ7A */
1167static int ts_get_pendown_state(void)
1168{
1169 int val;
1170
1171 gpio_free(GPIO_TSC_IRQ);
1172
1173 gpio_request(GPIO_TSC_PORT, NULL);
1174
1175 gpio_direction_input(GPIO_TSC_PORT);
1176
1177 val = gpio_get_value(GPIO_TSC_PORT);
1178
1179 gpio_request(GPIO_TSC_IRQ, NULL);
1180
1181 return !val;
1182}
1183
1184static int ts_init(void)
1185{
1186 gpio_request(GPIO_TSC_IRQ, NULL);
1187
1188 return 0;
1189}
1190
1191static struct tsc2007_platform_data tsc2007_info = {
1192 .model = 2007,
1193 .x_plate_ohms = 180,
1194 .get_pendown_state = ts_get_pendown_state,
1195 .init_platform_hw = ts_init,
1196};
1197
1198static struct i2c_board_info tsc_device = {
1199 I2C_BOARD_INFO("tsc2007", 0x48),
1200 .type = "tsc2007",
1201 .platform_data = &tsc2007_info,
1202 /*.irq is selected on ap4evb_init */
1203};
1204
1205/* I2C */
1206static struct i2c_board_info i2c0_devices[] = {
1207 {
1208 I2C_BOARD_INFO("ak4643", 0x13),
1209 },
1210};
1211
1212static struct i2c_board_info i2c1_devices[] = {
1213 {
1214 I2C_BOARD_INFO("r2025sd", 0x32),
1215 },
1216};
1217
1218
1219#define GPIO_PORT9CR 0xE6051009
1220#define GPIO_PORT10CR 0xE605100A
1221#define USCCR1 0xE6058144
1222static void __init ap4evb_init(void)
1223{
1224 u32 srcr4;
1225 struct clk *clk;
1226
1227 /* External clock source */
1228 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1229
1230 sh7372_pinmux_init();
1231
1232 /* enable SCIFA0 */
1233 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1234 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1235
1236 /* enable SMSC911X */
1237 gpio_request(GPIO_FN_CS5A, NULL);
1238 gpio_request(GPIO_FN_IRQ6_39, NULL);
1239
1240 /* enable Debug switch (S6) */
1241 gpio_request(GPIO_PORT32, NULL);
1242 gpio_request(GPIO_PORT33, NULL);
1243 gpio_request(GPIO_PORT34, NULL);
1244 gpio_request(GPIO_PORT35, NULL);
1245 gpio_direction_input(GPIO_PORT32);
1246 gpio_direction_input(GPIO_PORT33);
1247 gpio_direction_input(GPIO_PORT34);
1248 gpio_direction_input(GPIO_PORT35);
1249 gpio_export(GPIO_PORT32, 0);
1250 gpio_export(GPIO_PORT33, 0);
1251 gpio_export(GPIO_PORT34, 0);
1252 gpio_export(GPIO_PORT35, 0);
1253
1254 /* SDHI0 */
1255 gpio_request(GPIO_FN_SDHICD0, NULL);
1256 gpio_request(GPIO_FN_SDHIWP0, NULL);
1257 gpio_request(GPIO_FN_SDHICMD0, NULL);
1258 gpio_request(GPIO_FN_SDHICLK0, NULL);
1259 gpio_request(GPIO_FN_SDHID0_3, NULL);
1260 gpio_request(GPIO_FN_SDHID0_2, NULL);
1261 gpio_request(GPIO_FN_SDHID0_1, NULL);
1262 gpio_request(GPIO_FN_SDHID0_0, NULL);
1263
1264 /* SDHI1 */
1265 gpio_request(GPIO_FN_SDHICMD1, NULL);
1266 gpio_request(GPIO_FN_SDHICLK1, NULL);
1267 gpio_request(GPIO_FN_SDHID1_3, NULL);
1268 gpio_request(GPIO_FN_SDHID1_2, NULL);
1269 gpio_request(GPIO_FN_SDHID1_1, NULL);
1270 gpio_request(GPIO_FN_SDHID1_0, NULL);
1271
1272 /* MMCIF */
1273 gpio_request(GPIO_FN_MMCD0_0, NULL);
1274 gpio_request(GPIO_FN_MMCD0_1, NULL);
1275 gpio_request(GPIO_FN_MMCD0_2, NULL);
1276 gpio_request(GPIO_FN_MMCD0_3, NULL);
1277 gpio_request(GPIO_FN_MMCD0_4, NULL);
1278 gpio_request(GPIO_FN_MMCD0_5, NULL);
1279 gpio_request(GPIO_FN_MMCD0_6, NULL);
1280 gpio_request(GPIO_FN_MMCD0_7, NULL);
1281 gpio_request(GPIO_FN_MMCCMD0, NULL);
1282 gpio_request(GPIO_FN_MMCCLK0, NULL);
1283
1284 /* USB enable */
1285 gpio_request(GPIO_FN_VBUS0_1, NULL);
1286 gpio_request(GPIO_FN_IDIN_1_18, NULL);
1287 gpio_request(GPIO_FN_PWEN_1_115, NULL);
1288 gpio_request(GPIO_FN_OVCN_1_114, NULL);
1289 gpio_request(GPIO_FN_EXTLP_1, NULL);
1290 gpio_request(GPIO_FN_OVCN2_1, NULL);
1291
1292 /* setup USB phy */
1293 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
1294
1295 /* enable FSI2 port A (ak4643) */
1296 gpio_request(GPIO_FN_FSIAIBT, NULL);
1297 gpio_request(GPIO_FN_FSIAILR, NULL);
1298 gpio_request(GPIO_FN_FSIAISLD, NULL);
1299 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1300 gpio_request(GPIO_PORT161, NULL);
1301 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1302
1303 gpio_request(GPIO_PORT9, NULL);
1304 gpio_request(GPIO_PORT10, NULL);
1305 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1306 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1307
1308 /* card detect pin for MMC slot (CN7) */
1309 gpio_request(GPIO_PORT41, NULL);
1310 gpio_direction_input(GPIO_PORT41);
1311
1312 /* setup FSI2 port B (HDMI) */
1313 gpio_request(GPIO_FN_FSIBCK, NULL);
1314 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1315
1316 /* set SPU2 clock to 119.6 MHz */
1317 clk = clk_get(NULL, "spu_clk");
1318 if (!IS_ERR(clk)) {
1319 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1320 clk_put(clk);
1321 }
1322
1323 /*
1324 * set irq priority, to avoid sound chopping
1325 * when NFS rootfs is used
1326 * FSI(3) > SMSC911X(2)
1327 */
1328 intc_set_priority(IRQ_FSI, 3);
1329
1330 i2c_register_board_info(0, i2c0_devices,
1331 ARRAY_SIZE(i2c0_devices));
1332
1333 i2c_register_board_info(1, i2c1_devices,
1334 ARRAY_SIZE(i2c1_devices));
1335
1336#ifdef CONFIG_AP4EVB_QHD
1337
1338 /*
1339 * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
1340 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
1341 */
1342
1343 /* enable KEYSC */
1344 gpio_request(GPIO_FN_KEYOUT0, NULL);
1345 gpio_request(GPIO_FN_KEYOUT1, NULL);
1346 gpio_request(GPIO_FN_KEYOUT2, NULL);
1347 gpio_request(GPIO_FN_KEYOUT3, NULL);
1348 gpio_request(GPIO_FN_KEYOUT4, NULL);
1349 gpio_request(GPIO_FN_KEYIN0_136, NULL);
1350 gpio_request(GPIO_FN_KEYIN1_135, NULL);
1351 gpio_request(GPIO_FN_KEYIN2_134, NULL);
1352 gpio_request(GPIO_FN_KEYIN3_133, NULL);
1353 gpio_request(GPIO_FN_KEYIN4, NULL);
1354
1355 /* enable TouchScreen */
1356 irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
1357
1358 tsc_device.irq = IRQ28;
1359 i2c_register_board_info(1, &tsc_device, 1);
1360
1361 /* LCDC0 */
1362 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1363 lcdc_info.ch[0].interface_type = RGB24;
1364 lcdc_info.ch[0].clock_divider = 1;
1365 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
1366 lcdc_info.ch[0].panel_cfg.width = 44;
1367 lcdc_info.ch[0].panel_cfg.height = 79;
1368
1369 platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1370
1371#else
1372 /*
1373 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
1374 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
1375 */
1376
1377 gpio_request(GPIO_FN_LCDD17, NULL);
1378 gpio_request(GPIO_FN_LCDD16, NULL);
1379 gpio_request(GPIO_FN_LCDD15, NULL);
1380 gpio_request(GPIO_FN_LCDD14, NULL);
1381 gpio_request(GPIO_FN_LCDD13, NULL);
1382 gpio_request(GPIO_FN_LCDD12, NULL);
1383 gpio_request(GPIO_FN_LCDD11, NULL);
1384 gpio_request(GPIO_FN_LCDD10, NULL);
1385 gpio_request(GPIO_FN_LCDD9, NULL);
1386 gpio_request(GPIO_FN_LCDD8, NULL);
1387 gpio_request(GPIO_FN_LCDD7, NULL);
1388 gpio_request(GPIO_FN_LCDD6, NULL);
1389 gpio_request(GPIO_FN_LCDD5, NULL);
1390 gpio_request(GPIO_FN_LCDD4, NULL);
1391 gpio_request(GPIO_FN_LCDD3, NULL);
1392 gpio_request(GPIO_FN_LCDD2, NULL);
1393 gpio_request(GPIO_FN_LCDD1, NULL);
1394 gpio_request(GPIO_FN_LCDD0, NULL);
1395 gpio_request(GPIO_FN_LCDDISP, NULL);
1396 gpio_request(GPIO_FN_LCDDCK, NULL);
1397
1398 gpio_request(GPIO_PORT189, NULL); /* backlight */
1399 gpio_direction_output(GPIO_PORT189, 1);
1400
1401 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1402 gpio_direction_output(GPIO_PORT151, 1);
1403
1404 lcdc_info.clock_source = LCDC_CLK_BUS;
1405 lcdc_info.ch[0].interface_type = RGB18;
1406 lcdc_info.ch[0].clock_divider = 3;
1407 lcdc_info.ch[0].flags = 0;
1408 lcdc_info.ch[0].panel_cfg.width = 152;
1409 lcdc_info.ch[0].panel_cfg.height = 91;
1410
1411 /* enable TouchScreen */
1412 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1413
1414 tsc_device.irq = IRQ7;
1415 i2c_register_board_info(0, &tsc_device, 1);
1416#endif /* CONFIG_AP4EVB_QHD */
1417
1418 /* CEU */
1419
1420 /*
1421 * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
1422 * becomes available
1423 */
1424
1425 /* MIPI-CSI stuff */
1426 gpio_request(GPIO_FN_VIO_CKO, NULL);
1427
1428 clk = clk_get(NULL, "vck1_clk");
1429 if (!IS_ERR(clk)) {
1430 clk_set_rate(clk, clk_round_rate(clk, 13000000));
1431 clk_enable(clk);
1432 clk_put(clk);
1433 }
1434
1435 sh7372_add_standard_devices();
1436
1437 /* HDMI */
1438 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1439 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1440
1441 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1442#define SRCR4 0xe61580bc
1443 srcr4 = __raw_readl(SRCR4);
1444 __raw_writel(srcr4 | (1 << 13), SRCR4);
1445 udelay(50);
1446 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1447
1448 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1449
1450 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
1451 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1452 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
1453
1454 sh7372_add_device_to_domain(&sh7372_a3sp, &sh_mmcif_device);
1455 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi0_device);
1456 sh7372_add_device_to_domain(&sh7372_a3sp, &sdhi1_device);
1457 sh7372_add_device_to_domain(&sh7372_a4r, &ceu_device);
1458
1459 hdmi_init_pm_clock();
1460 fsi_init_pm_clock();
1461 sh7372_pm_init();
1462 pm_clk_add(&fsi_device.dev, "spu2");
1463 pm_clk_add(&lcdc1_device.dev, "hdmi");
1464}
1465
1466MACHINE_START(AP4EVB, "ap4evb")
1467 .map_io = sh7372_map_io,
1468 .init_early = sh7372_add_early_devices,
1469 .init_irq = sh7372_init_irq,
1470 .handle_irq = shmobile_handle_irq_intc,
1471 .init_machine = ap4evb_init,
1472 .init_late = shmobile_init_late,
1473 .timer = &shmobile_timer,
1474MACHINE_END