Linux Audio

Check our new training course

Embedded Linux training

Mar 10-20, 2025, special US time zones
Register
Loading...
v3.5.6
  1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2 *
  3 * Copyright 2011 Wolfson Microelectronics plc
  4 *	Mark Brown <broonie@opensource.wolfsonmicro.com>
  5 *
  6 * Copyright 2011 Simtec Electronics
  7 *	Ben Dooks <ben@simtec.co.uk>
  8 *
  9 * This program is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License version 2 as
 11 * published by the Free Software Foundation.
 12 */
 13
 14#include <linux/kernel.h>
 15#include <linux/list.h>
 16#include <linux/serial_core.h>
 
 17#include <linux/platform_device.h>
 18#include <linux/fb.h>
 19#include <linux/io.h>
 20#include <linux/init.h>
 21#include <linux/gpio.h>
 22#include <linux/leds.h>
 23#include <linux/delay.h>
 24#include <linux/mmc/host.h>
 25#include <linux/regulator/machine.h>
 26#include <linux/regulator/fixed.h>
 
 27#include <linux/pwm_backlight.h>
 28#include <linux/dm9000.h>
 29#include <linux/gpio_keys.h>
 30#include <linux/basic_mmio_gpio.h>
 31#include <linux/spi/spi.h>
 32
 33#include <linux/i2c/pca953x.h>
 34#include <linux/platform_data/s3c-hsotg.h>
 35
 36#include <video/platform_lcd.h>
 37
 38#include <linux/mfd/wm831x/core.h>
 39#include <linux/mfd/wm831x/pdata.h>
 40#include <linux/mfd/wm831x/irq.h>
 41#include <linux/mfd/wm831x/gpio.h>
 42
 43#include <sound/wm1250-ev1.h>
 44
 45#include <asm/hardware/vic.h>
 46#include <asm/mach/arch.h>
 47#include <asm/mach-types.h>
 48
 
 49#include <mach/hardware.h>
 50#include <mach/map.h>
 51
 52#include <mach/regs-sys.h>
 53#include <mach/regs-gpio.h>
 54#include <mach/regs-modem.h>
 55#include <mach/crag6410.h>
 56
 57#include <mach/regs-gpio-memport.h>
 58
 59#include <plat/regs-serial.h>
 60#include <plat/regs-fb-v4.h>
 61#include <plat/fb.h>
 62#include <plat/sdhci.h>
 63#include <plat/gpio-cfg.h>
 64#include <plat/s3c64xx-spi.h>
 65
 66#include <plat/keypad.h>
 67#include <plat/clock.h>
 68#include <plat/devs.h>
 69#include <plat/cpu.h>
 70#include <plat/adc.h>
 71#include <plat/iic.h>
 72#include <plat/pm.h>
 
 73
 74#include "common.h"
 
 
 
 
 75
 76/* serial port setup */
 77
 78#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
 79#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 80#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 81
 82static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
 83	[0] = {
 84		.hwport		= 0,
 85		.flags		= 0,
 86		.ucon		= UCON,
 87		.ulcon		= ULCON,
 88		.ufcon		= UFCON,
 89	},
 90	[1] = {
 91		.hwport		= 1,
 92		.flags		= 0,
 93		.ucon		= UCON,
 94		.ulcon		= ULCON,
 95		.ufcon		= UFCON,
 96	},
 97	[2] = {
 98		.hwport		= 2,
 99		.flags		= 0,
100		.ucon		= UCON,
101		.ulcon		= ULCON,
102		.ufcon		= UFCON,
103	},
104	[3] = {
105		.hwport		= 3,
106		.flags		= 0,
107		.ucon		= UCON,
108		.ulcon		= ULCON,
109		.ufcon		= UFCON,
110	},
111};
112
 
 
 
 
 
113static struct platform_pwm_backlight_data crag6410_backlight_data = {
114	.pwm_id		= 0,
115	.max_brightness	= 1000,
116	.dft_brightness	= 600,
117	.pwm_period_ns	= 100000,	/* about 1kHz */
118};
119
120static struct platform_device crag6410_backlight_device = {
121	.name		= "pwm-backlight",
122	.id		= -1,
123	.dev		= {
124		.parent	= &s3c_device_timer[0].dev,
125		.platform_data = &crag6410_backlight_data,
126	},
127};
128
129static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
130{
131	pr_debug("%s: setting power %d\n", __func__, power);
132
133	if (power) {
134		gpio_set_value(S3C64XX_GPB(0), 1);
135		msleep(1);
136		s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
137	} else {
138		gpio_direction_output(S3C64XX_GPF(14), 0);
139		gpio_set_value(S3C64XX_GPB(0), 0);
140	}
141}
142
143static struct platform_device crag6410_lcd_powerdev = {
144	.name			= "platform-lcd",
145	.id			= -1,
146	.dev.parent		= &s3c_device_fb.dev,
147	.dev.platform_data	= &(struct plat_lcd_data) {
148		.set_power	= crag6410_lcd_power_set,
149	},
150};
151
152/* 640x480 URT */
153static struct s3c_fb_pd_win crag6410_fb_win0 = {
154	.max_bpp	= 32,
155	.default_bpp	= 16,
156	.xres		= 640,
157	.yres		= 480,
158	.virtual_y	= 480 * 2,
159	.virtual_x	= 640,
160};
161
162static struct fb_videomode crag6410_lcd_timing = {
163	.left_margin	= 150,
164	.right_margin	= 80,
165	.upper_margin	= 40,
166	.lower_margin	= 5,
167	.hsync_len	= 40,
168	.vsync_len	= 5,
169	.xres		= 640,
170	.yres		= 480,
171};
172
173/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
174static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
175	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
176	.vtiming	= &crag6410_lcd_timing,
177	.win[0]		= &crag6410_fb_win0,
178	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
179	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
180};
181
182/* 2x6 keypad */
183
184static uint32_t crag6410_keymap[] __initdata = {
185	/* KEY(row, col, keycode) */
186	KEY(0, 0, KEY_VOLUMEUP),
187	KEY(0, 1, KEY_HOME),
188	KEY(0, 2, KEY_VOLUMEDOWN),
189	KEY(0, 3, KEY_HELP),
190	KEY(0, 4, KEY_MENU),
191	KEY(0, 5, KEY_MEDIA),
192	KEY(1, 0, 232),
193	KEY(1, 1, KEY_DOWN),
194	KEY(1, 2, KEY_LEFT),
195	KEY(1, 3, KEY_UP),
196	KEY(1, 4, KEY_RIGHT),
197	KEY(1, 5, KEY_CAMERA),
198};
199
200static struct matrix_keymap_data crag6410_keymap_data __initdata = {
201	.keymap		= crag6410_keymap,
202	.keymap_size	= ARRAY_SIZE(crag6410_keymap),
203};
204
205static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
206	.keymap_data	= &crag6410_keymap_data,
207	.rows		= 2,
208	.cols		= 6,
209};
210
211static struct gpio_keys_button crag6410_gpio_keys[] = {
212	[0] = {
213		.code	= KEY_SUSPEND,
214		.gpio	= S3C64XX_GPL(10),	/* EINT 18 */
215		.type	= EV_KEY,
216		.wakeup	= 1,
217		.active_low = 1,
218	},
219	[1] = {
220		.code	= SW_FRONT_PROXIMITY,
221		.gpio	= S3C64XX_GPN(11),	/* EINT 11 */
222		.type	= EV_SW,
223	},
224};
225
226static struct gpio_keys_platform_data crag6410_gpio_keydata = {
227	.buttons	= crag6410_gpio_keys,
228	.nbuttons	= ARRAY_SIZE(crag6410_gpio_keys),
229};
230
231static struct platform_device crag6410_gpio_keydev = {
232	.name		= "gpio-keys",
233	.id		= 0,
234	.dev.platform_data = &crag6410_gpio_keydata,
235};
236
237static struct resource crag6410_dm9k_resource[] = {
238	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
239	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
240	[2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
241				| IORESOURCE_IRQ_HIGHLEVEL),
242};
243
244static struct dm9000_plat_data mini6410_dm9k_pdata = {
245	.flags	= DM9000_PLATF_16BITONLY,
246};
247
248static struct platform_device crag6410_dm9k_device = {
249	.name		= "dm9000",
250	.id		= -1,
251	.num_resources	= ARRAY_SIZE(crag6410_dm9k_resource),
252	.resource	= crag6410_dm9k_resource,
253	.dev.platform_data = &mini6410_dm9k_pdata,
254};
255
256static struct resource crag6410_mmgpio_resource[] = {
257	[0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
258};
259
260static struct platform_device crag6410_mmgpio = {
261	.name		= "basic-mmio-gpio",
262	.id		= -1,
263	.resource	= crag6410_mmgpio_resource,
264	.num_resources	= ARRAY_SIZE(crag6410_mmgpio_resource),
265	.dev.platform_data = &(struct bgpio_pdata) {
266		.base	= MMGPIO_GPIO_BASE,
267	},
268};
269
270static struct platform_device speyside_device = {
271	.name		= "speyside",
272	.id		= -1,
273};
274
275static struct platform_device lowland_device = {
276	.name		= "lowland",
277	.id		= -1,
278};
279
280static struct platform_device tobermory_device = {
281	.name		= "tobermory",
282	.id		= -1,
283};
284
285static struct platform_device littlemill_device = {
286	.name		= "littlemill",
287	.id		= -1,
288};
289
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
290static struct regulator_consumer_supply wallvdd_consumers[] = {
291	REGULATOR_SUPPLY("SPKVDD", "1-001a"),
292	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
293	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
294	REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
295	REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
296
 
 
 
297	REGULATOR_SUPPLY("DC1VDD", "0-0034"),
298	REGULATOR_SUPPLY("DC2VDD", "0-0034"),
299	REGULATOR_SUPPLY("DC3VDD", "0-0034"),
300	REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
301	REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
302	REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
303	REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
304	REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
305	REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
306	REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
307	REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
308	REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
309	REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
310
311	REGULATOR_SUPPLY("DC1VDD", "1-0034"),
312	REGULATOR_SUPPLY("DC2VDD", "1-0034"),
313	REGULATOR_SUPPLY("DC3VDD", "1-0034"),
 
 
 
 
 
 
 
 
 
 
314};
315
316static struct regulator_init_data wallvdd_data = {
317	.constraints = {
318		.always_on = 1,
319	},
320	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
321	.consumer_supplies = wallvdd_consumers,
322};
323
324static struct fixed_voltage_config wallvdd_pdata = {
325	.supply_name = "WALLVDD",
326	.microvolts = 5000000,
327	.init_data = &wallvdd_data,
328	.gpio = -EINVAL,
329};
330
331static struct platform_device wallvdd_device = {
332	.name		= "reg-fixed-voltage",
333	.id		= -1,
334	.dev = {
335		.platform_data = &wallvdd_pdata,
336	},
337};
338
339static struct platform_device *crag6410_devices[] __initdata = {
340	&s3c_device_hsmmc0,
341	&s3c_device_hsmmc2,
342	&s3c_device_i2c0,
343	&s3c_device_i2c1,
344	&s3c_device_fb,
345	&s3c_device_ohci,
346	&s3c_device_usb_hsotg,
347	&s3c_device_timer[0],
348	&s3c64xx_device_iis0,
349	&s3c64xx_device_iis1,
350	&samsung_asoc_dma,
351	&samsung_device_keypad,
352	&crag6410_gpio_keydev,
353	&crag6410_dm9k_device,
354	&s3c64xx_device_spi0,
355	&crag6410_mmgpio,
356	&crag6410_lcd_powerdev,
357	&crag6410_backlight_device,
358	&speyside_device,
359	&tobermory_device,
360	&littlemill_device,
361	&lowland_device,
 
 
 
362	&wallvdd_device,
363};
364
365static struct pca953x_platform_data crag6410_pca_data = {
366	.gpio_base	= PCA935X_GPIO_BASE,
367	.irq_base	= -1,
368};
369
370/* VDDARM is controlled by DVS1 connected to GPK(0) */
371static struct wm831x_buckv_pdata vddarm_pdata = {
372	.dvs_control_src = 1,
373	.dvs_gpio = S3C64XX_GPK(0),
374};
375
376static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
377	REGULATOR_SUPPLY("vddarm", NULL),
378};
379
380static struct regulator_init_data vddarm __initdata = {
381	.constraints = {
382		.name = "VDDARM",
383		.min_uV = 1000000,
384		.max_uV = 1300000,
385		.always_on = 1,
386		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
387	},
388	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
389	.consumer_supplies = vddarm_consumers,
390	.supply_regulator = "WALLVDD",
391	.driver_data = &vddarm_pdata,
392};
393
394static struct regulator_consumer_supply vddint_consumers[] __initdata = {
395	REGULATOR_SUPPLY("vddint", NULL),
396};
397
398static struct regulator_init_data vddint __initdata = {
399	.constraints = {
400		.name = "VDDINT",
401		.min_uV = 1000000,
402		.max_uV = 1200000,
403		.always_on = 1,
404		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
405	},
406	.num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
407	.consumer_supplies = vddint_consumers,
408	.supply_regulator = "WALLVDD",
409};
410
411static struct regulator_init_data vddmem __initdata = {
412	.constraints = {
413		.name = "VDDMEM",
414		.always_on = 1,
415	},
416};
417
418static struct regulator_init_data vddsys __initdata = {
419	.constraints = {
420		.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
421		.always_on = 1,
422	},
423};
424
425static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
426	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
427	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
428	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
429};
430
431static struct regulator_init_data vddmmc __initdata = {
432	.constraints = {
433		.name = "VDDMMC,UH",
434		.always_on = 1,
435	},
436	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
437	.consumer_supplies = vddmmc_consumers,
438	.supply_regulator = "WALLVDD",
439};
440
441static struct regulator_init_data vddotgi __initdata = {
442	.constraints = {
443		.name = "VDDOTGi",
444		.always_on = 1,
445	},
446	.supply_regulator = "WALLVDD",
447};
448
449static struct regulator_init_data vddotg __initdata = {
450	.constraints = {
451		.name = "VDDOTG",
452		.always_on = 1,
453	},
454	.supply_regulator = "WALLVDD",
455};
456
457static struct regulator_init_data vddhi __initdata = {
458	.constraints = {
459		.name = "VDDHI",
460		.always_on = 1,
461	},
462	.supply_regulator = "WALLVDD",
463};
464
465static struct regulator_init_data vddadc __initdata = {
466	.constraints = {
467		.name = "VDDADC,VDDDAC",
468		.always_on = 1,
469	},
470	.supply_regulator = "WALLVDD",
471};
472
473static struct regulator_init_data vddmem0 __initdata = {
474	.constraints = {
475		.name = "VDDMEM0",
476		.always_on = 1,
477	},
478	.supply_regulator = "WALLVDD",
479};
480
481static struct regulator_init_data vddpll __initdata = {
482	.constraints = {
483		.name = "VDDPLL",
484		.always_on = 1,
485	},
486	.supply_regulator = "WALLVDD",
487};
488
489static struct regulator_init_data vddlcd __initdata = {
490	.constraints = {
491		.name = "VDDLCD",
492		.always_on = 1,
493	},
494	.supply_regulator = "WALLVDD",
495};
496
497static struct regulator_init_data vddalive __initdata = {
498	.constraints = {
499		.name = "VDDALIVE",
500		.always_on = 1,
501	},
502	.supply_regulator = "WALLVDD",
503};
504
505static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
506	.charger_enable = 1,
507	.vlim = 2500,  /* mV */
508	.ilim = 200,   /* uA */
509};
510
511static struct wm831x_status_pdata banff_red_led __initdata = {
512	.name = "banff:red:",
513	.default_src = WM831X_STATUS_MANUAL,
514};
515
516static struct wm831x_status_pdata banff_green_led __initdata = {
517	.name = "banff:green:",
518	.default_src = WM831X_STATUS_MANUAL,
519};
520
521static struct wm831x_touch_pdata touch_pdata __initdata = {
522	.data_irq = S3C_EINT(26),
523	.pd_irq = S3C_EINT(27),
524};
525
526static struct wm831x_pdata crag_pmic_pdata __initdata = {
527	.wm831x_num = 1,
528	.irq_base = BANFF_PMIC_IRQ_BASE,
529	.gpio_base = BANFF_PMIC_GPIO_BASE,
530	.soft_shutdown = true,
531
532	.backup = &banff_backup_pdata,
533
534	.gpio_defaults = {
535		/* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
536		[4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
537		/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
538		[10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
539		/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
540		[11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
541	},
542
543	.dcdc = {
544		&vddarm,  /* DCDC1 */
545		&vddint,  /* DCDC2 */
546		&vddmem,  /* DCDC3 */
547	},
548
549	.ldo = {
550		&vddsys,   /* LDO1 */
551		&vddmmc,   /* LDO2 */
552		NULL,      /* LDO3 */
553		&vddotgi,  /* LDO4 */
554		&vddotg,   /* LDO5 */
555		&vddhi,    /* LDO6 */
556		&vddadc,   /* LDO7 */
557		&vddmem0,  /* LDO8 */
558		&vddpll,   /* LDO9 */
559		&vddlcd,   /* LDO10 */
560		&vddalive, /* LDO11 */
561	},
562
563	.status = {
564		&banff_green_led,
565		&banff_red_led,
566	},
567
568	.touch = &touch_pdata,
569};
570
571static struct i2c_board_info i2c_devs0[] __initdata = {
572	{ I2C_BOARD_INFO("24c08", 0x50), },
573	{ I2C_BOARD_INFO("tca6408", 0x20),
574	  .platform_data = &crag6410_pca_data,
575	},
576	{ I2C_BOARD_INFO("wm8312", 0x34),
577	  .platform_data = &crag_pmic_pdata,
578	  .irq = S3C_EINT(23),
579	},
580};
581
582static struct s3c2410_platform_i2c i2c0_pdata = {
583	.frequency = 400000,
584};
585
586static struct regulator_consumer_supply pvdd_1v2_consumers[] __initdata = {
587	REGULATOR_SUPPLY("DCVDD", "spi0.0"),
588	REGULATOR_SUPPLY("AVDD", "spi0.0"),
 
589};
590
591static struct regulator_init_data pvdd_1v2 __initdata = {
592	.constraints = {
593		.name = "PVDD_1V2",
594		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
595	},
596
597	.consumer_supplies = pvdd_1v2_consumers,
598	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
599};
600
601static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
602	REGULATOR_SUPPLY("LDOVDD", "1-001a"),
603	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
604	REGULATOR_SUPPLY("DBVDD", "1-001a"),
605	REGULATOR_SUPPLY("DBVDD1", "1-001a"),
606	REGULATOR_SUPPLY("DBVDD2", "1-001a"),
607	REGULATOR_SUPPLY("DBVDD3", "1-001a"),
608	REGULATOR_SUPPLY("CPVDD", "1-001a"),
609	REGULATOR_SUPPLY("AVDD2", "1-001a"),
610	REGULATOR_SUPPLY("DCVDD", "1-001a"),
611	REGULATOR_SUPPLY("AVDD", "1-001a"),
612	REGULATOR_SUPPLY("DBVDD", "spi0.0"),
 
 
 
 
 
 
 
 
 
 
613};
614
615static struct regulator_init_data pvdd_1v8 __initdata = {
616	.constraints = {
617		.name = "PVDD_1V8",
618		.always_on = 1,
619	},
620
621	.consumer_supplies = pvdd_1v8_consumers,
622	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
623};
624
625static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
626	REGULATOR_SUPPLY("MICVDD", "1-001a"),
627	REGULATOR_SUPPLY("AVDD1", "1-001a"),
628};
629
630static struct regulator_init_data pvdd_3v3 __initdata = {
631	.constraints = {
632		.name = "PVDD_3V3",
633		.always_on = 1,
634	},
635
636	.consumer_supplies = pvdd_3v3_consumers,
637	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
638};
639
640static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
641	.wm831x_num = 2,
642	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
643	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
644	.soft_shutdown = true,
645
646	.gpio_defaults = {
647		/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
648		[0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
649		[1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
650		[2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
651	},
652
653	.dcdc = {
654		&pvdd_1v2,  /* DCDC1 */
655		&pvdd_1v8,  /* DCDC2 */
656		&pvdd_3v3,  /* DCDC3 */
657	},
658
659	.disable_touch = true,
660};
661
662static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
663	.gpios = {
664		[WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
665		[WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
666		[WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
667		[WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
668		[WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
669	},
670};
671
672static struct i2c_board_info i2c_devs1[] __initdata = {
673	{ I2C_BOARD_INFO("wm8311", 0x34),
674	  .irq = S3C_EINT(0),
675	  .platform_data = &glenfarclas_pmic_pdata },
676
 
677	{ I2C_BOARD_INFO("wlf-gf-module", 0x22) },
678	{ I2C_BOARD_INFO("wlf-gf-module", 0x24) },
679	{ I2C_BOARD_INFO("wlf-gf-module", 0x25) },
680	{ I2C_BOARD_INFO("wlf-gf-module", 0x26) },
681
682	{ I2C_BOARD_INFO("wm1250-ev1", 0x27),
683	  .platform_data = &wm1250_ev1_pdata },
684};
685
686static struct s3c2410_platform_i2c i2c1_pdata = {
687	.frequency = 400000,
688	.bus_num = 1,
689};
690
691static void __init crag6410_map_io(void)
692{
693	s3c64xx_init_io(NULL, 0);
694	s3c24xx_init_clocks(12000000);
695	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
 
696
697	/* LCD type and Bypass set by bootloader */
698}
699
700static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
701	.max_width		= 4,
702	.cd_type		= S3C_SDHCI_CD_PERMANENT,
703	.host_caps		= MMC_CAP_POWER_OFF_CARD,
704};
705
706static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
707{
708	/* Set all the necessary GPG pins to special-function 2 */
709	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
710
711	/* force card-detected for prototype 0 */
712	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
713}
714
715static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
716	.max_width		= 4,
717	.cd_type		= S3C_SDHCI_CD_INTERNAL,
718	.cfg_gpio		= crag6410_cfg_sdhci0,
719	.host_caps		= MMC_CAP_POWER_OFF_CARD,
720};
721
722static const struct gpio_led gpio_leds[] = {
723	{
724		.name = "d13:green:",
725		.gpio = MMGPIO_GPIO_BASE + 0,
726		.default_state = LEDS_GPIO_DEFSTATE_ON,
727	},
728	{
729		.name = "d14:green:",
730		.gpio = MMGPIO_GPIO_BASE + 1,
731		.default_state = LEDS_GPIO_DEFSTATE_ON,
732	},
733	{
734		.name = "d15:green:",
735		.gpio = MMGPIO_GPIO_BASE + 2,
736		.default_state = LEDS_GPIO_DEFSTATE_ON,
737	},
738	{
739		.name = "d16:green:",
740		.gpio = MMGPIO_GPIO_BASE + 3,
741		.default_state = LEDS_GPIO_DEFSTATE_ON,
742	},
743	{
744		.name = "d17:green:",
745		.gpio = MMGPIO_GPIO_BASE + 4,
746		.default_state = LEDS_GPIO_DEFSTATE_ON,
747	},
748	{
749		.name = "d18:green:",
750		.gpio = MMGPIO_GPIO_BASE + 5,
751		.default_state = LEDS_GPIO_DEFSTATE_ON,
752	},
753	{
754		.name = "d19:green:",
755		.gpio = MMGPIO_GPIO_BASE + 6,
756		.default_state = LEDS_GPIO_DEFSTATE_ON,
757	},
758	{
759		.name = "d20:green:",
760		.gpio = MMGPIO_GPIO_BASE + 7,
761		.default_state = LEDS_GPIO_DEFSTATE_ON,
762	},
763};
764
765static const struct gpio_led_platform_data gpio_leds_pdata = {
766	.leds = gpio_leds,
767	.num_leds = ARRAY_SIZE(gpio_leds),
768};
769
770static struct s3c_hsotg_plat crag6410_hsotg_pdata;
771
772static void __init crag6410_machine_init(void)
773{
774	/* Open drain IRQs need pullups */
775	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
776	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
777
778	gpio_request(S3C64XX_GPB(0), "LCD power");
779	gpio_direction_output(S3C64XX_GPB(0), 0);
780
781	gpio_request(S3C64XX_GPF(14), "LCD PWM");
782	gpio_direction_output(S3C64XX_GPF(14), 0);  /* turn off */
783
784	gpio_request(S3C64XX_GPB(1), "SD power");
785	gpio_direction_output(S3C64XX_GPB(1), 0);
786
787	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
788	gpio_direction_output(S3C64XX_GPF(10), 1);
789
790	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
791	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
792
793	s3c_i2c0_set_platdata(&i2c0_pdata);
794	s3c_i2c1_set_platdata(&i2c1_pdata);
795	s3c_fb_set_platdata(&crag6410_lcd_pdata);
796	s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
797
798	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
799	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
800
801	samsung_keypad_set_platdata(&crag6410_keypad_data);
802	s3c64xx_spi0_set_platdata(&s3c64xx_spi0_pdata, 0, 1);
803
 
804	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
805
806	gpio_led_register_device(-1, &gpio_leds_pdata);
807
808	regulator_has_full_constraints();
809
810	s3c64xx_pm_init();
811}
812
813MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
814	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
815	.atag_offset	= 0x100,
 
816	.init_irq	= s3c6410_init_irq,
817	.handle_irq	= vic_handle_irq,
818	.map_io		= crag6410_map_io,
819	.init_machine	= crag6410_machine_init,
820	.init_late	= s3c64xx_init_late,
821	.timer		= &s3c24xx_timer,
822	.restart	= s3c64xx_restart,
823MACHINE_END
v4.10.11
  1/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2 *
  3 * Copyright 2011 Wolfson Microelectronics plc
  4 *	Mark Brown <broonie@opensource.wolfsonmicro.com>
  5 *
  6 * Copyright 2011 Simtec Electronics
  7 *	Ben Dooks <ben@simtec.co.uk>
  8 *
  9 * This program is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License version 2 as
 11 * published by the Free Software Foundation.
 12 */
 13
 14#include <linux/kernel.h>
 15#include <linux/list.h>
 16#include <linux/serial_core.h>
 17#include <linux/serial_s3c.h>
 18#include <linux/platform_device.h>
 19#include <linux/fb.h>
 20#include <linux/io.h>
 21#include <linux/init.h>
 22#include <linux/gpio.h>
 23#include <linux/leds.h>
 24#include <linux/delay.h>
 25#include <linux/mmc/host.h>
 26#include <linux/regulator/machine.h>
 27#include <linux/regulator/fixed.h>
 28#include <linux/pwm.h>
 29#include <linux/pwm_backlight.h>
 30#include <linux/dm9000.h>
 31#include <linux/gpio_keys.h>
 32#include <linux/gpio/driver.h>
 33#include <linux/spi/spi.h>
 34
 35#include <linux/platform_data/pca953x.h>
 36#include <linux/platform_data/s3c-hsotg.h>
 37
 38#include <video/platform_lcd.h>
 39
 40#include <linux/mfd/wm831x/core.h>
 41#include <linux/mfd/wm831x/pdata.h>
 42#include <linux/mfd/wm831x/irq.h>
 43#include <linux/mfd/wm831x/gpio.h>
 44
 45#include <sound/wm1250-ev1.h>
 46
 
 47#include <asm/mach/arch.h>
 48#include <asm/mach-types.h>
 49
 50#include <video/samsung_fimd.h>
 51#include <mach/hardware.h>
 52#include <mach/map.h>
 
 
 53#include <mach/regs-gpio.h>
 54#include <mach/gpio-samsung.h>
 55#include <mach/irqs.h>
 
 
 56
 
 
 57#include <plat/fb.h>
 58#include <plat/sdhci.h>
 59#include <plat/gpio-cfg.h>
 60#include <linux/platform_data/spi-s3c64xx.h>
 61
 62#include <plat/keypad.h>
 
 63#include <plat/devs.h>
 64#include <plat/cpu.h>
 65#include <plat/adc.h>
 66#include <linux/platform_data/i2c-s3c2410.h>
 67#include <plat/pm.h>
 68#include <plat/samsung-time.h>
 69
 70#include "common.h"
 71#include "crag6410.h"
 72#include "regs-gpio-memport.h"
 73#include "regs-modem.h"
 74#include "regs-sys.h"
 75
 76/* serial port setup */
 77
 78#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
 79#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
 80#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
 81
 82static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
 83	[0] = {
 84		.hwport		= 0,
 85		.flags		= 0,
 86		.ucon		= UCON,
 87		.ulcon		= ULCON,
 88		.ufcon		= UFCON,
 89	},
 90	[1] = {
 91		.hwport		= 1,
 92		.flags		= 0,
 93		.ucon		= UCON,
 94		.ulcon		= ULCON,
 95		.ufcon		= UFCON,
 96	},
 97	[2] = {
 98		.hwport		= 2,
 99		.flags		= 0,
100		.ucon		= UCON,
101		.ulcon		= ULCON,
102		.ufcon		= UFCON,
103	},
104	[3] = {
105		.hwport		= 3,
106		.flags		= 0,
107		.ucon		= UCON,
108		.ulcon		= ULCON,
109		.ufcon		= UFCON,
110	},
111};
112
113static struct pwm_lookup crag6410_pwm_lookup[] = {
114	PWM_LOOKUP("samsung-pwm", 0, "pwm-backlight", NULL, 100000,
115		   PWM_POLARITY_NORMAL),
116};
117
118static struct platform_pwm_backlight_data crag6410_backlight_data = {
 
119	.max_brightness	= 1000,
120	.dft_brightness	= 600,
121	.enable_gpio	= -1,
122};
123
124static struct platform_device crag6410_backlight_device = {
125	.name		= "pwm-backlight",
126	.id		= -1,
127	.dev		= {
128		.parent	= &samsung_device_pwm.dev,
129		.platform_data = &crag6410_backlight_data,
130	},
131};
132
133static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
134{
135	pr_debug("%s: setting power %d\n", __func__, power);
136
137	if (power) {
138		gpio_set_value(S3C64XX_GPB(0), 1);
139		msleep(1);
140		s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
141	} else {
142		gpio_direction_output(S3C64XX_GPF(14), 0);
143		gpio_set_value(S3C64XX_GPB(0), 0);
144	}
145}
146
147static struct platform_device crag6410_lcd_powerdev = {
148	.name			= "platform-lcd",
149	.id			= -1,
150	.dev.parent		= &s3c_device_fb.dev,
151	.dev.platform_data	= &(struct plat_lcd_data) {
152		.set_power	= crag6410_lcd_power_set,
153	},
154};
155
156/* 640x480 URT */
157static struct s3c_fb_pd_win crag6410_fb_win0 = {
158	.max_bpp	= 32,
159	.default_bpp	= 16,
160	.xres		= 640,
161	.yres		= 480,
162	.virtual_y	= 480 * 2,
163	.virtual_x	= 640,
164};
165
166static struct fb_videomode crag6410_lcd_timing = {
167	.left_margin	= 150,
168	.right_margin	= 80,
169	.upper_margin	= 40,
170	.lower_margin	= 5,
171	.hsync_len	= 40,
172	.vsync_len	= 5,
173	.xres		= 640,
174	.yres		= 480,
175};
176
177/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
178static struct s3c_fb_platdata crag6410_lcd_pdata = {
179	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
180	.vtiming	= &crag6410_lcd_timing,
181	.win[0]		= &crag6410_fb_win0,
182	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
183	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
184};
185
186/* 2x6 keypad */
187
188static uint32_t crag6410_keymap[] = {
189	/* KEY(row, col, keycode) */
190	KEY(0, 0, KEY_VOLUMEUP),
191	KEY(0, 1, KEY_HOME),
192	KEY(0, 2, KEY_VOLUMEDOWN),
193	KEY(0, 3, KEY_HELP),
194	KEY(0, 4, KEY_MENU),
195	KEY(0, 5, KEY_MEDIA),
196	KEY(1, 0, 232),
197	KEY(1, 1, KEY_DOWN),
198	KEY(1, 2, KEY_LEFT),
199	KEY(1, 3, KEY_UP),
200	KEY(1, 4, KEY_RIGHT),
201	KEY(1, 5, KEY_CAMERA),
202};
203
204static struct matrix_keymap_data crag6410_keymap_data = {
205	.keymap		= crag6410_keymap,
206	.keymap_size	= ARRAY_SIZE(crag6410_keymap),
207};
208
209static struct samsung_keypad_platdata crag6410_keypad_data = {
210	.keymap_data	= &crag6410_keymap_data,
211	.rows		= 2,
212	.cols		= 6,
213};
214
215static struct gpio_keys_button crag6410_gpio_keys[] = {
216	[0] = {
217		.code	= KEY_SUSPEND,
218		.gpio	= S3C64XX_GPL(10),	/* EINT 18 */
219		.type	= EV_KEY,
220		.wakeup	= 1,
221		.active_low = 1,
222	},
223	[1] = {
224		.code	= SW_FRONT_PROXIMITY,
225		.gpio	= S3C64XX_GPN(11),	/* EINT 11 */
226		.type	= EV_SW,
227	},
228};
229
230static struct gpio_keys_platform_data crag6410_gpio_keydata = {
231	.buttons	= crag6410_gpio_keys,
232	.nbuttons	= ARRAY_SIZE(crag6410_gpio_keys),
233};
234
235static struct platform_device crag6410_gpio_keydev = {
236	.name		= "gpio-keys",
237	.id		= 0,
238	.dev.platform_data = &crag6410_gpio_keydata,
239};
240
241static struct resource crag6410_dm9k_resource[] = {
242	[0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
243	[1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
244	[2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
245				| IORESOURCE_IRQ_HIGHLEVEL),
246};
247
248static struct dm9000_plat_data mini6410_dm9k_pdata = {
249	.flags	= DM9000_PLATF_16BITONLY,
250};
251
252static struct platform_device crag6410_dm9k_device = {
253	.name		= "dm9000",
254	.id		= -1,
255	.num_resources	= ARRAY_SIZE(crag6410_dm9k_resource),
256	.resource	= crag6410_dm9k_resource,
257	.dev.platform_data = &mini6410_dm9k_pdata,
258};
259
260static struct resource crag6410_mmgpio_resource[] = {
261	[0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
262};
263
264static struct platform_device crag6410_mmgpio = {
265	.name		= "basic-mmio-gpio",
266	.id		= -1,
267	.resource	= crag6410_mmgpio_resource,
268	.num_resources	= ARRAY_SIZE(crag6410_mmgpio_resource),
269	.dev.platform_data = &(struct bgpio_pdata) {
270		.base	= MMGPIO_GPIO_BASE,
271	},
272};
273
274static struct platform_device speyside_device = {
275	.name		= "speyside",
276	.id		= -1,
277};
278
279static struct platform_device lowland_device = {
280	.name		= "lowland",
281	.id		= -1,
282};
283
284static struct platform_device tobermory_device = {
285	.name		= "tobermory",
286	.id		= -1,
287};
288
289static struct platform_device littlemill_device = {
290	.name		= "littlemill",
291	.id		= -1,
292};
293
294static struct platform_device bells_wm2200_device = {
295	.name		= "bells",
296	.id		= 0,
297};
298
299static struct platform_device bells_wm5102_device = {
300	.name		= "bells",
301	.id		= 1,
302};
303
304static struct platform_device bells_wm5110_device = {
305	.name		= "bells",
306	.id		= 2,
307};
308
309static struct regulator_consumer_supply wallvdd_consumers[] = {
310	REGULATOR_SUPPLY("SPKVDD", "1-001a"),
311	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
312	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
313	REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
314	REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
315
316	REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
317	REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
318
319	REGULATOR_SUPPLY("DC1VDD", "0-0034"),
320	REGULATOR_SUPPLY("DC2VDD", "0-0034"),
321	REGULATOR_SUPPLY("DC3VDD", "0-0034"),
322	REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
323	REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
324	REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
325	REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
326	REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
327	REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
328	REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
329	REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
330	REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
331	REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
332
333	REGULATOR_SUPPLY("DC1VDD", "1-0034"),
334	REGULATOR_SUPPLY("DC2VDD", "1-0034"),
335	REGULATOR_SUPPLY("DC3VDD", "1-0034"),
336	REGULATOR_SUPPLY("LDO1VDD", "1-0034"),
337	REGULATOR_SUPPLY("LDO2VDD", "1-0034"),
338	REGULATOR_SUPPLY("LDO4VDD", "1-0034"),
339	REGULATOR_SUPPLY("LDO5VDD", "1-0034"),
340	REGULATOR_SUPPLY("LDO6VDD", "1-0034"),
341	REGULATOR_SUPPLY("LDO7VDD", "1-0034"),
342	REGULATOR_SUPPLY("LDO8VDD", "1-0034"),
343	REGULATOR_SUPPLY("LDO9VDD", "1-0034"),
344	REGULATOR_SUPPLY("LDO10VDD", "1-0034"),
345	REGULATOR_SUPPLY("LDO11VDD", "1-0034"),
346};
347
348static struct regulator_init_data wallvdd_data = {
349	.constraints = {
350		.always_on = 1,
351	},
352	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
353	.consumer_supplies = wallvdd_consumers,
354};
355
356static struct fixed_voltage_config wallvdd_pdata = {
357	.supply_name = "WALLVDD",
358	.microvolts = 5000000,
359	.init_data = &wallvdd_data,
360	.gpio = -EINVAL,
361};
362
363static struct platform_device wallvdd_device = {
364	.name		= "reg-fixed-voltage",
365	.id		= -1,
366	.dev = {
367		.platform_data = &wallvdd_pdata,
368	},
369};
370
371static struct platform_device *crag6410_devices[] __initdata = {
372	&s3c_device_hsmmc0,
373	&s3c_device_hsmmc2,
374	&s3c_device_i2c0,
375	&s3c_device_i2c1,
376	&s3c_device_fb,
377	&s3c_device_ohci,
378	&s3c_device_usb_hsotg,
379	&samsung_device_pwm,
380	&s3c64xx_device_iis0,
381	&s3c64xx_device_iis1,
 
382	&samsung_device_keypad,
383	&crag6410_gpio_keydev,
384	&crag6410_dm9k_device,
385	&s3c64xx_device_spi0,
386	&crag6410_mmgpio,
387	&crag6410_lcd_powerdev,
388	&crag6410_backlight_device,
389	&speyside_device,
390	&tobermory_device,
391	&littlemill_device,
392	&lowland_device,
393	&bells_wm2200_device,
394	&bells_wm5102_device,
395	&bells_wm5110_device,
396	&wallvdd_device,
397};
398
399static struct pca953x_platform_data crag6410_pca_data = {
400	.gpio_base	= PCA935X_GPIO_BASE,
401	.irq_base	= -1,
402};
403
404/* VDDARM is controlled by DVS1 connected to GPK(0) */
405static struct wm831x_buckv_pdata vddarm_pdata = {
406	.dvs_control_src = 1,
407	.dvs_gpio = S3C64XX_GPK(0),
408};
409
410static struct regulator_consumer_supply vddarm_consumers[] = {
411	REGULATOR_SUPPLY("vddarm", NULL),
412};
413
414static struct regulator_init_data vddarm = {
415	.constraints = {
416		.name = "VDDARM",
417		.min_uV = 1000000,
418		.max_uV = 1300000,
419		.always_on = 1,
420		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
421	},
422	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
423	.consumer_supplies = vddarm_consumers,
424	.supply_regulator = "WALLVDD",
425	.driver_data = &vddarm_pdata,
426};
427
428static struct regulator_consumer_supply vddint_consumers[] = {
429	REGULATOR_SUPPLY("vddint", NULL),
430};
431
432static struct regulator_init_data vddint = {
433	.constraints = {
434		.name = "VDDINT",
435		.min_uV = 1000000,
436		.max_uV = 1200000,
437		.always_on = 1,
438		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
439	},
440	.num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
441	.consumer_supplies = vddint_consumers,
442	.supply_regulator = "WALLVDD",
443};
444
445static struct regulator_init_data vddmem = {
446	.constraints = {
447		.name = "VDDMEM",
448		.always_on = 1,
449	},
450};
451
452static struct regulator_init_data vddsys = {
453	.constraints = {
454		.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
455		.always_on = 1,
456	},
457};
458
459static struct regulator_consumer_supply vddmmc_consumers[] = {
460	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
461	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
462	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
463};
464
465static struct regulator_init_data vddmmc = {
466	.constraints = {
467		.name = "VDDMMC,UH",
468		.always_on = 1,
469	},
470	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
471	.consumer_supplies = vddmmc_consumers,
472	.supply_regulator = "WALLVDD",
473};
474
475static struct regulator_init_data vddotgi = {
476	.constraints = {
477		.name = "VDDOTGi",
478		.always_on = 1,
479	},
480	.supply_regulator = "WALLVDD",
481};
482
483static struct regulator_init_data vddotg = {
484	.constraints = {
485		.name = "VDDOTG",
486		.always_on = 1,
487	},
488	.supply_regulator = "WALLVDD",
489};
490
491static struct regulator_init_data vddhi = {
492	.constraints = {
493		.name = "VDDHI",
494		.always_on = 1,
495	},
496	.supply_regulator = "WALLVDD",
497};
498
499static struct regulator_init_data vddadc = {
500	.constraints = {
501		.name = "VDDADC,VDDDAC",
502		.always_on = 1,
503	},
504	.supply_regulator = "WALLVDD",
505};
506
507static struct regulator_init_data vddmem0 = {
508	.constraints = {
509		.name = "VDDMEM0",
510		.always_on = 1,
511	},
512	.supply_regulator = "WALLVDD",
513};
514
515static struct regulator_init_data vddpll = {
516	.constraints = {
517		.name = "VDDPLL",
518		.always_on = 1,
519	},
520	.supply_regulator = "WALLVDD",
521};
522
523static struct regulator_init_data vddlcd = {
524	.constraints = {
525		.name = "VDDLCD",
526		.always_on = 1,
527	},
528	.supply_regulator = "WALLVDD",
529};
530
531static struct regulator_init_data vddalive = {
532	.constraints = {
533		.name = "VDDALIVE",
534		.always_on = 1,
535	},
536	.supply_regulator = "WALLVDD",
537};
538
539static struct wm831x_backup_pdata banff_backup_pdata = {
540	.charger_enable = 1,
541	.vlim = 2500,  /* mV */
542	.ilim = 200,   /* uA */
543};
544
545static struct wm831x_status_pdata banff_red_led = {
546	.name = "banff:red:",
547	.default_src = WM831X_STATUS_MANUAL,
548};
549
550static struct wm831x_status_pdata banff_green_led = {
551	.name = "banff:green:",
552	.default_src = WM831X_STATUS_MANUAL,
553};
554
555static struct wm831x_touch_pdata touch_pdata = {
556	.data_irq = S3C_EINT(26),
557	.pd_irq = S3C_EINT(27),
558};
559
560static struct wm831x_pdata crag_pmic_pdata = {
561	.wm831x_num = 1,
562	.irq_base = BANFF_PMIC_IRQ_BASE,
563	.gpio_base = BANFF_PMIC_GPIO_BASE,
564	.soft_shutdown = true,
565
566	.backup = &banff_backup_pdata,
567
568	.gpio_defaults = {
569		/* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
570		[4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
571		/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
572		[10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
573		/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
574		[11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
575	},
576
577	.dcdc = {
578		&vddarm,  /* DCDC1 */
579		&vddint,  /* DCDC2 */
580		&vddmem,  /* DCDC3 */
581	},
582
583	.ldo = {
584		&vddsys,   /* LDO1 */
585		&vddmmc,   /* LDO2 */
586		NULL,      /* LDO3 */
587		&vddotgi,  /* LDO4 */
588		&vddotg,   /* LDO5 */
589		&vddhi,    /* LDO6 */
590		&vddadc,   /* LDO7 */
591		&vddmem0,  /* LDO8 */
592		&vddpll,   /* LDO9 */
593		&vddlcd,   /* LDO10 */
594		&vddalive, /* LDO11 */
595	},
596
597	.status = {
598		&banff_green_led,
599		&banff_red_led,
600	},
601
602	.touch = &touch_pdata,
603};
604
605static struct i2c_board_info i2c_devs0[] = {
606	{ I2C_BOARD_INFO("24c08", 0x50), },
607	{ I2C_BOARD_INFO("tca6408", 0x20),
608	  .platform_data = &crag6410_pca_data,
609	},
610	{ I2C_BOARD_INFO("wm8312", 0x34),
611	  .platform_data = &crag_pmic_pdata,
612	  .irq = S3C_EINT(23),
613	},
614};
615
616static struct s3c2410_platform_i2c i2c0_pdata = {
617	.frequency = 400000,
618};
619
620static struct regulator_consumer_supply pvdd_1v2_consumers[] = {
621	REGULATOR_SUPPLY("DCVDD", "spi0.0"),
622	REGULATOR_SUPPLY("AVDD", "spi0.0"),
623	REGULATOR_SUPPLY("AVDD", "spi0.1"),
624};
625
626static struct regulator_init_data pvdd_1v2 = {
627	.constraints = {
628		.name = "PVDD_1V2",
629		.valid_ops_mask = REGULATOR_CHANGE_STATUS,
630	},
631
632	.consumer_supplies = pvdd_1v2_consumers,
633	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
634};
635
636static struct regulator_consumer_supply pvdd_1v8_consumers[] = {
637	REGULATOR_SUPPLY("LDOVDD", "1-001a"),
638	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
639	REGULATOR_SUPPLY("DBVDD", "1-001a"),
640	REGULATOR_SUPPLY("DBVDD1", "1-001a"),
641	REGULATOR_SUPPLY("DBVDD2", "1-001a"),
642	REGULATOR_SUPPLY("DBVDD3", "1-001a"),
643	REGULATOR_SUPPLY("CPVDD", "1-001a"),
644	REGULATOR_SUPPLY("AVDD2", "1-001a"),
645	REGULATOR_SUPPLY("DCVDD", "1-001a"),
646	REGULATOR_SUPPLY("AVDD", "1-001a"),
647	REGULATOR_SUPPLY("DBVDD", "spi0.0"),
648
649	REGULATOR_SUPPLY("DBVDD", "1-003a"),
650	REGULATOR_SUPPLY("LDOVDD", "1-003a"),
651	REGULATOR_SUPPLY("CPVDD", "1-003a"),
652	REGULATOR_SUPPLY("AVDD", "1-003a"),
653	REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
654	REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
655	REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
656	REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
657	REGULATOR_SUPPLY("CPVDD", "spi0.1"),
658};
659
660static struct regulator_init_data pvdd_1v8 = {
661	.constraints = {
662		.name = "PVDD_1V8",
663		.always_on = 1,
664	},
665
666	.consumer_supplies = pvdd_1v8_consumers,
667	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
668};
669
670static struct regulator_consumer_supply pvdd_3v3_consumers[] = {
671	REGULATOR_SUPPLY("MICVDD", "1-001a"),
672	REGULATOR_SUPPLY("AVDD1", "1-001a"),
673};
674
675static struct regulator_init_data pvdd_3v3 = {
676	.constraints = {
677		.name = "PVDD_3V3",
678		.always_on = 1,
679	},
680
681	.consumer_supplies = pvdd_3v3_consumers,
682	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
683};
684
685static struct wm831x_pdata glenfarclas_pmic_pdata = {
686	.wm831x_num = 2,
687	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
688	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
689	.soft_shutdown = true,
690
691	.gpio_defaults = {
692		/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
693		[0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
694		[1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
695		[2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
696	},
697
698	.dcdc = {
699		&pvdd_1v2,  /* DCDC1 */
700		&pvdd_1v8,  /* DCDC2 */
701		&pvdd_3v3,  /* DCDC3 */
702	},
703
704	.disable_touch = true,
705};
706
707static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
708	.gpios = {
709		[WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
710		[WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
711		[WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
712		[WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
713		[WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
714	},
715};
716
717static struct i2c_board_info i2c_devs1[] = {
718	{ I2C_BOARD_INFO("wm8311", 0x34),
719	  .irq = S3C_EINT(0),
720	  .platform_data = &glenfarclas_pmic_pdata },
721
722	{ I2C_BOARD_INFO("wlf-gf-module", 0x20) },
723	{ I2C_BOARD_INFO("wlf-gf-module", 0x22) },
724	{ I2C_BOARD_INFO("wlf-gf-module", 0x24) },
725	{ I2C_BOARD_INFO("wlf-gf-module", 0x25) },
726	{ I2C_BOARD_INFO("wlf-gf-module", 0x26) },
727
728	{ I2C_BOARD_INFO("wm1250-ev1", 0x27),
729	  .platform_data = &wm1250_ev1_pdata },
730};
731
732static struct s3c2410_platform_i2c i2c1_pdata = {
733	.frequency = 400000,
734	.bus_num = 1,
735};
736
737static void __init crag6410_map_io(void)
738{
739	s3c64xx_init_io(NULL, 0);
740	s3c64xx_set_xtal_freq(12000000);
741	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
742	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
743
744	/* LCD type and Bypass set by bootloader */
745}
746
747static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
748	.max_width		= 4,
749	.cd_type		= S3C_SDHCI_CD_PERMANENT,
750	.host_caps		= MMC_CAP_POWER_OFF_CARD,
751};
752
753static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
754{
755	/* Set all the necessary GPG pins to special-function 2 */
756	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
757
758	/* force card-detected for prototype 0 */
759	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
760}
761
762static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
763	.max_width		= 4,
764	.cd_type		= S3C_SDHCI_CD_INTERNAL,
765	.cfg_gpio		= crag6410_cfg_sdhci0,
766	.host_caps		= MMC_CAP_POWER_OFF_CARD,
767};
768
769static const struct gpio_led gpio_leds[] = {
770	{
771		.name = "d13:green:",
772		.gpio = MMGPIO_GPIO_BASE + 0,
773		.default_state = LEDS_GPIO_DEFSTATE_ON,
774	},
775	{
776		.name = "d14:green:",
777		.gpio = MMGPIO_GPIO_BASE + 1,
778		.default_state = LEDS_GPIO_DEFSTATE_ON,
779	},
780	{
781		.name = "d15:green:",
782		.gpio = MMGPIO_GPIO_BASE + 2,
783		.default_state = LEDS_GPIO_DEFSTATE_ON,
784	},
785	{
786		.name = "d16:green:",
787		.gpio = MMGPIO_GPIO_BASE + 3,
788		.default_state = LEDS_GPIO_DEFSTATE_ON,
789	},
790	{
791		.name = "d17:green:",
792		.gpio = MMGPIO_GPIO_BASE + 4,
793		.default_state = LEDS_GPIO_DEFSTATE_ON,
794	},
795	{
796		.name = "d18:green:",
797		.gpio = MMGPIO_GPIO_BASE + 5,
798		.default_state = LEDS_GPIO_DEFSTATE_ON,
799	},
800	{
801		.name = "d19:green:",
802		.gpio = MMGPIO_GPIO_BASE + 6,
803		.default_state = LEDS_GPIO_DEFSTATE_ON,
804	},
805	{
806		.name = "d20:green:",
807		.gpio = MMGPIO_GPIO_BASE + 7,
808		.default_state = LEDS_GPIO_DEFSTATE_ON,
809	},
810};
811
812static const struct gpio_led_platform_data gpio_leds_pdata = {
813	.leds = gpio_leds,
814	.num_leds = ARRAY_SIZE(gpio_leds),
815};
816
817static struct dwc2_hsotg_plat crag6410_hsotg_pdata;
818
819static void __init crag6410_machine_init(void)
820{
821	/* Open drain IRQs need pullups */
822	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
823	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
824
825	gpio_request(S3C64XX_GPB(0), "LCD power");
826	gpio_direction_output(S3C64XX_GPB(0), 0);
827
828	gpio_request(S3C64XX_GPF(14), "LCD PWM");
829	gpio_direction_output(S3C64XX_GPF(14), 0);  /* turn off */
830
831	gpio_request(S3C64XX_GPB(1), "SD power");
832	gpio_direction_output(S3C64XX_GPB(1), 0);
833
834	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
835	gpio_direction_output(S3C64XX_GPF(10), 1);
836
837	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
838	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
839
840	s3c_i2c0_set_platdata(&i2c0_pdata);
841	s3c_i2c1_set_platdata(&i2c1_pdata);
842	s3c_fb_set_platdata(&crag6410_lcd_pdata);
843	dwc2_hsotg_set_platdata(&crag6410_hsotg_pdata);
844
845	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
846	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
847
848	samsung_keypad_set_platdata(&crag6410_keypad_data);
849	s3c64xx_spi0_set_platdata(NULL, 0, 2);
850
851	pwm_add_table(crag6410_pwm_lookup, ARRAY_SIZE(crag6410_pwm_lookup));
852	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
853
854	gpio_led_register_device(-1, &gpio_leds_pdata);
855
856	regulator_has_full_constraints();
857
858	s3c64xx_pm_init();
859}
860
861MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
862	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
863	.atag_offset	= 0x100,
864	.nr_irqs	= S3C64XX_NR_IRQS,
865	.init_irq	= s3c6410_init_irq,
 
866	.map_io		= crag6410_map_io,
867	.init_machine	= crag6410_machine_init,
868	.init_time	= samsung_timer_init,
 
869	.restart	= s3c64xx_restart,
870MACHINE_END