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1/* Intel PRO/1000 Linux driver
2 * Copyright(c) 1999 - 2015 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * Linux NICS <linux.nics@intel.com>
18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
20 */
21
22/* PTP 1588 Hardware Clock (PHC)
23 * Derived from PTP Hardware Clock driver for Intel 82576 and 82580 (igb)
24 * Copyright (C) 2011 Richard Cochran <richardcochran@gmail.com>
25 */
26
27#include "e1000.h"
28
29#ifdef CONFIG_E1000E_HWTS
30#include <linux/clocksource.h>
31#include <linux/ktime.h>
32#include <asm/tsc.h>
33#endif
34
35/**
36 * e1000e_phc_adjfreq - adjust the frequency of the hardware clock
37 * @ptp: ptp clock structure
38 * @delta: Desired frequency change in parts per billion
39 *
40 * Adjust the frequency of the PHC cycle counter by the indicated delta from
41 * the base frequency.
42 **/
43static int e1000e_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta)
44{
45 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
46 ptp_clock_info);
47 struct e1000_hw *hw = &adapter->hw;
48 bool neg_adj = false;
49 unsigned long flags;
50 u64 adjustment;
51 u32 timinca, incvalue;
52 s32 ret_val;
53
54 if ((delta > ptp->max_adj) || (delta <= -1000000000))
55 return -EINVAL;
56
57 if (delta < 0) {
58 neg_adj = true;
59 delta = -delta;
60 }
61
62 /* Get the System Time Register SYSTIM base frequency */
63 ret_val = e1000e_get_base_timinca(adapter, &timinca);
64 if (ret_val)
65 return ret_val;
66
67 spin_lock_irqsave(&adapter->systim_lock, flags);
68
69 incvalue = timinca & E1000_TIMINCA_INCVALUE_MASK;
70
71 adjustment = incvalue;
72 adjustment *= delta;
73 adjustment = div_u64(adjustment, 1000000000);
74
75 incvalue = neg_adj ? (incvalue - adjustment) : (incvalue + adjustment);
76
77 timinca &= ~E1000_TIMINCA_INCVALUE_MASK;
78 timinca |= incvalue;
79
80 ew32(TIMINCA, timinca);
81
82 adapter->ptp_delta = delta;
83
84 spin_unlock_irqrestore(&adapter->systim_lock, flags);
85
86 return 0;
87}
88
89/**
90 * e1000e_phc_adjtime - Shift the time of the hardware clock
91 * @ptp: ptp clock structure
92 * @delta: Desired change in nanoseconds
93 *
94 * Adjust the timer by resetting the timecounter structure.
95 **/
96static int e1000e_phc_adjtime(struct ptp_clock_info *ptp, s64 delta)
97{
98 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
99 ptp_clock_info);
100 unsigned long flags;
101
102 spin_lock_irqsave(&adapter->systim_lock, flags);
103 timecounter_adjtime(&adapter->tc, delta);
104 spin_unlock_irqrestore(&adapter->systim_lock, flags);
105
106 return 0;
107}
108
109#ifdef CONFIG_E1000E_HWTS
110#define MAX_HW_WAIT_COUNT (3)
111
112/**
113 * e1000e_phc_get_syncdevicetime - Callback given to timekeeping code reads system/device registers
114 * @device: current device time
115 * @system: system counter value read synchronously with device time
116 * @ctx: context provided by timekeeping code
117 *
118 * Read device and system (ART) clock simultaneously and return the corrected
119 * clock values in ns.
120 **/
121static int e1000e_phc_get_syncdevicetime(ktime_t *device,
122 struct system_counterval_t *system,
123 void *ctx)
124{
125 struct e1000_adapter *adapter = (struct e1000_adapter *)ctx;
126 struct e1000_hw *hw = &adapter->hw;
127 unsigned long flags;
128 int i;
129 u32 tsync_ctrl;
130 u64 dev_cycles;
131 u64 sys_cycles;
132
133 tsync_ctrl = er32(TSYNCTXCTL);
134 tsync_ctrl |= E1000_TSYNCTXCTL_START_SYNC |
135 E1000_TSYNCTXCTL_MAX_ALLOWED_DLY_MASK;
136 ew32(TSYNCTXCTL, tsync_ctrl);
137 for (i = 0; i < MAX_HW_WAIT_COUNT; ++i) {
138 udelay(1);
139 tsync_ctrl = er32(TSYNCTXCTL);
140 if (tsync_ctrl & E1000_TSYNCTXCTL_SYNC_COMP)
141 break;
142 }
143
144 if (i == MAX_HW_WAIT_COUNT)
145 return -ETIMEDOUT;
146
147 dev_cycles = er32(SYSSTMPH);
148 dev_cycles <<= 32;
149 dev_cycles |= er32(SYSSTMPL);
150 spin_lock_irqsave(&adapter->systim_lock, flags);
151 *device = ns_to_ktime(timecounter_cyc2time(&adapter->tc, dev_cycles));
152 spin_unlock_irqrestore(&adapter->systim_lock, flags);
153
154 sys_cycles = er32(PLTSTMPH);
155 sys_cycles <<= 32;
156 sys_cycles |= er32(PLTSTMPL);
157 *system = convert_art_to_tsc(sys_cycles);
158
159 return 0;
160}
161
162/**
163 * e1000e_phc_getsynctime - Reads the current system/device cross timestamp
164 * @ptp: ptp clock structure
165 * @cts: structure containing timestamp
166 *
167 * Read device and system (ART) clock simultaneously and return the scaled
168 * clock values in ns.
169 **/
170static int e1000e_phc_getcrosststamp(struct ptp_clock_info *ptp,
171 struct system_device_crosststamp *xtstamp)
172{
173 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
174 ptp_clock_info);
175
176 return get_device_system_crosststamp(e1000e_phc_get_syncdevicetime,
177 adapter, NULL, xtstamp);
178}
179#endif/*CONFIG_E1000E_HWTS*/
180
181/**
182 * e1000e_phc_gettime - Reads the current time from the hardware clock
183 * @ptp: ptp clock structure
184 * @ts: timespec structure to hold the current time value
185 *
186 * Read the timecounter and return the correct value in ns after converting
187 * it into a struct timespec.
188 **/
189static int e1000e_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
190{
191 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
192 ptp_clock_info);
193 unsigned long flags;
194 u64 ns;
195
196 spin_lock_irqsave(&adapter->systim_lock, flags);
197 ns = timecounter_read(&adapter->tc);
198 spin_unlock_irqrestore(&adapter->systim_lock, flags);
199
200 *ts = ns_to_timespec64(ns);
201
202 return 0;
203}
204
205/**
206 * e1000e_phc_settime - Set the current time on the hardware clock
207 * @ptp: ptp clock structure
208 * @ts: timespec containing the new time for the cycle counter
209 *
210 * Reset the timecounter to use a new base value instead of the kernel
211 * wall timer value.
212 **/
213static int e1000e_phc_settime(struct ptp_clock_info *ptp,
214 const struct timespec64 *ts)
215{
216 struct e1000_adapter *adapter = container_of(ptp, struct e1000_adapter,
217 ptp_clock_info);
218 unsigned long flags;
219 u64 ns;
220
221 ns = timespec64_to_ns(ts);
222
223 /* reset the timecounter */
224 spin_lock_irqsave(&adapter->systim_lock, flags);
225 timecounter_init(&adapter->tc, &adapter->cc, ns);
226 spin_unlock_irqrestore(&adapter->systim_lock, flags);
227
228 return 0;
229}
230
231/**
232 * e1000e_phc_enable - enable or disable an ancillary feature
233 * @ptp: ptp clock structure
234 * @request: Desired resource to enable or disable
235 * @on: Caller passes one to enable or zero to disable
236 *
237 * Enable (or disable) ancillary features of the PHC subsystem.
238 * Currently, no ancillary features are supported.
239 **/
240static int e1000e_phc_enable(struct ptp_clock_info __always_unused *ptp,
241 struct ptp_clock_request __always_unused *request,
242 int __always_unused on)
243{
244 return -EOPNOTSUPP;
245}
246
247static void e1000e_systim_overflow_work(struct work_struct *work)
248{
249 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
250 systim_overflow_work.work);
251 struct e1000_hw *hw = &adapter->hw;
252 struct timespec64 ts;
253
254 adapter->ptp_clock_info.gettime64(&adapter->ptp_clock_info, &ts);
255
256 e_dbg("SYSTIM overflow check at %lld.%09lu\n",
257 (long long) ts.tv_sec, ts.tv_nsec);
258
259 schedule_delayed_work(&adapter->systim_overflow_work,
260 E1000_SYSTIM_OVERFLOW_PERIOD);
261}
262
263static const struct ptp_clock_info e1000e_ptp_clock_info = {
264 .owner = THIS_MODULE,
265 .n_alarm = 0,
266 .n_ext_ts = 0,
267 .n_per_out = 0,
268 .n_pins = 0,
269 .pps = 0,
270 .adjfreq = e1000e_phc_adjfreq,
271 .adjtime = e1000e_phc_adjtime,
272 .gettime64 = e1000e_phc_gettime,
273 .settime64 = e1000e_phc_settime,
274 .enable = e1000e_phc_enable,
275};
276
277/**
278 * e1000e_ptp_init - initialize PTP for devices which support it
279 * @adapter: board private structure
280 *
281 * This function performs the required steps for enabling PTP support.
282 * If PTP support has already been loaded it simply calls the cyclecounter
283 * init routine and exits.
284 **/
285void e1000e_ptp_init(struct e1000_adapter *adapter)
286{
287 struct e1000_hw *hw = &adapter->hw;
288
289 adapter->ptp_clock = NULL;
290
291 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
292 return;
293
294 adapter->ptp_clock_info = e1000e_ptp_clock_info;
295
296 snprintf(adapter->ptp_clock_info.name,
297 sizeof(adapter->ptp_clock_info.name), "%pm",
298 adapter->netdev->perm_addr);
299
300 switch (hw->mac.type) {
301 case e1000_pch2lan:
302 case e1000_pch_lpt:
303 case e1000_pch_spt:
304 if (((hw->mac.type != e1000_pch_lpt) &&
305 (hw->mac.type != e1000_pch_spt)) ||
306 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI)) {
307 adapter->ptp_clock_info.max_adj = 24000000 - 1;
308 break;
309 }
310 /* fall-through */
311 case e1000_82574:
312 case e1000_82583:
313 adapter->ptp_clock_info.max_adj = 600000000 - 1;
314 break;
315 default:
316 break;
317 }
318
319#ifdef CONFIG_E1000E_HWTS
320 /* CPU must have ART and GBe must be from Sunrise Point or greater */
321 if (hw->mac.type >= e1000_pch_spt && boot_cpu_has(X86_FEATURE_ART))
322 adapter->ptp_clock_info.getcrosststamp =
323 e1000e_phc_getcrosststamp;
324#endif/*CONFIG_E1000E_HWTS*/
325
326 INIT_DELAYED_WORK(&adapter->systim_overflow_work,
327 e1000e_systim_overflow_work);
328
329 schedule_delayed_work(&adapter->systim_overflow_work,
330 E1000_SYSTIM_OVERFLOW_PERIOD);
331
332 adapter->ptp_clock = ptp_clock_register(&adapter->ptp_clock_info,
333 &adapter->pdev->dev);
334 if (IS_ERR(adapter->ptp_clock)) {
335 adapter->ptp_clock = NULL;
336 e_err("ptp_clock_register failed\n");
337 } else if (adapter->ptp_clock) {
338 e_info("registered PHC clock\n");
339 }
340}
341
342/**
343 * e1000e_ptp_remove - disable PTP device and stop the overflow check
344 * @adapter: board private structure
345 *
346 * Stop the PTP support, and cancel the delayed work.
347 **/
348void e1000e_ptp_remove(struct e1000_adapter *adapter)
349{
350 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
351 return;
352
353 cancel_delayed_work_sync(&adapter->systim_overflow_work);
354
355 if (adapter->ptp_clock) {
356 ptp_clock_unregister(adapter->ptp_clock);
357 adapter->ptp_clock = NULL;
358 e_info("removed PHC\n");
359 }
360}