1/*
 2 *	Routines to indentify additional cpu features that are scattered in
 3 *	cpuid space.
 4 */
 5#include <linux/cpu.h>
 6
 7#include <asm/pat.h>
 8#include <asm/processor.h>
 9
10#include <asm/apic.h>
11
12struct cpuid_bit {
13	u16 feature;
14	u8 reg;
15	u8 bit;
16	u32 level;
17	u32 sub_leaf;
18};
19
20enum cpuid_regs {
21	CR_EAX = 0,
22	CR_ECX,
23	CR_EDX,
24	CR_EBX
 
 
 
 
 
 
 
 
 
25};
26
27void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
28{
29	u32 max_level;
30	u32 regs[4];
31	const struct cpuid_bit *cb;
32
33	static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
34		{ X86_FEATURE_DTHERM,		CR_EAX, 0, 0x00000006, 0 },
35		{ X86_FEATURE_IDA,		CR_EAX, 1, 0x00000006, 0 },
36		{ X86_FEATURE_ARAT,		CR_EAX, 2, 0x00000006, 0 },
37		{ X86_FEATURE_PLN,		CR_EAX, 4, 0x00000006, 0 },
38		{ X86_FEATURE_PTS,		CR_EAX, 6, 0x00000006, 0 },
39		{ X86_FEATURE_APERFMPERF,	CR_ECX, 0, 0x00000006, 0 },
40		{ X86_FEATURE_EPB,		CR_ECX, 3, 0x00000006, 0 },
41		{ X86_FEATURE_XSAVEOPT,		CR_EAX,	0, 0x0000000d, 1 },
42		{ X86_FEATURE_CPB,		CR_EDX, 9, 0x80000007, 0 },
43		{ X86_FEATURE_HW_PSTATE,	CR_EDX, 7, 0x80000007, 0 },
44		{ X86_FEATURE_NPT,		CR_EDX, 0, 0x8000000a, 0 },
45		{ X86_FEATURE_LBRV,		CR_EDX, 1, 0x8000000a, 0 },
46		{ X86_FEATURE_SVML,		CR_EDX, 2, 0x8000000a, 0 },
47		{ X86_FEATURE_NRIPS,		CR_EDX, 3, 0x8000000a, 0 },
48		{ X86_FEATURE_TSCRATEMSR,	CR_EDX, 4, 0x8000000a, 0 },
49		{ X86_FEATURE_VMCBCLEAN,	CR_EDX, 5, 0x8000000a, 0 },
50		{ X86_FEATURE_FLUSHBYASID,	CR_EDX, 6, 0x8000000a, 0 },
51		{ X86_FEATURE_DECODEASSISTS,	CR_EDX, 7, 0x8000000a, 0 },
52		{ X86_FEATURE_PAUSEFILTER,	CR_EDX,10, 0x8000000a, 0 },
53		{ X86_FEATURE_PFTHRESHOLD,	CR_EDX,12, 0x8000000a, 0 },
54		{ 0, 0, 0, 0, 0 }
55	};
56
57	for (cb = cpuid_bits; cb->feature; cb++) {
58
59		/* Verify that the level is valid */
60		max_level = cpuid_eax(cb->level & 0xffff0000);
61		if (max_level < cb->level ||
62		    max_level > (cb->level | 0xffff))
63			continue;
64
65		cpuid_count(cb->level, cb->sub_leaf, &regs[CR_EAX],
66			    &regs[CR_EBX], &regs[CR_ECX], &regs[CR_EDX]);
 
67
68		if (regs[cb->reg] & (1 << cb->bit))
69			set_cpu_cap(c, cb->feature);
70	}
71}

 1/*
 2 *	Routines to identify additional cpu features that are scattered in
 3 *	cpuid space.
 4 */
 5#include <linux/cpu.h>
 6
 7#include <asm/pat.h>
 8#include <asm/processor.h>
 9
10#include <asm/apic.h>
11
12struct cpuid_bit {
13	u16 feature;
14	u8 reg;
15	u8 bit;
16	u32 level;
17	u32 sub_leaf;
18};
19
20/* Please keep the leaf sorted by cpuid_bit.level for faster search. */
21static const struct cpuid_bit cpuid_bits[] = {
22	{ X86_FEATURE_APERFMPERF,       CPUID_ECX,  0, 0x00000006, 0 },
23	{ X86_FEATURE_EPB,		CPUID_ECX,  3, 0x00000006, 0 },
24	{ X86_FEATURE_INTEL_PT,		CPUID_EBX, 25, 0x00000007, 0 },
25	{ X86_FEATURE_AVX512_4VNNIW,    CPUID_EDX,  2, 0x00000007, 0 },
26	{ X86_FEATURE_AVX512_4FMAPS,    CPUID_EDX,  3, 0x00000007, 0 },
27	{ X86_FEATURE_CAT_L3,		CPUID_EBX,  1, 0x00000010, 0 },
28	{ X86_FEATURE_CAT_L2,		CPUID_EBX,  2, 0x00000010, 0 },
29	{ X86_FEATURE_CDP_L3,		CPUID_ECX,  2, 0x00000010, 1 },
30	{ X86_FEATURE_HW_PSTATE,	CPUID_EDX,  7, 0x80000007, 0 },
31	{ X86_FEATURE_CPB,		CPUID_EDX,  9, 0x80000007, 0 },
32	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
33	{ 0, 0, 0, 0, 0 }
34};
35
36void init_scattered_cpuid_features(struct cpuinfo_x86 *c)
37{
38	u32 max_level;
39	u32 regs[4];
40	const struct cpuid_bit *cb;
41
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
42	for (cb = cpuid_bits; cb->feature; cb++) {
43
44		/* Verify that the level is valid */
45		max_level = cpuid_eax(cb->level & 0xffff0000);
46		if (max_level < cb->level ||
47		    max_level > (cb->level | 0xffff))
48			continue;
49
50		cpuid_count(cb->level, cb->sub_leaf, &regs[CPUID_EAX],
51			    &regs[CPUID_EBX], &regs[CPUID_ECX],
52			    &regs[CPUID_EDX]);
53
54		if (regs[cb->reg] & (1 << cb->bit))
55			set_cpu_cap(c, cb->feature);
56	}
57}
58
59u32 get_scattered_cpuid_leaf(unsigned int level, unsigned int sub_leaf,
60			     enum cpuid_regs_idx reg)
61{
62	const struct cpuid_bit *cb;
63	u32 cpuid_val = 0;
64
65	for (cb = cpuid_bits; cb->feature; cb++) {
66
67		if (level > cb->level)
68			continue;
69
70		if (level < cb->level)
71			break;
72
73		if (reg == cb->reg && sub_leaf == cb->sub_leaf) {
74			if (cpu_has(&boot_cpu_data, cb->feature))
75				cpuid_val |= BIT(cb->bit);
76		}
77	}
78
79	return cpuid_val;
80}
81EXPORT_SYMBOL_GPL(get_scattered_cpuid_leaf);