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1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2014 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27/* Local includes */
28#include "i40e.h"
29#include "i40e_diag.h"
30#ifdef CONFIG_I40E_VXLAN
31#include <net/vxlan.h>
32#endif
33
34const char i40e_driver_name[] = "i40e";
35static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38#define DRV_KERN "-k"
39
40#define DRV_VERSION_MAJOR 0
41#define DRV_VERSION_MINOR 3
42#define DRV_VERSION_BUILD 36
43#define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46const char i40e_driver_version_str[] = DRV_VERSION;
47static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49/* a bit of forward declarations */
50static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51static void i40e_handle_reset_warning(struct i40e_pf *pf);
52static int i40e_add_vsi(struct i40e_vsi *vsi);
53static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55static int i40e_setup_misc_vector(struct i40e_pf *pf);
56static void i40e_determine_queue_usage(struct i40e_pf *pf);
57static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61/* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68static DEFINE_PCI_DEVICE_TABLE(i40e_pci_tbl) = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X710), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_D), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
79 /* required last entry */
80 {0, }
81};
82MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83
84#define I40E_MAX_VF_COUNT 128
85static int debug = -1;
86module_param(debug, int, 0);
87MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88
89MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
90MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
91MODULE_LICENSE("GPL");
92MODULE_VERSION(DRV_VERSION);
93
94/**
95 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
96 * @hw: pointer to the HW structure
97 * @mem: ptr to mem struct to fill out
98 * @size: size of memory requested
99 * @alignment: what to align the allocation to
100 **/
101int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
102 u64 size, u32 alignment)
103{
104 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105
106 mem->size = ALIGN(size, alignment);
107 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
108 &mem->pa, GFP_KERNEL);
109 if (!mem->va)
110 return -ENOMEM;
111
112 return 0;
113}
114
115/**
116 * i40e_free_dma_mem_d - OS specific memory free for shared code
117 * @hw: pointer to the HW structure
118 * @mem: ptr to mem struct to free
119 **/
120int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121{
122 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123
124 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
125 mem->va = NULL;
126 mem->pa = 0;
127 mem->size = 0;
128
129 return 0;
130}
131
132/**
133 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
134 * @hw: pointer to the HW structure
135 * @mem: ptr to mem struct to fill out
136 * @size: size of memory requested
137 **/
138int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
139 u32 size)
140{
141 mem->size = size;
142 mem->va = kzalloc(size, GFP_KERNEL);
143
144 if (!mem->va)
145 return -ENOMEM;
146
147 return 0;
148}
149
150/**
151 * i40e_free_virt_mem_d - OS specific memory free for shared code
152 * @hw: pointer to the HW structure
153 * @mem: ptr to mem struct to free
154 **/
155int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156{
157 /* it's ok to kfree a NULL pointer */
158 kfree(mem->va);
159 mem->va = NULL;
160 mem->size = 0;
161
162 return 0;
163}
164
165/**
166 * i40e_get_lump - find a lump of free generic resource
167 * @pf: board private structure
168 * @pile: the pile of resource to search
169 * @needed: the number of items needed
170 * @id: an owner id to stick on the items assigned
171 *
172 * Returns the base item index of the lump, or negative for error
173 *
174 * The search_hint trick and lack of advanced fit-finding only work
175 * because we're highly likely to have all the same size lump requests.
176 * Linear search time and any fragmentation should be minimal.
177 **/
178static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
179 u16 needed, u16 id)
180{
181 int ret = -ENOMEM;
182 int i, j;
183
184 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
185 dev_info(&pf->pdev->dev,
186 "param err: pile=%p needed=%d id=0x%04x\n",
187 pile, needed, id);
188 return -EINVAL;
189 }
190
191 /* start the linear search with an imperfect hint */
192 i = pile->search_hint;
193 while (i < pile->num_entries) {
194 /* skip already allocated entries */
195 if (pile->list[i] & I40E_PILE_VALID_BIT) {
196 i++;
197 continue;
198 }
199
200 /* do we have enough in this lump? */
201 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
202 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
203 break;
204 }
205
206 if (j == needed) {
207 /* there was enough, so assign it to the requestor */
208 for (j = 0; j < needed; j++)
209 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 ret = i;
211 pile->search_hint = i + j;
212 break;
213 } else {
214 /* not enough, so skip over it and continue looking */
215 i += j;
216 }
217 }
218
219 return ret;
220}
221
222/**
223 * i40e_put_lump - return a lump of generic resource
224 * @pile: the pile of resource to search
225 * @index: the base item index
226 * @id: the owner id of the items assigned
227 *
228 * Returns the count of items in the lump
229 **/
230static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231{
232 int valid_id = (id | I40E_PILE_VALID_BIT);
233 int count = 0;
234 int i;
235
236 if (!pile || index >= pile->num_entries)
237 return -EINVAL;
238
239 for (i = index;
240 i < pile->num_entries && pile->list[i] == valid_id;
241 i++) {
242 pile->list[i] = 0;
243 count++;
244 }
245
246 if (count && index < pile->search_hint)
247 pile->search_hint = index;
248
249 return count;
250}
251
252/**
253 * i40e_service_event_schedule - Schedule the service task to wake up
254 * @pf: board private structure
255 *
256 * If not already scheduled, this puts the task into the work queue
257 **/
258static void i40e_service_event_schedule(struct i40e_pf *pf)
259{
260 if (!test_bit(__I40E_DOWN, &pf->state) &&
261 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
262 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
263 schedule_work(&pf->service_task);
264}
265
266/**
267 * i40e_tx_timeout - Respond to a Tx Hang
268 * @netdev: network interface device structure
269 *
270 * If any port has noticed a Tx timeout, it is likely that the whole
271 * device is munged, not just the one netdev port, so go for the full
272 * reset.
273 **/
274static void i40e_tx_timeout(struct net_device *netdev)
275{
276 struct i40e_netdev_priv *np = netdev_priv(netdev);
277 struct i40e_vsi *vsi = np->vsi;
278 struct i40e_pf *pf = vsi->back;
279
280 pf->tx_timeout_count++;
281
282 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
283 pf->tx_timeout_recovery_level = 0;
284 pf->tx_timeout_last_recovery = jiffies;
285 netdev_info(netdev, "tx_timeout recovery level %d\n",
286 pf->tx_timeout_recovery_level);
287
288 switch (pf->tx_timeout_recovery_level) {
289 case 0:
290 /* disable and re-enable queues for the VSI */
291 if (in_interrupt()) {
292 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
293 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
294 } else {
295 i40e_vsi_reinit_locked(vsi);
296 }
297 break;
298 case 1:
299 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
300 break;
301 case 2:
302 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
303 break;
304 case 3:
305 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
306 break;
307 default:
308 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
309 set_bit(__I40E_DOWN, &vsi->state);
310 i40e_down(vsi);
311 break;
312 }
313 i40e_service_event_schedule(pf);
314 pf->tx_timeout_recovery_level++;
315}
316
317/**
318 * i40e_release_rx_desc - Store the new tail and head values
319 * @rx_ring: ring to bump
320 * @val: new head index
321 **/
322static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
323{
324 rx_ring->next_to_use = val;
325
326 /* Force memory writes to complete before letting h/w
327 * know there are new descriptors to fetch. (Only
328 * applicable for weak-ordered memory model archs,
329 * such as IA-64).
330 */
331 wmb();
332 writel(val, rx_ring->tail);
333}
334
335/**
336 * i40e_get_vsi_stats_struct - Get System Network Statistics
337 * @vsi: the VSI we care about
338 *
339 * Returns the address of the device statistics structure.
340 * The statistics are actually updated from the service task.
341 **/
342struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
343{
344 return &vsi->net_stats;
345}
346
347/**
348 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
349 * @netdev: network interface device structure
350 *
351 * Returns the address of the device statistics structure.
352 * The statistics are actually updated from the service task.
353 **/
354static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
355 struct net_device *netdev,
356 struct rtnl_link_stats64 *stats)
357{
358 struct i40e_netdev_priv *np = netdev_priv(netdev);
359 struct i40e_vsi *vsi = np->vsi;
360 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
361 int i;
362
363 if (test_bit(__I40E_DOWN, &vsi->state))
364 return stats;
365
366 if (!vsi->tx_rings)
367 return stats;
368
369 rcu_read_lock();
370 for (i = 0; i < vsi->num_queue_pairs; i++) {
371 struct i40e_ring *tx_ring, *rx_ring;
372 u64 bytes, packets;
373 unsigned int start;
374
375 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
376 if (!tx_ring)
377 continue;
378
379 do {
380 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
381 packets = tx_ring->stats.packets;
382 bytes = tx_ring->stats.bytes;
383 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
384
385 stats->tx_packets += packets;
386 stats->tx_bytes += bytes;
387 rx_ring = &tx_ring[1];
388
389 do {
390 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
391 packets = rx_ring->stats.packets;
392 bytes = rx_ring->stats.bytes;
393 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
394
395 stats->rx_packets += packets;
396 stats->rx_bytes += bytes;
397 }
398 rcu_read_unlock();
399
400 /* following stats updated by ixgbe_watchdog_task() */
401 stats->multicast = vsi_stats->multicast;
402 stats->tx_errors = vsi_stats->tx_errors;
403 stats->tx_dropped = vsi_stats->tx_dropped;
404 stats->rx_errors = vsi_stats->rx_errors;
405 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
406 stats->rx_length_errors = vsi_stats->rx_length_errors;
407
408 return stats;
409}
410
411/**
412 * i40e_vsi_reset_stats - Resets all stats of the given vsi
413 * @vsi: the VSI to have its stats reset
414 **/
415void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
416{
417 struct rtnl_link_stats64 *ns;
418 int i;
419
420 if (!vsi)
421 return;
422
423 ns = i40e_get_vsi_stats_struct(vsi);
424 memset(ns, 0, sizeof(*ns));
425 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
426 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
427 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
428 if (vsi->rx_rings && vsi->rx_rings[0]) {
429 for (i = 0; i < vsi->num_queue_pairs; i++) {
430 memset(&vsi->rx_rings[i]->stats, 0 ,
431 sizeof(vsi->rx_rings[i]->stats));
432 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
433 sizeof(vsi->rx_rings[i]->rx_stats));
434 memset(&vsi->tx_rings[i]->stats, 0 ,
435 sizeof(vsi->tx_rings[i]->stats));
436 memset(&vsi->tx_rings[i]->tx_stats, 0,
437 sizeof(vsi->tx_rings[i]->tx_stats));
438 }
439 }
440 vsi->stat_offsets_loaded = false;
441}
442
443/**
444 * i40e_pf_reset_stats - Reset all of the stats for the given pf
445 * @pf: the PF to be reset
446 **/
447void i40e_pf_reset_stats(struct i40e_pf *pf)
448{
449 memset(&pf->stats, 0, sizeof(pf->stats));
450 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
451 pf->stat_offsets_loaded = false;
452}
453
454/**
455 * i40e_stat_update48 - read and update a 48 bit stat from the chip
456 * @hw: ptr to the hardware info
457 * @hireg: the high 32 bit reg to read
458 * @loreg: the low 32 bit reg to read
459 * @offset_loaded: has the initial offset been loaded yet
460 * @offset: ptr to current offset value
461 * @stat: ptr to the stat
462 *
463 * Since the device stats are not reset at PFReset, they likely will not
464 * be zeroed when the driver starts. We'll save the first values read
465 * and use them as offsets to be subtracted from the raw values in order
466 * to report stats that count from zero. In the process, we also manage
467 * the potential roll-over.
468 **/
469static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
470 bool offset_loaded, u64 *offset, u64 *stat)
471{
472 u64 new_data;
473
474 if (hw->device_id == I40E_DEV_ID_QEMU) {
475 new_data = rd32(hw, loreg);
476 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
477 } else {
478 new_data = rd64(hw, loreg);
479 }
480 if (!offset_loaded)
481 *offset = new_data;
482 if (likely(new_data >= *offset))
483 *stat = new_data - *offset;
484 else
485 *stat = (new_data + ((u64)1 << 48)) - *offset;
486 *stat &= 0xFFFFFFFFFFFFULL;
487}
488
489/**
490 * i40e_stat_update32 - read and update a 32 bit stat from the chip
491 * @hw: ptr to the hardware info
492 * @reg: the hw reg to read
493 * @offset_loaded: has the initial offset been loaded yet
494 * @offset: ptr to current offset value
495 * @stat: ptr to the stat
496 **/
497static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
498 bool offset_loaded, u64 *offset, u64 *stat)
499{
500 u32 new_data;
501
502 new_data = rd32(hw, reg);
503 if (!offset_loaded)
504 *offset = new_data;
505 if (likely(new_data >= *offset))
506 *stat = (u32)(new_data - *offset);
507 else
508 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
509}
510
511/**
512 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
513 * @vsi: the VSI to be updated
514 **/
515void i40e_update_eth_stats(struct i40e_vsi *vsi)
516{
517 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
518 struct i40e_pf *pf = vsi->back;
519 struct i40e_hw *hw = &pf->hw;
520 struct i40e_eth_stats *oes;
521 struct i40e_eth_stats *es; /* device's eth stats */
522
523 es = &vsi->eth_stats;
524 oes = &vsi->eth_stats_offsets;
525
526 /* Gather up the stats that the hw collects */
527 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
528 vsi->stat_offsets_loaded,
529 &oes->tx_errors, &es->tx_errors);
530 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
531 vsi->stat_offsets_loaded,
532 &oes->rx_discards, &es->rx_discards);
533
534 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
535 I40E_GLV_GORCL(stat_idx),
536 vsi->stat_offsets_loaded,
537 &oes->rx_bytes, &es->rx_bytes);
538 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
539 I40E_GLV_UPRCL(stat_idx),
540 vsi->stat_offsets_loaded,
541 &oes->rx_unicast, &es->rx_unicast);
542 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
543 I40E_GLV_MPRCL(stat_idx),
544 vsi->stat_offsets_loaded,
545 &oes->rx_multicast, &es->rx_multicast);
546 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
547 I40E_GLV_BPRCL(stat_idx),
548 vsi->stat_offsets_loaded,
549 &oes->rx_broadcast, &es->rx_broadcast);
550
551 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
552 I40E_GLV_GOTCL(stat_idx),
553 vsi->stat_offsets_loaded,
554 &oes->tx_bytes, &es->tx_bytes);
555 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
556 I40E_GLV_UPTCL(stat_idx),
557 vsi->stat_offsets_loaded,
558 &oes->tx_unicast, &es->tx_unicast);
559 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
560 I40E_GLV_MPTCL(stat_idx),
561 vsi->stat_offsets_loaded,
562 &oes->tx_multicast, &es->tx_multicast);
563 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
564 I40E_GLV_BPTCL(stat_idx),
565 vsi->stat_offsets_loaded,
566 &oes->tx_broadcast, &es->tx_broadcast);
567 vsi->stat_offsets_loaded = true;
568}
569
570/**
571 * i40e_update_veb_stats - Update Switch component statistics
572 * @veb: the VEB being updated
573 **/
574static void i40e_update_veb_stats(struct i40e_veb *veb)
575{
576 struct i40e_pf *pf = veb->pf;
577 struct i40e_hw *hw = &pf->hw;
578 struct i40e_eth_stats *oes;
579 struct i40e_eth_stats *es; /* device's eth stats */
580 int idx = 0;
581
582 idx = veb->stats_idx;
583 es = &veb->stats;
584 oes = &veb->stats_offsets;
585
586 /* Gather up the stats that the hw collects */
587 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
588 veb->stat_offsets_loaded,
589 &oes->tx_discards, &es->tx_discards);
590 if (hw->revision_id > 0)
591 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
592 veb->stat_offsets_loaded,
593 &oes->rx_unknown_protocol,
594 &es->rx_unknown_protocol);
595 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
596 veb->stat_offsets_loaded,
597 &oes->rx_bytes, &es->rx_bytes);
598 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
599 veb->stat_offsets_loaded,
600 &oes->rx_unicast, &es->rx_unicast);
601 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
602 veb->stat_offsets_loaded,
603 &oes->rx_multicast, &es->rx_multicast);
604 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
605 veb->stat_offsets_loaded,
606 &oes->rx_broadcast, &es->rx_broadcast);
607
608 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
609 veb->stat_offsets_loaded,
610 &oes->tx_bytes, &es->tx_bytes);
611 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
612 veb->stat_offsets_loaded,
613 &oes->tx_unicast, &es->tx_unicast);
614 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
615 veb->stat_offsets_loaded,
616 &oes->tx_multicast, &es->tx_multicast);
617 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
618 veb->stat_offsets_loaded,
619 &oes->tx_broadcast, &es->tx_broadcast);
620 veb->stat_offsets_loaded = true;
621}
622
623/**
624 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
625 * @pf: the corresponding PF
626 *
627 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
628 **/
629static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
630{
631 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
632 struct i40e_hw_port_stats *nsd = &pf->stats;
633 struct i40e_hw *hw = &pf->hw;
634 u64 xoff = 0;
635 u16 i, v;
636
637 if ((hw->fc.current_mode != I40E_FC_FULL) &&
638 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
639 return;
640
641 xoff = nsd->link_xoff_rx;
642 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
643 pf->stat_offsets_loaded,
644 &osd->link_xoff_rx, &nsd->link_xoff_rx);
645
646 /* No new LFC xoff rx */
647 if (!(nsd->link_xoff_rx - xoff))
648 return;
649
650 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
651 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
652 struct i40e_vsi *vsi = pf->vsi[v];
653
654 if (!vsi)
655 continue;
656
657 for (i = 0; i < vsi->num_queue_pairs; i++) {
658 struct i40e_ring *ring = vsi->tx_rings[i];
659 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
660 }
661 }
662}
663
664/**
665 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
666 * @pf: the corresponding PF
667 *
668 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
669 **/
670static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
671{
672 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
673 struct i40e_hw_port_stats *nsd = &pf->stats;
674 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
675 struct i40e_dcbx_config *dcb_cfg;
676 struct i40e_hw *hw = &pf->hw;
677 u16 i, v;
678 u8 tc;
679
680 dcb_cfg = &hw->local_dcbx_config;
681
682 /* See if DCB enabled with PFC TC */
683 if (!(pf->flags & I40E_FLAG_DCB_ENABLED) ||
684 !(dcb_cfg->pfc.pfcenable)) {
685 i40e_update_link_xoff_rx(pf);
686 return;
687 }
688
689 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
690 u64 prio_xoff = nsd->priority_xoff_rx[i];
691 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
692 pf->stat_offsets_loaded,
693 &osd->priority_xoff_rx[i],
694 &nsd->priority_xoff_rx[i]);
695
696 /* No new PFC xoff rx */
697 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
698 continue;
699 /* Get the TC for given priority */
700 tc = dcb_cfg->etscfg.prioritytable[i];
701 xoff[tc] = true;
702 }
703
704 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
705 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
706 struct i40e_vsi *vsi = pf->vsi[v];
707
708 if (!vsi)
709 continue;
710
711 for (i = 0; i < vsi->num_queue_pairs; i++) {
712 struct i40e_ring *ring = vsi->tx_rings[i];
713
714 tc = ring->dcb_tc;
715 if (xoff[tc])
716 clear_bit(__I40E_HANG_CHECK_ARMED,
717 &ring->state);
718 }
719 }
720}
721
722/**
723 * i40e_update_stats - Update the board statistics counters.
724 * @vsi: the VSI to be updated
725 *
726 * There are a few instances where we store the same stat in a
727 * couple of different structs. This is partly because we have
728 * the netdev stats that need to be filled out, which is slightly
729 * different from the "eth_stats" defined by the chip and used in
730 * VF communications. We sort it all out here in a central place.
731 **/
732void i40e_update_stats(struct i40e_vsi *vsi)
733{
734 struct i40e_pf *pf = vsi->back;
735 struct i40e_hw *hw = &pf->hw;
736 struct rtnl_link_stats64 *ons;
737 struct rtnl_link_stats64 *ns; /* netdev stats */
738 struct i40e_eth_stats *oes;
739 struct i40e_eth_stats *es; /* device's eth stats */
740 u32 tx_restart, tx_busy;
741 u32 rx_page, rx_buf;
742 u64 rx_p, rx_b;
743 u64 tx_p, tx_b;
744 u32 val;
745 int i;
746 u16 q;
747
748 if (test_bit(__I40E_DOWN, &vsi->state) ||
749 test_bit(__I40E_CONFIG_BUSY, &pf->state))
750 return;
751
752 ns = i40e_get_vsi_stats_struct(vsi);
753 ons = &vsi->net_stats_offsets;
754 es = &vsi->eth_stats;
755 oes = &vsi->eth_stats_offsets;
756
757 /* Gather up the netdev and vsi stats that the driver collects
758 * on the fly during packet processing
759 */
760 rx_b = rx_p = 0;
761 tx_b = tx_p = 0;
762 tx_restart = tx_busy = 0;
763 rx_page = 0;
764 rx_buf = 0;
765 rcu_read_lock();
766 for (q = 0; q < vsi->num_queue_pairs; q++) {
767 struct i40e_ring *p;
768 u64 bytes, packets;
769 unsigned int start;
770
771 /* locate Tx ring */
772 p = ACCESS_ONCE(vsi->tx_rings[q]);
773
774 do {
775 start = u64_stats_fetch_begin_irq(&p->syncp);
776 packets = p->stats.packets;
777 bytes = p->stats.bytes;
778 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
779 tx_b += bytes;
780 tx_p += packets;
781 tx_restart += p->tx_stats.restart_queue;
782 tx_busy += p->tx_stats.tx_busy;
783
784 /* Rx queue is part of the same block as Tx queue */
785 p = &p[1];
786 do {
787 start = u64_stats_fetch_begin_irq(&p->syncp);
788 packets = p->stats.packets;
789 bytes = p->stats.bytes;
790 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
791 rx_b += bytes;
792 rx_p += packets;
793 rx_buf += p->rx_stats.alloc_buff_failed;
794 rx_page += p->rx_stats.alloc_page_failed;
795 }
796 rcu_read_unlock();
797 vsi->tx_restart = tx_restart;
798 vsi->tx_busy = tx_busy;
799 vsi->rx_page_failed = rx_page;
800 vsi->rx_buf_failed = rx_buf;
801
802 ns->rx_packets = rx_p;
803 ns->rx_bytes = rx_b;
804 ns->tx_packets = tx_p;
805 ns->tx_bytes = tx_b;
806
807 i40e_update_eth_stats(vsi);
808 /* update netdev stats from eth stats */
809 ons->rx_errors = oes->rx_errors;
810 ns->rx_errors = es->rx_errors;
811 ons->tx_errors = oes->tx_errors;
812 ns->tx_errors = es->tx_errors;
813 ons->multicast = oes->rx_multicast;
814 ns->multicast = es->rx_multicast;
815 ons->tx_dropped = oes->tx_discards;
816 ns->tx_dropped = es->tx_discards;
817
818 /* Get the port data only if this is the main PF VSI */
819 if (vsi == pf->vsi[pf->lan_vsi]) {
820 struct i40e_hw_port_stats *nsd = &pf->stats;
821 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
822
823 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
824 I40E_GLPRT_GORCL(hw->port),
825 pf->stat_offsets_loaded,
826 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
827 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
828 I40E_GLPRT_GOTCL(hw->port),
829 pf->stat_offsets_loaded,
830 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
831 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
832 pf->stat_offsets_loaded,
833 &osd->eth.rx_discards,
834 &nsd->eth.rx_discards);
835 i40e_stat_update32(hw, I40E_GLPRT_TDPC(hw->port),
836 pf->stat_offsets_loaded,
837 &osd->eth.tx_discards,
838 &nsd->eth.tx_discards);
839 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
840 I40E_GLPRT_MPRCL(hw->port),
841 pf->stat_offsets_loaded,
842 &osd->eth.rx_multicast,
843 &nsd->eth.rx_multicast);
844
845 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
846 pf->stat_offsets_loaded,
847 &osd->tx_dropped_link_down,
848 &nsd->tx_dropped_link_down);
849
850 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
851 pf->stat_offsets_loaded,
852 &osd->crc_errors, &nsd->crc_errors);
853 ns->rx_crc_errors = nsd->crc_errors;
854
855 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
856 pf->stat_offsets_loaded,
857 &osd->illegal_bytes, &nsd->illegal_bytes);
858 ns->rx_errors = nsd->crc_errors
859 + nsd->illegal_bytes;
860
861 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
862 pf->stat_offsets_loaded,
863 &osd->mac_local_faults,
864 &nsd->mac_local_faults);
865 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
866 pf->stat_offsets_loaded,
867 &osd->mac_remote_faults,
868 &nsd->mac_remote_faults);
869
870 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
871 pf->stat_offsets_loaded,
872 &osd->rx_length_errors,
873 &nsd->rx_length_errors);
874 ns->rx_length_errors = nsd->rx_length_errors;
875
876 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
877 pf->stat_offsets_loaded,
878 &osd->link_xon_rx, &nsd->link_xon_rx);
879 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
880 pf->stat_offsets_loaded,
881 &osd->link_xon_tx, &nsd->link_xon_tx);
882 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
883 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
884 pf->stat_offsets_loaded,
885 &osd->link_xoff_tx, &nsd->link_xoff_tx);
886
887 for (i = 0; i < 8; i++) {
888 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
889 pf->stat_offsets_loaded,
890 &osd->priority_xon_rx[i],
891 &nsd->priority_xon_rx[i]);
892 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
893 pf->stat_offsets_loaded,
894 &osd->priority_xon_tx[i],
895 &nsd->priority_xon_tx[i]);
896 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
897 pf->stat_offsets_loaded,
898 &osd->priority_xoff_tx[i],
899 &nsd->priority_xoff_tx[i]);
900 i40e_stat_update32(hw,
901 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
902 pf->stat_offsets_loaded,
903 &osd->priority_xon_2_xoff[i],
904 &nsd->priority_xon_2_xoff[i]);
905 }
906
907 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
908 I40E_GLPRT_PRC64L(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->rx_size_64, &nsd->rx_size_64);
911 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
912 I40E_GLPRT_PRC127L(hw->port),
913 pf->stat_offsets_loaded,
914 &osd->rx_size_127, &nsd->rx_size_127);
915 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
916 I40E_GLPRT_PRC255L(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->rx_size_255, &nsd->rx_size_255);
919 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
920 I40E_GLPRT_PRC511L(hw->port),
921 pf->stat_offsets_loaded,
922 &osd->rx_size_511, &nsd->rx_size_511);
923 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
924 I40E_GLPRT_PRC1023L(hw->port),
925 pf->stat_offsets_loaded,
926 &osd->rx_size_1023, &nsd->rx_size_1023);
927 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
928 I40E_GLPRT_PRC1522L(hw->port),
929 pf->stat_offsets_loaded,
930 &osd->rx_size_1522, &nsd->rx_size_1522);
931 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
932 I40E_GLPRT_PRC9522L(hw->port),
933 pf->stat_offsets_loaded,
934 &osd->rx_size_big, &nsd->rx_size_big);
935
936 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
937 I40E_GLPRT_PTC64L(hw->port),
938 pf->stat_offsets_loaded,
939 &osd->tx_size_64, &nsd->tx_size_64);
940 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
941 I40E_GLPRT_PTC127L(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->tx_size_127, &nsd->tx_size_127);
944 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
945 I40E_GLPRT_PTC255L(hw->port),
946 pf->stat_offsets_loaded,
947 &osd->tx_size_255, &nsd->tx_size_255);
948 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
949 I40E_GLPRT_PTC511L(hw->port),
950 pf->stat_offsets_loaded,
951 &osd->tx_size_511, &nsd->tx_size_511);
952 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
953 I40E_GLPRT_PTC1023L(hw->port),
954 pf->stat_offsets_loaded,
955 &osd->tx_size_1023, &nsd->tx_size_1023);
956 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
957 I40E_GLPRT_PTC1522L(hw->port),
958 pf->stat_offsets_loaded,
959 &osd->tx_size_1522, &nsd->tx_size_1522);
960 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
961 I40E_GLPRT_PTC9522L(hw->port),
962 pf->stat_offsets_loaded,
963 &osd->tx_size_big, &nsd->tx_size_big);
964
965 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
966 pf->stat_offsets_loaded,
967 &osd->rx_undersize, &nsd->rx_undersize);
968 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
969 pf->stat_offsets_loaded,
970 &osd->rx_fragments, &nsd->rx_fragments);
971 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
972 pf->stat_offsets_loaded,
973 &osd->rx_oversize, &nsd->rx_oversize);
974 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->rx_jabber, &nsd->rx_jabber);
977
978 val = rd32(hw, I40E_PRTPM_EEE_STAT);
979 nsd->tx_lpi_status =
980 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
981 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
982 nsd->rx_lpi_status =
983 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
984 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
985 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
986 pf->stat_offsets_loaded,
987 &osd->tx_lpi_count, &nsd->tx_lpi_count);
988 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
989 pf->stat_offsets_loaded,
990 &osd->rx_lpi_count, &nsd->rx_lpi_count);
991 }
992
993 pf->stat_offsets_loaded = true;
994}
995
996/**
997 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
998 * @vsi: the VSI to be searched
999 * @macaddr: the MAC address
1000 * @vlan: the vlan
1001 * @is_vf: make sure its a vf filter, else doesn't matter
1002 * @is_netdev: make sure its a netdev filter, else doesn't matter
1003 *
1004 * Returns ptr to the filter object or NULL
1005 **/
1006static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1007 u8 *macaddr, s16 vlan,
1008 bool is_vf, bool is_netdev)
1009{
1010 struct i40e_mac_filter *f;
1011
1012 if (!vsi || !macaddr)
1013 return NULL;
1014
1015 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1016 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1017 (vlan == f->vlan) &&
1018 (!is_vf || f->is_vf) &&
1019 (!is_netdev || f->is_netdev))
1020 return f;
1021 }
1022 return NULL;
1023}
1024
1025/**
1026 * i40e_find_mac - Find a mac addr in the macvlan filters list
1027 * @vsi: the VSI to be searched
1028 * @macaddr: the MAC address we are searching for
1029 * @is_vf: make sure its a vf filter, else doesn't matter
1030 * @is_netdev: make sure its a netdev filter, else doesn't matter
1031 *
1032 * Returns the first filter with the provided MAC address or NULL if
1033 * MAC address was not found
1034 **/
1035struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1036 bool is_vf, bool is_netdev)
1037{
1038 struct i40e_mac_filter *f;
1039
1040 if (!vsi || !macaddr)
1041 return NULL;
1042
1043 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1044 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1045 (!is_vf || f->is_vf) &&
1046 (!is_netdev || f->is_netdev))
1047 return f;
1048 }
1049 return NULL;
1050}
1051
1052/**
1053 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1054 * @vsi: the VSI to be searched
1055 *
1056 * Returns true if VSI is in vlan mode or false otherwise
1057 **/
1058bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1059{
1060 struct i40e_mac_filter *f;
1061
1062 /* Only -1 for all the filters denotes not in vlan mode
1063 * so we have to go through all the list in order to make sure
1064 */
1065 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1066 if (f->vlan >= 0)
1067 return true;
1068 }
1069
1070 return false;
1071}
1072
1073/**
1074 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1075 * @vsi: the VSI to be searched
1076 * @macaddr: the mac address to be filtered
1077 * @is_vf: true if it is a vf
1078 * @is_netdev: true if it is a netdev
1079 *
1080 * Goes through all the macvlan filters and adds a
1081 * macvlan filter for each unique vlan that already exists
1082 *
1083 * Returns first filter found on success, else NULL
1084 **/
1085struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1086 bool is_vf, bool is_netdev)
1087{
1088 struct i40e_mac_filter *f;
1089
1090 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1091 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1092 is_vf, is_netdev)) {
1093 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1094 is_vf, is_netdev))
1095 return NULL;
1096 }
1097 }
1098
1099 return list_first_entry_or_null(&vsi->mac_filter_list,
1100 struct i40e_mac_filter, list);
1101}
1102
1103/**
1104 * i40e_add_filter - Add a mac/vlan filter to the VSI
1105 * @vsi: the VSI to be searched
1106 * @macaddr: the MAC address
1107 * @vlan: the vlan
1108 * @is_vf: make sure its a vf filter, else doesn't matter
1109 * @is_netdev: make sure its a netdev filter, else doesn't matter
1110 *
1111 * Returns ptr to the filter object or NULL when no memory available.
1112 **/
1113struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1114 u8 *macaddr, s16 vlan,
1115 bool is_vf, bool is_netdev)
1116{
1117 struct i40e_mac_filter *f;
1118
1119 if (!vsi || !macaddr)
1120 return NULL;
1121
1122 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1123 if (!f) {
1124 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1125 if (!f)
1126 goto add_filter_out;
1127
1128 memcpy(f->macaddr, macaddr, ETH_ALEN);
1129 f->vlan = vlan;
1130 f->changed = true;
1131
1132 INIT_LIST_HEAD(&f->list);
1133 list_add(&f->list, &vsi->mac_filter_list);
1134 }
1135
1136 /* increment counter and add a new flag if needed */
1137 if (is_vf) {
1138 if (!f->is_vf) {
1139 f->is_vf = true;
1140 f->counter++;
1141 }
1142 } else if (is_netdev) {
1143 if (!f->is_netdev) {
1144 f->is_netdev = true;
1145 f->counter++;
1146 }
1147 } else {
1148 f->counter++;
1149 }
1150
1151 /* changed tells sync_filters_subtask to
1152 * push the filter down to the firmware
1153 */
1154 if (f->changed) {
1155 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1156 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1157 }
1158
1159add_filter_out:
1160 return f;
1161}
1162
1163/**
1164 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1165 * @vsi: the VSI to be searched
1166 * @macaddr: the MAC address
1167 * @vlan: the vlan
1168 * @is_vf: make sure it's a vf filter, else doesn't matter
1169 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1170 **/
1171void i40e_del_filter(struct i40e_vsi *vsi,
1172 u8 *macaddr, s16 vlan,
1173 bool is_vf, bool is_netdev)
1174{
1175 struct i40e_mac_filter *f;
1176
1177 if (!vsi || !macaddr)
1178 return;
1179
1180 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1181 if (!f || f->counter == 0)
1182 return;
1183
1184 if (is_vf) {
1185 if (f->is_vf) {
1186 f->is_vf = false;
1187 f->counter--;
1188 }
1189 } else if (is_netdev) {
1190 if (f->is_netdev) {
1191 f->is_netdev = false;
1192 f->counter--;
1193 }
1194 } else {
1195 /* make sure we don't remove a filter in use by vf or netdev */
1196 int min_f = 0;
1197 min_f += (f->is_vf ? 1 : 0);
1198 min_f += (f->is_netdev ? 1 : 0);
1199
1200 if (f->counter > min_f)
1201 f->counter--;
1202 }
1203
1204 /* counter == 0 tells sync_filters_subtask to
1205 * remove the filter from the firmware's list
1206 */
1207 if (f->counter == 0) {
1208 f->changed = true;
1209 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1210 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1211 }
1212}
1213
1214/**
1215 * i40e_set_mac - NDO callback to set mac address
1216 * @netdev: network interface device structure
1217 * @p: pointer to an address structure
1218 *
1219 * Returns 0 on success, negative on failure
1220 **/
1221static int i40e_set_mac(struct net_device *netdev, void *p)
1222{
1223 struct i40e_netdev_priv *np = netdev_priv(netdev);
1224 struct i40e_vsi *vsi = np->vsi;
1225 struct sockaddr *addr = p;
1226 struct i40e_mac_filter *f;
1227
1228 if (!is_valid_ether_addr(addr->sa_data))
1229 return -EADDRNOTAVAIL;
1230
1231 netdev_info(netdev, "set mac address=%pM\n", addr->sa_data);
1232
1233 if (ether_addr_equal(netdev->dev_addr, addr->sa_data))
1234 return 0;
1235
1236 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1237 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1238 return -EADDRNOTAVAIL;
1239
1240 if (vsi->type == I40E_VSI_MAIN) {
1241 i40e_status ret;
1242 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1243 I40E_AQC_WRITE_TYPE_LAA_ONLY,
1244 addr->sa_data, NULL);
1245 if (ret) {
1246 netdev_info(netdev,
1247 "Addr change for Main VSI failed: %d\n",
1248 ret);
1249 return -EADDRNOTAVAIL;
1250 }
1251
1252 memcpy(vsi->back->hw.mac.addr, addr->sa_data, netdev->addr_len);
1253 }
1254
1255 /* In order to be sure to not drop any packets, add the new address
1256 * then delete the old one.
1257 */
1258 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY, false, false);
1259 if (!f)
1260 return -ENOMEM;
1261
1262 i40e_sync_vsi_filters(vsi);
1263 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY, false, false);
1264 i40e_sync_vsi_filters(vsi);
1265
1266 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1267
1268 return 0;
1269}
1270
1271/**
1272 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1273 * @vsi: the VSI being setup
1274 * @ctxt: VSI context structure
1275 * @enabled_tc: Enabled TCs bitmap
1276 * @is_add: True if called before Add VSI
1277 *
1278 * Setup VSI queue mapping for enabled traffic classes.
1279 **/
1280static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1281 struct i40e_vsi_context *ctxt,
1282 u8 enabled_tc,
1283 bool is_add)
1284{
1285 struct i40e_pf *pf = vsi->back;
1286 u16 sections = 0;
1287 u8 netdev_tc = 0;
1288 u16 numtc = 0;
1289 u16 qcount;
1290 u8 offset;
1291 u16 qmap;
1292 int i;
1293 u16 num_tc_qps = 0;
1294
1295 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1296 offset = 0;
1297
1298 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1299 /* Find numtc from enabled TC bitmap */
1300 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1301 if (enabled_tc & (1 << i)) /* TC is enabled */
1302 numtc++;
1303 }
1304 if (!numtc) {
1305 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1306 numtc = 1;
1307 }
1308 } else {
1309 /* At least TC0 is enabled in case of non-DCB case */
1310 numtc = 1;
1311 }
1312
1313 vsi->tc_config.numtc = numtc;
1314 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1315 /* Number of queues per enabled TC */
1316 num_tc_qps = rounddown_pow_of_two(vsi->alloc_queue_pairs/numtc);
1317 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1318
1319 /* Setup queue offset/count for all TCs for given VSI */
1320 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1321 /* See if the given TC is enabled for the given VSI */
1322 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1323 int pow, num_qps;
1324
1325 switch (vsi->type) {
1326 case I40E_VSI_MAIN:
1327 qcount = min_t(int, pf->rss_size, num_tc_qps);
1328 break;
1329 case I40E_VSI_FDIR:
1330 case I40E_VSI_SRIOV:
1331 case I40E_VSI_VMDQ2:
1332 default:
1333 qcount = num_tc_qps;
1334 WARN_ON(i != 0);
1335 break;
1336 }
1337 vsi->tc_config.tc_info[i].qoffset = offset;
1338 vsi->tc_config.tc_info[i].qcount = qcount;
1339
1340 /* find the power-of-2 of the number of queue pairs */
1341 num_qps = qcount;
1342 pow = 0;
1343 while (num_qps && ((1 << pow) < qcount)) {
1344 pow++;
1345 num_qps >>= 1;
1346 }
1347
1348 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1349 qmap =
1350 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1351 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1352
1353 offset += qcount;
1354 } else {
1355 /* TC is not enabled so set the offset to
1356 * default queue and allocate one queue
1357 * for the given TC.
1358 */
1359 vsi->tc_config.tc_info[i].qoffset = 0;
1360 vsi->tc_config.tc_info[i].qcount = 1;
1361 vsi->tc_config.tc_info[i].netdev_tc = 0;
1362
1363 qmap = 0;
1364 }
1365 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1366 }
1367
1368 /* Set actual Tx/Rx queue pairs */
1369 vsi->num_queue_pairs = offset;
1370
1371 /* Scheduler section valid can only be set for ADD VSI */
1372 if (is_add) {
1373 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1374
1375 ctxt->info.up_enable_bits = enabled_tc;
1376 }
1377 if (vsi->type == I40E_VSI_SRIOV) {
1378 ctxt->info.mapping_flags |=
1379 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1380 for (i = 0; i < vsi->num_queue_pairs; i++)
1381 ctxt->info.queue_mapping[i] =
1382 cpu_to_le16(vsi->base_queue + i);
1383 } else {
1384 ctxt->info.mapping_flags |=
1385 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1386 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1387 }
1388 ctxt->info.valid_sections |= cpu_to_le16(sections);
1389}
1390
1391/**
1392 * i40e_set_rx_mode - NDO callback to set the netdev filters
1393 * @netdev: network interface device structure
1394 **/
1395static void i40e_set_rx_mode(struct net_device *netdev)
1396{
1397 struct i40e_netdev_priv *np = netdev_priv(netdev);
1398 struct i40e_mac_filter *f, *ftmp;
1399 struct i40e_vsi *vsi = np->vsi;
1400 struct netdev_hw_addr *uca;
1401 struct netdev_hw_addr *mca;
1402 struct netdev_hw_addr *ha;
1403
1404 /* add addr if not already in the filter list */
1405 netdev_for_each_uc_addr(uca, netdev) {
1406 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1407 if (i40e_is_vsi_in_vlan(vsi))
1408 i40e_put_mac_in_vlan(vsi, uca->addr,
1409 false, true);
1410 else
1411 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1412 false, true);
1413 }
1414 }
1415
1416 netdev_for_each_mc_addr(mca, netdev) {
1417 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1418 if (i40e_is_vsi_in_vlan(vsi))
1419 i40e_put_mac_in_vlan(vsi, mca->addr,
1420 false, true);
1421 else
1422 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1423 false, true);
1424 }
1425 }
1426
1427 /* remove filter if not in netdev list */
1428 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1429 bool found = false;
1430
1431 if (!f->is_netdev)
1432 continue;
1433
1434 if (is_multicast_ether_addr(f->macaddr)) {
1435 netdev_for_each_mc_addr(mca, netdev) {
1436 if (ether_addr_equal(mca->addr, f->macaddr)) {
1437 found = true;
1438 break;
1439 }
1440 }
1441 } else {
1442 netdev_for_each_uc_addr(uca, netdev) {
1443 if (ether_addr_equal(uca->addr, f->macaddr)) {
1444 found = true;
1445 break;
1446 }
1447 }
1448
1449 for_each_dev_addr(netdev, ha) {
1450 if (ether_addr_equal(ha->addr, f->macaddr)) {
1451 found = true;
1452 break;
1453 }
1454 }
1455 }
1456 if (!found)
1457 i40e_del_filter(
1458 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1459 }
1460
1461 /* check for other flag changes */
1462 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1463 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1464 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1465 }
1466}
1467
1468/**
1469 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1470 * @vsi: ptr to the VSI
1471 *
1472 * Push any outstanding VSI filter changes through the AdminQ.
1473 *
1474 * Returns 0 or error value
1475 **/
1476int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1477{
1478 struct i40e_mac_filter *f, *ftmp;
1479 bool promisc_forced_on = false;
1480 bool add_happened = false;
1481 int filter_list_len = 0;
1482 u32 changed_flags = 0;
1483 i40e_status aq_ret = 0;
1484 struct i40e_pf *pf;
1485 int num_add = 0;
1486 int num_del = 0;
1487 u16 cmd_flags;
1488
1489 /* empty array typed pointers, kcalloc later */
1490 struct i40e_aqc_add_macvlan_element_data *add_list;
1491 struct i40e_aqc_remove_macvlan_element_data *del_list;
1492
1493 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1494 usleep_range(1000, 2000);
1495 pf = vsi->back;
1496
1497 if (vsi->netdev) {
1498 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1499 vsi->current_netdev_flags = vsi->netdev->flags;
1500 }
1501
1502 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1503 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1504
1505 filter_list_len = pf->hw.aq.asq_buf_size /
1506 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1507 del_list = kcalloc(filter_list_len,
1508 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1509 GFP_KERNEL);
1510 if (!del_list)
1511 return -ENOMEM;
1512
1513 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1514 if (!f->changed)
1515 continue;
1516
1517 if (f->counter != 0)
1518 continue;
1519 f->changed = false;
1520 cmd_flags = 0;
1521
1522 /* add to delete list */
1523 memcpy(del_list[num_del].mac_addr,
1524 f->macaddr, ETH_ALEN);
1525 del_list[num_del].vlan_tag =
1526 cpu_to_le16((u16)(f->vlan ==
1527 I40E_VLAN_ANY ? 0 : f->vlan));
1528
1529 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1530 del_list[num_del].flags = cmd_flags;
1531 num_del++;
1532
1533 /* unlink from filter list */
1534 list_del(&f->list);
1535 kfree(f);
1536
1537 /* flush a full buffer */
1538 if (num_del == filter_list_len) {
1539 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1540 vsi->seid, del_list, num_del,
1541 NULL);
1542 num_del = 0;
1543 memset(del_list, 0, sizeof(*del_list));
1544
1545 if (aq_ret)
1546 dev_info(&pf->pdev->dev,
1547 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1548 aq_ret,
1549 pf->hw.aq.asq_last_status);
1550 }
1551 }
1552 if (num_del) {
1553 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1554 del_list, num_del, NULL);
1555 num_del = 0;
1556
1557 if (aq_ret)
1558 dev_info(&pf->pdev->dev,
1559 "ignoring delete macvlan error, err %d, aq_err %d\n",
1560 aq_ret, pf->hw.aq.asq_last_status);
1561 }
1562
1563 kfree(del_list);
1564 del_list = NULL;
1565
1566 /* do all the adds now */
1567 filter_list_len = pf->hw.aq.asq_buf_size /
1568 sizeof(struct i40e_aqc_add_macvlan_element_data),
1569 add_list = kcalloc(filter_list_len,
1570 sizeof(struct i40e_aqc_add_macvlan_element_data),
1571 GFP_KERNEL);
1572 if (!add_list)
1573 return -ENOMEM;
1574
1575 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1576 if (!f->changed)
1577 continue;
1578
1579 if (f->counter == 0)
1580 continue;
1581 f->changed = false;
1582 add_happened = true;
1583 cmd_flags = 0;
1584
1585 /* add to add array */
1586 memcpy(add_list[num_add].mac_addr,
1587 f->macaddr, ETH_ALEN);
1588 add_list[num_add].vlan_tag =
1589 cpu_to_le16(
1590 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1591 add_list[num_add].queue_number = 0;
1592
1593 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1594 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1595 num_add++;
1596
1597 /* flush a full buffer */
1598 if (num_add == filter_list_len) {
1599 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1600 add_list, num_add,
1601 NULL);
1602 num_add = 0;
1603
1604 if (aq_ret)
1605 break;
1606 memset(add_list, 0, sizeof(*add_list));
1607 }
1608 }
1609 if (num_add) {
1610 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1611 add_list, num_add, NULL);
1612 num_add = 0;
1613 }
1614 kfree(add_list);
1615 add_list = NULL;
1616
1617 if (add_happened && (!aq_ret)) {
1618 /* do nothing */;
1619 } else if (add_happened && (aq_ret)) {
1620 dev_info(&pf->pdev->dev,
1621 "add filter failed, err %d, aq_err %d\n",
1622 aq_ret, pf->hw.aq.asq_last_status);
1623 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1624 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1625 &vsi->state)) {
1626 promisc_forced_on = true;
1627 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1628 &vsi->state);
1629 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1630 }
1631 }
1632 }
1633
1634 /* check for changes in promiscuous modes */
1635 if (changed_flags & IFF_ALLMULTI) {
1636 bool cur_multipromisc;
1637 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1638 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1639 vsi->seid,
1640 cur_multipromisc,
1641 NULL);
1642 if (aq_ret)
1643 dev_info(&pf->pdev->dev,
1644 "set multi promisc failed, err %d, aq_err %d\n",
1645 aq_ret, pf->hw.aq.asq_last_status);
1646 }
1647 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1648 bool cur_promisc;
1649 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1650 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1651 &vsi->state));
1652 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1653 vsi->seid,
1654 cur_promisc, NULL);
1655 if (aq_ret)
1656 dev_info(&pf->pdev->dev,
1657 "set uni promisc failed, err %d, aq_err %d\n",
1658 aq_ret, pf->hw.aq.asq_last_status);
1659 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1660 vsi->seid,
1661 cur_promisc, NULL);
1662 if (aq_ret)
1663 dev_info(&pf->pdev->dev,
1664 "set brdcast promisc failed, err %d, aq_err %d\n",
1665 aq_ret, pf->hw.aq.asq_last_status);
1666 }
1667
1668 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1669 return 0;
1670}
1671
1672/**
1673 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1674 * @pf: board private structure
1675 **/
1676static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1677{
1678 int v;
1679
1680 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1681 return;
1682 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1683
1684 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
1685 if (pf->vsi[v] &&
1686 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1687 i40e_sync_vsi_filters(pf->vsi[v]);
1688 }
1689}
1690
1691/**
1692 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1693 * @netdev: network interface device structure
1694 * @new_mtu: new value for maximum frame size
1695 *
1696 * Returns 0 on success, negative on failure
1697 **/
1698static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1699{
1700 struct i40e_netdev_priv *np = netdev_priv(netdev);
1701 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1702 struct i40e_vsi *vsi = np->vsi;
1703
1704 /* MTU < 68 is an error and causes problems on some kernels */
1705 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1706 return -EINVAL;
1707
1708 netdev_info(netdev, "changing MTU from %d to %d\n",
1709 netdev->mtu, new_mtu);
1710 netdev->mtu = new_mtu;
1711 if (netif_running(netdev))
1712 i40e_vsi_reinit_locked(vsi);
1713
1714 return 0;
1715}
1716
1717/**
1718 * i40e_ioctl - Access the hwtstamp interface
1719 * @netdev: network interface device structure
1720 * @ifr: interface request data
1721 * @cmd: ioctl command
1722 **/
1723int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1724{
1725 struct i40e_netdev_priv *np = netdev_priv(netdev);
1726 struct i40e_pf *pf = np->vsi->back;
1727
1728 switch (cmd) {
1729 case SIOCGHWTSTAMP:
1730 return i40e_ptp_get_ts_config(pf, ifr);
1731 case SIOCSHWTSTAMP:
1732 return i40e_ptp_set_ts_config(pf, ifr);
1733 default:
1734 return -EOPNOTSUPP;
1735 }
1736}
1737
1738/**
1739 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1740 * @vsi: the vsi being adjusted
1741 **/
1742void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1743{
1744 struct i40e_vsi_context ctxt;
1745 i40e_status ret;
1746
1747 if ((vsi->info.valid_sections &
1748 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1749 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1750 return; /* already enabled */
1751
1752 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1753 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1754 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
1755
1756 ctxt.seid = vsi->seid;
1757 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1758 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1759 if (ret) {
1760 dev_info(&vsi->back->pdev->dev,
1761 "%s: update vsi failed, aq_err=%d\n",
1762 __func__, vsi->back->hw.aq.asq_last_status);
1763 }
1764}
1765
1766/**
1767 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
1768 * @vsi: the vsi being adjusted
1769 **/
1770void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
1771{
1772 struct i40e_vsi_context ctxt;
1773 i40e_status ret;
1774
1775 if ((vsi->info.valid_sections &
1776 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1777 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
1778 I40E_AQ_VSI_PVLAN_EMOD_MASK))
1779 return; /* already disabled */
1780
1781 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
1782 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
1783 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
1784
1785 ctxt.seid = vsi->seid;
1786 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
1787 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
1788 if (ret) {
1789 dev_info(&vsi->back->pdev->dev,
1790 "%s: update vsi failed, aq_err=%d\n",
1791 __func__, vsi->back->hw.aq.asq_last_status);
1792 }
1793}
1794
1795/**
1796 * i40e_vlan_rx_register - Setup or shutdown vlan offload
1797 * @netdev: network interface to be adjusted
1798 * @features: netdev features to test if VLAN offload is enabled or not
1799 **/
1800static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
1801{
1802 struct i40e_netdev_priv *np = netdev_priv(netdev);
1803 struct i40e_vsi *vsi = np->vsi;
1804
1805 if (features & NETIF_F_HW_VLAN_CTAG_RX)
1806 i40e_vlan_stripping_enable(vsi);
1807 else
1808 i40e_vlan_stripping_disable(vsi);
1809}
1810
1811/**
1812 * i40e_vsi_add_vlan - Add vsi membership for given vlan
1813 * @vsi: the vsi being configured
1814 * @vid: vlan id to be added (0 = untagged only , -1 = any)
1815 **/
1816int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
1817{
1818 struct i40e_mac_filter *f, *add_f;
1819 bool is_netdev, is_vf;
1820
1821 is_vf = (vsi->type == I40E_VSI_SRIOV);
1822 is_netdev = !!(vsi->netdev);
1823
1824 if (is_netdev) {
1825 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
1826 is_vf, is_netdev);
1827 if (!add_f) {
1828 dev_info(&vsi->back->pdev->dev,
1829 "Could not add vlan filter %d for %pM\n",
1830 vid, vsi->netdev->dev_addr);
1831 return -ENOMEM;
1832 }
1833 }
1834
1835 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1836 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1837 if (!add_f) {
1838 dev_info(&vsi->back->pdev->dev,
1839 "Could not add vlan filter %d for %pM\n",
1840 vid, f->macaddr);
1841 return -ENOMEM;
1842 }
1843 }
1844
1845 /* Now if we add a vlan tag, make sure to check if it is the first
1846 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
1847 * with 0, so we now accept untagged and specified tagged traffic
1848 * (and not any taged and untagged)
1849 */
1850 if (vid > 0) {
1851 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
1852 I40E_VLAN_ANY,
1853 is_vf, is_netdev)) {
1854 i40e_del_filter(vsi, vsi->netdev->dev_addr,
1855 I40E_VLAN_ANY, is_vf, is_netdev);
1856 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
1857 is_vf, is_netdev);
1858 if (!add_f) {
1859 dev_info(&vsi->back->pdev->dev,
1860 "Could not add filter 0 for %pM\n",
1861 vsi->netdev->dev_addr);
1862 return -ENOMEM;
1863 }
1864 }
1865 }
1866
1867 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
1868 if (vid > 0 && !vsi->info.pvid) {
1869 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1870 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1871 is_vf, is_netdev)) {
1872 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1873 is_vf, is_netdev);
1874 add_f = i40e_add_filter(vsi, f->macaddr,
1875 0, is_vf, is_netdev);
1876 if (!add_f) {
1877 dev_info(&vsi->back->pdev->dev,
1878 "Could not add filter 0 for %pM\n",
1879 f->macaddr);
1880 return -ENOMEM;
1881 }
1882 }
1883 }
1884 }
1885
1886 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1887 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1888 return 0;
1889
1890 return i40e_sync_vsi_filters(vsi);
1891}
1892
1893/**
1894 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
1895 * @vsi: the vsi being configured
1896 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
1897 *
1898 * Return: 0 on success or negative otherwise
1899 **/
1900int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
1901{
1902 struct net_device *netdev = vsi->netdev;
1903 struct i40e_mac_filter *f, *add_f;
1904 bool is_vf, is_netdev;
1905 int filter_count = 0;
1906
1907 is_vf = (vsi->type == I40E_VSI_SRIOV);
1908 is_netdev = !!(netdev);
1909
1910 if (is_netdev)
1911 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
1912
1913 list_for_each_entry(f, &vsi->mac_filter_list, list)
1914 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
1915
1916 /* go through all the filters for this VSI and if there is only
1917 * vid == 0 it means there are no other filters, so vid 0 must
1918 * be replaced with -1. This signifies that we should from now
1919 * on accept any traffic (with any tag present, or untagged)
1920 */
1921 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1922 if (is_netdev) {
1923 if (f->vlan &&
1924 ether_addr_equal(netdev->dev_addr, f->macaddr))
1925 filter_count++;
1926 }
1927
1928 if (f->vlan)
1929 filter_count++;
1930 }
1931
1932 if (!filter_count && is_netdev) {
1933 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
1934 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1935 is_vf, is_netdev);
1936 if (!f) {
1937 dev_info(&vsi->back->pdev->dev,
1938 "Could not add filter %d for %pM\n",
1939 I40E_VLAN_ANY, netdev->dev_addr);
1940 return -ENOMEM;
1941 }
1942 }
1943
1944 if (!filter_count) {
1945 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1946 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
1947 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
1948 is_vf, is_netdev);
1949 if (!add_f) {
1950 dev_info(&vsi->back->pdev->dev,
1951 "Could not add filter %d for %pM\n",
1952 I40E_VLAN_ANY, f->macaddr);
1953 return -ENOMEM;
1954 }
1955 }
1956 }
1957
1958 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1959 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1960 return 0;
1961
1962 return i40e_sync_vsi_filters(vsi);
1963}
1964
1965/**
1966 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
1967 * @netdev: network interface to be adjusted
1968 * @vid: vlan id to be added
1969 *
1970 * net_device_ops implementation for adding vlan ids
1971 **/
1972static int i40e_vlan_rx_add_vid(struct net_device *netdev,
1973 __always_unused __be16 proto, u16 vid)
1974{
1975 struct i40e_netdev_priv *np = netdev_priv(netdev);
1976 struct i40e_vsi *vsi = np->vsi;
1977 int ret = 0;
1978
1979 if (vid > 4095)
1980 return -EINVAL;
1981
1982 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
1983
1984 /* If the network stack called us with vid = 0 then
1985 * it is asking to receive priority tagged packets with
1986 * vlan id 0. Our HW receives them by default when configured
1987 * to receive untagged packets so there is no need to add an
1988 * extra filter for vlan 0 tagged packets.
1989 */
1990 if (vid)
1991 ret = i40e_vsi_add_vlan(vsi, vid);
1992
1993 if (!ret && (vid < VLAN_N_VID))
1994 set_bit(vid, vsi->active_vlans);
1995
1996 return ret;
1997}
1998
1999/**
2000 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2001 * @netdev: network interface to be adjusted
2002 * @vid: vlan id to be removed
2003 *
2004 * net_device_ops implementation for removing vlan ids
2005 **/
2006static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2007 __always_unused __be16 proto, u16 vid)
2008{
2009 struct i40e_netdev_priv *np = netdev_priv(netdev);
2010 struct i40e_vsi *vsi = np->vsi;
2011
2012 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2013
2014 /* return code is ignored as there is nothing a user
2015 * can do about failure to remove and a log message was
2016 * already printed from the other function
2017 */
2018 i40e_vsi_kill_vlan(vsi, vid);
2019
2020 clear_bit(vid, vsi->active_vlans);
2021
2022 return 0;
2023}
2024
2025/**
2026 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2027 * @vsi: the vsi being brought back up
2028 **/
2029static void i40e_restore_vlan(struct i40e_vsi *vsi)
2030{
2031 u16 vid;
2032
2033 if (!vsi->netdev)
2034 return;
2035
2036 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2037
2038 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2039 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2040 vid);
2041}
2042
2043/**
2044 * i40e_vsi_add_pvid - Add pvid for the VSI
2045 * @vsi: the vsi being adjusted
2046 * @vid: the vlan id to set as a PVID
2047 **/
2048int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2049{
2050 struct i40e_vsi_context ctxt;
2051 i40e_status aq_ret;
2052
2053 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2054 vsi->info.pvid = cpu_to_le16(vid);
2055 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2056 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2057 I40E_AQ_VSI_PVLAN_EMOD_STR;
2058
2059 ctxt.seid = vsi->seid;
2060 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
2061 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2062 if (aq_ret) {
2063 dev_info(&vsi->back->pdev->dev,
2064 "%s: update vsi failed, aq_err=%d\n",
2065 __func__, vsi->back->hw.aq.asq_last_status);
2066 return -ENOENT;
2067 }
2068
2069 return 0;
2070}
2071
2072/**
2073 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2074 * @vsi: the vsi being adjusted
2075 *
2076 * Just use the vlan_rx_register() service to put it back to normal
2077 **/
2078void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2079{
2080 i40e_vlan_stripping_disable(vsi);
2081
2082 vsi->info.pvid = 0;
2083}
2084
2085/**
2086 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2087 * @vsi: ptr to the VSI
2088 *
2089 * If this function returns with an error, then it's possible one or
2090 * more of the rings is populated (while the rest are not). It is the
2091 * callers duty to clean those orphaned rings.
2092 *
2093 * Return 0 on success, negative on failure
2094 **/
2095static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2096{
2097 int i, err = 0;
2098
2099 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2100 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2101
2102 return err;
2103}
2104
2105/**
2106 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2107 * @vsi: ptr to the VSI
2108 *
2109 * Free VSI's transmit software resources
2110 **/
2111static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2112{
2113 int i;
2114
2115 if (!vsi->tx_rings)
2116 return;
2117
2118 for (i = 0; i < vsi->num_queue_pairs; i++)
2119 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2120 i40e_free_tx_resources(vsi->tx_rings[i]);
2121}
2122
2123/**
2124 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2125 * @vsi: ptr to the VSI
2126 *
2127 * If this function returns with an error, then it's possible one or
2128 * more of the rings is populated (while the rest are not). It is the
2129 * callers duty to clean those orphaned rings.
2130 *
2131 * Return 0 on success, negative on failure
2132 **/
2133static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2134{
2135 int i, err = 0;
2136
2137 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2138 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2139 return err;
2140}
2141
2142/**
2143 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2144 * @vsi: ptr to the VSI
2145 *
2146 * Free all receive software resources
2147 **/
2148static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2149{
2150 int i;
2151
2152 if (!vsi->rx_rings)
2153 return;
2154
2155 for (i = 0; i < vsi->num_queue_pairs; i++)
2156 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2157 i40e_free_rx_resources(vsi->rx_rings[i]);
2158}
2159
2160/**
2161 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2162 * @ring: The Tx ring to configure
2163 *
2164 * Configure the Tx descriptor ring in the HMC context.
2165 **/
2166static int i40e_configure_tx_ring(struct i40e_ring *ring)
2167{
2168 struct i40e_vsi *vsi = ring->vsi;
2169 u16 pf_q = vsi->base_queue + ring->queue_index;
2170 struct i40e_hw *hw = &vsi->back->hw;
2171 struct i40e_hmc_obj_txq tx_ctx;
2172 i40e_status err = 0;
2173 u32 qtx_ctl = 0;
2174
2175 /* some ATR related tx ring init */
2176 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2177 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2178 ring->atr_count = 0;
2179 } else {
2180 ring->atr_sample_rate = 0;
2181 }
2182
2183 /* initialize XPS */
2184 if (ring->q_vector && ring->netdev &&
2185 vsi->tc_config.numtc <= 1 &&
2186 !test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2187 netif_set_xps_queue(ring->netdev,
2188 &ring->q_vector->affinity_mask,
2189 ring->queue_index);
2190
2191 /* clear the context structure first */
2192 memset(&tx_ctx, 0, sizeof(tx_ctx));
2193
2194 tx_ctx.new_context = 1;
2195 tx_ctx.base = (ring->dma / 128);
2196 tx_ctx.qlen = ring->count;
2197 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2198 I40E_FLAG_FD_ATR_ENABLED));
2199 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2200 /* FDIR VSI tx ring can still use RS bit and writebacks */
2201 if (vsi->type != I40E_VSI_FDIR)
2202 tx_ctx.head_wb_ena = 1;
2203 tx_ctx.head_wb_addr = ring->dma +
2204 (ring->count * sizeof(struct i40e_tx_desc));
2205
2206 /* As part of VSI creation/update, FW allocates certain
2207 * Tx arbitration queue sets for each TC enabled for
2208 * the VSI. The FW returns the handles to these queue
2209 * sets as part of the response buffer to Add VSI,
2210 * Update VSI, etc. AQ commands. It is expected that
2211 * these queue set handles be associated with the Tx
2212 * queues by the driver as part of the TX queue context
2213 * initialization. This has to be done regardless of
2214 * DCB as by default everything is mapped to TC0.
2215 */
2216 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2217 tx_ctx.rdylist_act = 0;
2218
2219 /* clear the context in the HMC */
2220 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2221 if (err) {
2222 dev_info(&vsi->back->pdev->dev,
2223 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2224 ring->queue_index, pf_q, err);
2225 return -ENOMEM;
2226 }
2227
2228 /* set the context in the HMC */
2229 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2230 if (err) {
2231 dev_info(&vsi->back->pdev->dev,
2232 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2233 ring->queue_index, pf_q, err);
2234 return -ENOMEM;
2235 }
2236
2237 /* Now associate this queue with this PCI function */
2238 if (vsi->type == I40E_VSI_VMDQ2)
2239 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2240 else
2241 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2242 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2243 I40E_QTX_CTL_PF_INDX_MASK);
2244 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2245 i40e_flush(hw);
2246
2247 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2248
2249 /* cache tail off for easier writes later */
2250 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2251
2252 return 0;
2253}
2254
2255/**
2256 * i40e_configure_rx_ring - Configure a receive ring context
2257 * @ring: The Rx ring to configure
2258 *
2259 * Configure the Rx descriptor ring in the HMC context.
2260 **/
2261static int i40e_configure_rx_ring(struct i40e_ring *ring)
2262{
2263 struct i40e_vsi *vsi = ring->vsi;
2264 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2265 u16 pf_q = vsi->base_queue + ring->queue_index;
2266 struct i40e_hw *hw = &vsi->back->hw;
2267 struct i40e_hmc_obj_rxq rx_ctx;
2268 i40e_status err = 0;
2269
2270 ring->state = 0;
2271
2272 /* clear the context structure first */
2273 memset(&rx_ctx, 0, sizeof(rx_ctx));
2274
2275 ring->rx_buf_len = vsi->rx_buf_len;
2276 ring->rx_hdr_len = vsi->rx_hdr_len;
2277
2278 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2279 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2280
2281 rx_ctx.base = (ring->dma / 128);
2282 rx_ctx.qlen = ring->count;
2283
2284 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2285 set_ring_16byte_desc_enabled(ring);
2286 rx_ctx.dsize = 0;
2287 } else {
2288 rx_ctx.dsize = 1;
2289 }
2290
2291 rx_ctx.dtype = vsi->dtype;
2292 if (vsi->dtype) {
2293 set_ring_ps_enabled(ring);
2294 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2295 I40E_RX_SPLIT_IP |
2296 I40E_RX_SPLIT_TCP_UDP |
2297 I40E_RX_SPLIT_SCTP;
2298 } else {
2299 rx_ctx.hsplit_0 = 0;
2300 }
2301
2302 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2303 (chain_len * ring->rx_buf_len));
2304 rx_ctx.tphrdesc_ena = 1;
2305 rx_ctx.tphwdesc_ena = 1;
2306 rx_ctx.tphdata_ena = 1;
2307 rx_ctx.tphhead_ena = 1;
2308 if (hw->revision_id == 0)
2309 rx_ctx.lrxqthresh = 0;
2310 else
2311 rx_ctx.lrxqthresh = 2;
2312 rx_ctx.crcstrip = 1;
2313 rx_ctx.l2tsel = 1;
2314 rx_ctx.showiv = 1;
2315
2316 /* clear the context in the HMC */
2317 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2318 if (err) {
2319 dev_info(&vsi->back->pdev->dev,
2320 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2321 ring->queue_index, pf_q, err);
2322 return -ENOMEM;
2323 }
2324
2325 /* set the context in the HMC */
2326 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2327 if (err) {
2328 dev_info(&vsi->back->pdev->dev,
2329 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2330 ring->queue_index, pf_q, err);
2331 return -ENOMEM;
2332 }
2333
2334 /* cache tail for quicker writes, and clear the reg before use */
2335 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2336 writel(0, ring->tail);
2337
2338 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2339
2340 return 0;
2341}
2342
2343/**
2344 * i40e_vsi_configure_tx - Configure the VSI for Tx
2345 * @vsi: VSI structure describing this set of rings and resources
2346 *
2347 * Configure the Tx VSI for operation.
2348 **/
2349static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2350{
2351 int err = 0;
2352 u16 i;
2353
2354 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2355 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2356
2357 return err;
2358}
2359
2360/**
2361 * i40e_vsi_configure_rx - Configure the VSI for Rx
2362 * @vsi: the VSI being configured
2363 *
2364 * Configure the Rx VSI for operation.
2365 **/
2366static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2367{
2368 int err = 0;
2369 u16 i;
2370
2371 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2372 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2373 + ETH_FCS_LEN + VLAN_HLEN;
2374 else
2375 vsi->max_frame = I40E_RXBUFFER_2048;
2376
2377 /* figure out correct receive buffer length */
2378 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2379 I40E_FLAG_RX_PS_ENABLED)) {
2380 case I40E_FLAG_RX_1BUF_ENABLED:
2381 vsi->rx_hdr_len = 0;
2382 vsi->rx_buf_len = vsi->max_frame;
2383 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2384 break;
2385 case I40E_FLAG_RX_PS_ENABLED:
2386 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2387 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2388 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2389 break;
2390 default:
2391 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2392 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2393 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2394 break;
2395 }
2396
2397 /* round up for the chip's needs */
2398 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2399 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2400 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2401 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2402
2403 /* set up individual rings */
2404 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2405 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2406
2407 return err;
2408}
2409
2410/**
2411 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2412 * @vsi: ptr to the VSI
2413 **/
2414static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2415{
2416 u16 qoffset, qcount;
2417 int i, n;
2418
2419 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED))
2420 return;
2421
2422 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2423 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2424 continue;
2425
2426 qoffset = vsi->tc_config.tc_info[n].qoffset;
2427 qcount = vsi->tc_config.tc_info[n].qcount;
2428 for (i = qoffset; i < (qoffset + qcount); i++) {
2429 struct i40e_ring *rx_ring = vsi->rx_rings[i];
2430 struct i40e_ring *tx_ring = vsi->tx_rings[i];
2431 rx_ring->dcb_tc = n;
2432 tx_ring->dcb_tc = n;
2433 }
2434 }
2435}
2436
2437/**
2438 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2439 * @vsi: ptr to the VSI
2440 **/
2441static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2442{
2443 if (vsi->netdev)
2444 i40e_set_rx_mode(vsi->netdev);
2445}
2446
2447/**
2448 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2449 * @vsi: Pointer to the targeted VSI
2450 *
2451 * This function replays the hlist on the hw where all the SB Flow Director
2452 * filters were saved.
2453 **/
2454static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2455{
2456 struct i40e_fdir_filter *filter;
2457 struct i40e_pf *pf = vsi->back;
2458 struct hlist_node *node;
2459
2460 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2461 return;
2462
2463 hlist_for_each_entry_safe(filter, node,
2464 &pf->fdir_filter_list, fdir_node) {
2465 i40e_add_del_fdir(vsi, filter, true);
2466 }
2467}
2468
2469/**
2470 * i40e_vsi_configure - Set up the VSI for action
2471 * @vsi: the VSI being configured
2472 **/
2473static int i40e_vsi_configure(struct i40e_vsi *vsi)
2474{
2475 int err;
2476
2477 i40e_set_vsi_rx_mode(vsi);
2478 i40e_restore_vlan(vsi);
2479 i40e_vsi_config_dcb_rings(vsi);
2480 err = i40e_vsi_configure_tx(vsi);
2481 if (!err)
2482 err = i40e_vsi_configure_rx(vsi);
2483
2484 return err;
2485}
2486
2487/**
2488 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2489 * @vsi: the VSI being configured
2490 **/
2491static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2492{
2493 struct i40e_pf *pf = vsi->back;
2494 struct i40e_q_vector *q_vector;
2495 struct i40e_hw *hw = &pf->hw;
2496 u16 vector;
2497 int i, q;
2498 u32 val;
2499 u32 qp;
2500
2501 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2502 * and PFINT_LNKLSTn registers, e.g.:
2503 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2504 */
2505 qp = vsi->base_queue;
2506 vector = vsi->base_vector;
2507 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2508 q_vector = vsi->q_vectors[i];
2509 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2510 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2511 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2512 q_vector->rx.itr);
2513 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2514 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2515 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2516 q_vector->tx.itr);
2517
2518 /* Linked list for the queuepairs assigned to this vector */
2519 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2520 for (q = 0; q < q_vector->num_ringpairs; q++) {
2521 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2522 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2523 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2524 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2525 (I40E_QUEUE_TYPE_TX
2526 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2527
2528 wr32(hw, I40E_QINT_RQCTL(qp), val);
2529
2530 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2531 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2532 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2533 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2534 (I40E_QUEUE_TYPE_RX
2535 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2536
2537 /* Terminate the linked list */
2538 if (q == (q_vector->num_ringpairs - 1))
2539 val |= (I40E_QUEUE_END_OF_LIST
2540 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2541
2542 wr32(hw, I40E_QINT_TQCTL(qp), val);
2543 qp++;
2544 }
2545 }
2546
2547 i40e_flush(hw);
2548}
2549
2550/**
2551 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2552 * @hw: ptr to the hardware info
2553 **/
2554static void i40e_enable_misc_int_causes(struct i40e_hw *hw)
2555{
2556 u32 val;
2557
2558 /* clear things first */
2559 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2560 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2561
2562 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2563 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2564 I40E_PFINT_ICR0_ENA_GRST_MASK |
2565 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2566 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2567 I40E_PFINT_ICR0_ENA_TIMESYNC_MASK |
2568 I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK |
2569 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2570 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2571 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2572
2573 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2574
2575 /* SW_ITR_IDX = 0, but don't change INTENA */
2576 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2577 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2578
2579 /* OTHER_ITR_IDX = 0 */
2580 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2581}
2582
2583/**
2584 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2585 * @vsi: the VSI being configured
2586 **/
2587static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2588{
2589 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2590 struct i40e_pf *pf = vsi->back;
2591 struct i40e_hw *hw = &pf->hw;
2592 u32 val;
2593
2594 /* set the ITR configuration */
2595 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2596 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2597 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2598 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2599 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2600 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2601
2602 i40e_enable_misc_int_causes(hw);
2603
2604 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2605 wr32(hw, I40E_PFINT_LNKLST0, 0);
2606
2607 /* Associate the queue pair to the vector and enable the queue int */
2608 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2609 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2610 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2611
2612 wr32(hw, I40E_QINT_RQCTL(0), val);
2613
2614 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2615 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2616 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2617
2618 wr32(hw, I40E_QINT_TQCTL(0), val);
2619 i40e_flush(hw);
2620}
2621
2622/**
2623 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2624 * @pf: board private structure
2625 **/
2626void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2627{
2628 struct i40e_hw *hw = &pf->hw;
2629
2630 wr32(hw, I40E_PFINT_DYN_CTL0,
2631 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2632 i40e_flush(hw);
2633}
2634
2635/**
2636 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2637 * @pf: board private structure
2638 **/
2639void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2640{
2641 struct i40e_hw *hw = &pf->hw;
2642 u32 val;
2643
2644 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2645 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2646 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2647
2648 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2649 i40e_flush(hw);
2650}
2651
2652/**
2653 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2654 * @vsi: pointer to a vsi
2655 * @vector: enable a particular Hw Interrupt vector
2656 **/
2657void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2658{
2659 struct i40e_pf *pf = vsi->back;
2660 struct i40e_hw *hw = &pf->hw;
2661 u32 val;
2662
2663 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2664 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2665 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2666 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2667 /* skip the flush */
2668}
2669
2670/**
2671 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
2672 * @irq: interrupt number
2673 * @data: pointer to a q_vector
2674 **/
2675static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
2676{
2677 struct i40e_q_vector *q_vector = data;
2678
2679 if (!q_vector->tx.ring && !q_vector->rx.ring)
2680 return IRQ_HANDLED;
2681
2682 napi_schedule(&q_vector->napi);
2683
2684 return IRQ_HANDLED;
2685}
2686
2687/**
2688 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
2689 * @vsi: the VSI being configured
2690 * @basename: name for the vector
2691 *
2692 * Allocates MSI-X vectors and requests interrupts from the kernel.
2693 **/
2694static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
2695{
2696 int q_vectors = vsi->num_q_vectors;
2697 struct i40e_pf *pf = vsi->back;
2698 int base = vsi->base_vector;
2699 int rx_int_idx = 0;
2700 int tx_int_idx = 0;
2701 int vector, err;
2702
2703 for (vector = 0; vector < q_vectors; vector++) {
2704 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
2705
2706 if (q_vector->tx.ring && q_vector->rx.ring) {
2707 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2708 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
2709 tx_int_idx++;
2710 } else if (q_vector->rx.ring) {
2711 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2712 "%s-%s-%d", basename, "rx", rx_int_idx++);
2713 } else if (q_vector->tx.ring) {
2714 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2715 "%s-%s-%d", basename, "tx", tx_int_idx++);
2716 } else {
2717 /* skip this unused q_vector */
2718 continue;
2719 }
2720 err = request_irq(pf->msix_entries[base + vector].vector,
2721 vsi->irq_handler,
2722 0,
2723 q_vector->name,
2724 q_vector);
2725 if (err) {
2726 dev_info(&pf->pdev->dev,
2727 "%s: request_irq failed, error: %d\n",
2728 __func__, err);
2729 goto free_queue_irqs;
2730 }
2731 /* assign the mask for this irq */
2732 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2733 &q_vector->affinity_mask);
2734 }
2735
2736 return 0;
2737
2738free_queue_irqs:
2739 while (vector) {
2740 vector--;
2741 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
2742 NULL);
2743 free_irq(pf->msix_entries[base + vector].vector,
2744 &(vsi->q_vectors[vector]));
2745 }
2746 return err;
2747}
2748
2749/**
2750 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
2751 * @vsi: the VSI being un-configured
2752 **/
2753static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
2754{
2755 struct i40e_pf *pf = vsi->back;
2756 struct i40e_hw *hw = &pf->hw;
2757 int base = vsi->base_vector;
2758 int i;
2759
2760 for (i = 0; i < vsi->num_queue_pairs; i++) {
2761 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
2762 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
2763 }
2764
2765 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2766 for (i = vsi->base_vector;
2767 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2768 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
2769
2770 i40e_flush(hw);
2771 for (i = 0; i < vsi->num_q_vectors; i++)
2772 synchronize_irq(pf->msix_entries[i + base].vector);
2773 } else {
2774 /* Legacy and MSI mode - this stops all interrupt handling */
2775 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
2776 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
2777 i40e_flush(hw);
2778 synchronize_irq(pf->pdev->irq);
2779 }
2780}
2781
2782/**
2783 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
2784 * @vsi: the VSI being configured
2785 **/
2786static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
2787{
2788 struct i40e_pf *pf = vsi->back;
2789 int i;
2790
2791 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
2792 for (i = vsi->base_vector;
2793 i < (vsi->num_q_vectors + vsi->base_vector); i++)
2794 i40e_irq_dynamic_enable(vsi, i);
2795 } else {
2796 i40e_irq_dynamic_enable_icr0(pf);
2797 }
2798
2799 i40e_flush(&pf->hw);
2800 return 0;
2801}
2802
2803/**
2804 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
2805 * @pf: board private structure
2806 **/
2807static void i40e_stop_misc_vector(struct i40e_pf *pf)
2808{
2809 /* Disable ICR 0 */
2810 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
2811 i40e_flush(&pf->hw);
2812}
2813
2814/**
2815 * i40e_intr - MSI/Legacy and non-queue interrupt handler
2816 * @irq: interrupt number
2817 * @data: pointer to a q_vector
2818 *
2819 * This is the handler used for all MSI/Legacy interrupts, and deals
2820 * with both queue and non-queue interrupts. This is also used in
2821 * MSIX mode to handle the non-queue interrupts.
2822 **/
2823static irqreturn_t i40e_intr(int irq, void *data)
2824{
2825 struct i40e_pf *pf = (struct i40e_pf *)data;
2826 struct i40e_hw *hw = &pf->hw;
2827 irqreturn_t ret = IRQ_NONE;
2828 u32 icr0, icr0_remaining;
2829 u32 val, ena_mask;
2830
2831 icr0 = rd32(hw, I40E_PFINT_ICR0);
2832 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
2833
2834 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
2835 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
2836 goto enable_intr;
2837
2838 /* if interrupt but no bits showing, must be SWINT */
2839 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
2840 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
2841 pf->sw_int_count++;
2842
2843 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
2844 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
2845
2846 /* temporarily disable queue cause for NAPI processing */
2847 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
2848 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
2849 wr32(hw, I40E_QINT_RQCTL(0), qval);
2850
2851 qval = rd32(hw, I40E_QINT_TQCTL(0));
2852 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
2853 wr32(hw, I40E_QINT_TQCTL(0), qval);
2854
2855 if (!test_bit(__I40E_DOWN, &pf->state))
2856 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
2857 }
2858
2859 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
2860 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2861 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
2862 }
2863
2864 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
2865 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
2866 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
2867 }
2868
2869 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
2870 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
2871 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
2872 }
2873
2874 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
2875 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
2876 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
2877 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
2878 val = rd32(hw, I40E_GLGEN_RSTAT);
2879 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
2880 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
2881 if (val == I40E_RESET_CORER) {
2882 pf->corer_count++;
2883 } else if (val == I40E_RESET_GLOBR) {
2884 pf->globr_count++;
2885 } else if (val == I40E_RESET_EMPR) {
2886 pf->empr_count++;
2887 set_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
2888 }
2889 }
2890
2891 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
2892 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
2893 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
2894 }
2895
2896 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
2897 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
2898
2899 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
2900 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2901 i40e_ptp_tx_hwtstamp(pf);
2902 }
2903 }
2904
2905 /* If a critical error is pending we have no choice but to reset the
2906 * device.
2907 * Report and mask out any remaining unexpected interrupts.
2908 */
2909 icr0_remaining = icr0 & ena_mask;
2910 if (icr0_remaining) {
2911 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
2912 icr0_remaining);
2913 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
2914 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
2915 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
2916 dev_info(&pf->pdev->dev, "device will be reset\n");
2917 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
2918 i40e_service_event_schedule(pf);
2919 }
2920 ena_mask &= ~icr0_remaining;
2921 }
2922 ret = IRQ_HANDLED;
2923
2924enable_intr:
2925 /* re-enable interrupt causes */
2926 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
2927 if (!test_bit(__I40E_DOWN, &pf->state)) {
2928 i40e_service_event_schedule(pf);
2929 i40e_irq_dynamic_enable_icr0(pf);
2930 }
2931
2932 return ret;
2933}
2934
2935/**
2936 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
2937 * @tx_ring: tx ring to clean
2938 * @budget: how many cleans we're allowed
2939 *
2940 * Returns true if there's any budget left (e.g. the clean is finished)
2941 **/
2942static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
2943{
2944 struct i40e_vsi *vsi = tx_ring->vsi;
2945 u16 i = tx_ring->next_to_clean;
2946 struct i40e_tx_buffer *tx_buf;
2947 struct i40e_tx_desc *tx_desc;
2948
2949 tx_buf = &tx_ring->tx_bi[i];
2950 tx_desc = I40E_TX_DESC(tx_ring, i);
2951 i -= tx_ring->count;
2952
2953 do {
2954 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
2955
2956 /* if next_to_watch is not set then there is no work pending */
2957 if (!eop_desc)
2958 break;
2959
2960 /* prevent any other reads prior to eop_desc */
2961 read_barrier_depends();
2962
2963 /* if the descriptor isn't done, no work yet to do */
2964 if (!(eop_desc->cmd_type_offset_bsz &
2965 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
2966 break;
2967
2968 /* clear next_to_watch to prevent false hangs */
2969 tx_buf->next_to_watch = NULL;
2970
2971 /* unmap skb header data */
2972 dma_unmap_single(tx_ring->dev,
2973 dma_unmap_addr(tx_buf, dma),
2974 dma_unmap_len(tx_buf, len),
2975 DMA_TO_DEVICE);
2976
2977 dma_unmap_len_set(tx_buf, len, 0);
2978
2979
2980 /* move to the next desc and buffer to clean */
2981 tx_buf++;
2982 tx_desc++;
2983 i++;
2984 if (unlikely(!i)) {
2985 i -= tx_ring->count;
2986 tx_buf = tx_ring->tx_bi;
2987 tx_desc = I40E_TX_DESC(tx_ring, 0);
2988 }
2989
2990 /* update budget accounting */
2991 budget--;
2992 } while (likely(budget));
2993
2994 i += tx_ring->count;
2995 tx_ring->next_to_clean = i;
2996
2997 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
2998 i40e_irq_dynamic_enable(vsi,
2999 tx_ring->q_vector->v_idx + vsi->base_vector);
3000 }
3001 return budget > 0;
3002}
3003
3004/**
3005 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3006 * @irq: interrupt number
3007 * @data: pointer to a q_vector
3008 **/
3009static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3010{
3011 struct i40e_q_vector *q_vector = data;
3012 struct i40e_vsi *vsi;
3013
3014 if (!q_vector->tx.ring)
3015 return IRQ_HANDLED;
3016
3017 vsi = q_vector->tx.ring->vsi;
3018 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3019
3020 return IRQ_HANDLED;
3021}
3022
3023/**
3024 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3025 * @vsi: the VSI being configured
3026 * @v_idx: vector index
3027 * @qp_idx: queue pair index
3028 **/
3029static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3030{
3031 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3032 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3033 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3034
3035 tx_ring->q_vector = q_vector;
3036 tx_ring->next = q_vector->tx.ring;
3037 q_vector->tx.ring = tx_ring;
3038 q_vector->tx.count++;
3039
3040 rx_ring->q_vector = q_vector;
3041 rx_ring->next = q_vector->rx.ring;
3042 q_vector->rx.ring = rx_ring;
3043 q_vector->rx.count++;
3044}
3045
3046/**
3047 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3048 * @vsi: the VSI being configured
3049 *
3050 * This function maps descriptor rings to the queue-specific vectors
3051 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3052 * one vector per queue pair, but on a constrained vector budget, we
3053 * group the queue pairs as "efficiently" as possible.
3054 **/
3055static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3056{
3057 int qp_remaining = vsi->num_queue_pairs;
3058 int q_vectors = vsi->num_q_vectors;
3059 int num_ringpairs;
3060 int v_start = 0;
3061 int qp_idx = 0;
3062
3063 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3064 * group them so there are multiple queues per vector.
3065 */
3066 for (; v_start < q_vectors && qp_remaining; v_start++) {
3067 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3068
3069 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3070
3071 q_vector->num_ringpairs = num_ringpairs;
3072
3073 q_vector->rx.count = 0;
3074 q_vector->tx.count = 0;
3075 q_vector->rx.ring = NULL;
3076 q_vector->tx.ring = NULL;
3077
3078 while (num_ringpairs--) {
3079 map_vector_to_qp(vsi, v_start, qp_idx);
3080 qp_idx++;
3081 qp_remaining--;
3082 }
3083 }
3084}
3085
3086/**
3087 * i40e_vsi_request_irq - Request IRQ from the OS
3088 * @vsi: the VSI being configured
3089 * @basename: name for the vector
3090 **/
3091static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3092{
3093 struct i40e_pf *pf = vsi->back;
3094 int err;
3095
3096 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3097 err = i40e_vsi_request_irq_msix(vsi, basename);
3098 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3099 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3100 pf->misc_int_name, pf);
3101 else
3102 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3103 pf->misc_int_name, pf);
3104
3105 if (err)
3106 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3107
3108 return err;
3109}
3110
3111#ifdef CONFIG_NET_POLL_CONTROLLER
3112/**
3113 * i40e_netpoll - A Polling 'interrupt'handler
3114 * @netdev: network interface device structure
3115 *
3116 * This is used by netconsole to send skbs without having to re-enable
3117 * interrupts. It's not called while the normal interrupt routine is executing.
3118 **/
3119static void i40e_netpoll(struct net_device *netdev)
3120{
3121 struct i40e_netdev_priv *np = netdev_priv(netdev);
3122 struct i40e_vsi *vsi = np->vsi;
3123 struct i40e_pf *pf = vsi->back;
3124 int i;
3125
3126 /* if interface is down do nothing */
3127 if (test_bit(__I40E_DOWN, &vsi->state))
3128 return;
3129
3130 pf->flags |= I40E_FLAG_IN_NETPOLL;
3131 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3132 for (i = 0; i < vsi->num_q_vectors; i++)
3133 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3134 } else {
3135 i40e_intr(pf->pdev->irq, netdev);
3136 }
3137 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3138}
3139#endif
3140
3141/**
3142 * i40e_vsi_control_tx - Start or stop a VSI's rings
3143 * @vsi: the VSI being configured
3144 * @enable: start or stop the rings
3145 **/
3146static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3147{
3148 struct i40e_pf *pf = vsi->back;
3149 struct i40e_hw *hw = &pf->hw;
3150 int i, j, pf_q;
3151 u32 tx_reg;
3152
3153 pf_q = vsi->base_queue;
3154 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3155 for (j = 0; j < 50; j++) {
3156 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3157 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3158 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3159 break;
3160 usleep_range(1000, 2000);
3161 }
3162 /* Skip if the queue is already in the requested state */
3163 if (enable && (tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3164 continue;
3165 if (!enable && !(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3166 continue;
3167
3168 /* turn on/off the queue */
3169 if (enable) {
3170 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3171 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3172 } else {
3173 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3174 }
3175
3176 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3177
3178 /* wait for the change to finish */
3179 for (j = 0; j < 10; j++) {
3180 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3181 if (enable) {
3182 if ((tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3183 break;
3184 } else {
3185 if (!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3186 break;
3187 }
3188
3189 udelay(10);
3190 }
3191 if (j >= 10) {
3192 dev_info(&pf->pdev->dev, "Tx ring %d %sable timeout\n",
3193 pf_q, (enable ? "en" : "dis"));
3194 return -ETIMEDOUT;
3195 }
3196 }
3197
3198 if (hw->revision_id == 0)
3199 mdelay(50);
3200
3201 return 0;
3202}
3203
3204/**
3205 * i40e_vsi_control_rx - Start or stop a VSI's rings
3206 * @vsi: the VSI being configured
3207 * @enable: start or stop the rings
3208 **/
3209static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3210{
3211 struct i40e_pf *pf = vsi->back;
3212 struct i40e_hw *hw = &pf->hw;
3213 int i, j, pf_q;
3214 u32 rx_reg;
3215
3216 pf_q = vsi->base_queue;
3217 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3218 for (j = 0; j < 50; j++) {
3219 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3220 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3221 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3222 break;
3223 usleep_range(1000, 2000);
3224 }
3225
3226 if (enable) {
3227 /* is STAT set ? */
3228 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3229 continue;
3230 } else {
3231 /* is !STAT set ? */
3232 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3233 continue;
3234 }
3235
3236 /* turn on/off the queue */
3237 if (enable)
3238 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3239 else
3240 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3241 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3242
3243 /* wait for the change to finish */
3244 for (j = 0; j < 10; j++) {
3245 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3246
3247 if (enable) {
3248 if ((rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3249 break;
3250 } else {
3251 if (!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3252 break;
3253 }
3254
3255 udelay(10);
3256 }
3257 if (j >= 10) {
3258 dev_info(&pf->pdev->dev, "Rx ring %d %sable timeout\n",
3259 pf_q, (enable ? "en" : "dis"));
3260 return -ETIMEDOUT;
3261 }
3262 }
3263
3264 return 0;
3265}
3266
3267/**
3268 * i40e_vsi_control_rings - Start or stop a VSI's rings
3269 * @vsi: the VSI being configured
3270 * @enable: start or stop the rings
3271 **/
3272int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3273{
3274 int ret = 0;
3275
3276 /* do rx first for enable and last for disable */
3277 if (request) {
3278 ret = i40e_vsi_control_rx(vsi, request);
3279 if (ret)
3280 return ret;
3281 ret = i40e_vsi_control_tx(vsi, request);
3282 } else {
3283 /* Ignore return value, we need to shutdown whatever we can */
3284 i40e_vsi_control_tx(vsi, request);
3285 i40e_vsi_control_rx(vsi, request);
3286 }
3287
3288 return ret;
3289}
3290
3291/**
3292 * i40e_vsi_free_irq - Free the irq association with the OS
3293 * @vsi: the VSI being configured
3294 **/
3295static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3296{
3297 struct i40e_pf *pf = vsi->back;
3298 struct i40e_hw *hw = &pf->hw;
3299 int base = vsi->base_vector;
3300 u32 val, qp;
3301 int i;
3302
3303 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3304 if (!vsi->q_vectors)
3305 return;
3306
3307 for (i = 0; i < vsi->num_q_vectors; i++) {
3308 u16 vector = i + base;
3309
3310 /* free only the irqs that were actually requested */
3311 if (!vsi->q_vectors[i] ||
3312 !vsi->q_vectors[i]->num_ringpairs)
3313 continue;
3314
3315 /* clear the affinity_mask in the IRQ descriptor */
3316 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3317 NULL);
3318 free_irq(pf->msix_entries[vector].vector,
3319 vsi->q_vectors[i]);
3320
3321 /* Tear down the interrupt queue link list
3322 *
3323 * We know that they come in pairs and always
3324 * the Rx first, then the Tx. To clear the
3325 * link list, stick the EOL value into the
3326 * next_q field of the registers.
3327 */
3328 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3329 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3330 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3331 val |= I40E_QUEUE_END_OF_LIST
3332 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3333 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3334
3335 while (qp != I40E_QUEUE_END_OF_LIST) {
3336 u32 next;
3337
3338 val = rd32(hw, I40E_QINT_RQCTL(qp));
3339
3340 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3341 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3342 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3343 I40E_QINT_RQCTL_INTEVENT_MASK);
3344
3345 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3346 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3347
3348 wr32(hw, I40E_QINT_RQCTL(qp), val);
3349
3350 val = rd32(hw, I40E_QINT_TQCTL(qp));
3351
3352 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3353 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3354
3355 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3356 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3357 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3358 I40E_QINT_TQCTL_INTEVENT_MASK);
3359
3360 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3361 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3362
3363 wr32(hw, I40E_QINT_TQCTL(qp), val);
3364 qp = next;
3365 }
3366 }
3367 } else {
3368 free_irq(pf->pdev->irq, pf);
3369
3370 val = rd32(hw, I40E_PFINT_LNKLST0);
3371 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3372 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3373 val |= I40E_QUEUE_END_OF_LIST
3374 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3375 wr32(hw, I40E_PFINT_LNKLST0, val);
3376
3377 val = rd32(hw, I40E_QINT_RQCTL(qp));
3378 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3379 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3380 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3381 I40E_QINT_RQCTL_INTEVENT_MASK);
3382
3383 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3384 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3385
3386 wr32(hw, I40E_QINT_RQCTL(qp), val);
3387
3388 val = rd32(hw, I40E_QINT_TQCTL(qp));
3389
3390 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3391 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3392 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3393 I40E_QINT_TQCTL_INTEVENT_MASK);
3394
3395 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3396 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3397
3398 wr32(hw, I40E_QINT_TQCTL(qp), val);
3399 }
3400}
3401
3402/**
3403 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3404 * @vsi: the VSI being configured
3405 * @v_idx: Index of vector to be freed
3406 *
3407 * This function frees the memory allocated to the q_vector. In addition if
3408 * NAPI is enabled it will delete any references to the NAPI struct prior
3409 * to freeing the q_vector.
3410 **/
3411static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3412{
3413 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3414 struct i40e_ring *ring;
3415
3416 if (!q_vector)
3417 return;
3418
3419 /* disassociate q_vector from rings */
3420 i40e_for_each_ring(ring, q_vector->tx)
3421 ring->q_vector = NULL;
3422
3423 i40e_for_each_ring(ring, q_vector->rx)
3424 ring->q_vector = NULL;
3425
3426 /* only VSI w/ an associated netdev is set up w/ NAPI */
3427 if (vsi->netdev)
3428 netif_napi_del(&q_vector->napi);
3429
3430 vsi->q_vectors[v_idx] = NULL;
3431
3432 kfree_rcu(q_vector, rcu);
3433}
3434
3435/**
3436 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3437 * @vsi: the VSI being un-configured
3438 *
3439 * This frees the memory allocated to the q_vectors and
3440 * deletes references to the NAPI struct.
3441 **/
3442static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3443{
3444 int v_idx;
3445
3446 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3447 i40e_free_q_vector(vsi, v_idx);
3448}
3449
3450/**
3451 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3452 * @pf: board private structure
3453 **/
3454static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3455{
3456 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3457 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3458 pci_disable_msix(pf->pdev);
3459 kfree(pf->msix_entries);
3460 pf->msix_entries = NULL;
3461 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3462 pci_disable_msi(pf->pdev);
3463 }
3464 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3465}
3466
3467/**
3468 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3469 * @pf: board private structure
3470 *
3471 * We go through and clear interrupt specific resources and reset the structure
3472 * to pre-load conditions
3473 **/
3474static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3475{
3476 int i;
3477
3478 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3479 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
3480 if (pf->vsi[i])
3481 i40e_vsi_free_q_vectors(pf->vsi[i]);
3482 i40e_reset_interrupt_capability(pf);
3483}
3484
3485/**
3486 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3487 * @vsi: the VSI being configured
3488 **/
3489static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3490{
3491 int q_idx;
3492
3493 if (!vsi->netdev)
3494 return;
3495
3496 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3497 napi_enable(&vsi->q_vectors[q_idx]->napi);
3498}
3499
3500/**
3501 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3502 * @vsi: the VSI being configured
3503 **/
3504static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3505{
3506 int q_idx;
3507
3508 if (!vsi->netdev)
3509 return;
3510
3511 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3512 napi_disable(&vsi->q_vectors[q_idx]->napi);
3513}
3514
3515/**
3516 * i40e_quiesce_vsi - Pause a given VSI
3517 * @vsi: the VSI being paused
3518 **/
3519static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3520{
3521 if (test_bit(__I40E_DOWN, &vsi->state))
3522 return;
3523
3524 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3525 if (vsi->netdev && netif_running(vsi->netdev)) {
3526 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3527 } else {
3528 set_bit(__I40E_DOWN, &vsi->state);
3529 i40e_down(vsi);
3530 }
3531}
3532
3533/**
3534 * i40e_unquiesce_vsi - Resume a given VSI
3535 * @vsi: the VSI being resumed
3536 **/
3537static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3538{
3539 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3540 return;
3541
3542 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3543 if (vsi->netdev && netif_running(vsi->netdev))
3544 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3545 else
3546 i40e_up(vsi); /* this clears the DOWN bit */
3547}
3548
3549/**
3550 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3551 * @pf: the PF
3552 **/
3553static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3554{
3555 int v;
3556
3557 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3558 if (pf->vsi[v])
3559 i40e_quiesce_vsi(pf->vsi[v]);
3560 }
3561}
3562
3563/**
3564 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
3565 * @pf: the PF
3566 **/
3567static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
3568{
3569 int v;
3570
3571 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
3572 if (pf->vsi[v])
3573 i40e_unquiesce_vsi(pf->vsi[v]);
3574 }
3575}
3576
3577/**
3578 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
3579 * @dcbcfg: the corresponding DCBx configuration structure
3580 *
3581 * Return the number of TCs from given DCBx configuration
3582 **/
3583static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
3584{
3585 u8 num_tc = 0;
3586 int i;
3587
3588 /* Scan the ETS Config Priority Table to find
3589 * traffic class enabled for a given priority
3590 * and use the traffic class index to get the
3591 * number of traffic classes enabled
3592 */
3593 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3594 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
3595 num_tc = dcbcfg->etscfg.prioritytable[i];
3596 }
3597
3598 /* Traffic class index starts from zero so
3599 * increment to return the actual count
3600 */
3601 return num_tc + 1;
3602}
3603
3604/**
3605 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
3606 * @dcbcfg: the corresponding DCBx configuration structure
3607 *
3608 * Query the current DCB configuration and return the number of
3609 * traffic classes enabled from the given DCBX config
3610 **/
3611static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
3612{
3613 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
3614 u8 enabled_tc = 1;
3615 u8 i;
3616
3617 for (i = 0; i < num_tc; i++)
3618 enabled_tc |= 1 << i;
3619
3620 return enabled_tc;
3621}
3622
3623/**
3624 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
3625 * @pf: PF being queried
3626 *
3627 * Return number of traffic classes enabled for the given PF
3628 **/
3629static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
3630{
3631 struct i40e_hw *hw = &pf->hw;
3632 u8 i, enabled_tc;
3633 u8 num_tc = 0;
3634 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3635
3636 /* If DCB is not enabled then always in single TC */
3637 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3638 return 1;
3639
3640 /* MFP mode return count of enabled TCs for this PF */
3641 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3642 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3643 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3644 if (enabled_tc & (1 << i))
3645 num_tc++;
3646 }
3647 return num_tc;
3648 }
3649
3650 /* SFP mode will be enabled for all TCs on port */
3651 return i40e_dcb_get_num_tc(dcbcfg);
3652}
3653
3654/**
3655 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
3656 * @pf: PF being queried
3657 *
3658 * Return a bitmap for first enabled traffic class for this PF.
3659 **/
3660static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
3661{
3662 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
3663 u8 i = 0;
3664
3665 if (!enabled_tc)
3666 return 0x1; /* TC0 */
3667
3668 /* Find the first enabled TC */
3669 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3670 if (enabled_tc & (1 << i))
3671 break;
3672 }
3673
3674 return 1 << i;
3675}
3676
3677/**
3678 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
3679 * @pf: PF being queried
3680 *
3681 * Return a bitmap for enabled traffic classes for this PF.
3682 **/
3683static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
3684{
3685 /* If DCB is not enabled for this PF then just return default TC */
3686 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
3687 return i40e_pf_get_default_tc(pf);
3688
3689 /* MFP mode will have enabled TCs set by FW */
3690 if (pf->flags & I40E_FLAG_MFP_ENABLED)
3691 return pf->hw.func_caps.enabled_tcmap;
3692
3693 /* SFP mode we want PF to be enabled for all TCs */
3694 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
3695}
3696
3697/**
3698 * i40e_vsi_get_bw_info - Query VSI BW Information
3699 * @vsi: the VSI being queried
3700 *
3701 * Returns 0 on success, negative value on failure
3702 **/
3703static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
3704{
3705 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
3706 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
3707 struct i40e_pf *pf = vsi->back;
3708 struct i40e_hw *hw = &pf->hw;
3709 i40e_status aq_ret;
3710 u32 tc_bw_max;
3711 int i;
3712
3713 /* Get the VSI level BW configuration */
3714 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
3715 if (aq_ret) {
3716 dev_info(&pf->pdev->dev,
3717 "couldn't get pf vsi bw config, err %d, aq_err %d\n",
3718 aq_ret, pf->hw.aq.asq_last_status);
3719 return -EINVAL;
3720 }
3721
3722 /* Get the VSI level BW configuration per TC */
3723 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
3724 NULL);
3725 if (aq_ret) {
3726 dev_info(&pf->pdev->dev,
3727 "couldn't get pf vsi ets bw config, err %d, aq_err %d\n",
3728 aq_ret, pf->hw.aq.asq_last_status);
3729 return -EINVAL;
3730 }
3731
3732 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
3733 dev_info(&pf->pdev->dev,
3734 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
3735 bw_config.tc_valid_bits,
3736 bw_ets_config.tc_valid_bits);
3737 /* Still continuing */
3738 }
3739
3740 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
3741 vsi->bw_max_quanta = bw_config.max_bw;
3742 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
3743 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
3744 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3745 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
3746 vsi->bw_ets_limit_credits[i] =
3747 le16_to_cpu(bw_ets_config.credits[i]);
3748 /* 3 bits out of 4 for each TC */
3749 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
3750 }
3751
3752 return 0;
3753}
3754
3755/**
3756 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
3757 * @vsi: the VSI being configured
3758 * @enabled_tc: TC bitmap
3759 * @bw_credits: BW shared credits per TC
3760 *
3761 * Returns 0 on success, negative value on failure
3762 **/
3763static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
3764 u8 *bw_share)
3765{
3766 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
3767 i40e_status aq_ret;
3768 int i;
3769
3770 bw_data.tc_valid_bits = enabled_tc;
3771 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3772 bw_data.tc_bw_credits[i] = bw_share[i];
3773
3774 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
3775 NULL);
3776 if (aq_ret) {
3777 dev_info(&vsi->back->pdev->dev,
3778 "AQ command Config VSI BW allocation per TC failed = %d\n",
3779 vsi->back->hw.aq.asq_last_status);
3780 return -EINVAL;
3781 }
3782
3783 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
3784 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
3785
3786 return 0;
3787}
3788
3789/**
3790 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
3791 * @vsi: the VSI being configured
3792 * @enabled_tc: TC map to be enabled
3793 *
3794 **/
3795static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3796{
3797 struct net_device *netdev = vsi->netdev;
3798 struct i40e_pf *pf = vsi->back;
3799 struct i40e_hw *hw = &pf->hw;
3800 u8 netdev_tc = 0;
3801 int i;
3802 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
3803
3804 if (!netdev)
3805 return;
3806
3807 if (!enabled_tc) {
3808 netdev_reset_tc(netdev);
3809 return;
3810 }
3811
3812 /* Set up actual enabled TCs on the VSI */
3813 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
3814 return;
3815
3816 /* set per TC queues for the VSI */
3817 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3818 /* Only set TC queues for enabled tcs
3819 *
3820 * e.g. For a VSI that has TC0 and TC3 enabled the
3821 * enabled_tc bitmap would be 0x00001001; the driver
3822 * will set the numtc for netdev as 2 that will be
3823 * referenced by the netdev layer as TC 0 and 1.
3824 */
3825 if (vsi->tc_config.enabled_tc & (1 << i))
3826 netdev_set_tc_queue(netdev,
3827 vsi->tc_config.tc_info[i].netdev_tc,
3828 vsi->tc_config.tc_info[i].qcount,
3829 vsi->tc_config.tc_info[i].qoffset);
3830 }
3831
3832 /* Assign UP2TC map for the VSI */
3833 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
3834 /* Get the actual TC# for the UP */
3835 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
3836 /* Get the mapped netdev TC# for the UP */
3837 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
3838 netdev_set_prio_tc_map(netdev, i, netdev_tc);
3839 }
3840}
3841
3842/**
3843 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
3844 * @vsi: the VSI being configured
3845 * @ctxt: the ctxt buffer returned from AQ VSI update param command
3846 **/
3847static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
3848 struct i40e_vsi_context *ctxt)
3849{
3850 /* copy just the sections touched not the entire info
3851 * since not all sections are valid as returned by
3852 * update vsi params
3853 */
3854 vsi->info.mapping_flags = ctxt->info.mapping_flags;
3855 memcpy(&vsi->info.queue_mapping,
3856 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
3857 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
3858 sizeof(vsi->info.tc_mapping));
3859}
3860
3861/**
3862 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
3863 * @vsi: VSI to be configured
3864 * @enabled_tc: TC bitmap
3865 *
3866 * This configures a particular VSI for TCs that are mapped to the
3867 * given TC bitmap. It uses default bandwidth share for TCs across
3868 * VSIs to configure TC for a particular VSI.
3869 *
3870 * NOTE:
3871 * It is expected that the VSI queues have been quisced before calling
3872 * this function.
3873 **/
3874static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
3875{
3876 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
3877 struct i40e_vsi_context ctxt;
3878 int ret = 0;
3879 int i;
3880
3881 /* Check if enabled_tc is same as existing or new TCs */
3882 if (vsi->tc_config.enabled_tc == enabled_tc)
3883 return ret;
3884
3885 /* Enable ETS TCs with equal BW Share for now across all VSIs */
3886 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3887 if (enabled_tc & (1 << i))
3888 bw_share[i] = 1;
3889 }
3890
3891 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
3892 if (ret) {
3893 dev_info(&vsi->back->pdev->dev,
3894 "Failed configuring TC map %d for VSI %d\n",
3895 enabled_tc, vsi->seid);
3896 goto out;
3897 }
3898
3899 /* Update Queue Pairs Mapping for currently enabled UPs */
3900 ctxt.seid = vsi->seid;
3901 ctxt.pf_num = vsi->back->hw.pf_id;
3902 ctxt.vf_num = 0;
3903 ctxt.uplink_seid = vsi->uplink_seid;
3904 memcpy(&ctxt.info, &vsi->info, sizeof(vsi->info));
3905 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
3906
3907 /* Update the VSI after updating the VSI queue-mapping information */
3908 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3909 if (ret) {
3910 dev_info(&vsi->back->pdev->dev,
3911 "update vsi failed, aq_err=%d\n",
3912 vsi->back->hw.aq.asq_last_status);
3913 goto out;
3914 }
3915 /* update the local VSI info with updated queue map */
3916 i40e_vsi_update_queue_map(vsi, &ctxt);
3917 vsi->info.valid_sections = 0;
3918
3919 /* Update current VSI BW information */
3920 ret = i40e_vsi_get_bw_info(vsi);
3921 if (ret) {
3922 dev_info(&vsi->back->pdev->dev,
3923 "Failed updating vsi bw info, aq_err=%d\n",
3924 vsi->back->hw.aq.asq_last_status);
3925 goto out;
3926 }
3927
3928 /* Update the netdev TC setup */
3929 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
3930out:
3931 return ret;
3932}
3933
3934/**
3935 * i40e_veb_config_tc - Configure TCs for given VEB
3936 * @veb: given VEB
3937 * @enabled_tc: TC bitmap
3938 *
3939 * Configures given TC bitmap for VEB (switching) element
3940 **/
3941int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
3942{
3943 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
3944 struct i40e_pf *pf = veb->pf;
3945 int ret = 0;
3946 int i;
3947
3948 /* No TCs or already enabled TCs just return */
3949 if (!enabled_tc || veb->enabled_tc == enabled_tc)
3950 return ret;
3951
3952 bw_data.tc_valid_bits = enabled_tc;
3953 /* bw_data.absolute_credits is not set (relative) */
3954
3955 /* Enable ETS TCs with equal BW Share for now */
3956 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
3957 if (enabled_tc & (1 << i))
3958 bw_data.tc_bw_share_credits[i] = 1;
3959 }
3960
3961 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
3962 &bw_data, NULL);
3963 if (ret) {
3964 dev_info(&pf->pdev->dev,
3965 "veb bw config failed, aq_err=%d\n",
3966 pf->hw.aq.asq_last_status);
3967 goto out;
3968 }
3969
3970 /* Update the BW information */
3971 ret = i40e_veb_get_bw_info(veb);
3972 if (ret) {
3973 dev_info(&pf->pdev->dev,
3974 "Failed getting veb bw config, aq_err=%d\n",
3975 pf->hw.aq.asq_last_status);
3976 }
3977
3978out:
3979 return ret;
3980}
3981
3982#ifdef CONFIG_I40E_DCB
3983/**
3984 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
3985 * @pf: PF struct
3986 *
3987 * Reconfigure VEB/VSIs on a given PF; it is assumed that
3988 * the caller would've quiesce all the VSIs before calling
3989 * this function
3990 **/
3991static void i40e_dcb_reconfigure(struct i40e_pf *pf)
3992{
3993 u8 tc_map = 0;
3994 int ret;
3995 u8 v;
3996
3997 /* Enable the TCs available on PF to all VEBs */
3998 tc_map = i40e_pf_get_tc_map(pf);
3999 for (v = 0; v < I40E_MAX_VEB; v++) {
4000 if (!pf->veb[v])
4001 continue;
4002 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4003 if (ret) {
4004 dev_info(&pf->pdev->dev,
4005 "Failed configuring TC for VEB seid=%d\n",
4006 pf->veb[v]->seid);
4007 /* Will try to configure as many components */
4008 }
4009 }
4010
4011 /* Update each VSI */
4012 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4013 if (!pf->vsi[v])
4014 continue;
4015
4016 /* - Enable all TCs for the LAN VSI
4017 * - For all others keep them at TC0 for now
4018 */
4019 if (v == pf->lan_vsi)
4020 tc_map = i40e_pf_get_tc_map(pf);
4021 else
4022 tc_map = i40e_pf_get_default_tc(pf);
4023
4024 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4025 if (ret) {
4026 dev_info(&pf->pdev->dev,
4027 "Failed configuring TC for VSI seid=%d\n",
4028 pf->vsi[v]->seid);
4029 /* Will try to configure as many components */
4030 } else {
4031 if (pf->vsi[v]->netdev)
4032 i40e_dcbnl_set_all(pf->vsi[v]);
4033 }
4034 }
4035}
4036
4037/**
4038 * i40e_init_pf_dcb - Initialize DCB configuration
4039 * @pf: PF being configured
4040 *
4041 * Query the current DCB configuration and cache it
4042 * in the hardware structure
4043 **/
4044static int i40e_init_pf_dcb(struct i40e_pf *pf)
4045{
4046 struct i40e_hw *hw = &pf->hw;
4047 int err = 0;
4048
4049 if (pf->hw.func_caps.npar_enable)
4050 goto out;
4051
4052 /* Get the initial DCB configuration */
4053 err = i40e_init_dcb(hw);
4054 if (!err) {
4055 /* Device/Function is not DCBX capable */
4056 if ((!hw->func_caps.dcb) ||
4057 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4058 dev_info(&pf->pdev->dev,
4059 "DCBX offload is not supported or is disabled for this PF.\n");
4060
4061 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4062 goto out;
4063
4064 } else {
4065 /* When status is not DISABLED then DCBX in FW */
4066 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4067 DCB_CAP_DCBX_VER_IEEE;
4068 pf->flags |= I40E_FLAG_DCB_ENABLED;
4069 }
4070 }
4071
4072out:
4073 return err;
4074}
4075#endif /* CONFIG_I40E_DCB */
4076
4077/**
4078 * i40e_up_complete - Finish the last steps of bringing up a connection
4079 * @vsi: the VSI being configured
4080 **/
4081static int i40e_up_complete(struct i40e_vsi *vsi)
4082{
4083 struct i40e_pf *pf = vsi->back;
4084 int err;
4085
4086 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4087 i40e_vsi_configure_msix(vsi);
4088 else
4089 i40e_configure_msi_and_legacy(vsi);
4090
4091 /* start rings */
4092 err = i40e_vsi_control_rings(vsi, true);
4093 if (err)
4094 return err;
4095
4096 clear_bit(__I40E_DOWN, &vsi->state);
4097 i40e_napi_enable_all(vsi);
4098 i40e_vsi_enable_irq(vsi);
4099
4100 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4101 (vsi->netdev)) {
4102 netdev_info(vsi->netdev, "NIC Link is Up\n");
4103 netif_tx_start_all_queues(vsi->netdev);
4104 netif_carrier_on(vsi->netdev);
4105 } else if (vsi->netdev) {
4106 netdev_info(vsi->netdev, "NIC Link is Down\n");
4107 }
4108
4109 /* replay FDIR SB filters */
4110 if (vsi->type == I40E_VSI_FDIR)
4111 i40e_fdir_filter_restore(vsi);
4112 i40e_service_event_schedule(pf);
4113
4114 return 0;
4115}
4116
4117/**
4118 * i40e_vsi_reinit_locked - Reset the VSI
4119 * @vsi: the VSI being configured
4120 *
4121 * Rebuild the ring structs after some configuration
4122 * has changed, e.g. MTU size.
4123 **/
4124static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4125{
4126 struct i40e_pf *pf = vsi->back;
4127
4128 WARN_ON(in_interrupt());
4129 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4130 usleep_range(1000, 2000);
4131 i40e_down(vsi);
4132
4133 /* Give a VF some time to respond to the reset. The
4134 * two second wait is based upon the watchdog cycle in
4135 * the VF driver.
4136 */
4137 if (vsi->type == I40E_VSI_SRIOV)
4138 msleep(2000);
4139 i40e_up(vsi);
4140 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4141}
4142
4143/**
4144 * i40e_up - Bring the connection back up after being down
4145 * @vsi: the VSI being configured
4146 **/
4147int i40e_up(struct i40e_vsi *vsi)
4148{
4149 int err;
4150
4151 err = i40e_vsi_configure(vsi);
4152 if (!err)
4153 err = i40e_up_complete(vsi);
4154
4155 return err;
4156}
4157
4158/**
4159 * i40e_down - Shutdown the connection processing
4160 * @vsi: the VSI being stopped
4161 **/
4162void i40e_down(struct i40e_vsi *vsi)
4163{
4164 int i;
4165
4166 /* It is assumed that the caller of this function
4167 * sets the vsi->state __I40E_DOWN bit.
4168 */
4169 if (vsi->netdev) {
4170 netif_carrier_off(vsi->netdev);
4171 netif_tx_disable(vsi->netdev);
4172 }
4173 i40e_vsi_disable_irq(vsi);
4174 i40e_vsi_control_rings(vsi, false);
4175 i40e_napi_disable_all(vsi);
4176
4177 for (i = 0; i < vsi->num_queue_pairs; i++) {
4178 i40e_clean_tx_ring(vsi->tx_rings[i]);
4179 i40e_clean_rx_ring(vsi->rx_rings[i]);
4180 }
4181}
4182
4183/**
4184 * i40e_setup_tc - configure multiple traffic classes
4185 * @netdev: net device to configure
4186 * @tc: number of traffic classes to enable
4187 **/
4188static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4189{
4190 struct i40e_netdev_priv *np = netdev_priv(netdev);
4191 struct i40e_vsi *vsi = np->vsi;
4192 struct i40e_pf *pf = vsi->back;
4193 u8 enabled_tc = 0;
4194 int ret = -EINVAL;
4195 int i;
4196
4197 /* Check if DCB enabled to continue */
4198 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4199 netdev_info(netdev, "DCB is not enabled for adapter\n");
4200 goto exit;
4201 }
4202
4203 /* Check if MFP enabled */
4204 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4205 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4206 goto exit;
4207 }
4208
4209 /* Check whether tc count is within enabled limit */
4210 if (tc > i40e_pf_get_num_tc(pf)) {
4211 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4212 goto exit;
4213 }
4214
4215 /* Generate TC map for number of tc requested */
4216 for (i = 0; i < tc; i++)
4217 enabled_tc |= (1 << i);
4218
4219 /* Requesting same TC configuration as already enabled */
4220 if (enabled_tc == vsi->tc_config.enabled_tc)
4221 return 0;
4222
4223 /* Quiesce VSI queues */
4224 i40e_quiesce_vsi(vsi);
4225
4226 /* Configure VSI for enabled TCs */
4227 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4228 if (ret) {
4229 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4230 vsi->seid);
4231 goto exit;
4232 }
4233
4234 /* Unquiesce VSI */
4235 i40e_unquiesce_vsi(vsi);
4236
4237exit:
4238 return ret;
4239}
4240
4241/**
4242 * i40e_open - Called when a network interface is made active
4243 * @netdev: network interface device structure
4244 *
4245 * The open entry point is called when a network interface is made
4246 * active by the system (IFF_UP). At this point all resources needed
4247 * for transmit and receive operations are allocated, the interrupt
4248 * handler is registered with the OS, the netdev watchdog subtask is
4249 * enabled, and the stack is notified that the interface is ready.
4250 *
4251 * Returns 0 on success, negative value on failure
4252 **/
4253static int i40e_open(struct net_device *netdev)
4254{
4255 struct i40e_netdev_priv *np = netdev_priv(netdev);
4256 struct i40e_vsi *vsi = np->vsi;
4257 struct i40e_pf *pf = vsi->back;
4258 int err;
4259
4260 /* disallow open during test or if eeprom is broken */
4261 if (test_bit(__I40E_TESTING, &pf->state) ||
4262 test_bit(__I40E_BAD_EEPROM, &pf->state))
4263 return -EBUSY;
4264
4265 netif_carrier_off(netdev);
4266
4267 err = i40e_vsi_open(vsi);
4268 if (err)
4269 return err;
4270
4271 /* configure global TSO hardware offload settings */
4272 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4273 TCP_FLAG_FIN) >> 16);
4274 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4275 TCP_FLAG_FIN |
4276 TCP_FLAG_CWR) >> 16);
4277 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4278
4279#ifdef CONFIG_I40E_VXLAN
4280 vxlan_get_rx_port(netdev);
4281#endif
4282
4283 return 0;
4284}
4285
4286/**
4287 * i40e_vsi_open -
4288 * @vsi: the VSI to open
4289 *
4290 * Finish initialization of the VSI.
4291 *
4292 * Returns 0 on success, negative value on failure
4293 **/
4294int i40e_vsi_open(struct i40e_vsi *vsi)
4295{
4296 struct i40e_pf *pf = vsi->back;
4297 char int_name[IFNAMSIZ];
4298 int err;
4299
4300 /* allocate descriptors */
4301 err = i40e_vsi_setup_tx_resources(vsi);
4302 if (err)
4303 goto err_setup_tx;
4304 err = i40e_vsi_setup_rx_resources(vsi);
4305 if (err)
4306 goto err_setup_rx;
4307
4308 err = i40e_vsi_configure(vsi);
4309 if (err)
4310 goto err_setup_rx;
4311
4312 if (!vsi->netdev) {
4313 err = EINVAL;
4314 goto err_setup_rx;
4315 }
4316 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4317 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4318 err = i40e_vsi_request_irq(vsi, int_name);
4319 if (err)
4320 goto err_setup_rx;
4321
4322 /* Notify the stack of the actual queue counts. */
4323 err = netif_set_real_num_tx_queues(vsi->netdev, vsi->num_queue_pairs);
4324 if (err)
4325 goto err_set_queues;
4326
4327 err = netif_set_real_num_rx_queues(vsi->netdev, vsi->num_queue_pairs);
4328 if (err)
4329 goto err_set_queues;
4330
4331 err = i40e_up_complete(vsi);
4332 if (err)
4333 goto err_up_complete;
4334
4335 return 0;
4336
4337err_up_complete:
4338 i40e_down(vsi);
4339err_set_queues:
4340 i40e_vsi_free_irq(vsi);
4341err_setup_rx:
4342 i40e_vsi_free_rx_resources(vsi);
4343err_setup_tx:
4344 i40e_vsi_free_tx_resources(vsi);
4345 if (vsi == pf->vsi[pf->lan_vsi])
4346 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
4347
4348 return err;
4349}
4350
4351/**
4352 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
4353 * @pf: Pointer to pf
4354 *
4355 * This function destroys the hlist where all the Flow Director
4356 * filters were saved.
4357 **/
4358static void i40e_fdir_filter_exit(struct i40e_pf *pf)
4359{
4360 struct i40e_fdir_filter *filter;
4361 struct hlist_node *node2;
4362
4363 hlist_for_each_entry_safe(filter, node2,
4364 &pf->fdir_filter_list, fdir_node) {
4365 hlist_del(&filter->fdir_node);
4366 kfree(filter);
4367 }
4368 pf->fdir_pf_active_filters = 0;
4369}
4370
4371/**
4372 * i40e_close - Disables a network interface
4373 * @netdev: network interface device structure
4374 *
4375 * The close entry point is called when an interface is de-activated
4376 * by the OS. The hardware is still under the driver's control, but
4377 * this netdev interface is disabled.
4378 *
4379 * Returns 0, this is not allowed to fail
4380 **/
4381static int i40e_close(struct net_device *netdev)
4382{
4383 struct i40e_netdev_priv *np = netdev_priv(netdev);
4384 struct i40e_vsi *vsi = np->vsi;
4385
4386 if (test_and_set_bit(__I40E_DOWN, &vsi->state))
4387 return 0;
4388
4389 i40e_down(vsi);
4390 i40e_vsi_free_irq(vsi);
4391
4392 i40e_vsi_free_tx_resources(vsi);
4393 i40e_vsi_free_rx_resources(vsi);
4394
4395 return 0;
4396}
4397
4398/**
4399 * i40e_do_reset - Start a PF or Core Reset sequence
4400 * @pf: board private structure
4401 * @reset_flags: which reset is requested
4402 *
4403 * The essential difference in resets is that the PF Reset
4404 * doesn't clear the packet buffers, doesn't reset the PE
4405 * firmware, and doesn't bother the other PFs on the chip.
4406 **/
4407void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
4408{
4409 u32 val;
4410
4411 WARN_ON(in_interrupt());
4412
4413 /* do the biggest reset indicated */
4414 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
4415
4416 /* Request a Global Reset
4417 *
4418 * This will start the chip's countdown to the actual full
4419 * chip reset event, and a warning interrupt to be sent
4420 * to all PFs, including the requestor. Our handler
4421 * for the warning interrupt will deal with the shutdown
4422 * and recovery of the switch setup.
4423 */
4424 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
4425 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4426 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
4427 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4428
4429 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
4430
4431 /* Request a Core Reset
4432 *
4433 * Same as Global Reset, except does *not* include the MAC/PHY
4434 */
4435 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
4436 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4437 val |= I40E_GLGEN_RTRIG_CORER_MASK;
4438 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4439 i40e_flush(&pf->hw);
4440
4441 } else if (reset_flags & (1 << __I40E_EMP_RESET_REQUESTED)) {
4442
4443 /* Request a Firmware Reset
4444 *
4445 * Same as Global reset, plus restarting the
4446 * embedded firmware engine.
4447 */
4448 /* enable EMP Reset */
4449 val = rd32(&pf->hw, I40E_GLGEN_RSTENA_EMP);
4450 val |= I40E_GLGEN_RSTENA_EMP_EMP_RST_ENA_MASK;
4451 wr32(&pf->hw, I40E_GLGEN_RSTENA_EMP, val);
4452
4453 /* force the reset */
4454 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
4455 val |= I40E_GLGEN_RTRIG_EMPFWR_MASK;
4456 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
4457 i40e_flush(&pf->hw);
4458
4459 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
4460
4461 /* Request a PF Reset
4462 *
4463 * Resets only the PF-specific registers
4464 *
4465 * This goes directly to the tear-down and rebuild of
4466 * the switch, since we need to do all the recovery as
4467 * for the Core Reset.
4468 */
4469 dev_dbg(&pf->pdev->dev, "PFR requested\n");
4470 i40e_handle_reset_warning(pf);
4471
4472 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
4473 int v;
4474
4475 /* Find the VSI(s) that requested a re-init */
4476 dev_info(&pf->pdev->dev,
4477 "VSI reinit requested\n");
4478 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4479 struct i40e_vsi *vsi = pf->vsi[v];
4480 if (vsi != NULL &&
4481 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
4482 i40e_vsi_reinit_locked(pf->vsi[v]);
4483 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
4484 }
4485 }
4486
4487 /* no further action needed, so return now */
4488 return;
4489 } else {
4490 dev_info(&pf->pdev->dev,
4491 "bad reset request 0x%08x\n", reset_flags);
4492 return;
4493 }
4494}
4495
4496#ifdef CONFIG_I40E_DCB
4497/**
4498 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
4499 * @pf: board private structure
4500 * @old_cfg: current DCB config
4501 * @new_cfg: new DCB config
4502 **/
4503bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
4504 struct i40e_dcbx_config *old_cfg,
4505 struct i40e_dcbx_config *new_cfg)
4506{
4507 bool need_reconfig = false;
4508
4509 /* Check if ETS configuration has changed */
4510 if (memcmp(&new_cfg->etscfg,
4511 &old_cfg->etscfg,
4512 sizeof(new_cfg->etscfg))) {
4513 /* If Priority Table has changed reconfig is needed */
4514 if (memcmp(&new_cfg->etscfg.prioritytable,
4515 &old_cfg->etscfg.prioritytable,
4516 sizeof(new_cfg->etscfg.prioritytable))) {
4517 need_reconfig = true;
4518 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
4519 }
4520
4521 if (memcmp(&new_cfg->etscfg.tcbwtable,
4522 &old_cfg->etscfg.tcbwtable,
4523 sizeof(new_cfg->etscfg.tcbwtable)))
4524 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
4525
4526 if (memcmp(&new_cfg->etscfg.tsatable,
4527 &old_cfg->etscfg.tsatable,
4528 sizeof(new_cfg->etscfg.tsatable)))
4529 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
4530 }
4531
4532 /* Check if PFC configuration has changed */
4533 if (memcmp(&new_cfg->pfc,
4534 &old_cfg->pfc,
4535 sizeof(new_cfg->pfc))) {
4536 need_reconfig = true;
4537 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
4538 }
4539
4540 /* Check if APP Table has changed */
4541 if (memcmp(&new_cfg->app,
4542 &old_cfg->app,
4543 sizeof(new_cfg->app))) {
4544 need_reconfig = true;
4545 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
4546 }
4547
4548 return need_reconfig;
4549}
4550
4551/**
4552 * i40e_handle_lldp_event - Handle LLDP Change MIB event
4553 * @pf: board private structure
4554 * @e: event info posted on ARQ
4555 **/
4556static int i40e_handle_lldp_event(struct i40e_pf *pf,
4557 struct i40e_arq_event_info *e)
4558{
4559 struct i40e_aqc_lldp_get_mib *mib =
4560 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
4561 struct i40e_hw *hw = &pf->hw;
4562 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
4563 struct i40e_dcbx_config tmp_dcbx_cfg;
4564 bool need_reconfig = false;
4565 int ret = 0;
4566 u8 type;
4567
4568 /* Ignore if event is not for Nearest Bridge */
4569 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
4570 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
4571 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
4572 return ret;
4573
4574 /* Check MIB Type and return if event for Remote MIB update */
4575 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
4576 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
4577 /* Update the remote cached instance and return */
4578 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
4579 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
4580 &hw->remote_dcbx_config);
4581 goto exit;
4582 }
4583
4584 /* Convert/store the DCBX data from LLDPDU temporarily */
4585 memset(&tmp_dcbx_cfg, 0, sizeof(tmp_dcbx_cfg));
4586 ret = i40e_lldp_to_dcb_config(e->msg_buf, &tmp_dcbx_cfg);
4587 if (ret) {
4588 /* Error in LLDPDU parsing return */
4589 dev_info(&pf->pdev->dev, "Failed parsing LLDPDU from event buffer\n");
4590 goto exit;
4591 }
4592
4593 /* No change detected in DCBX configs */
4594 if (!memcmp(&tmp_dcbx_cfg, dcbx_cfg, sizeof(tmp_dcbx_cfg))) {
4595 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
4596 goto exit;
4597 }
4598
4599 need_reconfig = i40e_dcb_need_reconfig(pf, dcbx_cfg, &tmp_dcbx_cfg);
4600
4601 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg);
4602
4603 /* Overwrite the new configuration */
4604 *dcbx_cfg = tmp_dcbx_cfg;
4605
4606 if (!need_reconfig)
4607 goto exit;
4608
4609 /* Reconfiguration needed quiesce all VSIs */
4610 i40e_pf_quiesce_all_vsi(pf);
4611
4612 /* Changes in configuration update VEB/VSI */
4613 i40e_dcb_reconfigure(pf);
4614
4615 i40e_pf_unquiesce_all_vsi(pf);
4616exit:
4617 return ret;
4618}
4619#endif /* CONFIG_I40E_DCB */
4620
4621/**
4622 * i40e_do_reset_safe - Protected reset path for userland calls.
4623 * @pf: board private structure
4624 * @reset_flags: which reset is requested
4625 *
4626 **/
4627void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
4628{
4629 rtnl_lock();
4630 i40e_do_reset(pf, reset_flags);
4631 rtnl_unlock();
4632}
4633
4634/**
4635 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
4636 * @pf: board private structure
4637 * @e: event info posted on ARQ
4638 *
4639 * Handler for LAN Queue Overflow Event generated by the firmware for PF
4640 * and VF queues
4641 **/
4642static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
4643 struct i40e_arq_event_info *e)
4644{
4645 struct i40e_aqc_lan_overflow *data =
4646 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
4647 u32 queue = le32_to_cpu(data->prtdcb_rupto);
4648 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
4649 struct i40e_hw *hw = &pf->hw;
4650 struct i40e_vf *vf;
4651 u16 vf_id;
4652
4653 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
4654 queue, qtx_ctl);
4655
4656 /* Queue belongs to VF, find the VF and issue VF reset */
4657 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
4658 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
4659 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
4660 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
4661 vf_id -= hw->func_caps.vf_base_id;
4662 vf = &pf->vf[vf_id];
4663 i40e_vc_notify_vf_reset(vf);
4664 /* Allow VF to process pending reset notification */
4665 msleep(20);
4666 i40e_reset_vf(vf, false);
4667 }
4668}
4669
4670/**
4671 * i40e_service_event_complete - Finish up the service event
4672 * @pf: board private structure
4673 **/
4674static void i40e_service_event_complete(struct i40e_pf *pf)
4675{
4676 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
4677
4678 /* flush memory to make sure state is correct before next watchog */
4679 smp_mb__before_clear_bit();
4680 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
4681}
4682
4683/**
4684 * i40e_get_current_fd_count - Get the count of FD filters programmed in the HW
4685 * @pf: board private structure
4686 **/
4687int i40e_get_current_fd_count(struct i40e_pf *pf)
4688{
4689 int val, fcnt_prog;
4690 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
4691 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
4692 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
4693 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
4694 return fcnt_prog;
4695}
4696
4697/**
4698 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
4699 * @pf: board private structure
4700 **/
4701void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
4702{
4703 u32 fcnt_prog, fcnt_avail;
4704
4705 /* Check if, FD SB or ATR was auto disabled and if there is enough room
4706 * to re-enable
4707 */
4708 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4709 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4710 return;
4711 fcnt_prog = i40e_get_current_fd_count(pf);
4712 fcnt_avail = pf->hw.fdir_shared_filter_count +
4713 pf->fdir_pf_filter_count;
4714 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) {
4715 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
4716 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
4717 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
4718 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
4719 }
4720 }
4721 /* Wait for some more space to be available to turn on ATR */
4722 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
4723 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4724 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
4725 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4726 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
4727 }
4728 }
4729}
4730
4731/**
4732 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
4733 * @pf: board private structure
4734 **/
4735static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
4736{
4737 if (!(pf->flags & I40E_FLAG_FDIR_REQUIRES_REINIT))
4738 return;
4739
4740 /* if interface is down do nothing */
4741 if (test_bit(__I40E_DOWN, &pf->state))
4742 return;
4743 i40e_fdir_check_and_reenable(pf);
4744
4745 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
4746 (pf->flags & I40E_FLAG_FD_SB_ENABLED))
4747 pf->flags &= ~I40E_FLAG_FDIR_REQUIRES_REINIT;
4748}
4749
4750/**
4751 * i40e_vsi_link_event - notify VSI of a link event
4752 * @vsi: vsi to be notified
4753 * @link_up: link up or down
4754 **/
4755static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
4756{
4757 if (!vsi)
4758 return;
4759
4760 switch (vsi->type) {
4761 case I40E_VSI_MAIN:
4762 if (!vsi->netdev || !vsi->netdev_registered)
4763 break;
4764
4765 if (link_up) {
4766 netif_carrier_on(vsi->netdev);
4767 netif_tx_wake_all_queues(vsi->netdev);
4768 } else {
4769 netif_carrier_off(vsi->netdev);
4770 netif_tx_stop_all_queues(vsi->netdev);
4771 }
4772 break;
4773
4774 case I40E_VSI_SRIOV:
4775 break;
4776
4777 case I40E_VSI_VMDQ2:
4778 case I40E_VSI_CTRL:
4779 case I40E_VSI_MIRROR:
4780 default:
4781 /* there is no notification for other VSIs */
4782 break;
4783 }
4784}
4785
4786/**
4787 * i40e_veb_link_event - notify elements on the veb of a link event
4788 * @veb: veb to be notified
4789 * @link_up: link up or down
4790 **/
4791static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
4792{
4793 struct i40e_pf *pf;
4794 int i;
4795
4796 if (!veb || !veb->pf)
4797 return;
4798 pf = veb->pf;
4799
4800 /* depth first... */
4801 for (i = 0; i < I40E_MAX_VEB; i++)
4802 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
4803 i40e_veb_link_event(pf->veb[i], link_up);
4804
4805 /* ... now the local VSIs */
4806 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4807 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
4808 i40e_vsi_link_event(pf->vsi[i], link_up);
4809}
4810
4811/**
4812 * i40e_link_event - Update netif_carrier status
4813 * @pf: board private structure
4814 **/
4815static void i40e_link_event(struct i40e_pf *pf)
4816{
4817 bool new_link, old_link;
4818
4819 new_link = (pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP);
4820 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
4821
4822 if (new_link == old_link)
4823 return;
4824
4825 if (!test_bit(__I40E_DOWN, &pf->vsi[pf->lan_vsi]->state))
4826 netdev_info(pf->vsi[pf->lan_vsi]->netdev,
4827 "NIC Link is %s\n", (new_link ? "Up" : "Down"));
4828
4829 /* Notify the base of the switch tree connected to
4830 * the link. Floating VEBs are not notified.
4831 */
4832 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
4833 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
4834 else
4835 i40e_vsi_link_event(pf->vsi[pf->lan_vsi], new_link);
4836
4837 if (pf->vf)
4838 i40e_vc_notify_link_state(pf);
4839
4840 if (pf->flags & I40E_FLAG_PTP)
4841 i40e_ptp_set_increment(pf);
4842}
4843
4844/**
4845 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
4846 * @pf: board private structure
4847 *
4848 * Set the per-queue flags to request a check for stuck queues in the irq
4849 * clean functions, then force interrupts to be sure the irq clean is called.
4850 **/
4851static void i40e_check_hang_subtask(struct i40e_pf *pf)
4852{
4853 int i, v;
4854
4855 /* If we're down or resetting, just bail */
4856 if (test_bit(__I40E_CONFIG_BUSY, &pf->state))
4857 return;
4858
4859 /* for each VSI/netdev
4860 * for each Tx queue
4861 * set the check flag
4862 * for each q_vector
4863 * force an interrupt
4864 */
4865 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4866 struct i40e_vsi *vsi = pf->vsi[v];
4867 int armed = 0;
4868
4869 if (!pf->vsi[v] ||
4870 test_bit(__I40E_DOWN, &vsi->state) ||
4871 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
4872 continue;
4873
4874 for (i = 0; i < vsi->num_queue_pairs; i++) {
4875 set_check_for_tx_hang(vsi->tx_rings[i]);
4876 if (test_bit(__I40E_HANG_CHECK_ARMED,
4877 &vsi->tx_rings[i]->state))
4878 armed++;
4879 }
4880
4881 if (armed) {
4882 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
4883 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
4884 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
4885 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK));
4886 } else {
4887 u16 vec = vsi->base_vector - 1;
4888 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
4889 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK);
4890 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
4891 wr32(&vsi->back->hw,
4892 I40E_PFINT_DYN_CTLN(vec), val);
4893 }
4894 i40e_flush(&vsi->back->hw);
4895 }
4896 }
4897}
4898
4899/**
4900 * i40e_watchdog_subtask - Check and bring link up
4901 * @pf: board private structure
4902 **/
4903static void i40e_watchdog_subtask(struct i40e_pf *pf)
4904{
4905 int i;
4906
4907 /* if interface is down do nothing */
4908 if (test_bit(__I40E_DOWN, &pf->state) ||
4909 test_bit(__I40E_CONFIG_BUSY, &pf->state))
4910 return;
4911
4912 /* Update the stats for active netdevs so the network stack
4913 * can look at updated numbers whenever it cares to
4914 */
4915 for (i = 0; i < pf->hw.func_caps.num_vsis; i++)
4916 if (pf->vsi[i] && pf->vsi[i]->netdev)
4917 i40e_update_stats(pf->vsi[i]);
4918
4919 /* Update the stats for the active switching components */
4920 for (i = 0; i < I40E_MAX_VEB; i++)
4921 if (pf->veb[i])
4922 i40e_update_veb_stats(pf->veb[i]);
4923
4924 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
4925}
4926
4927/**
4928 * i40e_reset_subtask - Set up for resetting the device and driver
4929 * @pf: board private structure
4930 **/
4931static void i40e_reset_subtask(struct i40e_pf *pf)
4932{
4933 u32 reset_flags = 0;
4934
4935 rtnl_lock();
4936 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
4937 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
4938 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
4939 }
4940 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
4941 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
4942 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4943 }
4944 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
4945 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
4946 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
4947 }
4948 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
4949 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
4950 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
4951 }
4952
4953 /* If there's a recovery already waiting, it takes
4954 * precedence before starting a new reset sequence.
4955 */
4956 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
4957 i40e_handle_reset_warning(pf);
4958 goto unlock;
4959 }
4960
4961 /* If we're already down or resetting, just bail */
4962 if (reset_flags &&
4963 !test_bit(__I40E_DOWN, &pf->state) &&
4964 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
4965 i40e_do_reset(pf, reset_flags);
4966
4967unlock:
4968 rtnl_unlock();
4969}
4970
4971/**
4972 * i40e_handle_link_event - Handle link event
4973 * @pf: board private structure
4974 * @e: event info posted on ARQ
4975 **/
4976static void i40e_handle_link_event(struct i40e_pf *pf,
4977 struct i40e_arq_event_info *e)
4978{
4979 struct i40e_hw *hw = &pf->hw;
4980 struct i40e_aqc_get_link_status *status =
4981 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
4982 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
4983
4984 /* save off old link status information */
4985 memcpy(&pf->hw.phy.link_info_old, hw_link_info,
4986 sizeof(pf->hw.phy.link_info_old));
4987
4988 /* update link status */
4989 hw_link_info->phy_type = (enum i40e_aq_phy_type)status->phy_type;
4990 hw_link_info->link_speed = (enum i40e_aq_link_speed)status->link_speed;
4991 hw_link_info->link_info = status->link_info;
4992 hw_link_info->an_info = status->an_info;
4993 hw_link_info->ext_info = status->ext_info;
4994 hw_link_info->lse_enable =
4995 le16_to_cpu(status->command_flags) &
4996 I40E_AQ_LSE_ENABLE;
4997
4998 /* process the event */
4999 i40e_link_event(pf);
5000
5001 /* Do a new status request to re-enable LSE reporting
5002 * and load new status information into the hw struct,
5003 * then see if the status changed while processing the
5004 * initial event.
5005 */
5006 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
5007 i40e_link_event(pf);
5008}
5009
5010/**
5011 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5012 * @pf: board private structure
5013 **/
5014static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5015{
5016 struct i40e_arq_event_info event;
5017 struct i40e_hw *hw = &pf->hw;
5018 u16 pending, i = 0;
5019 i40e_status ret;
5020 u16 opcode;
5021 u32 val;
5022
5023 if (!test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state))
5024 return;
5025
5026 event.msg_size = I40E_MAX_AQ_BUF_SIZE;
5027 event.msg_buf = kzalloc(event.msg_size, GFP_KERNEL);
5028 if (!event.msg_buf)
5029 return;
5030
5031 do {
5032 event.msg_size = I40E_MAX_AQ_BUF_SIZE; /* reinit each time */
5033 ret = i40e_clean_arq_element(hw, &event, &pending);
5034 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK) {
5035 dev_info(&pf->pdev->dev, "No ARQ event found\n");
5036 break;
5037 } else if (ret) {
5038 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5039 break;
5040 }
5041
5042 opcode = le16_to_cpu(event.desc.opcode);
5043 switch (opcode) {
5044
5045 case i40e_aqc_opc_get_link_status:
5046 i40e_handle_link_event(pf, &event);
5047 break;
5048 case i40e_aqc_opc_send_msg_to_pf:
5049 ret = i40e_vc_process_vf_msg(pf,
5050 le16_to_cpu(event.desc.retval),
5051 le32_to_cpu(event.desc.cookie_high),
5052 le32_to_cpu(event.desc.cookie_low),
5053 event.msg_buf,
5054 event.msg_size);
5055 break;
5056 case i40e_aqc_opc_lldp_update_mib:
5057 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5058#ifdef CONFIG_I40E_DCB
5059 rtnl_lock();
5060 ret = i40e_handle_lldp_event(pf, &event);
5061 rtnl_unlock();
5062#endif /* CONFIG_I40E_DCB */
5063 break;
5064 case i40e_aqc_opc_event_lan_overflow:
5065 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5066 i40e_handle_lan_overflow_event(pf, &event);
5067 break;
5068 case i40e_aqc_opc_send_msg_to_peer:
5069 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5070 break;
5071 default:
5072 dev_info(&pf->pdev->dev,
5073 "ARQ Error: Unknown event 0x%04x received\n",
5074 opcode);
5075 break;
5076 }
5077 } while (pending && (i++ < pf->adminq_work_limit));
5078
5079 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5080 /* re-enable Admin queue interrupt cause */
5081 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5082 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5083 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5084 i40e_flush(hw);
5085
5086 kfree(event.msg_buf);
5087}
5088
5089/**
5090 * i40e_verify_eeprom - make sure eeprom is good to use
5091 * @pf: board private structure
5092 **/
5093static void i40e_verify_eeprom(struct i40e_pf *pf)
5094{
5095 int err;
5096
5097 err = i40e_diag_eeprom_test(&pf->hw);
5098 if (err) {
5099 /* retry in case of garbage read */
5100 err = i40e_diag_eeprom_test(&pf->hw);
5101 if (err) {
5102 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5103 err);
5104 set_bit(__I40E_BAD_EEPROM, &pf->state);
5105 }
5106 }
5107
5108 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5109 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5110 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5111 }
5112}
5113
5114/**
5115 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
5116 * @veb: pointer to the VEB instance
5117 *
5118 * This is a recursive function that first builds the attached VSIs then
5119 * recurses in to build the next layer of VEB. We track the connections
5120 * through our own index numbers because the seid's from the HW could
5121 * change across the reset.
5122 **/
5123static int i40e_reconstitute_veb(struct i40e_veb *veb)
5124{
5125 struct i40e_vsi *ctl_vsi = NULL;
5126 struct i40e_pf *pf = veb->pf;
5127 int v, veb_idx;
5128 int ret;
5129
5130 /* build VSI that owns this VEB, temporarily attached to base VEB */
5131 for (v = 0; v < pf->hw.func_caps.num_vsis && !ctl_vsi; v++) {
5132 if (pf->vsi[v] &&
5133 pf->vsi[v]->veb_idx == veb->idx &&
5134 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
5135 ctl_vsi = pf->vsi[v];
5136 break;
5137 }
5138 }
5139 if (!ctl_vsi) {
5140 dev_info(&pf->pdev->dev,
5141 "missing owner VSI for veb_idx %d\n", veb->idx);
5142 ret = -ENOENT;
5143 goto end_reconstitute;
5144 }
5145 if (ctl_vsi != pf->vsi[pf->lan_vsi])
5146 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
5147 ret = i40e_add_vsi(ctl_vsi);
5148 if (ret) {
5149 dev_info(&pf->pdev->dev,
5150 "rebuild of owner VSI failed: %d\n", ret);
5151 goto end_reconstitute;
5152 }
5153 i40e_vsi_reset_stats(ctl_vsi);
5154
5155 /* create the VEB in the switch and move the VSI onto the VEB */
5156 ret = i40e_add_veb(veb, ctl_vsi);
5157 if (ret)
5158 goto end_reconstitute;
5159
5160 /* create the remaining VSIs attached to this VEB */
5161 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5162 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
5163 continue;
5164
5165 if (pf->vsi[v]->veb_idx == veb->idx) {
5166 struct i40e_vsi *vsi = pf->vsi[v];
5167 vsi->uplink_seid = veb->seid;
5168 ret = i40e_add_vsi(vsi);
5169 if (ret) {
5170 dev_info(&pf->pdev->dev,
5171 "rebuild of vsi_idx %d failed: %d\n",
5172 v, ret);
5173 goto end_reconstitute;
5174 }
5175 i40e_vsi_reset_stats(vsi);
5176 }
5177 }
5178
5179 /* create any VEBs attached to this VEB - RECURSION */
5180 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
5181 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
5182 pf->veb[veb_idx]->uplink_seid = veb->seid;
5183 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
5184 if (ret)
5185 break;
5186 }
5187 }
5188
5189end_reconstitute:
5190 return ret;
5191}
5192
5193/**
5194 * i40e_get_capabilities - get info about the HW
5195 * @pf: the PF struct
5196 **/
5197static int i40e_get_capabilities(struct i40e_pf *pf)
5198{
5199 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
5200 u16 data_size;
5201 int buf_len;
5202 int err;
5203
5204 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
5205 do {
5206 cap_buf = kzalloc(buf_len, GFP_KERNEL);
5207 if (!cap_buf)
5208 return -ENOMEM;
5209
5210 /* this loads the data into the hw struct for us */
5211 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
5212 &data_size,
5213 i40e_aqc_opc_list_func_capabilities,
5214 NULL);
5215 /* data loaded, buffer no longer needed */
5216 kfree(cap_buf);
5217
5218 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
5219 /* retry with a larger buffer */
5220 buf_len = data_size;
5221 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
5222 dev_info(&pf->pdev->dev,
5223 "capability discovery failed: aq=%d\n",
5224 pf->hw.aq.asq_last_status);
5225 return -ENODEV;
5226 }
5227 } while (err);
5228
5229 /* increment MSI-X count because current FW skips one */
5230 pf->hw.func_caps.num_msix_vectors++;
5231
5232 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
5233 (pf->hw.aq.fw_maj_ver < 2)) {
5234 pf->hw.func_caps.num_msix_vectors++;
5235 pf->hw.func_caps.num_msix_vectors_vf++;
5236 }
5237
5238 if (pf->hw.debug_mask & I40E_DEBUG_USER)
5239 dev_info(&pf->pdev->dev,
5240 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
5241 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
5242 pf->hw.func_caps.num_msix_vectors,
5243 pf->hw.func_caps.num_msix_vectors_vf,
5244 pf->hw.func_caps.fd_filters_guaranteed,
5245 pf->hw.func_caps.fd_filters_best_effort,
5246 pf->hw.func_caps.num_tx_qp,
5247 pf->hw.func_caps.num_vsis);
5248
5249#define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
5250 + pf->hw.func_caps.num_vfs)
5251 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
5252 dev_info(&pf->pdev->dev,
5253 "got num_vsis %d, setting num_vsis to %d\n",
5254 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
5255 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
5256 }
5257
5258 return 0;
5259}
5260
5261static int i40e_vsi_clear(struct i40e_vsi *vsi);
5262
5263/**
5264 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
5265 * @pf: board private structure
5266 **/
5267static void i40e_fdir_sb_setup(struct i40e_pf *pf)
5268{
5269 struct i40e_vsi *vsi;
5270 bool new_vsi = false;
5271 int err, i;
5272
5273 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
5274 return;
5275
5276 /* find existing VSI and see if it needs configuring */
5277 vsi = NULL;
5278 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5279 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5280 vsi = pf->vsi[i];
5281 break;
5282 }
5283 }
5284
5285 /* create a new VSI if none exists */
5286 if (!vsi) {
5287 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
5288 pf->vsi[pf->lan_vsi]->seid, 0);
5289 if (!vsi) {
5290 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
5291 goto err_vsi;
5292 }
5293 new_vsi = true;
5294 }
5295 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
5296
5297 err = i40e_vsi_setup_tx_resources(vsi);
5298 if (err)
5299 goto err_setup_tx;
5300 err = i40e_vsi_setup_rx_resources(vsi);
5301 if (err)
5302 goto err_setup_rx;
5303
5304 if (new_vsi) {
5305 char int_name[IFNAMSIZ + 9];
5306 err = i40e_vsi_configure(vsi);
5307 if (err)
5308 goto err_setup_rx;
5309 snprintf(int_name, sizeof(int_name) - 1, "%s-fdir",
5310 dev_driver_string(&pf->pdev->dev));
5311 err = i40e_vsi_request_irq(vsi, int_name);
5312 if (err)
5313 goto err_setup_rx;
5314 err = i40e_up_complete(vsi);
5315 if (err)
5316 goto err_up_complete;
5317 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
5318 }
5319
5320 return;
5321
5322err_up_complete:
5323 i40e_down(vsi);
5324 i40e_vsi_free_irq(vsi);
5325err_setup_rx:
5326 i40e_vsi_free_rx_resources(vsi);
5327err_setup_tx:
5328 i40e_vsi_free_tx_resources(vsi);
5329err_vsi:
5330 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
5331 i40e_vsi_clear(vsi);
5332}
5333
5334/**
5335 * i40e_fdir_teardown - release the Flow Director resources
5336 * @pf: board private structure
5337 **/
5338static void i40e_fdir_teardown(struct i40e_pf *pf)
5339{
5340 int i;
5341
5342 i40e_fdir_filter_exit(pf);
5343 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
5344 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
5345 i40e_vsi_release(pf->vsi[i]);
5346 break;
5347 }
5348 }
5349}
5350
5351/**
5352 * i40e_prep_for_reset - prep for the core to reset
5353 * @pf: board private structure
5354 *
5355 * Close up the VFs and other things in prep for pf Reset.
5356 **/
5357static int i40e_prep_for_reset(struct i40e_pf *pf)
5358{
5359 struct i40e_hw *hw = &pf->hw;
5360 i40e_status ret;
5361 u32 v;
5362
5363 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
5364 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
5365 return 0;
5366
5367 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
5368
5369 if (i40e_check_asq_alive(hw))
5370 i40e_vc_notify_reset(pf);
5371
5372 /* quiesce the VSIs and their queues that are not already DOWN */
5373 i40e_pf_quiesce_all_vsi(pf);
5374
5375 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5376 if (pf->vsi[v])
5377 pf->vsi[v]->seid = 0;
5378 }
5379
5380 i40e_shutdown_adminq(&pf->hw);
5381
5382 /* call shutdown HMC */
5383 ret = i40e_shutdown_lan_hmc(hw);
5384 if (ret) {
5385 dev_info(&pf->pdev->dev, "shutdown_lan_hmc failed: %d\n", ret);
5386 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5387 }
5388 return ret;
5389}
5390
5391/**
5392 * i40e_reset_and_rebuild - reset and rebuild using a saved config
5393 * @pf: board private structure
5394 * @reinit: if the Main VSI needs to re-initialized.
5395 **/
5396static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
5397{
5398 struct i40e_driver_version dv;
5399 struct i40e_hw *hw = &pf->hw;
5400 i40e_status ret;
5401 u32 v;
5402
5403 /* Now we wait for GRST to settle out.
5404 * We don't have to delete the VEBs or VSIs from the hw switch
5405 * because the reset will make them disappear.
5406 */
5407 ret = i40e_pf_reset(hw);
5408 if (ret)
5409 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
5410 pf->pfr_count++;
5411
5412 if (test_bit(__I40E_DOWN, &pf->state))
5413 goto end_core_reset;
5414 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
5415
5416 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
5417 ret = i40e_init_adminq(&pf->hw);
5418 if (ret) {
5419 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
5420 goto end_core_reset;
5421 }
5422
5423 /* re-verify the eeprom if we just had an EMP reset */
5424 if (test_bit(__I40E_EMP_RESET_REQUESTED, &pf->state)) {
5425 clear_bit(__I40E_EMP_RESET_REQUESTED, &pf->state);
5426 i40e_verify_eeprom(pf);
5427 }
5428
5429 ret = i40e_get_capabilities(pf);
5430 if (ret) {
5431 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
5432 ret);
5433 goto end_core_reset;
5434 }
5435
5436 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
5437 hw->func_caps.num_rx_qp,
5438 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
5439 if (ret) {
5440 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
5441 goto end_core_reset;
5442 }
5443 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
5444 if (ret) {
5445 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
5446 goto end_core_reset;
5447 }
5448
5449#ifdef CONFIG_I40E_DCB
5450 ret = i40e_init_pf_dcb(pf);
5451 if (ret) {
5452 dev_info(&pf->pdev->dev, "init_pf_dcb failed: %d\n", ret);
5453 goto end_core_reset;
5454 }
5455#endif /* CONFIG_I40E_DCB */
5456
5457 /* do basic switch setup */
5458 ret = i40e_setup_pf_switch(pf, reinit);
5459 if (ret)
5460 goto end_core_reset;
5461
5462 /* Rebuild the VSIs and VEBs that existed before reset.
5463 * They are still in our local switch element arrays, so only
5464 * need to rebuild the switch model in the HW.
5465 *
5466 * If there were VEBs but the reconstitution failed, we'll try
5467 * try to recover minimal use by getting the basic PF VSI working.
5468 */
5469 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
5470 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
5471 /* find the one VEB connected to the MAC, and find orphans */
5472 for (v = 0; v < I40E_MAX_VEB; v++) {
5473 if (!pf->veb[v])
5474 continue;
5475
5476 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
5477 pf->veb[v]->uplink_seid == 0) {
5478 ret = i40e_reconstitute_veb(pf->veb[v]);
5479
5480 if (!ret)
5481 continue;
5482
5483 /* If Main VEB failed, we're in deep doodoo,
5484 * so give up rebuilding the switch and set up
5485 * for minimal rebuild of PF VSI.
5486 * If orphan failed, we'll report the error
5487 * but try to keep going.
5488 */
5489 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
5490 dev_info(&pf->pdev->dev,
5491 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
5492 ret);
5493 pf->vsi[pf->lan_vsi]->uplink_seid
5494 = pf->mac_seid;
5495 break;
5496 } else if (pf->veb[v]->uplink_seid == 0) {
5497 dev_info(&pf->pdev->dev,
5498 "rebuild of orphan VEB failed: %d\n",
5499 ret);
5500 }
5501 }
5502 }
5503 }
5504
5505 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
5506 dev_info(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
5507 /* no VEB, so rebuild only the Main VSI */
5508 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
5509 if (ret) {
5510 dev_info(&pf->pdev->dev,
5511 "rebuild of Main VSI failed: %d\n", ret);
5512 goto end_core_reset;
5513 }
5514 }
5515
5516 /* reinit the misc interrupt */
5517 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5518 ret = i40e_setup_misc_vector(pf);
5519
5520 /* restart the VSIs that were rebuilt and running before the reset */
5521 i40e_pf_unquiesce_all_vsi(pf);
5522
5523 if (pf->num_alloc_vfs) {
5524 for (v = 0; v < pf->num_alloc_vfs; v++)
5525 i40e_reset_vf(&pf->vf[v], true);
5526 }
5527
5528 /* tell the firmware that we're starting */
5529 dv.major_version = DRV_VERSION_MAJOR;
5530 dv.minor_version = DRV_VERSION_MINOR;
5531 dv.build_version = DRV_VERSION_BUILD;
5532 dv.subbuild_version = 0;
5533 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
5534
5535 dev_info(&pf->pdev->dev, "reset complete\n");
5536
5537end_core_reset:
5538 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
5539}
5540
5541/**
5542 * i40e_handle_reset_warning - prep for the pf to reset, reset and rebuild
5543 * @pf: board private structure
5544 *
5545 * Close up the VFs and other things in prep for a Core Reset,
5546 * then get ready to rebuild the world.
5547 **/
5548static void i40e_handle_reset_warning(struct i40e_pf *pf)
5549{
5550 i40e_status ret;
5551
5552 ret = i40e_prep_for_reset(pf);
5553 if (!ret)
5554 i40e_reset_and_rebuild(pf, false);
5555}
5556
5557/**
5558 * i40e_handle_mdd_event
5559 * @pf: pointer to the pf structure
5560 *
5561 * Called from the MDD irq handler to identify possibly malicious vfs
5562 **/
5563static void i40e_handle_mdd_event(struct i40e_pf *pf)
5564{
5565 struct i40e_hw *hw = &pf->hw;
5566 bool mdd_detected = false;
5567 struct i40e_vf *vf;
5568 u32 reg;
5569 int i;
5570
5571 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
5572 return;
5573
5574 /* find what triggered the MDD event */
5575 reg = rd32(hw, I40E_GL_MDET_TX);
5576 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
5577 u8 func = (reg & I40E_GL_MDET_TX_FUNCTION_MASK)
5578 >> I40E_GL_MDET_TX_FUNCTION_SHIFT;
5579 u8 event = (reg & I40E_GL_MDET_TX_EVENT_SHIFT)
5580 >> I40E_GL_MDET_TX_EVENT_SHIFT;
5581 u8 queue = (reg & I40E_GL_MDET_TX_QUEUE_MASK)
5582 >> I40E_GL_MDET_TX_QUEUE_SHIFT;
5583 dev_info(&pf->pdev->dev,
5584 "Malicious Driver Detection event 0x%02x on TX queue %d of function 0x%02x\n",
5585 event, queue, func);
5586 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
5587 mdd_detected = true;
5588 }
5589 reg = rd32(hw, I40E_GL_MDET_RX);
5590 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
5591 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK)
5592 >> I40E_GL_MDET_RX_FUNCTION_SHIFT;
5593 u8 event = (reg & I40E_GL_MDET_RX_EVENT_SHIFT)
5594 >> I40E_GL_MDET_RX_EVENT_SHIFT;
5595 u8 queue = (reg & I40E_GL_MDET_RX_QUEUE_MASK)
5596 >> I40E_GL_MDET_RX_QUEUE_SHIFT;
5597 dev_info(&pf->pdev->dev,
5598 "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
5599 event, queue, func);
5600 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
5601 mdd_detected = true;
5602 }
5603
5604 /* see if one of the VFs needs its hand slapped */
5605 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
5606 vf = &(pf->vf[i]);
5607 reg = rd32(hw, I40E_VP_MDET_TX(i));
5608 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
5609 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
5610 vf->num_mdd_events++;
5611 dev_info(&pf->pdev->dev, "MDD TX event on VF %d\n", i);
5612 }
5613
5614 reg = rd32(hw, I40E_VP_MDET_RX(i));
5615 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
5616 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
5617 vf->num_mdd_events++;
5618 dev_info(&pf->pdev->dev, "MDD RX event on VF %d\n", i);
5619 }
5620
5621 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
5622 dev_info(&pf->pdev->dev,
5623 "Too many MDD events on VF %d, disabled\n", i);
5624 dev_info(&pf->pdev->dev,
5625 "Use PF Control I/F to re-enable the VF\n");
5626 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
5627 }
5628 }
5629
5630 /* re-enable mdd interrupt cause */
5631 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
5632 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
5633 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
5634 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
5635 i40e_flush(hw);
5636}
5637
5638#ifdef CONFIG_I40E_VXLAN
5639/**
5640 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
5641 * @pf: board private structure
5642 **/
5643static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
5644{
5645 const int vxlan_hdr_qwords = 4;
5646 struct i40e_hw *hw = &pf->hw;
5647 i40e_status ret;
5648 u8 filter_index;
5649 __be16 port;
5650 int i;
5651
5652 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
5653 return;
5654
5655 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
5656
5657 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
5658 if (pf->pending_vxlan_bitmap & (1 << i)) {
5659 pf->pending_vxlan_bitmap &= ~(1 << i);
5660 port = pf->vxlan_ports[i];
5661 ret = port ?
5662 i40e_aq_add_udp_tunnel(hw, ntohs(port),
5663 vxlan_hdr_qwords,
5664 I40E_AQC_TUNNEL_TYPE_VXLAN,
5665 &filter_index, NULL)
5666 : i40e_aq_del_udp_tunnel(hw, i, NULL);
5667
5668 if (ret) {
5669 dev_info(&pf->pdev->dev, "Failed to execute AQ command for %s port %d with index %d\n",
5670 port ? "adding" : "deleting",
5671 ntohs(port), port ? i : i);
5672
5673 pf->vxlan_ports[i] = 0;
5674 } else {
5675 dev_info(&pf->pdev->dev, "%s port %d with AQ command with index %d\n",
5676 port ? "Added" : "Deleted",
5677 ntohs(port), port ? i : filter_index);
5678 }
5679 }
5680 }
5681}
5682
5683#endif
5684/**
5685 * i40e_service_task - Run the driver's async subtasks
5686 * @work: pointer to work_struct containing our data
5687 **/
5688static void i40e_service_task(struct work_struct *work)
5689{
5690 struct i40e_pf *pf = container_of(work,
5691 struct i40e_pf,
5692 service_task);
5693 unsigned long start_time = jiffies;
5694
5695 i40e_reset_subtask(pf);
5696 i40e_handle_mdd_event(pf);
5697 i40e_vc_process_vflr_event(pf);
5698 i40e_watchdog_subtask(pf);
5699 i40e_fdir_reinit_subtask(pf);
5700 i40e_check_hang_subtask(pf);
5701 i40e_sync_filters_subtask(pf);
5702#ifdef CONFIG_I40E_VXLAN
5703 i40e_sync_vxlan_filters_subtask(pf);
5704#endif
5705 i40e_clean_adminq_subtask(pf);
5706
5707 i40e_service_event_complete(pf);
5708
5709 /* If the tasks have taken longer than one timer cycle or there
5710 * is more work to be done, reschedule the service task now
5711 * rather than wait for the timer to tick again.
5712 */
5713 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
5714 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
5715 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
5716 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
5717 i40e_service_event_schedule(pf);
5718}
5719
5720/**
5721 * i40e_service_timer - timer callback
5722 * @data: pointer to PF struct
5723 **/
5724static void i40e_service_timer(unsigned long data)
5725{
5726 struct i40e_pf *pf = (struct i40e_pf *)data;
5727
5728 mod_timer(&pf->service_timer,
5729 round_jiffies(jiffies + pf->service_timer_period));
5730 i40e_service_event_schedule(pf);
5731}
5732
5733/**
5734 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
5735 * @vsi: the VSI being configured
5736 **/
5737static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
5738{
5739 struct i40e_pf *pf = vsi->back;
5740
5741 switch (vsi->type) {
5742 case I40E_VSI_MAIN:
5743 vsi->alloc_queue_pairs = pf->num_lan_qps;
5744 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5745 I40E_REQ_DESCRIPTOR_MULTIPLE);
5746 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5747 vsi->num_q_vectors = pf->num_lan_msix;
5748 else
5749 vsi->num_q_vectors = 1;
5750
5751 break;
5752
5753 case I40E_VSI_FDIR:
5754 vsi->alloc_queue_pairs = 1;
5755 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
5756 I40E_REQ_DESCRIPTOR_MULTIPLE);
5757 vsi->num_q_vectors = 1;
5758 break;
5759
5760 case I40E_VSI_VMDQ2:
5761 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
5762 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5763 I40E_REQ_DESCRIPTOR_MULTIPLE);
5764 vsi->num_q_vectors = pf->num_vmdq_msix;
5765 break;
5766
5767 case I40E_VSI_SRIOV:
5768 vsi->alloc_queue_pairs = pf->num_vf_qps;
5769 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
5770 I40E_REQ_DESCRIPTOR_MULTIPLE);
5771 break;
5772
5773 default:
5774 WARN_ON(1);
5775 return -ENODATA;
5776 }
5777
5778 return 0;
5779}
5780
5781/**
5782 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
5783 * @type: VSI pointer
5784 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
5785 *
5786 * On error: returns error code (negative)
5787 * On success: returns 0
5788 **/
5789static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
5790{
5791 int size;
5792 int ret = 0;
5793
5794 /* allocate memory for both Tx and Rx ring pointers */
5795 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
5796 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
5797 if (!vsi->tx_rings)
5798 return -ENOMEM;
5799 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
5800
5801 if (alloc_qvectors) {
5802 /* allocate memory for q_vector pointers */
5803 size = sizeof(struct i40e_q_vectors *) * vsi->num_q_vectors;
5804 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
5805 if (!vsi->q_vectors) {
5806 ret = -ENOMEM;
5807 goto err_vectors;
5808 }
5809 }
5810 return ret;
5811
5812err_vectors:
5813 kfree(vsi->tx_rings);
5814 return ret;
5815}
5816
5817/**
5818 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
5819 * @pf: board private structure
5820 * @type: type of VSI
5821 *
5822 * On error: returns error code (negative)
5823 * On success: returns vsi index in PF (positive)
5824 **/
5825static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
5826{
5827 int ret = -ENODEV;
5828 struct i40e_vsi *vsi;
5829 int vsi_idx;
5830 int i;
5831
5832 /* Need to protect the allocation of the VSIs at the PF level */
5833 mutex_lock(&pf->switch_mutex);
5834
5835 /* VSI list may be fragmented if VSI creation/destruction has
5836 * been happening. We can afford to do a quick scan to look
5837 * for any free VSIs in the list.
5838 *
5839 * find next empty vsi slot, looping back around if necessary
5840 */
5841 i = pf->next_vsi;
5842 while (i < pf->hw.func_caps.num_vsis && pf->vsi[i])
5843 i++;
5844 if (i >= pf->hw.func_caps.num_vsis) {
5845 i = 0;
5846 while (i < pf->next_vsi && pf->vsi[i])
5847 i++;
5848 }
5849
5850 if (i < pf->hw.func_caps.num_vsis && !pf->vsi[i]) {
5851 vsi_idx = i; /* Found one! */
5852 } else {
5853 ret = -ENODEV;
5854 goto unlock_pf; /* out of VSI slots! */
5855 }
5856 pf->next_vsi = ++i;
5857
5858 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
5859 if (!vsi) {
5860 ret = -ENOMEM;
5861 goto unlock_pf;
5862 }
5863 vsi->type = type;
5864 vsi->back = pf;
5865 set_bit(__I40E_DOWN, &vsi->state);
5866 vsi->flags = 0;
5867 vsi->idx = vsi_idx;
5868 vsi->rx_itr_setting = pf->rx_itr_default;
5869 vsi->tx_itr_setting = pf->tx_itr_default;
5870 vsi->netdev_registered = false;
5871 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
5872 INIT_LIST_HEAD(&vsi->mac_filter_list);
5873
5874 ret = i40e_set_num_rings_in_vsi(vsi);
5875 if (ret)
5876 goto err_rings;
5877
5878 ret = i40e_vsi_alloc_arrays(vsi, true);
5879 if (ret)
5880 goto err_rings;
5881
5882 /* Setup default MSIX irq handler for VSI */
5883 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
5884
5885 pf->vsi[vsi_idx] = vsi;
5886 ret = vsi_idx;
5887 goto unlock_pf;
5888
5889err_rings:
5890 pf->next_vsi = i - 1;
5891 kfree(vsi);
5892unlock_pf:
5893 mutex_unlock(&pf->switch_mutex);
5894 return ret;
5895}
5896
5897/**
5898 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
5899 * @type: VSI pointer
5900 * @free_qvectors: a bool to specify if q_vectors need to be freed.
5901 *
5902 * On error: returns error code (negative)
5903 * On success: returns 0
5904 **/
5905static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
5906{
5907 /* free the ring and vector containers */
5908 if (free_qvectors) {
5909 kfree(vsi->q_vectors);
5910 vsi->q_vectors = NULL;
5911 }
5912 kfree(vsi->tx_rings);
5913 vsi->tx_rings = NULL;
5914 vsi->rx_rings = NULL;
5915}
5916
5917/**
5918 * i40e_vsi_clear - Deallocate the VSI provided
5919 * @vsi: the VSI being un-configured
5920 **/
5921static int i40e_vsi_clear(struct i40e_vsi *vsi)
5922{
5923 struct i40e_pf *pf;
5924
5925 if (!vsi)
5926 return 0;
5927
5928 if (!vsi->back)
5929 goto free_vsi;
5930 pf = vsi->back;
5931
5932 mutex_lock(&pf->switch_mutex);
5933 if (!pf->vsi[vsi->idx]) {
5934 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
5935 vsi->idx, vsi->idx, vsi, vsi->type);
5936 goto unlock_vsi;
5937 }
5938
5939 if (pf->vsi[vsi->idx] != vsi) {
5940 dev_err(&pf->pdev->dev,
5941 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
5942 pf->vsi[vsi->idx]->idx,
5943 pf->vsi[vsi->idx],
5944 pf->vsi[vsi->idx]->type,
5945 vsi->idx, vsi, vsi->type);
5946 goto unlock_vsi;
5947 }
5948
5949 /* updates the pf for this cleared vsi */
5950 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
5951 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
5952
5953 i40e_vsi_free_arrays(vsi, true);
5954
5955 pf->vsi[vsi->idx] = NULL;
5956 if (vsi->idx < pf->next_vsi)
5957 pf->next_vsi = vsi->idx;
5958
5959unlock_vsi:
5960 mutex_unlock(&pf->switch_mutex);
5961free_vsi:
5962 kfree(vsi);
5963
5964 return 0;
5965}
5966
5967/**
5968 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
5969 * @vsi: the VSI being cleaned
5970 **/
5971static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
5972{
5973 int i;
5974
5975 if (vsi->tx_rings && vsi->tx_rings[0]) {
5976 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5977 kfree_rcu(vsi->tx_rings[i], rcu);
5978 vsi->tx_rings[i] = NULL;
5979 vsi->rx_rings[i] = NULL;
5980 }
5981 }
5982}
5983
5984/**
5985 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
5986 * @vsi: the VSI being configured
5987 **/
5988static int i40e_alloc_rings(struct i40e_vsi *vsi)
5989{
5990 struct i40e_pf *pf = vsi->back;
5991 int i;
5992
5993 /* Set basic values in the rings to be used later during open() */
5994 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
5995 struct i40e_ring *tx_ring;
5996 struct i40e_ring *rx_ring;
5997
5998 /* allocate space for both Tx and Rx in one shot */
5999 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
6000 if (!tx_ring)
6001 goto err_out;
6002
6003 tx_ring->queue_index = i;
6004 tx_ring->reg_idx = vsi->base_queue + i;
6005 tx_ring->ring_active = false;
6006 tx_ring->vsi = vsi;
6007 tx_ring->netdev = vsi->netdev;
6008 tx_ring->dev = &pf->pdev->dev;
6009 tx_ring->count = vsi->num_desc;
6010 tx_ring->size = 0;
6011 tx_ring->dcb_tc = 0;
6012 vsi->tx_rings[i] = tx_ring;
6013
6014 rx_ring = &tx_ring[1];
6015 rx_ring->queue_index = i;
6016 rx_ring->reg_idx = vsi->base_queue + i;
6017 rx_ring->ring_active = false;
6018 rx_ring->vsi = vsi;
6019 rx_ring->netdev = vsi->netdev;
6020 rx_ring->dev = &pf->pdev->dev;
6021 rx_ring->count = vsi->num_desc;
6022 rx_ring->size = 0;
6023 rx_ring->dcb_tc = 0;
6024 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
6025 set_ring_16byte_desc_enabled(rx_ring);
6026 else
6027 clear_ring_16byte_desc_enabled(rx_ring);
6028 vsi->rx_rings[i] = rx_ring;
6029 }
6030
6031 return 0;
6032
6033err_out:
6034 i40e_vsi_clear_rings(vsi);
6035 return -ENOMEM;
6036}
6037
6038/**
6039 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
6040 * @pf: board private structure
6041 * @vectors: the number of MSI-X vectors to request
6042 *
6043 * Returns the number of vectors reserved, or error
6044 **/
6045static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
6046{
6047 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
6048 I40E_MIN_MSIX, vectors);
6049 if (vectors < 0) {
6050 dev_info(&pf->pdev->dev,
6051 "MSI-X vector reservation failed: %d\n", vectors);
6052 vectors = 0;
6053 }
6054
6055 pf->num_msix_entries = vectors;
6056
6057 return vectors;
6058}
6059
6060/**
6061 * i40e_init_msix - Setup the MSIX capability
6062 * @pf: board private structure
6063 *
6064 * Work with the OS to set up the MSIX vectors needed.
6065 *
6066 * Returns 0 on success, negative on failure
6067 **/
6068static int i40e_init_msix(struct i40e_pf *pf)
6069{
6070 i40e_status err = 0;
6071 struct i40e_hw *hw = &pf->hw;
6072 int v_budget, i;
6073 int vec;
6074
6075 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
6076 return -ENODEV;
6077
6078 /* The number of vectors we'll request will be comprised of:
6079 * - Add 1 for "other" cause for Admin Queue events, etc.
6080 * - The number of LAN queue pairs
6081 * - Queues being used for RSS.
6082 * We don't need as many as max_rss_size vectors.
6083 * use rss_size instead in the calculation since that
6084 * is governed by number of cpus in the system.
6085 * - assumes symmetric Tx/Rx pairing
6086 * - The number of VMDq pairs
6087 * Once we count this up, try the request.
6088 *
6089 * If we can't get what we want, we'll simplify to nearly nothing
6090 * and try again. If that still fails, we punt.
6091 */
6092 pf->num_lan_msix = pf->num_lan_qps - (pf->rss_size_max - pf->rss_size);
6093 pf->num_vmdq_msix = pf->num_vmdq_qps;
6094 v_budget = 1 + pf->num_lan_msix;
6095 v_budget += (pf->num_vmdq_vsis * pf->num_vmdq_msix);
6096 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
6097 v_budget++;
6098
6099 /* Scale down if necessary, and the rings will share vectors */
6100 v_budget = min_t(int, v_budget, hw->func_caps.num_msix_vectors);
6101
6102 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
6103 GFP_KERNEL);
6104 if (!pf->msix_entries)
6105 return -ENOMEM;
6106
6107 for (i = 0; i < v_budget; i++)
6108 pf->msix_entries[i].entry = i;
6109 vec = i40e_reserve_msix_vectors(pf, v_budget);
6110 if (vec < I40E_MIN_MSIX) {
6111 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
6112 kfree(pf->msix_entries);
6113 pf->msix_entries = NULL;
6114 return -ENODEV;
6115
6116 } else if (vec == I40E_MIN_MSIX) {
6117 /* Adjust for minimal MSIX use */
6118 dev_info(&pf->pdev->dev, "Features disabled, not enough MSI-X vectors\n");
6119 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
6120 pf->num_vmdq_vsis = 0;
6121 pf->num_vmdq_qps = 0;
6122 pf->num_vmdq_msix = 0;
6123 pf->num_lan_qps = 1;
6124 pf->num_lan_msix = 1;
6125
6126 } else if (vec != v_budget) {
6127 /* Scale vector usage down */
6128 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
6129 vec--; /* reserve the misc vector */
6130
6131 /* partition out the remaining vectors */
6132 switch (vec) {
6133 case 2:
6134 pf->num_vmdq_vsis = 1;
6135 pf->num_lan_msix = 1;
6136 break;
6137 case 3:
6138 pf->num_vmdq_vsis = 1;
6139 pf->num_lan_msix = 2;
6140 break;
6141 default:
6142 pf->num_lan_msix = min_t(int, (vec / 2),
6143 pf->num_lan_qps);
6144 pf->num_vmdq_vsis = min_t(int, (vec - pf->num_lan_msix),
6145 I40E_DEFAULT_NUM_VMDQ_VSI);
6146 break;
6147 }
6148 }
6149
6150 return err;
6151}
6152
6153/**
6154 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
6155 * @vsi: the VSI being configured
6156 * @v_idx: index of the vector in the vsi struct
6157 *
6158 * We allocate one q_vector. If allocation fails we return -ENOMEM.
6159 **/
6160static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
6161{
6162 struct i40e_q_vector *q_vector;
6163
6164 /* allocate q_vector */
6165 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
6166 if (!q_vector)
6167 return -ENOMEM;
6168
6169 q_vector->vsi = vsi;
6170 q_vector->v_idx = v_idx;
6171 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
6172 if (vsi->netdev)
6173 netif_napi_add(vsi->netdev, &q_vector->napi,
6174 i40e_napi_poll, vsi->work_limit);
6175
6176 q_vector->rx.latency_range = I40E_LOW_LATENCY;
6177 q_vector->tx.latency_range = I40E_LOW_LATENCY;
6178
6179 /* tie q_vector and vsi together */
6180 vsi->q_vectors[v_idx] = q_vector;
6181
6182 return 0;
6183}
6184
6185/**
6186 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
6187 * @vsi: the VSI being configured
6188 *
6189 * We allocate one q_vector per queue interrupt. If allocation fails we
6190 * return -ENOMEM.
6191 **/
6192static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
6193{
6194 struct i40e_pf *pf = vsi->back;
6195 int v_idx, num_q_vectors;
6196 int err;
6197
6198 /* if not MSIX, give the one vector only to the LAN VSI */
6199 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6200 num_q_vectors = vsi->num_q_vectors;
6201 else if (vsi == pf->vsi[pf->lan_vsi])
6202 num_q_vectors = 1;
6203 else
6204 return -EINVAL;
6205
6206 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
6207 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
6208 if (err)
6209 goto err_out;
6210 }
6211
6212 return 0;
6213
6214err_out:
6215 while (v_idx--)
6216 i40e_free_q_vector(vsi, v_idx);
6217
6218 return err;
6219}
6220
6221/**
6222 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
6223 * @pf: board private structure to initialize
6224 **/
6225static void i40e_init_interrupt_scheme(struct i40e_pf *pf)
6226{
6227 int err = 0;
6228
6229 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
6230 err = i40e_init_msix(pf);
6231 if (err) {
6232 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
6233 I40E_FLAG_RSS_ENABLED |
6234 I40E_FLAG_DCB_ENABLED |
6235 I40E_FLAG_SRIOV_ENABLED |
6236 I40E_FLAG_FD_SB_ENABLED |
6237 I40E_FLAG_FD_ATR_ENABLED |
6238 I40E_FLAG_VMDQ_ENABLED);
6239
6240 /* rework the queue expectations without MSIX */
6241 i40e_determine_queue_usage(pf);
6242 }
6243 }
6244
6245 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
6246 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
6247 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
6248 err = pci_enable_msi(pf->pdev);
6249 if (err) {
6250 dev_info(&pf->pdev->dev, "MSI init failed - %d\n", err);
6251 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
6252 }
6253 }
6254
6255 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
6256 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
6257
6258 /* track first vector for misc interrupts */
6259 err = i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT-1);
6260}
6261
6262/**
6263 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
6264 * @pf: board private structure
6265 *
6266 * This sets up the handler for MSIX 0, which is used to manage the
6267 * non-queue interrupts, e.g. AdminQ and errors. This is not used
6268 * when in MSI or Legacy interrupt mode.
6269 **/
6270static int i40e_setup_misc_vector(struct i40e_pf *pf)
6271{
6272 struct i40e_hw *hw = &pf->hw;
6273 int err = 0;
6274
6275 /* Only request the irq if this is the first time through, and
6276 * not when we're rebuilding after a Reset
6277 */
6278 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6279 err = request_irq(pf->msix_entries[0].vector,
6280 i40e_intr, 0, pf->misc_int_name, pf);
6281 if (err) {
6282 dev_info(&pf->pdev->dev,
6283 "request_irq for %s failed: %d\n",
6284 pf->misc_int_name, err);
6285 return -EFAULT;
6286 }
6287 }
6288
6289 i40e_enable_misc_int_causes(hw);
6290
6291 /* associate no queues to the misc vector */
6292 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
6293 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
6294
6295 i40e_flush(hw);
6296
6297 i40e_irq_dynamic_enable_icr0(pf);
6298
6299 return err;
6300}
6301
6302/**
6303 * i40e_config_rss - Prepare for RSS if used
6304 * @pf: board private structure
6305 **/
6306static int i40e_config_rss(struct i40e_pf *pf)
6307{
6308 /* Set of random keys generated using kernel random number generator */
6309 static const u32 seed[I40E_PFQF_HKEY_MAX_INDEX + 1] = {0x41b01687,
6310 0x183cfd8c, 0xce880440, 0x580cbc3c, 0x35897377,
6311 0x328b25e1, 0x4fa98922, 0xb7d90c14, 0xd5bad70d,
6312 0xcd15a2c1, 0xe8580225, 0x4a1e9d11, 0xfe5731be};
6313 struct i40e_hw *hw = &pf->hw;
6314 u32 lut = 0;
6315 int i, j;
6316 u64 hena;
6317
6318 /* Fill out hash function seed */
6319 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
6320 wr32(hw, I40E_PFQF_HKEY(i), seed[i]);
6321
6322 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
6323 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
6324 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
6325 hena |= I40E_DEFAULT_RSS_HENA;
6326 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
6327 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
6328
6329 /* Populate the LUT with max no. of queues in round robin fashion */
6330 for (i = 0, j = 0; i < pf->hw.func_caps.rss_table_size; i++, j++) {
6331
6332 /* The assumption is that lan qp count will be the highest
6333 * qp count for any PF VSI that needs RSS.
6334 * If multiple VSIs need RSS support, all the qp counts
6335 * for those VSIs should be a power of 2 for RSS to work.
6336 * If LAN VSI is the only consumer for RSS then this requirement
6337 * is not necessary.
6338 */
6339 if (j == pf->rss_size)
6340 j = 0;
6341 /* lut = 4-byte sliding window of 4 lut entries */
6342 lut = (lut << 8) | (j &
6343 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
6344 /* On i = 3, we have 4 entries in lut; write to the register */
6345 if ((i & 3) == 3)
6346 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
6347 }
6348 i40e_flush(hw);
6349
6350 return 0;
6351}
6352
6353/**
6354 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
6355 * @pf: board private structure
6356 * @queue_count: the requested queue count for rss.
6357 *
6358 * returns 0 if rss is not enabled, if enabled returns the final rss queue
6359 * count which may be different from the requested queue count.
6360 **/
6361int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
6362{
6363 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
6364 return 0;
6365
6366 queue_count = min_t(int, queue_count, pf->rss_size_max);
6367 queue_count = rounddown_pow_of_two(queue_count);
6368
6369 if (queue_count != pf->rss_size) {
6370 i40e_prep_for_reset(pf);
6371
6372 pf->rss_size = queue_count;
6373
6374 i40e_reset_and_rebuild(pf, true);
6375 i40e_config_rss(pf);
6376 }
6377 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
6378 return pf->rss_size;
6379}
6380
6381/**
6382 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
6383 * @pf: board private structure to initialize
6384 *
6385 * i40e_sw_init initializes the Adapter private data structure.
6386 * Fields are initialized based on PCI device information and
6387 * OS network device settings (MTU size).
6388 **/
6389static int i40e_sw_init(struct i40e_pf *pf)
6390{
6391 int err = 0;
6392 int size;
6393
6394 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
6395 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
6396 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
6397 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
6398 if (I40E_DEBUG_USER & debug)
6399 pf->hw.debug_mask = debug;
6400 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
6401 I40E_DEFAULT_MSG_ENABLE);
6402 }
6403
6404 /* Set default capability flags */
6405 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
6406 I40E_FLAG_MSI_ENABLED |
6407 I40E_FLAG_MSIX_ENABLED |
6408 I40E_FLAG_RX_1BUF_ENABLED;
6409
6410 /* Depending on PF configurations, it is possible that the RSS
6411 * maximum might end up larger than the available queues
6412 */
6413 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
6414 pf->rss_size_max = min_t(int, pf->rss_size_max,
6415 pf->hw.func_caps.num_tx_qp);
6416 if (pf->hw.func_caps.rss) {
6417 pf->flags |= I40E_FLAG_RSS_ENABLED;
6418 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
6419 pf->rss_size = rounddown_pow_of_two(pf->rss_size);
6420 } else {
6421 pf->rss_size = 1;
6422 }
6423
6424 /* MFP mode enabled */
6425 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.mfp_mode_1) {
6426 pf->flags |= I40E_FLAG_MFP_ENABLED;
6427 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
6428 }
6429
6430 /* FW/NVM is not yet fixed in this regard */
6431 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
6432 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
6433 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6434 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
6435 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
6436 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6437 } else {
6438 dev_info(&pf->pdev->dev,
6439 "Flow Director Sideband mode Disabled in MFP mode\n");
6440 }
6441 pf->fdir_pf_filter_count =
6442 pf->hw.func_caps.fd_filters_guaranteed;
6443 pf->hw.fdir_shared_filter_count =
6444 pf->hw.func_caps.fd_filters_best_effort;
6445 }
6446
6447 if (pf->hw.func_caps.vmdq) {
6448 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
6449 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
6450 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
6451 }
6452
6453#ifdef CONFIG_PCI_IOV
6454 if (pf->hw.func_caps.num_vfs) {
6455 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
6456 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
6457 pf->num_req_vfs = min_t(int,
6458 pf->hw.func_caps.num_vfs,
6459 I40E_MAX_VF_COUNT);
6460 }
6461#endif /* CONFIG_PCI_IOV */
6462 pf->eeprom_version = 0xDEAD;
6463 pf->lan_veb = I40E_NO_VEB;
6464 pf->lan_vsi = I40E_NO_VSI;
6465
6466 /* set up queue assignment tracking */
6467 size = sizeof(struct i40e_lump_tracking)
6468 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
6469 pf->qp_pile = kzalloc(size, GFP_KERNEL);
6470 if (!pf->qp_pile) {
6471 err = -ENOMEM;
6472 goto sw_init_done;
6473 }
6474 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
6475 pf->qp_pile->search_hint = 0;
6476
6477 /* set up vector assignment tracking */
6478 size = sizeof(struct i40e_lump_tracking)
6479 + (sizeof(u16) * pf->hw.func_caps.num_msix_vectors);
6480 pf->irq_pile = kzalloc(size, GFP_KERNEL);
6481 if (!pf->irq_pile) {
6482 kfree(pf->qp_pile);
6483 err = -ENOMEM;
6484 goto sw_init_done;
6485 }
6486 pf->irq_pile->num_entries = pf->hw.func_caps.num_msix_vectors;
6487 pf->irq_pile->search_hint = 0;
6488
6489 mutex_init(&pf->switch_mutex);
6490
6491sw_init_done:
6492 return err;
6493}
6494
6495/**
6496 * i40e_set_ntuple - set the ntuple feature flag and take action
6497 * @pf: board private structure to initialize
6498 * @features: the feature set that the stack is suggesting
6499 *
6500 * returns a bool to indicate if reset needs to happen
6501 **/
6502bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
6503{
6504 bool need_reset = false;
6505
6506 /* Check if Flow Director n-tuple support was enabled or disabled. If
6507 * the state changed, we need to reset.
6508 */
6509 if (features & NETIF_F_NTUPLE) {
6510 /* Enable filters and mark for reset */
6511 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6512 need_reset = true;
6513 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
6514 } else {
6515 /* turn off filters, mark for reset and clear SW filter list */
6516 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
6517 need_reset = true;
6518 i40e_fdir_filter_exit(pf);
6519 }
6520 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6521 /* if ATR was disabled it can be re-enabled. */
6522 if (!(pf->flags & I40E_FLAG_FD_ATR_ENABLED))
6523 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
6524 }
6525 return need_reset;
6526}
6527
6528/**
6529 * i40e_set_features - set the netdev feature flags
6530 * @netdev: ptr to the netdev being adjusted
6531 * @features: the feature set that the stack is suggesting
6532 **/
6533static int i40e_set_features(struct net_device *netdev,
6534 netdev_features_t features)
6535{
6536 struct i40e_netdev_priv *np = netdev_priv(netdev);
6537 struct i40e_vsi *vsi = np->vsi;
6538 struct i40e_pf *pf = vsi->back;
6539 bool need_reset;
6540
6541 if (features & NETIF_F_HW_VLAN_CTAG_RX)
6542 i40e_vlan_stripping_enable(vsi);
6543 else
6544 i40e_vlan_stripping_disable(vsi);
6545
6546 need_reset = i40e_set_ntuple(pf, features);
6547
6548 if (need_reset)
6549 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
6550
6551 return 0;
6552}
6553
6554#ifdef CONFIG_I40E_VXLAN
6555/**
6556 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
6557 * @pf: board private structure
6558 * @port: The UDP port to look up
6559 *
6560 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
6561 **/
6562static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
6563{
6564 u8 i;
6565
6566 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6567 if (pf->vxlan_ports[i] == port)
6568 return i;
6569 }
6570
6571 return i;
6572}
6573
6574/**
6575 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
6576 * @netdev: This physical port's netdev
6577 * @sa_family: Socket Family that VXLAN is notifying us about
6578 * @port: New UDP port number that VXLAN started listening to
6579 **/
6580static void i40e_add_vxlan_port(struct net_device *netdev,
6581 sa_family_t sa_family, __be16 port)
6582{
6583 struct i40e_netdev_priv *np = netdev_priv(netdev);
6584 struct i40e_vsi *vsi = np->vsi;
6585 struct i40e_pf *pf = vsi->back;
6586 u8 next_idx;
6587 u8 idx;
6588
6589 if (sa_family == AF_INET6)
6590 return;
6591
6592 idx = i40e_get_vxlan_port_idx(pf, port);
6593
6594 /* Check if port already exists */
6595 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6596 netdev_info(netdev, "Port %d already offloaded\n", ntohs(port));
6597 return;
6598 }
6599
6600 /* Now check if there is space to add the new port */
6601 next_idx = i40e_get_vxlan_port_idx(pf, 0);
6602
6603 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6604 netdev_info(netdev, "Maximum number of UDP ports reached, not adding port %d\n",
6605 ntohs(port));
6606 return;
6607 }
6608
6609 /* New port: add it and mark its index in the bitmap */
6610 pf->vxlan_ports[next_idx] = port;
6611 pf->pending_vxlan_bitmap |= (1 << next_idx);
6612
6613 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6614}
6615
6616/**
6617 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
6618 * @netdev: This physical port's netdev
6619 * @sa_family: Socket Family that VXLAN is notifying us about
6620 * @port: UDP port number that VXLAN stopped listening to
6621 **/
6622static void i40e_del_vxlan_port(struct net_device *netdev,
6623 sa_family_t sa_family, __be16 port)
6624{
6625 struct i40e_netdev_priv *np = netdev_priv(netdev);
6626 struct i40e_vsi *vsi = np->vsi;
6627 struct i40e_pf *pf = vsi->back;
6628 u8 idx;
6629
6630 if (sa_family == AF_INET6)
6631 return;
6632
6633 idx = i40e_get_vxlan_port_idx(pf, port);
6634
6635 /* Check if port already exists */
6636 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
6637 /* if port exists, set it to 0 (mark for deletion)
6638 * and make it pending
6639 */
6640 pf->vxlan_ports[idx] = 0;
6641
6642 pf->pending_vxlan_bitmap |= (1 << idx);
6643
6644 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
6645 } else {
6646 netdev_warn(netdev, "Port %d was not found, not deleting\n",
6647 ntohs(port));
6648 }
6649}
6650
6651#endif
6652static const struct net_device_ops i40e_netdev_ops = {
6653 .ndo_open = i40e_open,
6654 .ndo_stop = i40e_close,
6655 .ndo_start_xmit = i40e_lan_xmit_frame,
6656 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
6657 .ndo_set_rx_mode = i40e_set_rx_mode,
6658 .ndo_validate_addr = eth_validate_addr,
6659 .ndo_set_mac_address = i40e_set_mac,
6660 .ndo_change_mtu = i40e_change_mtu,
6661 .ndo_do_ioctl = i40e_ioctl,
6662 .ndo_tx_timeout = i40e_tx_timeout,
6663 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
6664 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
6665#ifdef CONFIG_NET_POLL_CONTROLLER
6666 .ndo_poll_controller = i40e_netpoll,
6667#endif
6668 .ndo_setup_tc = i40e_setup_tc,
6669 .ndo_set_features = i40e_set_features,
6670 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
6671 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
6672 .ndo_set_vf_tx_rate = i40e_ndo_set_vf_bw,
6673 .ndo_get_vf_config = i40e_ndo_get_vf_config,
6674 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
6675#ifdef CONFIG_I40E_VXLAN
6676 .ndo_add_vxlan_port = i40e_add_vxlan_port,
6677 .ndo_del_vxlan_port = i40e_del_vxlan_port,
6678#endif
6679};
6680
6681/**
6682 * i40e_config_netdev - Setup the netdev flags
6683 * @vsi: the VSI being configured
6684 *
6685 * Returns 0 on success, negative value on failure
6686 **/
6687static int i40e_config_netdev(struct i40e_vsi *vsi)
6688{
6689 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
6690 struct i40e_pf *pf = vsi->back;
6691 struct i40e_hw *hw = &pf->hw;
6692 struct i40e_netdev_priv *np;
6693 struct net_device *netdev;
6694 u8 mac_addr[ETH_ALEN];
6695 int etherdev_size;
6696
6697 etherdev_size = sizeof(struct i40e_netdev_priv);
6698 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
6699 if (!netdev)
6700 return -ENOMEM;
6701
6702 vsi->netdev = netdev;
6703 np = netdev_priv(netdev);
6704 np->vsi = vsi;
6705
6706 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
6707 NETIF_F_GSO_UDP_TUNNEL |
6708 NETIF_F_TSO;
6709
6710 netdev->features = NETIF_F_SG |
6711 NETIF_F_IP_CSUM |
6712 NETIF_F_SCTP_CSUM |
6713 NETIF_F_HIGHDMA |
6714 NETIF_F_GSO_UDP_TUNNEL |
6715 NETIF_F_HW_VLAN_CTAG_TX |
6716 NETIF_F_HW_VLAN_CTAG_RX |
6717 NETIF_F_HW_VLAN_CTAG_FILTER |
6718 NETIF_F_IPV6_CSUM |
6719 NETIF_F_TSO |
6720 NETIF_F_TSO_ECN |
6721 NETIF_F_TSO6 |
6722 NETIF_F_RXCSUM |
6723 NETIF_F_NTUPLE |
6724 NETIF_F_RXHASH |
6725 0;
6726
6727 /* copy netdev features into list of user selectable features */
6728 netdev->hw_features |= netdev->features;
6729
6730 if (vsi->type == I40E_VSI_MAIN) {
6731 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
6732 memcpy(mac_addr, hw->mac.perm_addr, ETH_ALEN);
6733 } else {
6734 /* relate the VSI_VMDQ name to the VSI_MAIN name */
6735 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
6736 pf->vsi[pf->lan_vsi]->netdev->name);
6737 random_ether_addr(mac_addr);
6738 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
6739 }
6740 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
6741
6742 memcpy(netdev->dev_addr, mac_addr, ETH_ALEN);
6743 memcpy(netdev->perm_addr, mac_addr, ETH_ALEN);
6744 /* vlan gets same features (except vlan offload)
6745 * after any tweaks for specific VSI types
6746 */
6747 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
6748 NETIF_F_HW_VLAN_CTAG_RX |
6749 NETIF_F_HW_VLAN_CTAG_FILTER);
6750 netdev->priv_flags |= IFF_UNICAST_FLT;
6751 netdev->priv_flags |= IFF_SUPP_NOFCS;
6752 /* Setup netdev TC information */
6753 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
6754
6755 netdev->netdev_ops = &i40e_netdev_ops;
6756 netdev->watchdog_timeo = 5 * HZ;
6757 i40e_set_ethtool_ops(netdev);
6758
6759 return 0;
6760}
6761
6762/**
6763 * i40e_vsi_delete - Delete a VSI from the switch
6764 * @vsi: the VSI being removed
6765 *
6766 * Returns 0 on success, negative value on failure
6767 **/
6768static void i40e_vsi_delete(struct i40e_vsi *vsi)
6769{
6770 /* remove default VSI is not allowed */
6771 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
6772 return;
6773
6774 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
6775 return;
6776}
6777
6778/**
6779 * i40e_add_vsi - Add a VSI to the switch
6780 * @vsi: the VSI being configured
6781 *
6782 * This initializes a VSI context depending on the VSI type to be added and
6783 * passes it down to the add_vsi aq command.
6784 **/
6785static int i40e_add_vsi(struct i40e_vsi *vsi)
6786{
6787 int ret = -ENODEV;
6788 struct i40e_mac_filter *f, *ftmp;
6789 struct i40e_pf *pf = vsi->back;
6790 struct i40e_hw *hw = &pf->hw;
6791 struct i40e_vsi_context ctxt;
6792 u8 enabled_tc = 0x1; /* TC0 enabled */
6793 int f_count = 0;
6794
6795 memset(&ctxt, 0, sizeof(ctxt));
6796 switch (vsi->type) {
6797 case I40E_VSI_MAIN:
6798 /* The PF's main VSI is already setup as part of the
6799 * device initialization, so we'll not bother with
6800 * the add_vsi call, but we will retrieve the current
6801 * VSI context.
6802 */
6803 ctxt.seid = pf->main_vsi_seid;
6804 ctxt.pf_num = pf->hw.pf_id;
6805 ctxt.vf_num = 0;
6806 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6807 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6808 if (ret) {
6809 dev_info(&pf->pdev->dev,
6810 "couldn't get pf vsi config, err %d, aq_err %d\n",
6811 ret, pf->hw.aq.asq_last_status);
6812 return -ENOENT;
6813 }
6814 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6815 vsi->info.valid_sections = 0;
6816
6817 vsi->seid = ctxt.seid;
6818 vsi->id = ctxt.vsi_number;
6819
6820 enabled_tc = i40e_pf_get_tc_map(pf);
6821
6822 /* MFP mode setup queue map and update VSI */
6823 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
6824 memset(&ctxt, 0, sizeof(ctxt));
6825 ctxt.seid = pf->main_vsi_seid;
6826 ctxt.pf_num = pf->hw.pf_id;
6827 ctxt.vf_num = 0;
6828 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
6829 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
6830 if (ret) {
6831 dev_info(&pf->pdev->dev,
6832 "update vsi failed, aq_err=%d\n",
6833 pf->hw.aq.asq_last_status);
6834 ret = -ENOENT;
6835 goto err;
6836 }
6837 /* update the local VSI info queue map */
6838 i40e_vsi_update_queue_map(vsi, &ctxt);
6839 vsi->info.valid_sections = 0;
6840 } else {
6841 /* Default/Main VSI is only enabled for TC0
6842 * reconfigure it to enable all TCs that are
6843 * available on the port in SFP mode.
6844 */
6845 ret = i40e_vsi_config_tc(vsi, enabled_tc);
6846 if (ret) {
6847 dev_info(&pf->pdev->dev,
6848 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
6849 enabled_tc, ret,
6850 pf->hw.aq.asq_last_status);
6851 ret = -ENOENT;
6852 }
6853 }
6854 break;
6855
6856 case I40E_VSI_FDIR:
6857 ctxt.pf_num = hw->pf_id;
6858 ctxt.vf_num = 0;
6859 ctxt.uplink_seid = vsi->uplink_seid;
6860 ctxt.connection_type = 0x1; /* regular data port */
6861 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6862 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6863 break;
6864
6865 case I40E_VSI_VMDQ2:
6866 ctxt.pf_num = hw->pf_id;
6867 ctxt.vf_num = 0;
6868 ctxt.uplink_seid = vsi->uplink_seid;
6869 ctxt.connection_type = 0x1; /* regular data port */
6870 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6871
6872 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6873
6874 /* This VSI is connected to VEB so the switch_id
6875 * should be set to zero by default.
6876 */
6877 ctxt.info.switch_id = 0;
6878 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
6879 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6880
6881 /* Setup the VSI tx/rx queue map for TC0 only for now */
6882 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6883 break;
6884
6885 case I40E_VSI_SRIOV:
6886 ctxt.pf_num = hw->pf_id;
6887 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
6888 ctxt.uplink_seid = vsi->uplink_seid;
6889 ctxt.connection_type = 0x1; /* regular data port */
6890 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
6891
6892 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6893
6894 /* This VSI is connected to VEB so the switch_id
6895 * should be set to zero by default.
6896 */
6897 ctxt.info.switch_id = cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6898
6899 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
6900 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
6901 /* Setup the VSI tx/rx queue map for TC0 only for now */
6902 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
6903 break;
6904
6905 default:
6906 return -ENODEV;
6907 }
6908
6909 if (vsi->type != I40E_VSI_MAIN) {
6910 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6911 if (ret) {
6912 dev_info(&vsi->back->pdev->dev,
6913 "add vsi failed, aq_err=%d\n",
6914 vsi->back->hw.aq.asq_last_status);
6915 ret = -ENOENT;
6916 goto err;
6917 }
6918 memcpy(&vsi->info, &ctxt.info, sizeof(ctxt.info));
6919 vsi->info.valid_sections = 0;
6920 vsi->seid = ctxt.seid;
6921 vsi->id = ctxt.vsi_number;
6922 }
6923
6924 /* If macvlan filters already exist, force them to get loaded */
6925 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
6926 f->changed = true;
6927 f_count++;
6928 }
6929 if (f_count) {
6930 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
6931 pf->flags |= I40E_FLAG_FILTER_SYNC;
6932 }
6933
6934 /* Update VSI BW information */
6935 ret = i40e_vsi_get_bw_info(vsi);
6936 if (ret) {
6937 dev_info(&pf->pdev->dev,
6938 "couldn't get vsi bw info, err %d, aq_err %d\n",
6939 ret, pf->hw.aq.asq_last_status);
6940 /* VSI is already added so not tearing that up */
6941 ret = 0;
6942 }
6943
6944err:
6945 return ret;
6946}
6947
6948/**
6949 * i40e_vsi_release - Delete a VSI and free its resources
6950 * @vsi: the VSI being removed
6951 *
6952 * Returns 0 on success or < 0 on error
6953 **/
6954int i40e_vsi_release(struct i40e_vsi *vsi)
6955{
6956 struct i40e_mac_filter *f, *ftmp;
6957 struct i40e_veb *veb = NULL;
6958 struct i40e_pf *pf;
6959 u16 uplink_seid;
6960 int i, n;
6961
6962 pf = vsi->back;
6963
6964 /* release of a VEB-owner or last VSI is not allowed */
6965 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
6966 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
6967 vsi->seid, vsi->uplink_seid);
6968 return -ENODEV;
6969 }
6970 if (vsi == pf->vsi[pf->lan_vsi] &&
6971 !test_bit(__I40E_DOWN, &pf->state)) {
6972 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
6973 return -ENODEV;
6974 }
6975
6976 uplink_seid = vsi->uplink_seid;
6977 if (vsi->type != I40E_VSI_SRIOV) {
6978 if (vsi->netdev_registered) {
6979 vsi->netdev_registered = false;
6980 if (vsi->netdev) {
6981 /* results in a call to i40e_close() */
6982 unregister_netdev(vsi->netdev);
6983 }
6984 } else {
6985 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
6986 i40e_down(vsi);
6987 i40e_vsi_free_irq(vsi);
6988 i40e_vsi_free_tx_resources(vsi);
6989 i40e_vsi_free_rx_resources(vsi);
6990 }
6991 i40e_vsi_disable_irq(vsi);
6992 }
6993
6994 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
6995 i40e_del_filter(vsi, f->macaddr, f->vlan,
6996 f->is_vf, f->is_netdev);
6997 i40e_sync_vsi_filters(vsi);
6998
6999 i40e_vsi_delete(vsi);
7000 i40e_vsi_free_q_vectors(vsi);
7001 if (vsi->netdev) {
7002 free_netdev(vsi->netdev);
7003 vsi->netdev = NULL;
7004 }
7005 i40e_vsi_clear_rings(vsi);
7006 i40e_vsi_clear(vsi);
7007
7008 /* If this was the last thing on the VEB, except for the
7009 * controlling VSI, remove the VEB, which puts the controlling
7010 * VSI onto the next level down in the switch.
7011 *
7012 * Well, okay, there's one more exception here: don't remove
7013 * the orphan VEBs yet. We'll wait for an explicit remove request
7014 * from up the network stack.
7015 */
7016 for (n = 0, i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7017 if (pf->vsi[i] &&
7018 pf->vsi[i]->uplink_seid == uplink_seid &&
7019 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7020 n++; /* count the VSIs */
7021 }
7022 }
7023 for (i = 0; i < I40E_MAX_VEB; i++) {
7024 if (!pf->veb[i])
7025 continue;
7026 if (pf->veb[i]->uplink_seid == uplink_seid)
7027 n++; /* count the VEBs */
7028 if (pf->veb[i]->seid == uplink_seid)
7029 veb = pf->veb[i];
7030 }
7031 if (n == 0 && veb && veb->uplink_seid != 0)
7032 i40e_veb_release(veb);
7033
7034 return 0;
7035}
7036
7037/**
7038 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
7039 * @vsi: ptr to the VSI
7040 *
7041 * This should only be called after i40e_vsi_mem_alloc() which allocates the
7042 * corresponding SW VSI structure and initializes num_queue_pairs for the
7043 * newly allocated VSI.
7044 *
7045 * Returns 0 on success or negative on failure
7046 **/
7047static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
7048{
7049 int ret = -ENOENT;
7050 struct i40e_pf *pf = vsi->back;
7051
7052 if (vsi->q_vectors[0]) {
7053 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
7054 vsi->seid);
7055 return -EEXIST;
7056 }
7057
7058 if (vsi->base_vector) {
7059 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
7060 vsi->seid, vsi->base_vector);
7061 return -EEXIST;
7062 }
7063
7064 ret = i40e_vsi_alloc_q_vectors(vsi);
7065 if (ret) {
7066 dev_info(&pf->pdev->dev,
7067 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
7068 vsi->num_q_vectors, vsi->seid, ret);
7069 vsi->num_q_vectors = 0;
7070 goto vector_setup_out;
7071 }
7072
7073 if (vsi->num_q_vectors)
7074 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
7075 vsi->num_q_vectors, vsi->idx);
7076 if (vsi->base_vector < 0) {
7077 dev_info(&pf->pdev->dev,
7078 "failed to get queue tracking for VSI %d, err=%d\n",
7079 vsi->seid, vsi->base_vector);
7080 i40e_vsi_free_q_vectors(vsi);
7081 ret = -ENOENT;
7082 goto vector_setup_out;
7083 }
7084
7085vector_setup_out:
7086 return ret;
7087}
7088
7089/**
7090 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
7091 * @vsi: pointer to the vsi.
7092 *
7093 * This re-allocates a vsi's queue resources.
7094 *
7095 * Returns pointer to the successfully allocated and configured VSI sw struct
7096 * on success, otherwise returns NULL on failure.
7097 **/
7098static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
7099{
7100 struct i40e_pf *pf = vsi->back;
7101 u8 enabled_tc;
7102 int ret;
7103
7104 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7105 i40e_vsi_clear_rings(vsi);
7106
7107 i40e_vsi_free_arrays(vsi, false);
7108 i40e_set_num_rings_in_vsi(vsi);
7109 ret = i40e_vsi_alloc_arrays(vsi, false);
7110 if (ret)
7111 goto err_vsi;
7112
7113 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
7114 if (ret < 0) {
7115 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7116 vsi->seid, ret);
7117 goto err_vsi;
7118 }
7119 vsi->base_queue = ret;
7120
7121 /* Update the FW view of the VSI. Force a reset of TC and queue
7122 * layout configurations.
7123 */
7124 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7125 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7126 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7127 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7128
7129 /* assign it some queues */
7130 ret = i40e_alloc_rings(vsi);
7131 if (ret)
7132 goto err_rings;
7133
7134 /* map all of the rings to the q_vectors */
7135 i40e_vsi_map_rings_to_vectors(vsi);
7136 return vsi;
7137
7138err_rings:
7139 i40e_vsi_free_q_vectors(vsi);
7140 if (vsi->netdev_registered) {
7141 vsi->netdev_registered = false;
7142 unregister_netdev(vsi->netdev);
7143 free_netdev(vsi->netdev);
7144 vsi->netdev = NULL;
7145 }
7146 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7147err_vsi:
7148 i40e_vsi_clear(vsi);
7149 return NULL;
7150}
7151
7152/**
7153 * i40e_vsi_setup - Set up a VSI by a given type
7154 * @pf: board private structure
7155 * @type: VSI type
7156 * @uplink_seid: the switch element to link to
7157 * @param1: usage depends upon VSI type. For VF types, indicates VF id
7158 *
7159 * This allocates the sw VSI structure and its queue resources, then add a VSI
7160 * to the identified VEB.
7161 *
7162 * Returns pointer to the successfully allocated and configure VSI sw struct on
7163 * success, otherwise returns NULL on failure.
7164 **/
7165struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
7166 u16 uplink_seid, u32 param1)
7167{
7168 struct i40e_vsi *vsi = NULL;
7169 struct i40e_veb *veb = NULL;
7170 int ret, i;
7171 int v_idx;
7172
7173 /* The requested uplink_seid must be either
7174 * - the PF's port seid
7175 * no VEB is needed because this is the PF
7176 * or this is a Flow Director special case VSI
7177 * - seid of an existing VEB
7178 * - seid of a VSI that owns an existing VEB
7179 * - seid of a VSI that doesn't own a VEB
7180 * a new VEB is created and the VSI becomes the owner
7181 * - seid of the PF VSI, which is what creates the first VEB
7182 * this is a special case of the previous
7183 *
7184 * Find which uplink_seid we were given and create a new VEB if needed
7185 */
7186 for (i = 0; i < I40E_MAX_VEB; i++) {
7187 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
7188 veb = pf->veb[i];
7189 break;
7190 }
7191 }
7192
7193 if (!veb && uplink_seid != pf->mac_seid) {
7194
7195 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7196 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
7197 vsi = pf->vsi[i];
7198 break;
7199 }
7200 }
7201 if (!vsi) {
7202 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
7203 uplink_seid);
7204 return NULL;
7205 }
7206
7207 if (vsi->uplink_seid == pf->mac_seid)
7208 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
7209 vsi->tc_config.enabled_tc);
7210 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
7211 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
7212 vsi->tc_config.enabled_tc);
7213
7214 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
7215 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
7216 veb = pf->veb[i];
7217 }
7218 if (!veb) {
7219 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
7220 return NULL;
7221 }
7222
7223 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7224 uplink_seid = veb->seid;
7225 }
7226
7227 /* get vsi sw struct */
7228 v_idx = i40e_vsi_mem_alloc(pf, type);
7229 if (v_idx < 0)
7230 goto err_alloc;
7231 vsi = pf->vsi[v_idx];
7232 if (!vsi)
7233 goto err_alloc;
7234 vsi->type = type;
7235 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
7236
7237 if (type == I40E_VSI_MAIN)
7238 pf->lan_vsi = v_idx;
7239 else if (type == I40E_VSI_SRIOV)
7240 vsi->vf_id = param1;
7241 /* assign it some queues */
7242 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
7243 vsi->idx);
7244 if (ret < 0) {
7245 dev_info(&pf->pdev->dev, "VSI %d get_lump failed %d\n",
7246 vsi->seid, ret);
7247 goto err_vsi;
7248 }
7249 vsi->base_queue = ret;
7250
7251 /* get a VSI from the hardware */
7252 vsi->uplink_seid = uplink_seid;
7253 ret = i40e_add_vsi(vsi);
7254 if (ret)
7255 goto err_vsi;
7256
7257 switch (vsi->type) {
7258 /* setup the netdev if needed */
7259 case I40E_VSI_MAIN:
7260 case I40E_VSI_VMDQ2:
7261 ret = i40e_config_netdev(vsi);
7262 if (ret)
7263 goto err_netdev;
7264 ret = register_netdev(vsi->netdev);
7265 if (ret)
7266 goto err_netdev;
7267 vsi->netdev_registered = true;
7268 netif_carrier_off(vsi->netdev);
7269#ifdef CONFIG_I40E_DCB
7270 /* Setup DCB netlink interface */
7271 i40e_dcbnl_setup(vsi);
7272#endif /* CONFIG_I40E_DCB */
7273 /* fall through */
7274
7275 case I40E_VSI_FDIR:
7276 /* set up vectors and rings if needed */
7277 ret = i40e_vsi_setup_vectors(vsi);
7278 if (ret)
7279 goto err_msix;
7280
7281 ret = i40e_alloc_rings(vsi);
7282 if (ret)
7283 goto err_rings;
7284
7285 /* map all of the rings to the q_vectors */
7286 i40e_vsi_map_rings_to_vectors(vsi);
7287
7288 i40e_vsi_reset_stats(vsi);
7289 break;
7290
7291 default:
7292 /* no netdev or rings for the other VSI types */
7293 break;
7294 }
7295
7296 return vsi;
7297
7298err_rings:
7299 i40e_vsi_free_q_vectors(vsi);
7300err_msix:
7301 if (vsi->netdev_registered) {
7302 vsi->netdev_registered = false;
7303 unregister_netdev(vsi->netdev);
7304 free_netdev(vsi->netdev);
7305 vsi->netdev = NULL;
7306 }
7307err_netdev:
7308 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
7309err_vsi:
7310 i40e_vsi_clear(vsi);
7311err_alloc:
7312 return NULL;
7313}
7314
7315/**
7316 * i40e_veb_get_bw_info - Query VEB BW information
7317 * @veb: the veb to query
7318 *
7319 * Query the Tx scheduler BW configuration data for given VEB
7320 **/
7321static int i40e_veb_get_bw_info(struct i40e_veb *veb)
7322{
7323 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
7324 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
7325 struct i40e_pf *pf = veb->pf;
7326 struct i40e_hw *hw = &pf->hw;
7327 u32 tc_bw_max;
7328 int ret = 0;
7329 int i;
7330
7331 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
7332 &bw_data, NULL);
7333 if (ret) {
7334 dev_info(&pf->pdev->dev,
7335 "query veb bw config failed, aq_err=%d\n",
7336 hw->aq.asq_last_status);
7337 goto out;
7338 }
7339
7340 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
7341 &ets_data, NULL);
7342 if (ret) {
7343 dev_info(&pf->pdev->dev,
7344 "query veb bw ets config failed, aq_err=%d\n",
7345 hw->aq.asq_last_status);
7346 goto out;
7347 }
7348
7349 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
7350 veb->bw_max_quanta = ets_data.tc_bw_max;
7351 veb->is_abs_credits = bw_data.absolute_credits_enable;
7352 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
7353 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
7354 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7355 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
7356 veb->bw_tc_limit_credits[i] =
7357 le16_to_cpu(bw_data.tc_bw_limits[i]);
7358 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
7359 }
7360
7361out:
7362 return ret;
7363}
7364
7365/**
7366 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
7367 * @pf: board private structure
7368 *
7369 * On error: returns error code (negative)
7370 * On success: returns vsi index in PF (positive)
7371 **/
7372static int i40e_veb_mem_alloc(struct i40e_pf *pf)
7373{
7374 int ret = -ENOENT;
7375 struct i40e_veb *veb;
7376 int i;
7377
7378 /* Need to protect the allocation of switch elements at the PF level */
7379 mutex_lock(&pf->switch_mutex);
7380
7381 /* VEB list may be fragmented if VEB creation/destruction has
7382 * been happening. We can afford to do a quick scan to look
7383 * for any free slots in the list.
7384 *
7385 * find next empty veb slot, looping back around if necessary
7386 */
7387 i = 0;
7388 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
7389 i++;
7390 if (i >= I40E_MAX_VEB) {
7391 ret = -ENOMEM;
7392 goto err_alloc_veb; /* out of VEB slots! */
7393 }
7394
7395 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
7396 if (!veb) {
7397 ret = -ENOMEM;
7398 goto err_alloc_veb;
7399 }
7400 veb->pf = pf;
7401 veb->idx = i;
7402 veb->enabled_tc = 1;
7403
7404 pf->veb[i] = veb;
7405 ret = i;
7406err_alloc_veb:
7407 mutex_unlock(&pf->switch_mutex);
7408 return ret;
7409}
7410
7411/**
7412 * i40e_switch_branch_release - Delete a branch of the switch tree
7413 * @branch: where to start deleting
7414 *
7415 * This uses recursion to find the tips of the branch to be
7416 * removed, deleting until we get back to and can delete this VEB.
7417 **/
7418static void i40e_switch_branch_release(struct i40e_veb *branch)
7419{
7420 struct i40e_pf *pf = branch->pf;
7421 u16 branch_seid = branch->seid;
7422 u16 veb_idx = branch->idx;
7423 int i;
7424
7425 /* release any VEBs on this VEB - RECURSION */
7426 for (i = 0; i < I40E_MAX_VEB; i++) {
7427 if (!pf->veb[i])
7428 continue;
7429 if (pf->veb[i]->uplink_seid == branch->seid)
7430 i40e_switch_branch_release(pf->veb[i]);
7431 }
7432
7433 /* Release the VSIs on this VEB, but not the owner VSI.
7434 *
7435 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
7436 * the VEB itself, so don't use (*branch) after this loop.
7437 */
7438 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7439 if (!pf->vsi[i])
7440 continue;
7441 if (pf->vsi[i]->uplink_seid == branch_seid &&
7442 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
7443 i40e_vsi_release(pf->vsi[i]);
7444 }
7445 }
7446
7447 /* There's one corner case where the VEB might not have been
7448 * removed, so double check it here and remove it if needed.
7449 * This case happens if the veb was created from the debugfs
7450 * commands and no VSIs were added to it.
7451 */
7452 if (pf->veb[veb_idx])
7453 i40e_veb_release(pf->veb[veb_idx]);
7454}
7455
7456/**
7457 * i40e_veb_clear - remove veb struct
7458 * @veb: the veb to remove
7459 **/
7460static void i40e_veb_clear(struct i40e_veb *veb)
7461{
7462 if (!veb)
7463 return;
7464
7465 if (veb->pf) {
7466 struct i40e_pf *pf = veb->pf;
7467
7468 mutex_lock(&pf->switch_mutex);
7469 if (pf->veb[veb->idx] == veb)
7470 pf->veb[veb->idx] = NULL;
7471 mutex_unlock(&pf->switch_mutex);
7472 }
7473
7474 kfree(veb);
7475}
7476
7477/**
7478 * i40e_veb_release - Delete a VEB and free its resources
7479 * @veb: the VEB being removed
7480 **/
7481void i40e_veb_release(struct i40e_veb *veb)
7482{
7483 struct i40e_vsi *vsi = NULL;
7484 struct i40e_pf *pf;
7485 int i, n = 0;
7486
7487 pf = veb->pf;
7488
7489 /* find the remaining VSI and check for extras */
7490 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
7491 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
7492 n++;
7493 vsi = pf->vsi[i];
7494 }
7495 }
7496 if (n != 1) {
7497 dev_info(&pf->pdev->dev,
7498 "can't remove VEB %d with %d VSIs left\n",
7499 veb->seid, n);
7500 return;
7501 }
7502
7503 /* move the remaining VSI to uplink veb */
7504 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
7505 if (veb->uplink_seid) {
7506 vsi->uplink_seid = veb->uplink_seid;
7507 if (veb->uplink_seid == pf->mac_seid)
7508 vsi->veb_idx = I40E_NO_VEB;
7509 else
7510 vsi->veb_idx = veb->veb_idx;
7511 } else {
7512 /* floating VEB */
7513 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
7514 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
7515 }
7516
7517 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
7518 i40e_veb_clear(veb);
7519
7520 return;
7521}
7522
7523/**
7524 * i40e_add_veb - create the VEB in the switch
7525 * @veb: the VEB to be instantiated
7526 * @vsi: the controlling VSI
7527 **/
7528static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
7529{
7530 bool is_default = false;
7531 bool is_cloud = false;
7532 int ret;
7533
7534 /* get a VEB from the hardware */
7535 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
7536 veb->enabled_tc, is_default,
7537 is_cloud, &veb->seid, NULL);
7538 if (ret) {
7539 dev_info(&veb->pf->pdev->dev,
7540 "couldn't add VEB, err %d, aq_err %d\n",
7541 ret, veb->pf->hw.aq.asq_last_status);
7542 return -EPERM;
7543 }
7544
7545 /* get statistics counter */
7546 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
7547 &veb->stats_idx, NULL, NULL, NULL);
7548 if (ret) {
7549 dev_info(&veb->pf->pdev->dev,
7550 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
7551 ret, veb->pf->hw.aq.asq_last_status);
7552 return -EPERM;
7553 }
7554 ret = i40e_veb_get_bw_info(veb);
7555 if (ret) {
7556 dev_info(&veb->pf->pdev->dev,
7557 "couldn't get VEB bw info, err %d, aq_err %d\n",
7558 ret, veb->pf->hw.aq.asq_last_status);
7559 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
7560 return -ENOENT;
7561 }
7562
7563 vsi->uplink_seid = veb->seid;
7564 vsi->veb_idx = veb->idx;
7565 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
7566
7567 return 0;
7568}
7569
7570/**
7571 * i40e_veb_setup - Set up a VEB
7572 * @pf: board private structure
7573 * @flags: VEB setup flags
7574 * @uplink_seid: the switch element to link to
7575 * @vsi_seid: the initial VSI seid
7576 * @enabled_tc: Enabled TC bit-map
7577 *
7578 * This allocates the sw VEB structure and links it into the switch
7579 * It is possible and legal for this to be a duplicate of an already
7580 * existing VEB. It is also possible for both uplink and vsi seids
7581 * to be zero, in order to create a floating VEB.
7582 *
7583 * Returns pointer to the successfully allocated VEB sw struct on
7584 * success, otherwise returns NULL on failure.
7585 **/
7586struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
7587 u16 uplink_seid, u16 vsi_seid,
7588 u8 enabled_tc)
7589{
7590 struct i40e_veb *veb, *uplink_veb = NULL;
7591 int vsi_idx, veb_idx;
7592 int ret;
7593
7594 /* if one seid is 0, the other must be 0 to create a floating relay */
7595 if ((uplink_seid == 0 || vsi_seid == 0) &&
7596 (uplink_seid + vsi_seid != 0)) {
7597 dev_info(&pf->pdev->dev,
7598 "one, not both seid's are 0: uplink=%d vsi=%d\n",
7599 uplink_seid, vsi_seid);
7600 return NULL;
7601 }
7602
7603 /* make sure there is such a vsi and uplink */
7604 for (vsi_idx = 0; vsi_idx < pf->hw.func_caps.num_vsis; vsi_idx++)
7605 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
7606 break;
7607 if (vsi_idx >= pf->hw.func_caps.num_vsis && vsi_seid != 0) {
7608 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
7609 vsi_seid);
7610 return NULL;
7611 }
7612
7613 if (uplink_seid && uplink_seid != pf->mac_seid) {
7614 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
7615 if (pf->veb[veb_idx] &&
7616 pf->veb[veb_idx]->seid == uplink_seid) {
7617 uplink_veb = pf->veb[veb_idx];
7618 break;
7619 }
7620 }
7621 if (!uplink_veb) {
7622 dev_info(&pf->pdev->dev,
7623 "uplink seid %d not found\n", uplink_seid);
7624 return NULL;
7625 }
7626 }
7627
7628 /* get veb sw struct */
7629 veb_idx = i40e_veb_mem_alloc(pf);
7630 if (veb_idx < 0)
7631 goto err_alloc;
7632 veb = pf->veb[veb_idx];
7633 veb->flags = flags;
7634 veb->uplink_seid = uplink_seid;
7635 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
7636 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
7637
7638 /* create the VEB in the switch */
7639 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
7640 if (ret)
7641 goto err_veb;
7642
7643 return veb;
7644
7645err_veb:
7646 i40e_veb_clear(veb);
7647err_alloc:
7648 return NULL;
7649}
7650
7651/**
7652 * i40e_setup_pf_switch_element - set pf vars based on switch type
7653 * @pf: board private structure
7654 * @ele: element we are building info from
7655 * @num_reported: total number of elements
7656 * @printconfig: should we print the contents
7657 *
7658 * helper function to assist in extracting a few useful SEID values.
7659 **/
7660static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
7661 struct i40e_aqc_switch_config_element_resp *ele,
7662 u16 num_reported, bool printconfig)
7663{
7664 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
7665 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
7666 u8 element_type = ele->element_type;
7667 u16 seid = le16_to_cpu(ele->seid);
7668
7669 if (printconfig)
7670 dev_info(&pf->pdev->dev,
7671 "type=%d seid=%d uplink=%d downlink=%d\n",
7672 element_type, seid, uplink_seid, downlink_seid);
7673
7674 switch (element_type) {
7675 case I40E_SWITCH_ELEMENT_TYPE_MAC:
7676 pf->mac_seid = seid;
7677 break;
7678 case I40E_SWITCH_ELEMENT_TYPE_VEB:
7679 /* Main VEB? */
7680 if (uplink_seid != pf->mac_seid)
7681 break;
7682 if (pf->lan_veb == I40E_NO_VEB) {
7683 int v;
7684
7685 /* find existing or else empty VEB */
7686 for (v = 0; v < I40E_MAX_VEB; v++) {
7687 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
7688 pf->lan_veb = v;
7689 break;
7690 }
7691 }
7692 if (pf->lan_veb == I40E_NO_VEB) {
7693 v = i40e_veb_mem_alloc(pf);
7694 if (v < 0)
7695 break;
7696 pf->lan_veb = v;
7697 }
7698 }
7699
7700 pf->veb[pf->lan_veb]->seid = seid;
7701 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
7702 pf->veb[pf->lan_veb]->pf = pf;
7703 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
7704 break;
7705 case I40E_SWITCH_ELEMENT_TYPE_VSI:
7706 if (num_reported != 1)
7707 break;
7708 /* This is immediately after a reset so we can assume this is
7709 * the PF's VSI
7710 */
7711 pf->mac_seid = uplink_seid;
7712 pf->pf_seid = downlink_seid;
7713 pf->main_vsi_seid = seid;
7714 if (printconfig)
7715 dev_info(&pf->pdev->dev,
7716 "pf_seid=%d main_vsi_seid=%d\n",
7717 pf->pf_seid, pf->main_vsi_seid);
7718 break;
7719 case I40E_SWITCH_ELEMENT_TYPE_PF:
7720 case I40E_SWITCH_ELEMENT_TYPE_VF:
7721 case I40E_SWITCH_ELEMENT_TYPE_EMP:
7722 case I40E_SWITCH_ELEMENT_TYPE_BMC:
7723 case I40E_SWITCH_ELEMENT_TYPE_PE:
7724 case I40E_SWITCH_ELEMENT_TYPE_PA:
7725 /* ignore these for now */
7726 break;
7727 default:
7728 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
7729 element_type, seid);
7730 break;
7731 }
7732}
7733
7734/**
7735 * i40e_fetch_switch_configuration - Get switch config from firmware
7736 * @pf: board private structure
7737 * @printconfig: should we print the contents
7738 *
7739 * Get the current switch configuration from the device and
7740 * extract a few useful SEID values.
7741 **/
7742int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
7743{
7744 struct i40e_aqc_get_switch_config_resp *sw_config;
7745 u16 next_seid = 0;
7746 int ret = 0;
7747 u8 *aq_buf;
7748 int i;
7749
7750 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
7751 if (!aq_buf)
7752 return -ENOMEM;
7753
7754 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
7755 do {
7756 u16 num_reported, num_total;
7757
7758 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
7759 I40E_AQ_LARGE_BUF,
7760 &next_seid, NULL);
7761 if (ret) {
7762 dev_info(&pf->pdev->dev,
7763 "get switch config failed %d aq_err=%x\n",
7764 ret, pf->hw.aq.asq_last_status);
7765 kfree(aq_buf);
7766 return -ENOENT;
7767 }
7768
7769 num_reported = le16_to_cpu(sw_config->header.num_reported);
7770 num_total = le16_to_cpu(sw_config->header.num_total);
7771
7772 if (printconfig)
7773 dev_info(&pf->pdev->dev,
7774 "header: %d reported %d total\n",
7775 num_reported, num_total);
7776
7777 if (num_reported) {
7778 int sz = sizeof(*sw_config) * num_reported;
7779
7780 kfree(pf->sw_config);
7781 pf->sw_config = kzalloc(sz, GFP_KERNEL);
7782 if (pf->sw_config)
7783 memcpy(pf->sw_config, sw_config, sz);
7784 }
7785
7786 for (i = 0; i < num_reported; i++) {
7787 struct i40e_aqc_switch_config_element_resp *ele =
7788 &sw_config->element[i];
7789
7790 i40e_setup_pf_switch_element(pf, ele, num_reported,
7791 printconfig);
7792 }
7793 } while (next_seid != 0);
7794
7795 kfree(aq_buf);
7796 return ret;
7797}
7798
7799/**
7800 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
7801 * @pf: board private structure
7802 * @reinit: if the Main VSI needs to re-initialized.
7803 *
7804 * Returns 0 on success, negative value on failure
7805 **/
7806static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
7807{
7808 u32 rxfc = 0, txfc = 0, rxfc_reg;
7809 int ret;
7810
7811 /* find out what's out there already */
7812 ret = i40e_fetch_switch_configuration(pf, false);
7813 if (ret) {
7814 dev_info(&pf->pdev->dev,
7815 "couldn't fetch switch config, err %d, aq_err %d\n",
7816 ret, pf->hw.aq.asq_last_status);
7817 return ret;
7818 }
7819 i40e_pf_reset_stats(pf);
7820
7821 /* first time setup */
7822 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
7823 struct i40e_vsi *vsi = NULL;
7824 u16 uplink_seid;
7825
7826 /* Set up the PF VSI associated with the PF's main VSI
7827 * that is already in the HW switch
7828 */
7829 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
7830 uplink_seid = pf->veb[pf->lan_veb]->seid;
7831 else
7832 uplink_seid = pf->mac_seid;
7833 if (pf->lan_vsi == I40E_NO_VSI)
7834 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
7835 else if (reinit)
7836 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
7837 if (!vsi) {
7838 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
7839 i40e_fdir_teardown(pf);
7840 return -EAGAIN;
7841 }
7842 } else {
7843 /* force a reset of TC and queue layout configurations */
7844 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
7845 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
7846 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
7847 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
7848 }
7849 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
7850
7851 i40e_fdir_sb_setup(pf);
7852
7853 /* Setup static PF queue filter control settings */
7854 ret = i40e_setup_pf_filter_control(pf);
7855 if (ret) {
7856 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
7857 ret);
7858 /* Failure here should not stop continuing other steps */
7859 }
7860
7861 /* enable RSS in the HW, even for only one queue, as the stack can use
7862 * the hash
7863 */
7864 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
7865 i40e_config_rss(pf);
7866
7867 /* fill in link information and enable LSE reporting */
7868 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
7869 i40e_link_event(pf);
7870
7871 /* Initialize user-specific link properties */
7872 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
7873 I40E_AQ_AN_COMPLETED) ? true : false);
7874 /* requested_mode is set in probe or by ethtool */
7875 if (!pf->fc_autoneg_status)
7876 goto no_autoneg;
7877
7878 if ((pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX) &&
7879 (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX))
7880 pf->hw.fc.current_mode = I40E_FC_FULL;
7881 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_TX)
7882 pf->hw.fc.current_mode = I40E_FC_TX_PAUSE;
7883 else if (pf->hw.phy.link_info.an_info & I40E_AQ_LINK_PAUSE_RX)
7884 pf->hw.fc.current_mode = I40E_FC_RX_PAUSE;
7885 else
7886 pf->hw.fc.current_mode = I40E_FC_NONE;
7887
7888 /* sync the flow control settings with the auto-neg values */
7889 switch (pf->hw.fc.current_mode) {
7890 case I40E_FC_FULL:
7891 txfc = 1;
7892 rxfc = 1;
7893 break;
7894 case I40E_FC_TX_PAUSE:
7895 txfc = 1;
7896 rxfc = 0;
7897 break;
7898 case I40E_FC_RX_PAUSE:
7899 txfc = 0;
7900 rxfc = 1;
7901 break;
7902 case I40E_FC_NONE:
7903 case I40E_FC_DEFAULT:
7904 txfc = 0;
7905 rxfc = 0;
7906 break;
7907 case I40E_FC_PFC:
7908 /* TBD */
7909 break;
7910 /* no default case, we have to handle all possibilities here */
7911 }
7912
7913 wr32(&pf->hw, I40E_PRTDCB_FCCFG, txfc << I40E_PRTDCB_FCCFG_TFCE_SHIFT);
7914
7915 rxfc_reg = rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7916 ~I40E_PRTDCB_MFLCN_RFCE_MASK;
7917 rxfc_reg |= (rxfc << I40E_PRTDCB_MFLCN_RFCE_SHIFT);
7918
7919 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rxfc_reg);
7920
7921 goto fc_complete;
7922
7923no_autoneg:
7924 /* disable L2 flow control, user can turn it on if they wish */
7925 wr32(&pf->hw, I40E_PRTDCB_FCCFG, 0);
7926 wr32(&pf->hw, I40E_PRTDCB_MFLCN, rd32(&pf->hw, I40E_PRTDCB_MFLCN) &
7927 ~I40E_PRTDCB_MFLCN_RFCE_MASK);
7928
7929fc_complete:
7930 i40e_ptp_init(pf);
7931
7932 return ret;
7933}
7934
7935/**
7936 * i40e_determine_queue_usage - Work out queue distribution
7937 * @pf: board private structure
7938 **/
7939static void i40e_determine_queue_usage(struct i40e_pf *pf)
7940{
7941 int queues_left;
7942
7943 pf->num_lan_qps = 0;
7944
7945 /* Find the max queues to be put into basic use. We'll always be
7946 * using TC0, whether or not DCB is running, and TC0 will get the
7947 * big RSS set.
7948 */
7949 queues_left = pf->hw.func_caps.num_tx_qp;
7950
7951 if ((queues_left == 1) ||
7952 !(pf->flags & I40E_FLAG_MSIX_ENABLED) ||
7953 !(pf->flags & (I40E_FLAG_RSS_ENABLED | I40E_FLAG_FD_SB_ENABLED |
7954 I40E_FLAG_DCB_ENABLED))) {
7955 /* one qp for PF, no queues for anything else */
7956 queues_left = 0;
7957 pf->rss_size = pf->num_lan_qps = 1;
7958
7959 /* make sure all the fancies are disabled */
7960 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
7961 I40E_FLAG_FD_SB_ENABLED |
7962 I40E_FLAG_FD_ATR_ENABLED |
7963 I40E_FLAG_DCB_ENABLED |
7964 I40E_FLAG_SRIOV_ENABLED |
7965 I40E_FLAG_VMDQ_ENABLED);
7966 } else {
7967 /* Not enough queues for all TCs */
7968 if ((pf->flags & I40E_FLAG_DCB_ENABLED) &&
7969 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
7970 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7971 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
7972 }
7973 pf->num_lan_qps = pf->rss_size_max;
7974 queues_left -= pf->num_lan_qps;
7975 }
7976
7977 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7978 if (queues_left > 1) {
7979 queues_left -= 1; /* save 1 queue for FD */
7980 } else {
7981 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7982 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
7983 }
7984 }
7985
7986 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
7987 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
7988 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
7989 (queues_left / pf->num_vf_qps));
7990 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
7991 }
7992
7993 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7994 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
7995 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
7996 (queues_left / pf->num_vmdq_qps));
7997 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
7998 }
7999
8000 pf->queues_left = queues_left;
8001 return;
8002}
8003
8004/**
8005 * i40e_setup_pf_filter_control - Setup PF static filter control
8006 * @pf: PF to be setup
8007 *
8008 * i40e_setup_pf_filter_control sets up a pf's initial filter control
8009 * settings. If PE/FCoE are enabled then it will also set the per PF
8010 * based filter sizes required for them. It also enables Flow director,
8011 * ethertype and macvlan type filter settings for the pf.
8012 *
8013 * Returns 0 on success, negative on failure
8014 **/
8015static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
8016{
8017 struct i40e_filter_control_settings *settings = &pf->filter_settings;
8018
8019 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
8020
8021 /* Flow Director is enabled */
8022 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
8023 settings->enable_fdir = true;
8024
8025 /* Ethtype and MACVLAN filters enabled for PF */
8026 settings->enable_ethtype = true;
8027 settings->enable_macvlan = true;
8028
8029 if (i40e_set_filter_control(&pf->hw, settings))
8030 return -ENOENT;
8031
8032 return 0;
8033}
8034
8035#define INFO_STRING_LEN 255
8036static void i40e_print_features(struct i40e_pf *pf)
8037{
8038 struct i40e_hw *hw = &pf->hw;
8039 char *buf, *string;
8040
8041 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
8042 if (!string) {
8043 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
8044 return;
8045 }
8046
8047 buf = string;
8048
8049 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
8050#ifdef CONFIG_PCI_IOV
8051 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
8052#endif
8053 buf += sprintf(buf, "VSIs: %d QP: %d ", pf->hw.func_caps.num_vsis,
8054 pf->vsi[pf->lan_vsi]->num_queue_pairs);
8055
8056 if (pf->flags & I40E_FLAG_RSS_ENABLED)
8057 buf += sprintf(buf, "RSS ");
8058 buf += sprintf(buf, "FDir ");
8059 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
8060 buf += sprintf(buf, "ATR ");
8061 if (pf->flags & I40E_FLAG_FD_SB_ENABLED)
8062 buf += sprintf(buf, "NTUPLE ");
8063 if (pf->flags & I40E_FLAG_DCB_ENABLED)
8064 buf += sprintf(buf, "DCB ");
8065 if (pf->flags & I40E_FLAG_PTP)
8066 buf += sprintf(buf, "PTP ");
8067
8068 BUG_ON(buf > (string + INFO_STRING_LEN));
8069 dev_info(&pf->pdev->dev, "%s\n", string);
8070 kfree(string);
8071}
8072
8073/**
8074 * i40e_probe - Device initialization routine
8075 * @pdev: PCI device information struct
8076 * @ent: entry in i40e_pci_tbl
8077 *
8078 * i40e_probe initializes a pf identified by a pci_dev structure.
8079 * The OS initialization, configuring of the pf private structure,
8080 * and a hardware reset occur.
8081 *
8082 * Returns 0 on success, negative on failure
8083 **/
8084static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
8085{
8086 struct i40e_driver_version dv;
8087 struct i40e_pf *pf;
8088 struct i40e_hw *hw;
8089 static u16 pfs_found;
8090 u16 link_status;
8091 int err = 0;
8092 u32 len;
8093
8094 err = pci_enable_device_mem(pdev);
8095 if (err)
8096 return err;
8097
8098 /* set up for high or low dma */
8099 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
8100 if (err) {
8101 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
8102 if (err) {
8103 dev_err(&pdev->dev,
8104 "DMA configuration failed: 0x%x\n", err);
8105 goto err_dma;
8106 }
8107 }
8108
8109 /* set up pci connections */
8110 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
8111 IORESOURCE_MEM), i40e_driver_name);
8112 if (err) {
8113 dev_info(&pdev->dev,
8114 "pci_request_selected_regions failed %d\n", err);
8115 goto err_pci_reg;
8116 }
8117
8118 pci_enable_pcie_error_reporting(pdev);
8119 pci_set_master(pdev);
8120
8121 /* Now that we have a PCI connection, we need to do the
8122 * low level device setup. This is primarily setting up
8123 * the Admin Queue structures and then querying for the
8124 * device's current profile information.
8125 */
8126 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
8127 if (!pf) {
8128 err = -ENOMEM;
8129 goto err_pf_alloc;
8130 }
8131 pf->next_vsi = 0;
8132 pf->pdev = pdev;
8133 set_bit(__I40E_DOWN, &pf->state);
8134
8135 hw = &pf->hw;
8136 hw->back = pf;
8137 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
8138 pci_resource_len(pdev, 0));
8139 if (!hw->hw_addr) {
8140 err = -EIO;
8141 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
8142 (unsigned int)pci_resource_start(pdev, 0),
8143 (unsigned int)pci_resource_len(pdev, 0), err);
8144 goto err_ioremap;
8145 }
8146 hw->vendor_id = pdev->vendor;
8147 hw->device_id = pdev->device;
8148 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
8149 hw->subsystem_vendor_id = pdev->subsystem_vendor;
8150 hw->subsystem_device_id = pdev->subsystem_device;
8151 hw->bus.device = PCI_SLOT(pdev->devfn);
8152 hw->bus.func = PCI_FUNC(pdev->devfn);
8153 pf->instance = pfs_found;
8154
8155 /* do a special CORER for clearing PXE mode once at init */
8156 if (hw->revision_id == 0 &&
8157 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
8158 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
8159 i40e_flush(hw);
8160 msleep(200);
8161 pf->corer_count++;
8162
8163 i40e_clear_pxe_mode(hw);
8164 }
8165
8166 /* Reset here to make sure all is clean and to define PF 'n' */
8167 err = i40e_pf_reset(hw);
8168 if (err) {
8169 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
8170 goto err_pf_reset;
8171 }
8172 pf->pfr_count++;
8173
8174 hw->aq.num_arq_entries = I40E_AQ_LEN;
8175 hw->aq.num_asq_entries = I40E_AQ_LEN;
8176 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8177 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
8178 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
8179 snprintf(pf->misc_int_name, sizeof(pf->misc_int_name) - 1,
8180 "%s-pf%d:misc",
8181 dev_driver_string(&pf->pdev->dev), pf->hw.pf_id);
8182
8183 err = i40e_init_shared_code(hw);
8184 if (err) {
8185 dev_info(&pdev->dev, "init_shared_code failed: %d\n", err);
8186 goto err_pf_reset;
8187 }
8188
8189 /* set up a default setting for link flow control */
8190 pf->hw.fc.requested_mode = I40E_FC_NONE;
8191
8192 err = i40e_init_adminq(hw);
8193 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
8194 if (err) {
8195 dev_info(&pdev->dev,
8196 "init_adminq failed: %d expecting API %02x.%02x\n",
8197 err,
8198 I40E_FW_API_VERSION_MAJOR, I40E_FW_API_VERSION_MINOR);
8199 goto err_pf_reset;
8200 }
8201
8202 i40e_verify_eeprom(pf);
8203
8204 i40e_clear_pxe_mode(hw);
8205 err = i40e_get_capabilities(pf);
8206 if (err)
8207 goto err_adminq_setup;
8208
8209 err = i40e_sw_init(pf);
8210 if (err) {
8211 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
8212 goto err_sw_init;
8213 }
8214
8215 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
8216 hw->func_caps.num_rx_qp,
8217 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
8218 if (err) {
8219 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
8220 goto err_init_lan_hmc;
8221 }
8222
8223 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
8224 if (err) {
8225 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
8226 err = -ENOENT;
8227 goto err_configure_lan_hmc;
8228 }
8229
8230 i40e_get_mac_addr(hw, hw->mac.addr);
8231 if (!is_valid_ether_addr(hw->mac.addr)) {
8232 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
8233 err = -EIO;
8234 goto err_mac_addr;
8235 }
8236 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
8237 memcpy(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN);
8238
8239 pci_set_drvdata(pdev, pf);
8240 pci_save_state(pdev);
8241#ifdef CONFIG_I40E_DCB
8242 err = i40e_init_pf_dcb(pf);
8243 if (err) {
8244 dev_info(&pdev->dev, "init_pf_dcb failed: %d\n", err);
8245 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8246 goto err_init_dcb;
8247 }
8248#endif /* CONFIG_I40E_DCB */
8249
8250 /* set up periodic task facility */
8251 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
8252 pf->service_timer_period = HZ;
8253
8254 INIT_WORK(&pf->service_task, i40e_service_task);
8255 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
8256 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
8257 pf->link_check_timeout = jiffies;
8258
8259 /* WoL defaults to disabled */
8260 pf->wol_en = false;
8261 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
8262
8263 /* set up the main switch operations */
8264 i40e_determine_queue_usage(pf);
8265 i40e_init_interrupt_scheme(pf);
8266
8267 /* Set up the *vsi struct based on the number of VSIs in the HW,
8268 * and set up our local tracking of the MAIN PF vsi.
8269 */
8270 len = sizeof(struct i40e_vsi *) * pf->hw.func_caps.num_vsis;
8271 pf->vsi = kzalloc(len, GFP_KERNEL);
8272 if (!pf->vsi) {
8273 err = -ENOMEM;
8274 goto err_switch_setup;
8275 }
8276
8277 err = i40e_setup_pf_switch(pf, false);
8278 if (err) {
8279 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
8280 goto err_vsis;
8281 }
8282
8283 /* The main driver is (mostly) up and happy. We need to set this state
8284 * before setting up the misc vector or we get a race and the vector
8285 * ends up disabled forever.
8286 */
8287 clear_bit(__I40E_DOWN, &pf->state);
8288
8289 /* In case of MSIX we are going to setup the misc vector right here
8290 * to handle admin queue events etc. In case of legacy and MSI
8291 * the misc functionality and queue processing is combined in
8292 * the same vector and that gets setup at open.
8293 */
8294 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8295 err = i40e_setup_misc_vector(pf);
8296 if (err) {
8297 dev_info(&pdev->dev,
8298 "setup of misc vector failed: %d\n", err);
8299 goto err_vsis;
8300 }
8301 }
8302
8303 /* prep for VF support */
8304 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
8305 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
8306 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
8307 u32 val;
8308
8309 /* disable link interrupts for VFs */
8310 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
8311 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
8312 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
8313 i40e_flush(hw);
8314
8315 if (pci_num_vf(pdev)) {
8316 dev_info(&pdev->dev,
8317 "Active VFs found, allocating resources.\n");
8318 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
8319 if (err)
8320 dev_info(&pdev->dev,
8321 "Error %d allocating resources for existing VFs\n",
8322 err);
8323 }
8324 }
8325
8326 pfs_found++;
8327
8328 i40e_dbg_pf_init(pf);
8329
8330 /* tell the firmware that we're starting */
8331 dv.major_version = DRV_VERSION_MAJOR;
8332 dv.minor_version = DRV_VERSION_MINOR;
8333 dv.build_version = DRV_VERSION_BUILD;
8334 dv.subbuild_version = 0;
8335 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
8336
8337 /* since everything's happy, start the service_task timer */
8338 mod_timer(&pf->service_timer,
8339 round_jiffies(jiffies + pf->service_timer_period));
8340
8341 /* Get the negotiated link width and speed from PCI config space */
8342 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
8343
8344 i40e_set_pci_config_data(hw, link_status);
8345
8346 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
8347 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
8348 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
8349 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
8350 "Unknown"),
8351 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
8352 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
8353 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
8354 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
8355 "Unknown"));
8356
8357 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
8358 hw->bus.speed < i40e_bus_speed_8000) {
8359 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
8360 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
8361 }
8362
8363 /* print a string summarizing features */
8364 i40e_print_features(pf);
8365
8366 return 0;
8367
8368 /* Unwind what we've done if something failed in the setup */
8369err_vsis:
8370 set_bit(__I40E_DOWN, &pf->state);
8371 i40e_clear_interrupt_scheme(pf);
8372 kfree(pf->vsi);
8373err_switch_setup:
8374 i40e_reset_interrupt_capability(pf);
8375 del_timer_sync(&pf->service_timer);
8376#ifdef CONFIG_I40E_DCB
8377err_init_dcb:
8378#endif /* CONFIG_I40E_DCB */
8379err_mac_addr:
8380err_configure_lan_hmc:
8381 (void)i40e_shutdown_lan_hmc(hw);
8382err_init_lan_hmc:
8383 kfree(pf->qp_pile);
8384 kfree(pf->irq_pile);
8385err_sw_init:
8386err_adminq_setup:
8387 (void)i40e_shutdown_adminq(hw);
8388err_pf_reset:
8389 iounmap(hw->hw_addr);
8390err_ioremap:
8391 kfree(pf);
8392err_pf_alloc:
8393 pci_disable_pcie_error_reporting(pdev);
8394 pci_release_selected_regions(pdev,
8395 pci_select_bars(pdev, IORESOURCE_MEM));
8396err_pci_reg:
8397err_dma:
8398 pci_disable_device(pdev);
8399 return err;
8400}
8401
8402/**
8403 * i40e_remove - Device removal routine
8404 * @pdev: PCI device information struct
8405 *
8406 * i40e_remove is called by the PCI subsystem to alert the driver
8407 * that is should release a PCI device. This could be caused by a
8408 * Hot-Plug event, or because the driver is going to be removed from
8409 * memory.
8410 **/
8411static void i40e_remove(struct pci_dev *pdev)
8412{
8413 struct i40e_pf *pf = pci_get_drvdata(pdev);
8414 i40e_status ret_code;
8415 u32 reg;
8416 int i;
8417
8418 i40e_dbg_pf_exit(pf);
8419
8420 i40e_ptp_stop(pf);
8421
8422 /* no more scheduling of any task */
8423 set_bit(__I40E_DOWN, &pf->state);
8424 del_timer_sync(&pf->service_timer);
8425 cancel_work_sync(&pf->service_task);
8426
8427 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
8428 i40e_free_vfs(pf);
8429 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
8430 }
8431
8432 i40e_fdir_teardown(pf);
8433
8434 /* If there is a switch structure or any orphans, remove them.
8435 * This will leave only the PF's VSI remaining.
8436 */
8437 for (i = 0; i < I40E_MAX_VEB; i++) {
8438 if (!pf->veb[i])
8439 continue;
8440
8441 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
8442 pf->veb[i]->uplink_seid == 0)
8443 i40e_switch_branch_release(pf->veb[i]);
8444 }
8445
8446 /* Now we can shutdown the PF's VSI, just before we kill
8447 * adminq and hmc.
8448 */
8449 if (pf->vsi[pf->lan_vsi])
8450 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
8451
8452 i40e_stop_misc_vector(pf);
8453 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
8454 synchronize_irq(pf->msix_entries[0].vector);
8455 free_irq(pf->msix_entries[0].vector, pf);
8456 }
8457
8458 /* shutdown and destroy the HMC */
8459 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
8460 if (ret_code)
8461 dev_warn(&pdev->dev,
8462 "Failed to destroy the HMC resources: %d\n", ret_code);
8463
8464 /* shutdown the adminq */
8465 ret_code = i40e_shutdown_adminq(&pf->hw);
8466 if (ret_code)
8467 dev_warn(&pdev->dev,
8468 "Failed to destroy the Admin Queue resources: %d\n",
8469 ret_code);
8470
8471 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
8472 i40e_clear_interrupt_scheme(pf);
8473 for (i = 0; i < pf->hw.func_caps.num_vsis; i++) {
8474 if (pf->vsi[i]) {
8475 i40e_vsi_clear_rings(pf->vsi[i]);
8476 i40e_vsi_clear(pf->vsi[i]);
8477 pf->vsi[i] = NULL;
8478 }
8479 }
8480
8481 for (i = 0; i < I40E_MAX_VEB; i++) {
8482 kfree(pf->veb[i]);
8483 pf->veb[i] = NULL;
8484 }
8485
8486 kfree(pf->qp_pile);
8487 kfree(pf->irq_pile);
8488 kfree(pf->sw_config);
8489 kfree(pf->vsi);
8490
8491 /* force a PF reset to clean anything leftover */
8492 reg = rd32(&pf->hw, I40E_PFGEN_CTRL);
8493 wr32(&pf->hw, I40E_PFGEN_CTRL, (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
8494 i40e_flush(&pf->hw);
8495
8496 iounmap(pf->hw.hw_addr);
8497 kfree(pf);
8498 pci_release_selected_regions(pdev,
8499 pci_select_bars(pdev, IORESOURCE_MEM));
8500
8501 pci_disable_pcie_error_reporting(pdev);
8502 pci_disable_device(pdev);
8503}
8504
8505/**
8506 * i40e_pci_error_detected - warning that something funky happened in PCI land
8507 * @pdev: PCI device information struct
8508 *
8509 * Called to warn that something happened and the error handling steps
8510 * are in progress. Allows the driver to quiesce things, be ready for
8511 * remediation.
8512 **/
8513static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
8514 enum pci_channel_state error)
8515{
8516 struct i40e_pf *pf = pci_get_drvdata(pdev);
8517
8518 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
8519
8520 /* shutdown all operations */
8521 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
8522 rtnl_lock();
8523 i40e_prep_for_reset(pf);
8524 rtnl_unlock();
8525 }
8526
8527 /* Request a slot reset */
8528 return PCI_ERS_RESULT_NEED_RESET;
8529}
8530
8531/**
8532 * i40e_pci_error_slot_reset - a PCI slot reset just happened
8533 * @pdev: PCI device information struct
8534 *
8535 * Called to find if the driver can work with the device now that
8536 * the pci slot has been reset. If a basic connection seems good
8537 * (registers are readable and have sane content) then return a
8538 * happy little PCI_ERS_RESULT_xxx.
8539 **/
8540static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
8541{
8542 struct i40e_pf *pf = pci_get_drvdata(pdev);
8543 pci_ers_result_t result;
8544 int err;
8545 u32 reg;
8546
8547 dev_info(&pdev->dev, "%s\n", __func__);
8548 if (pci_enable_device_mem(pdev)) {
8549 dev_info(&pdev->dev,
8550 "Cannot re-enable PCI device after reset.\n");
8551 result = PCI_ERS_RESULT_DISCONNECT;
8552 } else {
8553 pci_set_master(pdev);
8554 pci_restore_state(pdev);
8555 pci_save_state(pdev);
8556 pci_wake_from_d3(pdev, false);
8557
8558 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
8559 if (reg == 0)
8560 result = PCI_ERS_RESULT_RECOVERED;
8561 else
8562 result = PCI_ERS_RESULT_DISCONNECT;
8563 }
8564
8565 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8566 if (err) {
8567 dev_info(&pdev->dev,
8568 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8569 err);
8570 /* non-fatal, continue */
8571 }
8572
8573 return result;
8574}
8575
8576/**
8577 * i40e_pci_error_resume - restart operations after PCI error recovery
8578 * @pdev: PCI device information struct
8579 *
8580 * Called to allow the driver to bring things back up after PCI error
8581 * and/or reset recovery has finished.
8582 **/
8583static void i40e_pci_error_resume(struct pci_dev *pdev)
8584{
8585 struct i40e_pf *pf = pci_get_drvdata(pdev);
8586
8587 dev_info(&pdev->dev, "%s\n", __func__);
8588 if (test_bit(__I40E_SUSPENDED, &pf->state))
8589 return;
8590
8591 rtnl_lock();
8592 i40e_handle_reset_warning(pf);
8593 rtnl_lock();
8594}
8595
8596/**
8597 * i40e_shutdown - PCI callback for shutting down
8598 * @pdev: PCI device information struct
8599 **/
8600static void i40e_shutdown(struct pci_dev *pdev)
8601{
8602 struct i40e_pf *pf = pci_get_drvdata(pdev);
8603 struct i40e_hw *hw = &pf->hw;
8604
8605 set_bit(__I40E_SUSPENDED, &pf->state);
8606 set_bit(__I40E_DOWN, &pf->state);
8607 rtnl_lock();
8608 i40e_prep_for_reset(pf);
8609 rtnl_unlock();
8610
8611 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8612 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8613
8614 if (system_state == SYSTEM_POWER_OFF) {
8615 pci_wake_from_d3(pdev, pf->wol_en);
8616 pci_set_power_state(pdev, PCI_D3hot);
8617 }
8618}
8619
8620#ifdef CONFIG_PM
8621/**
8622 * i40e_suspend - PCI callback for moving to D3
8623 * @pdev: PCI device information struct
8624 **/
8625static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
8626{
8627 struct i40e_pf *pf = pci_get_drvdata(pdev);
8628 struct i40e_hw *hw = &pf->hw;
8629
8630 set_bit(__I40E_SUSPENDED, &pf->state);
8631 set_bit(__I40E_DOWN, &pf->state);
8632 rtnl_lock();
8633 i40e_prep_for_reset(pf);
8634 rtnl_unlock();
8635
8636 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
8637 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
8638
8639 pci_wake_from_d3(pdev, pf->wol_en);
8640 pci_set_power_state(pdev, PCI_D3hot);
8641
8642 return 0;
8643}
8644
8645/**
8646 * i40e_resume - PCI callback for waking up from D3
8647 * @pdev: PCI device information struct
8648 **/
8649static int i40e_resume(struct pci_dev *pdev)
8650{
8651 struct i40e_pf *pf = pci_get_drvdata(pdev);
8652 u32 err;
8653
8654 pci_set_power_state(pdev, PCI_D0);
8655 pci_restore_state(pdev);
8656 /* pci_restore_state() clears dev->state_saves, so
8657 * call pci_save_state() again to restore it.
8658 */
8659 pci_save_state(pdev);
8660
8661 err = pci_enable_device_mem(pdev);
8662 if (err) {
8663 dev_err(&pdev->dev,
8664 "%s: Cannot enable PCI device from suspend\n",
8665 __func__);
8666 return err;
8667 }
8668 pci_set_master(pdev);
8669
8670 /* no wakeup events while running */
8671 pci_wake_from_d3(pdev, false);
8672
8673 /* handling the reset will rebuild the device state */
8674 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
8675 clear_bit(__I40E_DOWN, &pf->state);
8676 rtnl_lock();
8677 i40e_reset_and_rebuild(pf, false);
8678 rtnl_unlock();
8679 }
8680
8681 return 0;
8682}
8683
8684#endif
8685static const struct pci_error_handlers i40e_err_handler = {
8686 .error_detected = i40e_pci_error_detected,
8687 .slot_reset = i40e_pci_error_slot_reset,
8688 .resume = i40e_pci_error_resume,
8689};
8690
8691static struct pci_driver i40e_driver = {
8692 .name = i40e_driver_name,
8693 .id_table = i40e_pci_tbl,
8694 .probe = i40e_probe,
8695 .remove = i40e_remove,
8696#ifdef CONFIG_PM
8697 .suspend = i40e_suspend,
8698 .resume = i40e_resume,
8699#endif
8700 .shutdown = i40e_shutdown,
8701 .err_handler = &i40e_err_handler,
8702 .sriov_configure = i40e_pci_sriov_configure,
8703};
8704
8705/**
8706 * i40e_init_module - Driver registration routine
8707 *
8708 * i40e_init_module is the first routine called when the driver is
8709 * loaded. All it does is register with the PCI subsystem.
8710 **/
8711static int __init i40e_init_module(void)
8712{
8713 pr_info("%s: %s - version %s\n", i40e_driver_name,
8714 i40e_driver_string, i40e_driver_version_str);
8715 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
8716 i40e_dbg_init();
8717 return pci_register_driver(&i40e_driver);
8718}
8719module_init(i40e_init_module);
8720
8721/**
8722 * i40e_exit_module - Driver exit cleanup routine
8723 *
8724 * i40e_exit_module is called just before the driver is removed
8725 * from memory.
8726 **/
8727static void __exit i40e_exit_module(void)
8728{
8729 pci_unregister_driver(&i40e_driver);
8730 i40e_dbg_exit();
8731}
8732module_exit(i40e_exit_module);