Loading...
1
2/*******************************************************************************
3 *
4 * Module Name: hwregs - Read/write access functions for the various ACPI
5 * control and status registers.
6 *
7 ******************************************************************************/
8
9/*
10 * Copyright (C) 2000 - 2012, Intel Corp.
11 * All rights reserved.
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions, and the following disclaimer,
18 * without modification.
19 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
20 * substantially similar to the "NO WARRANTY" disclaimer below
21 * ("Disclaimer") and any redistribution must be conditioned upon
22 * including a substantially similar Disclaimer requirement for further
23 * binary redistribution.
24 * 3. Neither the names of the above-listed copyright holders nor the names
25 * of any contributors may be used to endorse or promote products derived
26 * from this software without specific prior written permission.
27 *
28 * Alternatively, this software may be distributed under the terms of the
29 * GNU General Public License ("GPL") version 2 as published by the Free
30 * Software Foundation.
31 *
32 * NO WARRANTY
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
34 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
36 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
37 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
41 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
42 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43 * POSSIBILITY OF SUCH DAMAGES.
44 */
45
46#include <acpi/acpi.h>
47#include "accommon.h"
48#include "acnamesp.h"
49#include "acevents.h"
50
51#define _COMPONENT ACPI_HARDWARE
52ACPI_MODULE_NAME("hwregs")
53
54#if (!ACPI_REDUCED_HARDWARE)
55/* Local Prototypes */
56static acpi_status
57acpi_hw_read_multiple(u32 *value,
58 struct acpi_generic_address *register_a,
59 struct acpi_generic_address *register_b);
60
61static acpi_status
62acpi_hw_write_multiple(u32 value,
63 struct acpi_generic_address *register_a,
64 struct acpi_generic_address *register_b);
65
66#endif /* !ACPI_REDUCED_HARDWARE */
67
68/******************************************************************************
69 *
70 * FUNCTION: acpi_hw_validate_register
71 *
72 * PARAMETERS: Reg - GAS register structure
73 * max_bit_width - Max bit_width supported (32 or 64)
74 * Address - Pointer to where the gas->address
75 * is returned
76 *
77 * RETURN: Status
78 *
79 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
80 * pointer, Address, space_id, bit_width, and bit_offset.
81 *
82 ******************************************************************************/
83
84acpi_status
85acpi_hw_validate_register(struct acpi_generic_address *reg,
86 u8 max_bit_width, u64 *address)
87{
88
89 /* Must have a valid pointer to a GAS structure */
90
91 if (!reg) {
92 return (AE_BAD_PARAMETER);
93 }
94
95 /*
96 * Copy the target address. This handles possible alignment issues.
97 * Address must not be null. A null address also indicates an optional
98 * ACPI register that is not supported, so no error message.
99 */
100 ACPI_MOVE_64_TO_64(address, ®->address);
101 if (!(*address)) {
102 return (AE_BAD_ADDRESS);
103 }
104
105 /* Validate the space_iD */
106
107 if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
108 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
109 ACPI_ERROR((AE_INFO,
110 "Unsupported address space: 0x%X", reg->space_id));
111 return (AE_SUPPORT);
112 }
113
114 /* Validate the bit_width */
115
116 if ((reg->bit_width != 8) &&
117 (reg->bit_width != 16) &&
118 (reg->bit_width != 32) && (reg->bit_width != max_bit_width)) {
119 ACPI_ERROR((AE_INFO,
120 "Unsupported register bit width: 0x%X",
121 reg->bit_width));
122 return (AE_SUPPORT);
123 }
124
125 /* Validate the bit_offset. Just a warning for now. */
126
127 if (reg->bit_offset != 0) {
128 ACPI_WARNING((AE_INFO,
129 "Unsupported register bit offset: 0x%X",
130 reg->bit_offset));
131 }
132
133 return (AE_OK);
134}
135
136/******************************************************************************
137 *
138 * FUNCTION: acpi_hw_read
139 *
140 * PARAMETERS: Value - Where the value is returned
141 * Reg - GAS register structure
142 *
143 * RETURN: Status
144 *
145 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
146 * version of acpi_read, used internally since the overhead of
147 * 64-bit values is not needed.
148 *
149 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
150 * bit_width must be exactly 8, 16, or 32.
151 * space_iD must be system_memory or system_iO.
152 * bit_offset and access_width are currently ignored, as there has
153 * not been a need to implement these.
154 *
155 ******************************************************************************/
156
157acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
158{
159 u64 address;
160 u64 value64;
161 acpi_status status;
162
163 ACPI_FUNCTION_NAME(hw_read);
164
165 /* Validate contents of the GAS register */
166
167 status = acpi_hw_validate_register(reg, 32, &address);
168 if (ACPI_FAILURE(status)) {
169 return (status);
170 }
171
172 /* Initialize entire 32-bit return value to zero */
173
174 *value = 0;
175
176 /*
177 * Two address spaces supported: Memory or IO. PCI_Config is
178 * not supported here because the GAS structure is insufficient
179 */
180 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
181 status = acpi_os_read_memory((acpi_physical_address)
182 address, &value64, reg->bit_width);
183
184 *value = (u32)value64;
185 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
186
187 status = acpi_hw_read_port((acpi_io_address)
188 address, value, reg->bit_width);
189 }
190
191 ACPI_DEBUG_PRINT((ACPI_DB_IO,
192 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
193 *value, reg->bit_width, ACPI_FORMAT_UINT64(address),
194 acpi_ut_get_region_name(reg->space_id)));
195
196 return (status);
197}
198
199/******************************************************************************
200 *
201 * FUNCTION: acpi_hw_write
202 *
203 * PARAMETERS: Value - Value to be written
204 * Reg - GAS register structure
205 *
206 * RETURN: Status
207 *
208 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
209 * version of acpi_write, used internally since the overhead of
210 * 64-bit values is not needed.
211 *
212 ******************************************************************************/
213
214acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
215{
216 u64 address;
217 acpi_status status;
218
219 ACPI_FUNCTION_NAME(hw_write);
220
221 /* Validate contents of the GAS register */
222
223 status = acpi_hw_validate_register(reg, 32, &address);
224 if (ACPI_FAILURE(status)) {
225 return (status);
226 }
227
228 /*
229 * Two address spaces supported: Memory or IO. PCI_Config is
230 * not supported here because the GAS structure is insufficient
231 */
232 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
233 status = acpi_os_write_memory((acpi_physical_address)
234 address, (u64)value,
235 reg->bit_width);
236 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
237
238 status = acpi_hw_write_port((acpi_io_address)
239 address, value, reg->bit_width);
240 }
241
242 ACPI_DEBUG_PRINT((ACPI_DB_IO,
243 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
244 value, reg->bit_width, ACPI_FORMAT_UINT64(address),
245 acpi_ut_get_region_name(reg->space_id)));
246
247 return (status);
248}
249
250#if (!ACPI_REDUCED_HARDWARE)
251/*******************************************************************************
252 *
253 * FUNCTION: acpi_hw_clear_acpi_status
254 *
255 * PARAMETERS: None
256 *
257 * RETURN: Status
258 *
259 * DESCRIPTION: Clears all fixed and general purpose status bits
260 *
261 ******************************************************************************/
262
263acpi_status acpi_hw_clear_acpi_status(void)
264{
265 acpi_status status;
266 acpi_cpu_flags lock_flags = 0;
267
268 ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
269
270 ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
271 ACPI_BITMASK_ALL_FIXED_STATUS,
272 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
273
274 lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
275
276 /* Clear the fixed events in PM1 A/B */
277
278 status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
279 ACPI_BITMASK_ALL_FIXED_STATUS);
280
281 acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
282
283 if (ACPI_FAILURE(status))
284 goto exit;
285
286 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
287
288 status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
289
290exit:
291 return_ACPI_STATUS(status);
292}
293
294/*******************************************************************************
295 *
296 * FUNCTION: acpi_hw_get_bit_register_info
297 *
298 * PARAMETERS: register_id - Index of ACPI Register to access
299 *
300 * RETURN: The bitmask to be used when accessing the register
301 *
302 * DESCRIPTION: Map register_id into a register bitmask.
303 *
304 ******************************************************************************/
305
306struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
307{
308 ACPI_FUNCTION_ENTRY();
309
310 if (register_id > ACPI_BITREG_MAX) {
311 ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
312 register_id));
313 return (NULL);
314 }
315
316 return (&acpi_gbl_bit_register_info[register_id]);
317}
318
319/******************************************************************************
320 *
321 * FUNCTION: acpi_hw_write_pm1_control
322 *
323 * PARAMETERS: pm1a_control - Value to be written to PM1A control
324 * pm1b_control - Value to be written to PM1B control
325 *
326 * RETURN: Status
327 *
328 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
329 * different than than the PM1 A/B status and enable registers
330 * in that different values can be written to the A/B registers.
331 * Most notably, the SLP_TYP bits can be different, as per the
332 * values returned from the _Sx predefined methods.
333 *
334 ******************************************************************************/
335
336acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
337{
338 acpi_status status;
339
340 ACPI_FUNCTION_TRACE(hw_write_pm1_control);
341
342 status =
343 acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
344 if (ACPI_FAILURE(status)) {
345 return_ACPI_STATUS(status);
346 }
347
348 if (acpi_gbl_FADT.xpm1b_control_block.address) {
349 status =
350 acpi_hw_write(pm1b_control,
351 &acpi_gbl_FADT.xpm1b_control_block);
352 }
353 return_ACPI_STATUS(status);
354}
355
356/******************************************************************************
357 *
358 * FUNCTION: acpi_hw_register_read
359 *
360 * PARAMETERS: register_id - ACPI Register ID
361 * return_value - Where the register value is returned
362 *
363 * RETURN: Status and the value read.
364 *
365 * DESCRIPTION: Read from the specified ACPI register
366 *
367 ******************************************************************************/
368acpi_status
369acpi_hw_register_read(u32 register_id, u32 * return_value)
370{
371 u32 value = 0;
372 acpi_status status;
373
374 ACPI_FUNCTION_TRACE(hw_register_read);
375
376 switch (register_id) {
377 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
378
379 status = acpi_hw_read_multiple(&value,
380 &acpi_gbl_xpm1a_status,
381 &acpi_gbl_xpm1b_status);
382 break;
383
384 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
385
386 status = acpi_hw_read_multiple(&value,
387 &acpi_gbl_xpm1a_enable,
388 &acpi_gbl_xpm1b_enable);
389 break;
390
391 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
392
393 status = acpi_hw_read_multiple(&value,
394 &acpi_gbl_FADT.
395 xpm1a_control_block,
396 &acpi_gbl_FADT.
397 xpm1b_control_block);
398
399 /*
400 * Zero the write-only bits. From the ACPI specification, "Hardware
401 * Write-Only Bits": "Upon reads to registers with write-only bits,
402 * software masks out all write-only bits."
403 */
404 value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
405 break;
406
407 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
408
409 status =
410 acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block);
411 break;
412
413 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
414
415 status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block);
416 break;
417
418 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
419
420 status =
421 acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
422 break;
423
424 default:
425 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
426 status = AE_BAD_PARAMETER;
427 break;
428 }
429
430 if (ACPI_SUCCESS(status)) {
431 *return_value = value;
432 }
433
434 return_ACPI_STATUS(status);
435}
436
437/******************************************************************************
438 *
439 * FUNCTION: acpi_hw_register_write
440 *
441 * PARAMETERS: register_id - ACPI Register ID
442 * Value - The value to write
443 *
444 * RETURN: Status
445 *
446 * DESCRIPTION: Write to the specified ACPI register
447 *
448 * NOTE: In accordance with the ACPI specification, this function automatically
449 * preserves the value of the following bits, meaning that these bits cannot be
450 * changed via this interface:
451 *
452 * PM1_CONTROL[0] = SCI_EN
453 * PM1_CONTROL[9]
454 * PM1_STATUS[11]
455 *
456 * ACPI References:
457 * 1) Hardware Ignored Bits: When software writes to a register with ignored
458 * bit fields, it preserves the ignored bit fields
459 * 2) SCI_EN: OSPM always preserves this bit position
460 *
461 ******************************************************************************/
462
463acpi_status acpi_hw_register_write(u32 register_id, u32 value)
464{
465 acpi_status status;
466 u32 read_value;
467
468 ACPI_FUNCTION_TRACE(hw_register_write);
469
470 switch (register_id) {
471 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
472 /*
473 * Handle the "ignored" bit in PM1 Status. According to the ACPI
474 * specification, ignored bits are to be preserved when writing.
475 * Normally, this would mean a read/modify/write sequence. However,
476 * preserving a bit in the status register is different. Writing a
477 * one clears the status, and writing a zero preserves the status.
478 * Therefore, we must always write zero to the ignored bit.
479 *
480 * This behavior is clarified in the ACPI 4.0 specification.
481 */
482 value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
483
484 status = acpi_hw_write_multiple(value,
485 &acpi_gbl_xpm1a_status,
486 &acpi_gbl_xpm1b_status);
487 break;
488
489 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access */
490
491 status = acpi_hw_write_multiple(value,
492 &acpi_gbl_xpm1a_enable,
493 &acpi_gbl_xpm1b_enable);
494 break;
495
496 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
497
498 /*
499 * Perform a read first to preserve certain bits (per ACPI spec)
500 * Note: This includes SCI_EN, we never want to change this bit
501 */
502 status = acpi_hw_read_multiple(&read_value,
503 &acpi_gbl_FADT.
504 xpm1a_control_block,
505 &acpi_gbl_FADT.
506 xpm1b_control_block);
507 if (ACPI_FAILURE(status)) {
508 goto exit;
509 }
510
511 /* Insert the bits to be preserved */
512
513 ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
514 read_value);
515
516 /* Now we can write the data */
517
518 status = acpi_hw_write_multiple(value,
519 &acpi_gbl_FADT.
520 xpm1a_control_block,
521 &acpi_gbl_FADT.
522 xpm1b_control_block);
523 break;
524
525 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
526
527 /*
528 * For control registers, all reserved bits must be preserved,
529 * as per the ACPI spec.
530 */
531 status =
532 acpi_hw_read(&read_value,
533 &acpi_gbl_FADT.xpm2_control_block);
534 if (ACPI_FAILURE(status)) {
535 goto exit;
536 }
537
538 /* Insert the bits to be preserved */
539
540 ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
541 read_value);
542
543 status =
544 acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
545 break;
546
547 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
548
549 status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
550 break;
551
552 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
553
554 /* SMI_CMD is currently always in IO space */
555
556 status =
557 acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
558 break;
559
560 default:
561 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
562 status = AE_BAD_PARAMETER;
563 break;
564 }
565
566 exit:
567 return_ACPI_STATUS(status);
568}
569
570/******************************************************************************
571 *
572 * FUNCTION: acpi_hw_read_multiple
573 *
574 * PARAMETERS: Value - Where the register value is returned
575 * register_a - First ACPI register (required)
576 * register_b - Second ACPI register (optional)
577 *
578 * RETURN: Status
579 *
580 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
581 *
582 ******************************************************************************/
583
584static acpi_status
585acpi_hw_read_multiple(u32 *value,
586 struct acpi_generic_address *register_a,
587 struct acpi_generic_address *register_b)
588{
589 u32 value_a = 0;
590 u32 value_b = 0;
591 acpi_status status;
592
593 /* The first register is always required */
594
595 status = acpi_hw_read(&value_a, register_a);
596 if (ACPI_FAILURE(status)) {
597 return (status);
598 }
599
600 /* Second register is optional */
601
602 if (register_b->address) {
603 status = acpi_hw_read(&value_b, register_b);
604 if (ACPI_FAILURE(status)) {
605 return (status);
606 }
607 }
608
609 /*
610 * OR the two return values together. No shifting or masking is necessary,
611 * because of how the PM1 registers are defined in the ACPI specification:
612 *
613 * "Although the bits can be split between the two register blocks (each
614 * register block has a unique pointer within the FADT), the bit positions
615 * are maintained. The register block with unimplemented bits (that is,
616 * those implemented in the other register block) always returns zeros,
617 * and writes have no side effects"
618 */
619 *value = (value_a | value_b);
620 return (AE_OK);
621}
622
623/******************************************************************************
624 *
625 * FUNCTION: acpi_hw_write_multiple
626 *
627 * PARAMETERS: Value - The value to write
628 * register_a - First ACPI register (required)
629 * register_b - Second ACPI register (optional)
630 *
631 * RETURN: Status
632 *
633 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
634 *
635 ******************************************************************************/
636
637static acpi_status
638acpi_hw_write_multiple(u32 value,
639 struct acpi_generic_address *register_a,
640 struct acpi_generic_address *register_b)
641{
642 acpi_status status;
643
644 /* The first register is always required */
645
646 status = acpi_hw_write(value, register_a);
647 if (ACPI_FAILURE(status)) {
648 return (status);
649 }
650
651 /*
652 * Second register is optional
653 *
654 * No bit shifting or clearing is necessary, because of how the PM1
655 * registers are defined in the ACPI specification:
656 *
657 * "Although the bits can be split between the two register blocks (each
658 * register block has a unique pointer within the FADT), the bit positions
659 * are maintained. The register block with unimplemented bits (that is,
660 * those implemented in the other register block) always returns zeros,
661 * and writes have no side effects"
662 */
663 if (register_b->address) {
664 status = acpi_hw_write(value, register_b);
665 }
666
667 return (status);
668}
669
670#endif /* !ACPI_REDUCED_HARDWARE */
1/*******************************************************************************
2 *
3 * Module Name: hwregs - Read/write access functions for the various ACPI
4 * control and status registers.
5 *
6 ******************************************************************************/
7
8/*
9 * Copyright (C) 2000 - 2014, Intel Corp.
10 * All rights reserved.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions, and the following disclaimer,
17 * without modification.
18 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
19 * substantially similar to the "NO WARRANTY" disclaimer below
20 * ("Disclaimer") and any redistribution must be conditioned upon
21 * including a substantially similar Disclaimer requirement for further
22 * binary redistribution.
23 * 3. Neither the names of the above-listed copyright holders nor the names
24 * of any contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * Alternatively, this software may be distributed under the terms of the
28 * GNU General Public License ("GPL") version 2 as published by the Free
29 * Software Foundation.
30 *
31 * NO WARRANTY
32 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
33 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
34 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
35 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
36 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
37 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
38 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
39 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
40 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
41 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
42 * POSSIBILITY OF SUCH DAMAGES.
43 */
44
45#include <acpi/acpi.h>
46#include "accommon.h"
47#include "acevents.h"
48
49#define _COMPONENT ACPI_HARDWARE
50ACPI_MODULE_NAME("hwregs")
51
52#if (!ACPI_REDUCED_HARDWARE)
53/* Local Prototypes */
54static acpi_status
55acpi_hw_read_multiple(u32 *value,
56 struct acpi_generic_address *register_a,
57 struct acpi_generic_address *register_b);
58
59static acpi_status
60acpi_hw_write_multiple(u32 value,
61 struct acpi_generic_address *register_a,
62 struct acpi_generic_address *register_b);
63
64#endif /* !ACPI_REDUCED_HARDWARE */
65
66/******************************************************************************
67 *
68 * FUNCTION: acpi_hw_validate_register
69 *
70 * PARAMETERS: reg - GAS register structure
71 * max_bit_width - Max bit_width supported (32 or 64)
72 * address - Pointer to where the gas->address
73 * is returned
74 *
75 * RETURN: Status
76 *
77 * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
78 * pointer, Address, space_id, bit_width, and bit_offset.
79 *
80 ******************************************************************************/
81
82acpi_status
83acpi_hw_validate_register(struct acpi_generic_address *reg,
84 u8 max_bit_width, u64 *address)
85{
86
87 /* Must have a valid pointer to a GAS structure */
88
89 if (!reg) {
90 return (AE_BAD_PARAMETER);
91 }
92
93 /*
94 * Copy the target address. This handles possible alignment issues.
95 * Address must not be null. A null address also indicates an optional
96 * ACPI register that is not supported, so no error message.
97 */
98 ACPI_MOVE_64_TO_64(address, ®->address);
99 if (!(*address)) {
100 return (AE_BAD_ADDRESS);
101 }
102
103 /* Validate the space_ID */
104
105 if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
106 (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
107 ACPI_ERROR((AE_INFO,
108 "Unsupported address space: 0x%X", reg->space_id));
109 return (AE_SUPPORT);
110 }
111
112 /* Validate the bit_width */
113
114 if ((reg->bit_width != 8) &&
115 (reg->bit_width != 16) &&
116 (reg->bit_width != 32) && (reg->bit_width != max_bit_width)) {
117 ACPI_ERROR((AE_INFO,
118 "Unsupported register bit width: 0x%X",
119 reg->bit_width));
120 return (AE_SUPPORT);
121 }
122
123 /* Validate the bit_offset. Just a warning for now. */
124
125 if (reg->bit_offset != 0) {
126 ACPI_WARNING((AE_INFO,
127 "Unsupported register bit offset: 0x%X",
128 reg->bit_offset));
129 }
130
131 return (AE_OK);
132}
133
134/******************************************************************************
135 *
136 * FUNCTION: acpi_hw_read
137 *
138 * PARAMETERS: value - Where the value is returned
139 * reg - GAS register structure
140 *
141 * RETURN: Status
142 *
143 * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
144 * version of acpi_read, used internally since the overhead of
145 * 64-bit values is not needed.
146 *
147 * LIMITATIONS: <These limitations also apply to acpi_hw_write>
148 * bit_width must be exactly 8, 16, or 32.
149 * space_ID must be system_memory or system_IO.
150 * bit_offset and access_width are currently ignored, as there has
151 * not been a need to implement these.
152 *
153 ******************************************************************************/
154
155acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
156{
157 u64 address;
158 u64 value64;
159 acpi_status status;
160
161 ACPI_FUNCTION_NAME(hw_read);
162
163 /* Validate contents of the GAS register */
164
165 status = acpi_hw_validate_register(reg, 32, &address);
166 if (ACPI_FAILURE(status)) {
167 return (status);
168 }
169
170 /* Initialize entire 32-bit return value to zero */
171
172 *value = 0;
173
174 /*
175 * Two address spaces supported: Memory or IO. PCI_Config is
176 * not supported here because the GAS structure is insufficient
177 */
178 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
179 status = acpi_os_read_memory((acpi_physical_address)
180 address, &value64, reg->bit_width);
181
182 *value = (u32)value64;
183 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
184
185 status = acpi_hw_read_port((acpi_io_address)
186 address, value, reg->bit_width);
187 }
188
189 ACPI_DEBUG_PRINT((ACPI_DB_IO,
190 "Read: %8.8X width %2d from %8.8X%8.8X (%s)\n",
191 *value, reg->bit_width, ACPI_FORMAT_UINT64(address),
192 acpi_ut_get_region_name(reg->space_id)));
193
194 return (status);
195}
196
197/******************************************************************************
198 *
199 * FUNCTION: acpi_hw_write
200 *
201 * PARAMETERS: value - Value to be written
202 * reg - GAS register structure
203 *
204 * RETURN: Status
205 *
206 * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
207 * version of acpi_write, used internally since the overhead of
208 * 64-bit values is not needed.
209 *
210 ******************************************************************************/
211
212acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
213{
214 u64 address;
215 acpi_status status;
216
217 ACPI_FUNCTION_NAME(hw_write);
218
219 /* Validate contents of the GAS register */
220
221 status = acpi_hw_validate_register(reg, 32, &address);
222 if (ACPI_FAILURE(status)) {
223 return (status);
224 }
225
226 /*
227 * Two address spaces supported: Memory or IO. PCI_Config is
228 * not supported here because the GAS structure is insufficient
229 */
230 if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
231 status = acpi_os_write_memory((acpi_physical_address)
232 address, (u64)value,
233 reg->bit_width);
234 } else { /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
235
236 status = acpi_hw_write_port((acpi_io_address)
237 address, value, reg->bit_width);
238 }
239
240 ACPI_DEBUG_PRINT((ACPI_DB_IO,
241 "Wrote: %8.8X width %2d to %8.8X%8.8X (%s)\n",
242 value, reg->bit_width, ACPI_FORMAT_UINT64(address),
243 acpi_ut_get_region_name(reg->space_id)));
244
245 return (status);
246}
247
248#if (!ACPI_REDUCED_HARDWARE)
249/*******************************************************************************
250 *
251 * FUNCTION: acpi_hw_clear_acpi_status
252 *
253 * PARAMETERS: None
254 *
255 * RETURN: Status
256 *
257 * DESCRIPTION: Clears all fixed and general purpose status bits
258 *
259 ******************************************************************************/
260
261acpi_status acpi_hw_clear_acpi_status(void)
262{
263 acpi_status status;
264 acpi_cpu_flags lock_flags = 0;
265
266 ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
267
268 ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
269 ACPI_BITMASK_ALL_FIXED_STATUS,
270 ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
271
272 lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
273
274 /* Clear the fixed events in PM1 A/B */
275
276 status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
277 ACPI_BITMASK_ALL_FIXED_STATUS);
278
279 acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
280
281 if (ACPI_FAILURE(status))
282 goto exit;
283
284 /* Clear the GPE Bits in all GPE registers in all GPE blocks */
285
286 status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
287
288exit:
289 return_ACPI_STATUS(status);
290}
291
292/*******************************************************************************
293 *
294 * FUNCTION: acpi_hw_get_bit_register_info
295 *
296 * PARAMETERS: register_id - Index of ACPI Register to access
297 *
298 * RETURN: The bitmask to be used when accessing the register
299 *
300 * DESCRIPTION: Map register_id into a register bitmask.
301 *
302 ******************************************************************************/
303
304struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
305{
306 ACPI_FUNCTION_ENTRY();
307
308 if (register_id > ACPI_BITREG_MAX) {
309 ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
310 register_id));
311 return (NULL);
312 }
313
314 return (&acpi_gbl_bit_register_info[register_id]);
315}
316
317/******************************************************************************
318 *
319 * FUNCTION: acpi_hw_write_pm1_control
320 *
321 * PARAMETERS: pm1a_control - Value to be written to PM1A control
322 * pm1b_control - Value to be written to PM1B control
323 *
324 * RETURN: Status
325 *
326 * DESCRIPTION: Write the PM1 A/B control registers. These registers are
327 * different than than the PM1 A/B status and enable registers
328 * in that different values can be written to the A/B registers.
329 * Most notably, the SLP_TYP bits can be different, as per the
330 * values returned from the _Sx predefined methods.
331 *
332 ******************************************************************************/
333
334acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
335{
336 acpi_status status;
337
338 ACPI_FUNCTION_TRACE(hw_write_pm1_control);
339
340 status =
341 acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
342 if (ACPI_FAILURE(status)) {
343 return_ACPI_STATUS(status);
344 }
345
346 if (acpi_gbl_FADT.xpm1b_control_block.address) {
347 status =
348 acpi_hw_write(pm1b_control,
349 &acpi_gbl_FADT.xpm1b_control_block);
350 }
351 return_ACPI_STATUS(status);
352}
353
354/******************************************************************************
355 *
356 * FUNCTION: acpi_hw_register_read
357 *
358 * PARAMETERS: register_id - ACPI Register ID
359 * return_value - Where the register value is returned
360 *
361 * RETURN: Status and the value read.
362 *
363 * DESCRIPTION: Read from the specified ACPI register
364 *
365 ******************************************************************************/
366acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value)
367{
368 u32 value = 0;
369 acpi_status status;
370
371 ACPI_FUNCTION_TRACE(hw_register_read);
372
373 switch (register_id) {
374 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
375
376 status = acpi_hw_read_multiple(&value,
377 &acpi_gbl_xpm1a_status,
378 &acpi_gbl_xpm1b_status);
379 break;
380
381 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
382
383 status = acpi_hw_read_multiple(&value,
384 &acpi_gbl_xpm1a_enable,
385 &acpi_gbl_xpm1b_enable);
386 break;
387
388 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
389
390 status = acpi_hw_read_multiple(&value,
391 &acpi_gbl_FADT.
392 xpm1a_control_block,
393 &acpi_gbl_FADT.
394 xpm1b_control_block);
395
396 /*
397 * Zero the write-only bits. From the ACPI specification, "Hardware
398 * Write-Only Bits": "Upon reads to registers with write-only bits,
399 * software masks out all write-only bits."
400 */
401 value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
402 break;
403
404 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
405
406 status =
407 acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block);
408 break;
409
410 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
411
412 status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block);
413 break;
414
415 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
416
417 status =
418 acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
419 break;
420
421 default:
422
423 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
424 status = AE_BAD_PARAMETER;
425 break;
426 }
427
428 if (ACPI_SUCCESS(status)) {
429 *return_value = value;
430 }
431
432 return_ACPI_STATUS(status);
433}
434
435/******************************************************************************
436 *
437 * FUNCTION: acpi_hw_register_write
438 *
439 * PARAMETERS: register_id - ACPI Register ID
440 * value - The value to write
441 *
442 * RETURN: Status
443 *
444 * DESCRIPTION: Write to the specified ACPI register
445 *
446 * NOTE: In accordance with the ACPI specification, this function automatically
447 * preserves the value of the following bits, meaning that these bits cannot be
448 * changed via this interface:
449 *
450 * PM1_CONTROL[0] = SCI_EN
451 * PM1_CONTROL[9]
452 * PM1_STATUS[11]
453 *
454 * ACPI References:
455 * 1) Hardware Ignored Bits: When software writes to a register with ignored
456 * bit fields, it preserves the ignored bit fields
457 * 2) SCI_EN: OSPM always preserves this bit position
458 *
459 ******************************************************************************/
460
461acpi_status acpi_hw_register_write(u32 register_id, u32 value)
462{
463 acpi_status status;
464 u32 read_value;
465
466 ACPI_FUNCTION_TRACE(hw_register_write);
467
468 switch (register_id) {
469 case ACPI_REGISTER_PM1_STATUS: /* PM1 A/B: 16-bit access each */
470 /*
471 * Handle the "ignored" bit in PM1 Status. According to the ACPI
472 * specification, ignored bits are to be preserved when writing.
473 * Normally, this would mean a read/modify/write sequence. However,
474 * preserving a bit in the status register is different. Writing a
475 * one clears the status, and writing a zero preserves the status.
476 * Therefore, we must always write zero to the ignored bit.
477 *
478 * This behavior is clarified in the ACPI 4.0 specification.
479 */
480 value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
481
482 status = acpi_hw_write_multiple(value,
483 &acpi_gbl_xpm1a_status,
484 &acpi_gbl_xpm1b_status);
485 break;
486
487 case ACPI_REGISTER_PM1_ENABLE: /* PM1 A/B: 16-bit access each */
488
489 status = acpi_hw_write_multiple(value,
490 &acpi_gbl_xpm1a_enable,
491 &acpi_gbl_xpm1b_enable);
492 break;
493
494 case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
495 /*
496 * Perform a read first to preserve certain bits (per ACPI spec)
497 * Note: This includes SCI_EN, we never want to change this bit
498 */
499 status = acpi_hw_read_multiple(&read_value,
500 &acpi_gbl_FADT.
501 xpm1a_control_block,
502 &acpi_gbl_FADT.
503 xpm1b_control_block);
504 if (ACPI_FAILURE(status)) {
505 goto exit;
506 }
507
508 /* Insert the bits to be preserved */
509
510 ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
511 read_value);
512
513 /* Now we can write the data */
514
515 status = acpi_hw_write_multiple(value,
516 &acpi_gbl_FADT.
517 xpm1a_control_block,
518 &acpi_gbl_FADT.
519 xpm1b_control_block);
520 break;
521
522 case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
523 /*
524 * For control registers, all reserved bits must be preserved,
525 * as per the ACPI spec.
526 */
527 status =
528 acpi_hw_read(&read_value,
529 &acpi_gbl_FADT.xpm2_control_block);
530 if (ACPI_FAILURE(status)) {
531 goto exit;
532 }
533
534 /* Insert the bits to be preserved */
535
536 ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
537 read_value);
538
539 status =
540 acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
541 break;
542
543 case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
544
545 status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
546 break;
547
548 case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
549
550 /* SMI_CMD is currently always in IO space */
551
552 status =
553 acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
554 break;
555
556 default:
557
558 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
559 status = AE_BAD_PARAMETER;
560 break;
561 }
562
563exit:
564 return_ACPI_STATUS(status);
565}
566
567/******************************************************************************
568 *
569 * FUNCTION: acpi_hw_read_multiple
570 *
571 * PARAMETERS: value - Where the register value is returned
572 * register_a - First ACPI register (required)
573 * register_b - Second ACPI register (optional)
574 *
575 * RETURN: Status
576 *
577 * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
578 *
579 ******************************************************************************/
580
581static acpi_status
582acpi_hw_read_multiple(u32 *value,
583 struct acpi_generic_address *register_a,
584 struct acpi_generic_address *register_b)
585{
586 u32 value_a = 0;
587 u32 value_b = 0;
588 acpi_status status;
589
590 /* The first register is always required */
591
592 status = acpi_hw_read(&value_a, register_a);
593 if (ACPI_FAILURE(status)) {
594 return (status);
595 }
596
597 /* Second register is optional */
598
599 if (register_b->address) {
600 status = acpi_hw_read(&value_b, register_b);
601 if (ACPI_FAILURE(status)) {
602 return (status);
603 }
604 }
605
606 /*
607 * OR the two return values together. No shifting or masking is necessary,
608 * because of how the PM1 registers are defined in the ACPI specification:
609 *
610 * "Although the bits can be split between the two register blocks (each
611 * register block has a unique pointer within the FADT), the bit positions
612 * are maintained. The register block with unimplemented bits (that is,
613 * those implemented in the other register block) always returns zeros,
614 * and writes have no side effects"
615 */
616 *value = (value_a | value_b);
617 return (AE_OK);
618}
619
620/******************************************************************************
621 *
622 * FUNCTION: acpi_hw_write_multiple
623 *
624 * PARAMETERS: value - The value to write
625 * register_a - First ACPI register (required)
626 * register_b - Second ACPI register (optional)
627 *
628 * RETURN: Status
629 *
630 * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
631 *
632 ******************************************************************************/
633
634static acpi_status
635acpi_hw_write_multiple(u32 value,
636 struct acpi_generic_address *register_a,
637 struct acpi_generic_address *register_b)
638{
639 acpi_status status;
640
641 /* The first register is always required */
642
643 status = acpi_hw_write(value, register_a);
644 if (ACPI_FAILURE(status)) {
645 return (status);
646 }
647
648 /*
649 * Second register is optional
650 *
651 * No bit shifting or clearing is necessary, because of how the PM1
652 * registers are defined in the ACPI specification:
653 *
654 * "Although the bits can be split between the two register blocks (each
655 * register block has a unique pointer within the FADT), the bit positions
656 * are maintained. The register block with unimplemented bits (that is,
657 * those implemented in the other register block) always returns zeros,
658 * and writes have no side effects"
659 */
660 if (register_b->address) {
661 status = acpi_hw_write(value, register_b);
662 }
663
664 return (status);
665}
666
667#endif /* !ACPI_REDUCED_HARDWARE */