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1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15#ifndef _ASM_TILE_DMA_MAPPING_H
16#define _ASM_TILE_DMA_MAPPING_H
17
18#include <linux/mm.h>
19#include <linux/scatterlist.h>
20#include <linux/cache.h>
21#include <linux/io.h>
22
23/*
24 * Note that on x86 and powerpc, there is a "struct dma_mapping_ops"
25 * that is used for all the DMA operations. For now, we don't have an
26 * equivalent on tile, because we only have a single way of doing DMA.
27 * (Tilera bug 7994 to use dma_mapping_ops.)
28 */
29
30#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
31#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
32
33extern dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size,
34 enum dma_data_direction);
35extern void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
36 size_t size, enum dma_data_direction);
37extern int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
38 enum dma_data_direction);
39extern void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
40 int nhwentries, enum dma_data_direction);
41extern dma_addr_t dma_map_page(struct device *dev, struct page *page,
42 unsigned long offset, size_t size,
43 enum dma_data_direction);
44extern void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
45 size_t size, enum dma_data_direction);
46extern void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
47 int nelems, enum dma_data_direction);
48extern void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
49 int nelems, enum dma_data_direction);
50
51
52void *dma_alloc_coherent(struct device *dev, size_t size,
53 dma_addr_t *dma_handle, gfp_t flag);
54
55void dma_free_coherent(struct device *dev, size_t size,
56 void *vaddr, dma_addr_t dma_handle);
57
58extern void dma_sync_single_for_cpu(struct device *, dma_addr_t, size_t,
59 enum dma_data_direction);
60extern void dma_sync_single_for_device(struct device *, dma_addr_t,
61 size_t, enum dma_data_direction);
62extern void dma_sync_single_range_for_cpu(struct device *, dma_addr_t,
63 unsigned long offset, size_t,
64 enum dma_data_direction);
65extern void dma_sync_single_range_for_device(struct device *, dma_addr_t,
66 unsigned long offset, size_t,
67 enum dma_data_direction);
68extern void dma_cache_sync(struct device *dev, void *vaddr, size_t,
69 enum dma_data_direction);
70
71static inline int
72dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
73{
74 return 0;
75}
76
77static inline int
78dma_supported(struct device *dev, u64 mask)
79{
80 return 1;
81}
82
83static inline int
84dma_set_mask(struct device *dev, u64 mask)
85{
86 if (!dev->dma_mask || !dma_supported(dev, mask))
87 return -EIO;
88
89 *dev->dma_mask = mask;
90
91 return 0;
92}
93
94#endif /* _ASM_TILE_DMA_MAPPING_H */
1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
7 *
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
12 * more details.
13 */
14
15#ifndef _ASM_TILE_DMA_MAPPING_H
16#define _ASM_TILE_DMA_MAPPING_H
17
18#include <linux/mm.h>
19#include <linux/scatterlist.h>
20#include <linux/cache.h>
21#include <linux/io.h>
22
23#ifdef __tilegx__
24#define ARCH_HAS_DMA_GET_REQUIRED_MASK
25#endif
26
27extern struct dma_map_ops *tile_dma_map_ops;
28extern struct dma_map_ops *gx_pci_dma_map_ops;
29extern struct dma_map_ops *gx_legacy_pci_dma_map_ops;
30extern struct dma_map_ops *gx_hybrid_pci_dma_map_ops;
31
32static inline struct dma_map_ops *get_dma_ops(struct device *dev)
33{
34 if (dev && dev->archdata.dma_ops)
35 return dev->archdata.dma_ops;
36 else
37 return tile_dma_map_ops;
38}
39
40static inline dma_addr_t get_dma_offset(struct device *dev)
41{
42 return dev->archdata.dma_offset;
43}
44
45static inline void set_dma_offset(struct device *dev, dma_addr_t off)
46{
47 dev->archdata.dma_offset = off;
48}
49
50static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
51{
52 return paddr;
53}
54
55static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
56{
57 return daddr;
58}
59
60static inline void dma_mark_clean(void *addr, size_t size) {}
61
62#include <asm-generic/dma-mapping-common.h>
63
64static inline void set_dma_ops(struct device *dev, struct dma_map_ops *ops)
65{
66 dev->archdata.dma_ops = ops;
67}
68
69static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
70{
71 if (!dev->dma_mask)
72 return 0;
73
74 return addr + size - 1 <= *dev->dma_mask;
75}
76
77static inline int
78dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
79{
80 debug_dma_mapping_error(dev, dma_addr);
81 return get_dma_ops(dev)->mapping_error(dev, dma_addr);
82}
83
84static inline int
85dma_supported(struct device *dev, u64 mask)
86{
87 return get_dma_ops(dev)->dma_supported(dev, mask);
88}
89
90static inline int
91dma_set_mask(struct device *dev, u64 mask)
92{
93 struct dma_map_ops *dma_ops = get_dma_ops(dev);
94
95 /*
96 * For PCI devices with 64-bit DMA addressing capability, promote
97 * the dma_ops to hybrid, with the consistent memory DMA space limited
98 * to 32-bit. For 32-bit capable devices, limit the streaming DMA
99 * address range to max_direct_dma_addr.
100 */
101 if (dma_ops == gx_pci_dma_map_ops ||
102 dma_ops == gx_hybrid_pci_dma_map_ops ||
103 dma_ops == gx_legacy_pci_dma_map_ops) {
104 if (mask == DMA_BIT_MASK(64) &&
105 dma_ops == gx_legacy_pci_dma_map_ops)
106 set_dma_ops(dev, gx_hybrid_pci_dma_map_ops);
107 else if (mask > dev->archdata.max_direct_dma_addr)
108 mask = dev->archdata.max_direct_dma_addr;
109 }
110
111 if (!dev->dma_mask || !dma_supported(dev, mask))
112 return -EIO;
113
114 *dev->dma_mask = mask;
115
116 return 0;
117}
118
119static inline void *dma_alloc_attrs(struct device *dev, size_t size,
120 dma_addr_t *dma_handle, gfp_t flag,
121 struct dma_attrs *attrs)
122{
123 struct dma_map_ops *dma_ops = get_dma_ops(dev);
124 void *cpu_addr;
125
126 cpu_addr = dma_ops->alloc(dev, size, dma_handle, flag, attrs);
127
128 debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
129
130 return cpu_addr;
131}
132
133static inline void dma_free_attrs(struct device *dev, size_t size,
134 void *cpu_addr, dma_addr_t dma_handle,
135 struct dma_attrs *attrs)
136{
137 struct dma_map_ops *dma_ops = get_dma_ops(dev);
138
139 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
140
141 dma_ops->free(dev, size, cpu_addr, dma_handle, attrs);
142}
143
144#define dma_alloc_coherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
145#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_attrs(d, s, h, f, NULL)
146#define dma_free_coherent(d, s, v, h) dma_free_attrs(d, s, v, h, NULL)
147#define dma_free_noncoherent(d, s, v, h) dma_free_attrs(d, s, v, h, NULL)
148
149/*
150 * dma_alloc_noncoherent() is #defined to return coherent memory,
151 * so there's no need to do any flushing here.
152 */
153static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
154 enum dma_data_direction direction)
155{
156}
157
158#endif /* _ASM_TILE_DMA_MAPPING_H */