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1/*
2 * Copyright IBM Corp. 1999, 2009
3 *
4 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
5 */
6
7#ifndef __ASM_SWITCH_TO_H
8#define __ASM_SWITCH_TO_H
9
10#include <linux/thread_info.h>
11
12extern struct task_struct *__switch_to(void *, void *);
13extern void update_per_regs(struct task_struct *task);
14
15static inline void save_fp_regs(s390_fp_regs *fpregs)
16{
17 asm volatile(
18 " std 0,%O0+8(%R0)\n"
19 " std 2,%O0+24(%R0)\n"
20 " std 4,%O0+40(%R0)\n"
21 " std 6,%O0+56(%R0)"
22 : "=Q" (*fpregs) : "Q" (*fpregs));
23 if (!MACHINE_HAS_IEEE)
24 return;
25 asm volatile(
26 " stfpc %0\n"
27 " std 1,%O0+16(%R0)\n"
28 " std 3,%O0+32(%R0)\n"
29 " std 5,%O0+48(%R0)\n"
30 " std 7,%O0+64(%R0)\n"
31 " std 8,%O0+72(%R0)\n"
32 " std 9,%O0+80(%R0)\n"
33 " std 10,%O0+88(%R0)\n"
34 " std 11,%O0+96(%R0)\n"
35 " std 12,%O0+104(%R0)\n"
36 " std 13,%O0+112(%R0)\n"
37 " std 14,%O0+120(%R0)\n"
38 " std 15,%O0+128(%R0)\n"
39 : "=Q" (*fpregs) : "Q" (*fpregs));
40}
41
42static inline void restore_fp_regs(s390_fp_regs *fpregs)
43{
44 asm volatile(
45 " ld 0,%O0+8(%R0)\n"
46 " ld 2,%O0+24(%R0)\n"
47 " ld 4,%O0+40(%R0)\n"
48 " ld 6,%O0+56(%R0)"
49 : : "Q" (*fpregs));
50 if (!MACHINE_HAS_IEEE)
51 return;
52 asm volatile(
53 " lfpc %0\n"
54 " ld 1,%O0+16(%R0)\n"
55 " ld 3,%O0+32(%R0)\n"
56 " ld 5,%O0+48(%R0)\n"
57 " ld 7,%O0+64(%R0)\n"
58 " ld 8,%O0+72(%R0)\n"
59 " ld 9,%O0+80(%R0)\n"
60 " ld 10,%O0+88(%R0)\n"
61 " ld 11,%O0+96(%R0)\n"
62 " ld 12,%O0+104(%R0)\n"
63 " ld 13,%O0+112(%R0)\n"
64 " ld 14,%O0+120(%R0)\n"
65 " ld 15,%O0+128(%R0)\n"
66 : : "Q" (*fpregs));
67}
68
69static inline void save_access_regs(unsigned int *acrs)
70{
71 asm volatile("stam 0,15,%0" : "=Q" (*acrs));
72}
73
74static inline void restore_access_regs(unsigned int *acrs)
75{
76 asm volatile("lam 0,15,%0" : : "Q" (*acrs));
77}
78
79#define switch_to(prev,next,last) do { \
80 if (prev->mm) { \
81 save_fp_regs(&prev->thread.fp_regs); \
82 save_access_regs(&prev->thread.acrs[0]); \
83 } \
84 if (next->mm) { \
85 restore_fp_regs(&next->thread.fp_regs); \
86 restore_access_regs(&next->thread.acrs[0]); \
87 update_per_regs(next); \
88 } \
89 prev = __switch_to(prev,next); \
90} while (0)
91
92extern void account_vtime(struct task_struct *, struct task_struct *);
93extern void account_tick_vtime(struct task_struct *);
94
95#define finish_arch_switch(prev) do { \
96 set_fs(current->thread.mm_segment); \
97 account_vtime(prev, current); \
98} while (0)
99
100#endif /* __ASM_SWITCH_TO_H */
1/*
2 * Copyright IBM Corp. 1999, 2009
3 *
4 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
5 */
6
7#ifndef __ASM_SWITCH_TO_H
8#define __ASM_SWITCH_TO_H
9
10#include <linux/thread_info.h>
11#include <asm/ptrace.h>
12
13extern struct task_struct *__switch_to(void *, void *);
14extern void update_cr_regs(struct task_struct *task);
15
16static inline int test_fp_ctl(u32 fpc)
17{
18 u32 orig_fpc;
19 int rc;
20
21 if (!MACHINE_HAS_IEEE)
22 return 0;
23
24 asm volatile(
25 " efpc %1\n"
26 " sfpc %2\n"
27 "0: sfpc %1\n"
28 " la %0,0\n"
29 "1:\n"
30 EX_TABLE(0b,1b)
31 : "=d" (rc), "=d" (orig_fpc)
32 : "d" (fpc), "0" (-EINVAL));
33 return rc;
34}
35
36static inline void save_fp_ctl(u32 *fpc)
37{
38 if (!MACHINE_HAS_IEEE)
39 return;
40
41 asm volatile(
42 " stfpc %0\n"
43 : "+Q" (*fpc));
44}
45
46static inline int restore_fp_ctl(u32 *fpc)
47{
48 int rc;
49
50 if (!MACHINE_HAS_IEEE)
51 return 0;
52
53 asm volatile(
54 "0: lfpc %1\n"
55 " la %0,0\n"
56 "1:\n"
57 EX_TABLE(0b,1b)
58 : "=d" (rc) : "Q" (*fpc), "0" (-EINVAL));
59 return rc;
60}
61
62static inline void save_fp_regs(freg_t *fprs)
63{
64 asm volatile("std 0,%0" : "=Q" (fprs[0]));
65 asm volatile("std 2,%0" : "=Q" (fprs[2]));
66 asm volatile("std 4,%0" : "=Q" (fprs[4]));
67 asm volatile("std 6,%0" : "=Q" (fprs[6]));
68 if (!MACHINE_HAS_IEEE)
69 return;
70 asm volatile("std 1,%0" : "=Q" (fprs[1]));
71 asm volatile("std 3,%0" : "=Q" (fprs[3]));
72 asm volatile("std 5,%0" : "=Q" (fprs[5]));
73 asm volatile("std 7,%0" : "=Q" (fprs[7]));
74 asm volatile("std 8,%0" : "=Q" (fprs[8]));
75 asm volatile("std 9,%0" : "=Q" (fprs[9]));
76 asm volatile("std 10,%0" : "=Q" (fprs[10]));
77 asm volatile("std 11,%0" : "=Q" (fprs[11]));
78 asm volatile("std 12,%0" : "=Q" (fprs[12]));
79 asm volatile("std 13,%0" : "=Q" (fprs[13]));
80 asm volatile("std 14,%0" : "=Q" (fprs[14]));
81 asm volatile("std 15,%0" : "=Q" (fprs[15]));
82}
83
84static inline void restore_fp_regs(freg_t *fprs)
85{
86 asm volatile("ld 0,%0" : : "Q" (fprs[0]));
87 asm volatile("ld 2,%0" : : "Q" (fprs[2]));
88 asm volatile("ld 4,%0" : : "Q" (fprs[4]));
89 asm volatile("ld 6,%0" : : "Q" (fprs[6]));
90 if (!MACHINE_HAS_IEEE)
91 return;
92 asm volatile("ld 1,%0" : : "Q" (fprs[1]));
93 asm volatile("ld 3,%0" : : "Q" (fprs[3]));
94 asm volatile("ld 5,%0" : : "Q" (fprs[5]));
95 asm volatile("ld 7,%0" : : "Q" (fprs[7]));
96 asm volatile("ld 8,%0" : : "Q" (fprs[8]));
97 asm volatile("ld 9,%0" : : "Q" (fprs[9]));
98 asm volatile("ld 10,%0" : : "Q" (fprs[10]));
99 asm volatile("ld 11,%0" : : "Q" (fprs[11]));
100 asm volatile("ld 12,%0" : : "Q" (fprs[12]));
101 asm volatile("ld 13,%0" : : "Q" (fprs[13]));
102 asm volatile("ld 14,%0" : : "Q" (fprs[14]));
103 asm volatile("ld 15,%0" : : "Q" (fprs[15]));
104}
105
106static inline void save_access_regs(unsigned int *acrs)
107{
108 typedef struct { int _[NUM_ACRS]; } acrstype;
109
110 asm volatile("stam 0,15,%0" : "=Q" (*(acrstype *)acrs));
111}
112
113static inline void restore_access_regs(unsigned int *acrs)
114{
115 typedef struct { int _[NUM_ACRS]; } acrstype;
116
117 asm volatile("lam 0,15,%0" : : "Q" (*(acrstype *)acrs));
118}
119
120#define switch_to(prev,next,last) do { \
121 if (prev->mm) { \
122 save_fp_ctl(&prev->thread.fp_regs.fpc); \
123 save_fp_regs(prev->thread.fp_regs.fprs); \
124 save_access_regs(&prev->thread.acrs[0]); \
125 save_ri_cb(prev->thread.ri_cb); \
126 } \
127 if (next->mm) { \
128 restore_fp_ctl(&next->thread.fp_regs.fpc); \
129 restore_fp_regs(next->thread.fp_regs.fprs); \
130 restore_access_regs(&next->thread.acrs[0]); \
131 restore_ri_cb(next->thread.ri_cb, prev->thread.ri_cb); \
132 update_cr_regs(next); \
133 } \
134 prev = __switch_to(prev,next); \
135 update_primary_asce(current); \
136} while (0)
137
138#define finish_arch_switch(prev) do { \
139 set_fs(current->thread.mm_segment); \
140} while (0)
141
142#endif /* __ASM_SWITCH_TO_H */